cm-x270.c 14 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/cm-x270.c
  3. *
  4. * Copyright (C) 2007 CompuLab, Ltd.
  5. * Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/types.h>
  12. #include <linux/pm.h>
  13. #include <linux/fb.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/irq.h>
  16. #include <linux/sysdev.h>
  17. #include <linux/io.h>
  18. #include <linux/delay.h>
  19. #include <linux/dm9000.h>
  20. #include <linux/rtc-v3020.h>
  21. #include <linux/serial_8250.h>
  22. #include <video/mbxfb.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach-types.h>
  25. #include <asm/mach/map.h>
  26. #include <asm/arch/pxa-regs.h>
  27. #include <asm/arch/pxa2xx-regs.h>
  28. #include <asm/arch/pxafb.h>
  29. #include <asm/arch/ohci.h>
  30. #include <asm/arch/mmc.h>
  31. #include <asm/arch/bitfield.h>
  32. #include <asm/arch/cm-x270.h>
  33. #include <asm/hardware/it8152.h>
  34. #include "generic.h"
  35. #include "cm-x270-pci.h"
  36. #define RTC_PHYS_BASE (PXA_CS1_PHYS + (5 << 22))
  37. #define DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
  38. static struct resource cmx270_dm9k_resource[] = {
  39. [0] = {
  40. .start = DM9000_PHYS_BASE,
  41. .end = DM9000_PHYS_BASE + 4,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = DM9000_PHYS_BASE + 8,
  46. .end = DM9000_PHYS_BASE + 8 + 500,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. [2] = {
  50. .start = CMX270_ETHIRQ,
  51. .end = CMX270_ETHIRQ,
  52. .flags = IORESOURCE_IRQ,
  53. }
  54. };
  55. /* for the moment we limit ourselves to 32bit IO until some
  56. * better IO routines can be written and tested
  57. */
  58. static struct dm9000_plat_data cmx270_dm9k_platdata = {
  59. .flags = DM9000_PLATF_32BITONLY,
  60. };
  61. /* Ethernet device */
  62. static struct platform_device cmx270_device_dm9k = {
  63. .name = "dm9000",
  64. .id = 0,
  65. .num_resources = ARRAY_SIZE(cmx270_dm9k_resource),
  66. .resource = cmx270_dm9k_resource,
  67. .dev = {
  68. .platform_data = &cmx270_dm9k_platdata,
  69. }
  70. };
  71. /* audio device */
  72. static struct platform_device cmx270_audio_device = {
  73. .name = "pxa2xx-ac97",
  74. .id = -1,
  75. };
  76. /* touchscreen controller */
  77. static struct platform_device cmx270_ts_device = {
  78. .name = "ucb1400_ts",
  79. .id = -1,
  80. };
  81. /* RTC */
  82. static struct resource cmx270_v3020_resource[] = {
  83. [0] = {
  84. .start = RTC_PHYS_BASE,
  85. .end = RTC_PHYS_BASE + 4,
  86. .flags = IORESOURCE_MEM,
  87. },
  88. };
  89. struct v3020_platform_data cmx270_v3020_pdata = {
  90. .leftshift = 16,
  91. };
  92. static struct platform_device cmx270_rtc_device = {
  93. .name = "v3020",
  94. .num_resources = ARRAY_SIZE(cmx270_v3020_resource),
  95. .resource = cmx270_v3020_resource,
  96. .id = -1,
  97. .dev = {
  98. .platform_data = &cmx270_v3020_pdata,
  99. }
  100. };
  101. /*
  102. * CM-X270 LEDs
  103. */
  104. static struct platform_device cmx270_led_device = {
  105. .name = "cm-x270-led",
  106. .id = -1,
  107. };
  108. /* 2700G graphics */
  109. static u64 fb_dma_mask = ~(u64)0;
  110. static struct resource cmx270_2700G_resource[] = {
  111. /* frame buffer memory including ODFB and External SDRAM */
  112. [0] = {
  113. .start = MARATHON_PHYS,
  114. .end = MARATHON_PHYS + 0x02000000,
  115. .flags = IORESOURCE_MEM,
  116. },
  117. /* Marathon registers */
  118. [1] = {
  119. .start = MARATHON_PHYS + 0x03fe0000,
  120. .end = MARATHON_PHYS + 0x03ffffff,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. };
  124. static unsigned long save_lcd_regs[10];
  125. static int cmx270_marathon_probe(struct fb_info *fb)
  126. {
  127. /* save PXA-270 pin settings before enabling 2700G */
  128. save_lcd_regs[0] = GPDR1;
  129. save_lcd_regs[1] = GPDR2;
  130. save_lcd_regs[2] = GAFR1_U;
  131. save_lcd_regs[3] = GAFR2_L;
  132. save_lcd_regs[4] = GAFR2_U;
  133. /* Disable PXA-270 on-chip controller driving pins */
  134. GPDR1 &= ~(0xfc000000);
  135. GPDR2 &= ~(0x00c03fff);
  136. GAFR1_U &= ~(0xfff00000);
  137. GAFR2_L &= ~(0x0fffffff);
  138. GAFR2_U &= ~(0x0000f000);
  139. return 0;
  140. }
  141. static int cmx270_marathon_remove(struct fb_info *fb)
  142. {
  143. GPDR1 = save_lcd_regs[0];
  144. GPDR2 = save_lcd_regs[1];
  145. GAFR1_U = save_lcd_regs[2];
  146. GAFR2_L = save_lcd_regs[3];
  147. GAFR2_U = save_lcd_regs[4];
  148. return 0;
  149. }
  150. static struct mbxfb_platform_data cmx270_2700G_data = {
  151. .xres = {
  152. .min = 240,
  153. .max = 1200,
  154. .defval = 640,
  155. },
  156. .yres = {
  157. .min = 240,
  158. .max = 1200,
  159. .defval = 480,
  160. },
  161. .bpp = {
  162. .min = 16,
  163. .max = 32,
  164. .defval = 16,
  165. },
  166. .memsize = 8*1024*1024,
  167. .probe = cmx270_marathon_probe,
  168. .remove = cmx270_marathon_remove,
  169. };
  170. static struct platform_device cmx270_2700G = {
  171. .name = "mbx-fb",
  172. .dev = {
  173. .platform_data = &cmx270_2700G_data,
  174. .dma_mask = &fb_dma_mask,
  175. .coherent_dma_mask = 0xffffffff,
  176. },
  177. .num_resources = ARRAY_SIZE(cmx270_2700G_resource),
  178. .resource = cmx270_2700G_resource,
  179. .id = -1,
  180. };
  181. static u64 ata_dma_mask = ~(u64)0;
  182. static struct platform_device cmx270_ata = {
  183. .name = "pata_cm_x270",
  184. .id = -1,
  185. .dev = {
  186. .dma_mask = &ata_dma_mask,
  187. .coherent_dma_mask = 0xffffffff,
  188. },
  189. };
  190. /* platform devices */
  191. static struct platform_device *platform_devices[] __initdata = {
  192. &cmx270_device_dm9k,
  193. &cmx270_audio_device,
  194. &cmx270_rtc_device,
  195. &cmx270_2700G,
  196. &cmx270_led_device,
  197. &cmx270_ts_device,
  198. &cmx270_ata,
  199. };
  200. /* Map PCI companion and IDE/General Purpose CS statically */
  201. static struct map_desc cmx270_io_desc[] __initdata = {
  202. [0] = { /* IDE/general purpose space */
  203. .virtual = CMX270_IDE104_VIRT,
  204. .pfn = __phys_to_pfn(CMX270_IDE104_PHYS),
  205. .length = SZ_64M - SZ_8M,
  206. .type = MT_DEVICE
  207. },
  208. [1] = { /* PCI bridge */
  209. .virtual = CMX270_IT8152_VIRT,
  210. .pfn = __phys_to_pfn(CMX270_IT8152_PHYS),
  211. .length = SZ_64M,
  212. .type = MT_DEVICE
  213. },
  214. };
  215. /*
  216. Display definitions
  217. keep these for backwards compatibility, although symbolic names (as
  218. e.g. in lpd270.c) looks better
  219. */
  220. #define MTYPE_STN320x240 0
  221. #define MTYPE_TFT640x480 1
  222. #define MTYPE_CRT640x480 2
  223. #define MTYPE_CRT800x600 3
  224. #define MTYPE_TFT320x240 6
  225. #define MTYPE_STN640x480 7
  226. static struct pxafb_mode_info generic_stn_320x240_mode = {
  227. .pixclock = 76923,
  228. .bpp = 8,
  229. .xres = 320,
  230. .yres = 240,
  231. .hsync_len = 3,
  232. .vsync_len = 2,
  233. .left_margin = 3,
  234. .upper_margin = 0,
  235. .right_margin = 3,
  236. .lower_margin = 0,
  237. .sync = (FB_SYNC_HOR_HIGH_ACT |
  238. FB_SYNC_VERT_HIGH_ACT),
  239. .cmap_greyscale = 0,
  240. };
  241. static struct pxafb_mach_info generic_stn_320x240 = {
  242. .modes = &generic_stn_320x240_mode,
  243. .num_modes = 1,
  244. .lccr0 = 0,
  245. .lccr3 = (LCCR3_PixClkDiv(0x03) |
  246. LCCR3_Acb(0xff) |
  247. LCCR3_PCP),
  248. .cmap_inverse = 0,
  249. .cmap_static = 0,
  250. };
  251. static struct pxafb_mode_info generic_tft_640x480_mode = {
  252. .pixclock = 38461,
  253. .bpp = 8,
  254. .xres = 640,
  255. .yres = 480,
  256. .hsync_len = 60,
  257. .vsync_len = 2,
  258. .left_margin = 70,
  259. .upper_margin = 10,
  260. .right_margin = 70,
  261. .lower_margin = 5,
  262. .sync = 0,
  263. .cmap_greyscale = 0,
  264. };
  265. static struct pxafb_mach_info generic_tft_640x480 = {
  266. .modes = &generic_tft_640x480_mode,
  267. .num_modes = 1,
  268. .lccr0 = (LCCR0_PAS),
  269. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  270. LCCR3_Acb(0xff) |
  271. LCCR3_PCP),
  272. .cmap_inverse = 0,
  273. .cmap_static = 0,
  274. };
  275. static struct pxafb_mode_info generic_crt_640x480_mode = {
  276. .pixclock = 38461,
  277. .bpp = 8,
  278. .xres = 640,
  279. .yres = 480,
  280. .hsync_len = 63,
  281. .vsync_len = 2,
  282. .left_margin = 81,
  283. .upper_margin = 33,
  284. .right_margin = 16,
  285. .lower_margin = 10,
  286. .sync = (FB_SYNC_HOR_HIGH_ACT |
  287. FB_SYNC_VERT_HIGH_ACT),
  288. .cmap_greyscale = 0,
  289. };
  290. static struct pxafb_mach_info generic_crt_640x480 = {
  291. .modes = &generic_crt_640x480_mode,
  292. .num_modes = 1,
  293. .lccr0 = (LCCR0_PAS),
  294. .lccr3 = (LCCR3_PixClkDiv(0x01) |
  295. LCCR3_Acb(0xff)),
  296. .cmap_inverse = 0,
  297. .cmap_static = 0,
  298. };
  299. static struct pxafb_mode_info generic_crt_800x600_mode = {
  300. .pixclock = 28846,
  301. .bpp = 8,
  302. .xres = 800,
  303. .yres = 600,
  304. .hsync_len = 63,
  305. .vsync_len = 2,
  306. .left_margin = 26,
  307. .upper_margin = 21,
  308. .right_margin = 26,
  309. .lower_margin = 11,
  310. .sync = (FB_SYNC_HOR_HIGH_ACT |
  311. FB_SYNC_VERT_HIGH_ACT),
  312. .cmap_greyscale = 0,
  313. };
  314. static struct pxafb_mach_info generic_crt_800x600 = {
  315. .modes = &generic_crt_800x600_mode,
  316. .num_modes = 1,
  317. .lccr0 = (LCCR0_PAS),
  318. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  319. LCCR3_Acb(0xff)),
  320. .cmap_inverse = 0,
  321. .cmap_static = 0,
  322. };
  323. static struct pxafb_mode_info generic_tft_320x240_mode = {
  324. .pixclock = 134615,
  325. .bpp = 16,
  326. .xres = 320,
  327. .yres = 240,
  328. .hsync_len = 63,
  329. .vsync_len = 7,
  330. .left_margin = 75,
  331. .upper_margin = 0,
  332. .right_margin = 15,
  333. .lower_margin = 15,
  334. .sync = 0,
  335. .cmap_greyscale = 0,
  336. };
  337. static struct pxafb_mach_info generic_tft_320x240 = {
  338. .modes = &generic_tft_320x240_mode,
  339. .num_modes = 1,
  340. .lccr0 = (LCCR0_PAS),
  341. .lccr3 = (LCCR3_PixClkDiv(0x06) |
  342. LCCR3_Acb(0xff) |
  343. LCCR3_PCP),
  344. .cmap_inverse = 0,
  345. .cmap_static = 0,
  346. };
  347. static struct pxafb_mode_info generic_stn_640x480_mode = {
  348. .pixclock = 57692,
  349. .bpp = 8,
  350. .xres = 640,
  351. .yres = 480,
  352. .hsync_len = 4,
  353. .vsync_len = 2,
  354. .left_margin = 10,
  355. .upper_margin = 5,
  356. .right_margin = 10,
  357. .lower_margin = 5,
  358. .sync = (FB_SYNC_HOR_HIGH_ACT |
  359. FB_SYNC_VERT_HIGH_ACT),
  360. .cmap_greyscale = 0,
  361. };
  362. static struct pxafb_mach_info generic_stn_640x480 = {
  363. .modes = &generic_stn_640x480_mode,
  364. .num_modes = 1,
  365. .lccr0 = 0,
  366. .lccr3 = (LCCR3_PixClkDiv(0x02) |
  367. LCCR3_Acb(0xff)),
  368. .cmap_inverse = 0,
  369. .cmap_static = 0,
  370. };
  371. static struct pxafb_mach_info *cmx270_display = &generic_crt_640x480;
  372. static int __init cmx270_set_display(char *str)
  373. {
  374. int disp_type = simple_strtol(str, NULL, 0);
  375. switch (disp_type) {
  376. case MTYPE_STN320x240:
  377. cmx270_display = &generic_stn_320x240;
  378. break;
  379. case MTYPE_TFT640x480:
  380. cmx270_display = &generic_tft_640x480;
  381. break;
  382. case MTYPE_CRT640x480:
  383. cmx270_display = &generic_crt_640x480;
  384. break;
  385. case MTYPE_CRT800x600:
  386. cmx270_display = &generic_crt_800x600;
  387. break;
  388. case MTYPE_TFT320x240:
  389. cmx270_display = &generic_tft_320x240;
  390. break;
  391. case MTYPE_STN640x480:
  392. cmx270_display = &generic_stn_640x480;
  393. break;
  394. default: /* fallback to CRT 640x480 */
  395. cmx270_display = &generic_crt_640x480;
  396. break;
  397. }
  398. return 1;
  399. }
  400. /*
  401. This should be done really early to get proper configuration for
  402. frame buffer.
  403. Indeed, pxafb parameters can be used istead, but CM-X270 bootloader
  404. has limitied line length for kernel command line, and also it will
  405. break compatibitlty with proprietary releases already in field.
  406. */
  407. __setup("monitor=", cmx270_set_display);
  408. /* PXA27x OHCI controller setup */
  409. static int cmx270_ohci_init(struct device *dev)
  410. {
  411. /* Set the Power Control Polarity Low */
  412. UHCHR = (UHCHR | UHCHR_PCPL) &
  413. ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
  414. return 0;
  415. }
  416. static struct pxaohci_platform_data cmx270_ohci_platform_data = {
  417. .port_mode = PMM_PERPORT_MODE,
  418. .init = cmx270_ohci_init,
  419. };
  420. static int cmx270_mci_init(struct device *dev,
  421. irq_handler_t cmx270_detect_int,
  422. void *data)
  423. {
  424. int err;
  425. /*
  426. * setup GPIO for PXA27x MMC controller
  427. */
  428. pxa_gpio_mode(GPIO32_MMCCLK_MD);
  429. pxa_gpio_mode(GPIO112_MMCCMD_MD);
  430. pxa_gpio_mode(GPIO92_MMCDAT0_MD);
  431. pxa_gpio_mode(GPIO109_MMCDAT1_MD);
  432. pxa_gpio_mode(GPIO110_MMCDAT2_MD);
  433. pxa_gpio_mode(GPIO111_MMCDAT3_MD);
  434. /* SB-X270 uses GPIO105 as SD power enable */
  435. pxa_gpio_mode(105 | GPIO_OUT);
  436. /* card detect IRQ on GPIO 83 */
  437. pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ));
  438. err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int,
  439. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  440. "MMC card detect", data);
  441. if (err)
  442. printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't"
  443. " request MMC card detect IRQ\n");
  444. return err;
  445. }
  446. static void cmx270_mci_setpower(struct device *dev, unsigned int vdd)
  447. {
  448. struct pxamci_platform_data *p_d = dev->platform_data;
  449. if ((1 << vdd) & p_d->ocr_mask) {
  450. printk(KERN_DEBUG "%s: on\n", __FUNCTION__);
  451. GPCR(105) = GPIO_bit(105);
  452. } else {
  453. GPSR(105) = GPIO_bit(105);
  454. printk(KERN_DEBUG "%s: off\n", __FUNCTION__);
  455. }
  456. }
  457. static void cmx270_mci_exit(struct device *dev, void *data)
  458. {
  459. free_irq(CMX270_MMC_IRQ, data);
  460. }
  461. static struct pxamci_platform_data cmx270_mci_platform_data = {
  462. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  463. .init = cmx270_mci_init,
  464. .setpower = cmx270_mci_setpower,
  465. .exit = cmx270_mci_exit,
  466. };
  467. #ifdef CONFIG_PM
  468. static unsigned long sleep_save_msc[10];
  469. static int cmx270_suspend(struct sys_device *dev, pm_message_t state)
  470. {
  471. cmx270_pci_suspend();
  472. /* save MSC registers */
  473. sleep_save_msc[0] = MSC0;
  474. sleep_save_msc[1] = MSC1;
  475. sleep_save_msc[2] = MSC2;
  476. /* setup power saving mode registers */
  477. PCFR = 0x0;
  478. PSLR = 0xff400000;
  479. PMCR = 0x00000005;
  480. PWER = 0x80000000;
  481. PFER = 0x00000000;
  482. PRER = 0x00000000;
  483. PGSR0 = 0xC0018800;
  484. PGSR1 = 0x004F0002;
  485. PGSR2 = 0x6021C000;
  486. PGSR3 = 0x00020000;
  487. return 0;
  488. }
  489. static int cmx270_resume(struct sys_device *dev)
  490. {
  491. cmx270_pci_resume();
  492. /* restore MSC registers */
  493. MSC0 = sleep_save_msc[0];
  494. MSC1 = sleep_save_msc[1];
  495. MSC2 = sleep_save_msc[2];
  496. return 0;
  497. }
  498. static struct sysdev_class cmx270_pm_sysclass = {
  499. .name = "pm",
  500. .resume = cmx270_resume,
  501. .suspend = cmx270_suspend,
  502. };
  503. static struct sys_device cmx270_pm_device = {
  504. .cls = &cmx270_pm_sysclass,
  505. };
  506. static int __init cmx270_pm_init(void)
  507. {
  508. int error;
  509. error = sysdev_class_register(&cmx270_pm_sysclass);
  510. if (error == 0)
  511. error = sysdev_register(&cmx270_pm_device);
  512. return error;
  513. }
  514. #else
  515. static int __init cmx270_pm_init(void) { return 0; }
  516. #endif
  517. static void __init cmx270_init(void)
  518. {
  519. cmx270_pm_init();
  520. set_pxa_fb_info(cmx270_display);
  521. /* register CM-X270 platform devices */
  522. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  523. /* set MCI and OHCI platform parameters */
  524. pxa_set_mci_info(&cmx270_mci_platform_data);
  525. pxa_set_ohci_info(&cmx270_ohci_platform_data);
  526. /* This enables the STUART */
  527. pxa_gpio_mode(GPIO46_STRXD_MD);
  528. pxa_gpio_mode(GPIO47_STTXD_MD);
  529. /* This enables the BTUART */
  530. pxa_gpio_mode(GPIO42_BTRXD_MD);
  531. pxa_gpio_mode(GPIO43_BTTXD_MD);
  532. pxa_gpio_mode(GPIO44_BTCTS_MD);
  533. pxa_gpio_mode(GPIO45_BTRTS_MD);
  534. }
  535. static void __init cmx270_init_irq(void)
  536. {
  537. pxa27x_init_irq();
  538. cmx270_pci_init_irq();
  539. /* Setup interrupt for dm9000 */
  540. pxa_gpio_mode(IRQ_TO_GPIO(CMX270_ETHIRQ));
  541. set_irq_type(CMX270_ETHIRQ, IRQT_RISING);
  542. /* Setup interrupt for 2700G */
  543. pxa_gpio_mode(IRQ_TO_GPIO(CMX270_GFXIRQ));
  544. set_irq_type(CMX270_GFXIRQ, IRQT_FALLING);
  545. }
  546. static void __init cmx270_map_io(void)
  547. {
  548. pxa_map_io();
  549. iotable_init(cmx270_io_desc, ARRAY_SIZE(cmx270_io_desc));
  550. }
  551. MACHINE_START(ARMCORE, "Compulab CM-x270")
  552. .boot_params = 0xa0000100,
  553. .phys_io = 0x40000000,
  554. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  555. .map_io = cmx270_map_io,
  556. .init_irq = cmx270_init_irq,
  557. .timer = &pxa_timer,
  558. .init_machine = cmx270_init,
  559. MACHINE_END