time.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181
  1. /*
  2. * arch/arm/mach-orion/time.c
  3. *
  4. * Core time functions for Marvell Orion System On Chip
  5. *
  6. * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/clockchips.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/irq.h>
  16. #include <asm/mach/time.h>
  17. #include <asm/arch/orion.h>
  18. #include "common.h"
  19. /*
  20. * Timer0: clock_event_device, Tick.
  21. * Timer1: clocksource, Free running.
  22. * WatchDog: Not used.
  23. *
  24. * Timers are counting down.
  25. */
  26. #define CLOCKEVENT 0
  27. #define CLOCKSOURCE 1
  28. /*
  29. * Timers bits
  30. */
  31. #define BRIDGE_INT_TIMER(x) (1 << ((x) + 1))
  32. #define TIMER_EN(x) (1 << ((x) * 2))
  33. #define TIMER_RELOAD_EN(x) (1 << (((x) * 2) + 1))
  34. #define BRIDGE_INT_TIMER_WD (1 << 3)
  35. #define TIMER_WD_EN (1 << 4)
  36. #define TIMER_WD_RELOAD_EN (1 << 5)
  37. static cycle_t orion_clksrc_read(void)
  38. {
  39. return (0xffffffff - orion_read(TIMER_VAL(CLOCKSOURCE)));
  40. }
  41. static struct clocksource orion_clksrc = {
  42. .name = "orion_clocksource",
  43. .shift = 20,
  44. .rating = 300,
  45. .read = orion_clksrc_read,
  46. .mask = CLOCKSOURCE_MASK(32),
  47. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  48. };
  49. static int
  50. orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev)
  51. {
  52. unsigned long flags;
  53. if (delta == 0)
  54. return -ETIME;
  55. local_irq_save(flags);
  56. /*
  57. * Clear and enable timer interrupt bit
  58. */
  59. orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT));
  60. orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT));
  61. /*
  62. * Setup new timer value
  63. */
  64. orion_write(TIMER_VAL(CLOCKEVENT), delta);
  65. /*
  66. * Disable auto reload and kickoff the timer
  67. */
  68. orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT));
  69. orion_setbits(TIMER_CTRL, TIMER_EN(CLOCKEVENT));
  70. local_irq_restore(flags);
  71. return 0;
  72. }
  73. static void
  74. orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev)
  75. {
  76. unsigned long flags;
  77. local_irq_save(flags);
  78. if (mode == CLOCK_EVT_MODE_PERIODIC) {
  79. /*
  80. * Setup latch cycles in timer and enable reload interrupt.
  81. */
  82. orion_write(TIMER_VAL_RELOAD(CLOCKEVENT), LATCH);
  83. orion_write(TIMER_VAL(CLOCKEVENT), LATCH);
  84. orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT));
  85. orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) |
  86. TIMER_EN(CLOCKEVENT));
  87. } else {
  88. /*
  89. * Disable timer and interrupt
  90. */
  91. orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT));
  92. orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT));
  93. orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) |
  94. TIMER_EN(CLOCKEVENT));
  95. }
  96. local_irq_restore(flags);
  97. }
  98. static struct clock_event_device orion_clkevt = {
  99. .name = "orion_tick",
  100. .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  101. .shift = 32,
  102. .rating = 300,
  103. .cpumask = CPU_MASK_CPU0,
  104. .set_next_event = orion_clkevt_next_event,
  105. .set_mode = orion_clkevt_mode,
  106. };
  107. static irqreturn_t orion_timer_interrupt(int irq, void *dev_id)
  108. {
  109. /*
  110. * Clear cause bit and do event
  111. */
  112. orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT));
  113. orion_clkevt.event_handler(&orion_clkevt);
  114. return IRQ_HANDLED;
  115. }
  116. static struct irqaction orion_timer_irq = {
  117. .name = "orion_tick",
  118. .flags = IRQF_DISABLED | IRQF_TIMER,
  119. .handler = orion_timer_interrupt
  120. };
  121. static void orion_timer_init(void)
  122. {
  123. /*
  124. * Setup clocksource free running timer (no interrupt on reload)
  125. */
  126. orion_write(TIMER_VAL(CLOCKSOURCE), 0xffffffff);
  127. orion_write(TIMER_VAL_RELOAD(CLOCKSOURCE), 0xffffffff);
  128. orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKSOURCE));
  129. orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKSOURCE) |
  130. TIMER_EN(CLOCKSOURCE));
  131. /*
  132. * Register clocksource
  133. */
  134. orion_clksrc.mult =
  135. clocksource_hz2mult(CLOCK_TICK_RATE, orion_clksrc.shift);
  136. clocksource_register(&orion_clksrc);
  137. /*
  138. * Connect and enable tick handler
  139. */
  140. setup_irq(IRQ_ORION_BRIDGE, &orion_timer_irq);
  141. /*
  142. * Register clockevent
  143. */
  144. orion_clkevt.mult =
  145. div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, orion_clkevt.shift);
  146. orion_clkevt.max_delta_ns =
  147. clockevent_delta2ns(0xfffffffe, &orion_clkevt);
  148. orion_clkevt.min_delta_ns =
  149. clockevent_delta2ns(1, &orion_clkevt);
  150. clockevents_register_device(&orion_clkevt);
  151. }
  152. struct sys_timer orion_timer = {
  153. .init = orion_timer_init,
  154. };