setup.c 35 KB

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  1. /*
  2. * arch/blackfin/kernel/setup.c
  3. *
  4. * Copyright 2004-2006 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/console.h>
  12. #include <linux/bootmem.h>
  13. #include <linux/seq_file.h>
  14. #include <linux/cpu.h>
  15. #include <linux/mm.h>
  16. #include <linux/module.h>
  17. #include <linux/tty.h>
  18. #include <linux/pfn.h>
  19. #ifdef CONFIG_MTD_UCLINUX
  20. #include <linux/mtd/map.h>
  21. #include <linux/ext2_fs.h>
  22. #include <linux/cramfs_fs.h>
  23. #include <linux/romfs_fs.h>
  24. #endif
  25. #include <asm/cplb.h>
  26. #include <asm/cacheflush.h>
  27. #include <asm/blackfin.h>
  28. #include <asm/cplbinit.h>
  29. #include <asm/div64.h>
  30. #include <asm/cpu.h>
  31. #include <asm/fixed_code.h>
  32. #include <asm/early_printk.h>
  33. u16 _bfin_swrst;
  34. EXPORT_SYMBOL(_bfin_swrst);
  35. unsigned long memory_start, memory_end, physical_mem_end;
  36. unsigned long _rambase, _ramstart, _ramend;
  37. unsigned long reserved_mem_dcache_on;
  38. unsigned long reserved_mem_icache_on;
  39. EXPORT_SYMBOL(memory_start);
  40. EXPORT_SYMBOL(memory_end);
  41. EXPORT_SYMBOL(physical_mem_end);
  42. EXPORT_SYMBOL(_ramend);
  43. EXPORT_SYMBOL(reserved_mem_dcache_on);
  44. #ifdef CONFIG_MTD_UCLINUX
  45. extern struct map_info uclinux_ram_map;
  46. unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
  47. unsigned long _ebss;
  48. EXPORT_SYMBOL(memory_mtd_end);
  49. EXPORT_SYMBOL(memory_mtd_start);
  50. EXPORT_SYMBOL(mtd_size);
  51. #endif
  52. char __initdata command_line[COMMAND_LINE_SIZE];
  53. void __initdata *init_retx, *init_saved_retx, *init_saved_seqstat,
  54. *init_saved_icplb_fault_addr, *init_saved_dcplb_fault_addr;
  55. /* boot memmap, for parsing "memmap=" */
  56. #define BFIN_MEMMAP_MAX 128 /* number of entries in bfin_memmap */
  57. #define BFIN_MEMMAP_RAM 1
  58. #define BFIN_MEMMAP_RESERVED 2
  59. static struct bfin_memmap {
  60. int nr_map;
  61. struct bfin_memmap_entry {
  62. unsigned long long addr; /* start of memory segment */
  63. unsigned long long size;
  64. unsigned long type;
  65. } map[BFIN_MEMMAP_MAX];
  66. } bfin_memmap __initdata;
  67. /* for memmap sanitization */
  68. struct change_member {
  69. struct bfin_memmap_entry *pentry; /* pointer to original entry */
  70. unsigned long long addr; /* address for this change point */
  71. };
  72. static struct change_member change_point_list[2*BFIN_MEMMAP_MAX] __initdata;
  73. static struct change_member *change_point[2*BFIN_MEMMAP_MAX] __initdata;
  74. static struct bfin_memmap_entry *overlap_list[BFIN_MEMMAP_MAX] __initdata;
  75. static struct bfin_memmap_entry new_map[BFIN_MEMMAP_MAX] __initdata;
  76. DEFINE_PER_CPU(struct blackfin_cpudata, cpu_data);
  77. static int early_init_clkin_hz(char *buf);
  78. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  79. void __init generate_cplb_tables(void)
  80. {
  81. unsigned int cpu;
  82. generate_cplb_tables_all();
  83. /* Generate per-CPU I&D CPLB tables */
  84. for (cpu = 0; cpu < num_possible_cpus(); ++cpu)
  85. generate_cplb_tables_cpu(cpu);
  86. }
  87. #endif
  88. void __cpuinit bfin_setup_caches(unsigned int cpu)
  89. {
  90. #ifdef CONFIG_BFIN_ICACHE
  91. bfin_icache_init(icplb_tbl[cpu]);
  92. #endif
  93. #ifdef CONFIG_BFIN_DCACHE
  94. bfin_dcache_init(dcplb_tbl[cpu]);
  95. #endif
  96. /*
  97. * In cache coherence emulation mode, we need to have the
  98. * D-cache enabled before running any atomic operation which
  99. * might invove cache invalidation (i.e. spinlock, rwlock).
  100. * So printk's are deferred until then.
  101. */
  102. #ifdef CONFIG_BFIN_ICACHE
  103. printk(KERN_INFO "Instruction Cache Enabled for CPU%u\n", cpu);
  104. #endif
  105. #ifdef CONFIG_BFIN_DCACHE
  106. printk(KERN_INFO "Data Cache Enabled for CPU%u"
  107. # if defined CONFIG_BFIN_WB
  108. " (write-back)"
  109. # elif defined CONFIG_BFIN_WT
  110. " (write-through)"
  111. # endif
  112. "\n", cpu);
  113. #endif
  114. }
  115. void __cpuinit bfin_setup_cpudata(unsigned int cpu)
  116. {
  117. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
  118. cpudata->idle = current;
  119. cpudata->loops_per_jiffy = loops_per_jiffy;
  120. cpudata->imemctl = bfin_read_IMEM_CONTROL();
  121. cpudata->dmemctl = bfin_read_DMEM_CONTROL();
  122. }
  123. void __init bfin_cache_init(void)
  124. {
  125. #if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
  126. generate_cplb_tables();
  127. #endif
  128. bfin_setup_caches(0);
  129. }
  130. void __init bfin_relocate_l1_mem(void)
  131. {
  132. unsigned long l1_code_length;
  133. unsigned long l1_data_a_length;
  134. unsigned long l1_data_b_length;
  135. unsigned long l2_length;
  136. /*
  137. * due to the ALIGN(4) in the arch/blackfin/kernel/vmlinux.lds.S
  138. * we know that everything about l1 text/data is nice and aligned,
  139. * so copy by 4 byte chunks, and don't worry about overlapping
  140. * src/dest.
  141. *
  142. * We can't use the dma_memcpy functions, since they can call
  143. * scheduler functions which might be in L1 :( and core writes
  144. * into L1 instruction cause bad access errors, so we are stuck,
  145. * we are required to use DMA, but can't use the common dma
  146. * functions. We can't use memcpy either - since that might be
  147. * going to be in the relocated L1
  148. */
  149. blackfin_dma_early_init();
  150. /* if necessary, copy _stext_l1 to _etext_l1 to L1 instruction SRAM */
  151. l1_code_length = _etext_l1 - _stext_l1;
  152. if (l1_code_length)
  153. early_dma_memcpy(_stext_l1, _l1_lma_start, l1_code_length);
  154. /* if necessary, copy _sdata_l1 to _sbss_l1 to L1 data bank A SRAM */
  155. l1_data_a_length = _sbss_l1 - _sdata_l1;
  156. if (l1_data_a_length)
  157. early_dma_memcpy(_sdata_l1, _l1_lma_start + l1_code_length, l1_data_a_length);
  158. /* if necessary, copy _sdata_b_l1 to _sbss_b_l1 to L1 data bank B SRAM */
  159. l1_data_b_length = _sbss_b_l1 - _sdata_b_l1;
  160. if (l1_data_b_length)
  161. early_dma_memcpy(_sdata_b_l1, _l1_lma_start + l1_code_length +
  162. l1_data_a_length, l1_data_b_length);
  163. early_dma_memcpy_done();
  164. /* if necessary, copy _stext_l2 to _edata_l2 to L2 SRAM */
  165. if (L2_LENGTH != 0) {
  166. l2_length = _sbss_l2 - _stext_l2;
  167. if (l2_length)
  168. memcpy(_stext_l2, _l2_lma_start, l2_length);
  169. }
  170. }
  171. /* add_memory_region to memmap */
  172. static void __init add_memory_region(unsigned long long start,
  173. unsigned long long size, int type)
  174. {
  175. int i;
  176. i = bfin_memmap.nr_map;
  177. if (i == BFIN_MEMMAP_MAX) {
  178. printk(KERN_ERR "Ooops! Too many entries in the memory map!\n");
  179. return;
  180. }
  181. bfin_memmap.map[i].addr = start;
  182. bfin_memmap.map[i].size = size;
  183. bfin_memmap.map[i].type = type;
  184. bfin_memmap.nr_map++;
  185. }
  186. /*
  187. * Sanitize the boot memmap, removing overlaps.
  188. */
  189. static int __init sanitize_memmap(struct bfin_memmap_entry *map, int *pnr_map)
  190. {
  191. struct change_member *change_tmp;
  192. unsigned long current_type, last_type;
  193. unsigned long long last_addr;
  194. int chgidx, still_changing;
  195. int overlap_entries;
  196. int new_entry;
  197. int old_nr, new_nr, chg_nr;
  198. int i;
  199. /*
  200. Visually we're performing the following (1,2,3,4 = memory types)
  201. Sample memory map (w/overlaps):
  202. ____22__________________
  203. ______________________4_
  204. ____1111________________
  205. _44_____________________
  206. 11111111________________
  207. ____________________33__
  208. ___________44___________
  209. __________33333_________
  210. ______________22________
  211. ___________________2222_
  212. _________111111111______
  213. _____________________11_
  214. _________________4______
  215. Sanitized equivalent (no overlap):
  216. 1_______________________
  217. _44_____________________
  218. ___1____________________
  219. ____22__________________
  220. ______11________________
  221. _________1______________
  222. __________3_____________
  223. ___________44___________
  224. _____________33_________
  225. _______________2________
  226. ________________1_______
  227. _________________4______
  228. ___________________2____
  229. ____________________33__
  230. ______________________4_
  231. */
  232. /* if there's only one memory region, don't bother */
  233. if (*pnr_map < 2)
  234. return -1;
  235. old_nr = *pnr_map;
  236. /* bail out if we find any unreasonable addresses in memmap */
  237. for (i = 0; i < old_nr; i++)
  238. if (map[i].addr + map[i].size < map[i].addr)
  239. return -1;
  240. /* create pointers for initial change-point information (for sorting) */
  241. for (i = 0; i < 2*old_nr; i++)
  242. change_point[i] = &change_point_list[i];
  243. /* record all known change-points (starting and ending addresses),
  244. omitting those that are for empty memory regions */
  245. chgidx = 0;
  246. for (i = 0; i < old_nr; i++) {
  247. if (map[i].size != 0) {
  248. change_point[chgidx]->addr = map[i].addr;
  249. change_point[chgidx++]->pentry = &map[i];
  250. change_point[chgidx]->addr = map[i].addr + map[i].size;
  251. change_point[chgidx++]->pentry = &map[i];
  252. }
  253. }
  254. chg_nr = chgidx; /* true number of change-points */
  255. /* sort change-point list by memory addresses (low -> high) */
  256. still_changing = 1;
  257. while (still_changing) {
  258. still_changing = 0;
  259. for (i = 1; i < chg_nr; i++) {
  260. /* if <current_addr> > <last_addr>, swap */
  261. /* or, if current=<start_addr> & last=<end_addr>, swap */
  262. if ((change_point[i]->addr < change_point[i-1]->addr) ||
  263. ((change_point[i]->addr == change_point[i-1]->addr) &&
  264. (change_point[i]->addr == change_point[i]->pentry->addr) &&
  265. (change_point[i-1]->addr != change_point[i-1]->pentry->addr))
  266. ) {
  267. change_tmp = change_point[i];
  268. change_point[i] = change_point[i-1];
  269. change_point[i-1] = change_tmp;
  270. still_changing = 1;
  271. }
  272. }
  273. }
  274. /* create a new memmap, removing overlaps */
  275. overlap_entries = 0; /* number of entries in the overlap table */
  276. new_entry = 0; /* index for creating new memmap entries */
  277. last_type = 0; /* start with undefined memory type */
  278. last_addr = 0; /* start with 0 as last starting address */
  279. /* loop through change-points, determining affect on the new memmap */
  280. for (chgidx = 0; chgidx < chg_nr; chgidx++) {
  281. /* keep track of all overlapping memmap entries */
  282. if (change_point[chgidx]->addr == change_point[chgidx]->pentry->addr) {
  283. /* add map entry to overlap list (> 1 entry implies an overlap) */
  284. overlap_list[overlap_entries++] = change_point[chgidx]->pentry;
  285. } else {
  286. /* remove entry from list (order independent, so swap with last) */
  287. for (i = 0; i < overlap_entries; i++) {
  288. if (overlap_list[i] == change_point[chgidx]->pentry)
  289. overlap_list[i] = overlap_list[overlap_entries-1];
  290. }
  291. overlap_entries--;
  292. }
  293. /* if there are overlapping entries, decide which "type" to use */
  294. /* (larger value takes precedence -- 1=usable, 2,3,4,4+=unusable) */
  295. current_type = 0;
  296. for (i = 0; i < overlap_entries; i++)
  297. if (overlap_list[i]->type > current_type)
  298. current_type = overlap_list[i]->type;
  299. /* continue building up new memmap based on this information */
  300. if (current_type != last_type) {
  301. if (last_type != 0) {
  302. new_map[new_entry].size =
  303. change_point[chgidx]->addr - last_addr;
  304. /* move forward only if the new size was non-zero */
  305. if (new_map[new_entry].size != 0)
  306. if (++new_entry >= BFIN_MEMMAP_MAX)
  307. break; /* no more space left for new entries */
  308. }
  309. if (current_type != 0) {
  310. new_map[new_entry].addr = change_point[chgidx]->addr;
  311. new_map[new_entry].type = current_type;
  312. last_addr = change_point[chgidx]->addr;
  313. }
  314. last_type = current_type;
  315. }
  316. }
  317. new_nr = new_entry; /* retain count for new entries */
  318. /* copy new mapping into original location */
  319. memcpy(map, new_map, new_nr*sizeof(struct bfin_memmap_entry));
  320. *pnr_map = new_nr;
  321. return 0;
  322. }
  323. static void __init print_memory_map(char *who)
  324. {
  325. int i;
  326. for (i = 0; i < bfin_memmap.nr_map; i++) {
  327. printk(KERN_DEBUG " %s: %016Lx - %016Lx ", who,
  328. bfin_memmap.map[i].addr,
  329. bfin_memmap.map[i].addr + bfin_memmap.map[i].size);
  330. switch (bfin_memmap.map[i].type) {
  331. case BFIN_MEMMAP_RAM:
  332. printk("(usable)\n");
  333. break;
  334. case BFIN_MEMMAP_RESERVED:
  335. printk("(reserved)\n");
  336. break;
  337. default: printk("type %lu\n", bfin_memmap.map[i].type);
  338. break;
  339. }
  340. }
  341. }
  342. static __init int parse_memmap(char *arg)
  343. {
  344. unsigned long long start_at, mem_size;
  345. if (!arg)
  346. return -EINVAL;
  347. mem_size = memparse(arg, &arg);
  348. if (*arg == '@') {
  349. start_at = memparse(arg+1, &arg);
  350. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RAM);
  351. } else if (*arg == '$') {
  352. start_at = memparse(arg+1, &arg);
  353. add_memory_region(start_at, mem_size, BFIN_MEMMAP_RESERVED);
  354. }
  355. return 0;
  356. }
  357. /*
  358. * Initial parsing of the command line. Currently, we support:
  359. * - Controlling the linux memory size: mem=xxx[KMG]
  360. * - Controlling the physical memory size: max_mem=xxx[KMG][$][#]
  361. * $ -> reserved memory is dcacheable
  362. * # -> reserved memory is icacheable
  363. * - "memmap=XXX[KkmM][@][$]XXX[KkmM]" defines a memory region
  364. * @ from <start> to <start>+<mem>, type RAM
  365. * $ from <start> to <start>+<mem>, type RESERVED
  366. */
  367. static __init void parse_cmdline_early(char *cmdline_p)
  368. {
  369. char c = ' ', *to = cmdline_p;
  370. unsigned int memsize;
  371. for (;;) {
  372. if (c == ' ') {
  373. if (!memcmp(to, "mem=", 4)) {
  374. to += 4;
  375. memsize = memparse(to, &to);
  376. if (memsize)
  377. _ramend = memsize;
  378. } else if (!memcmp(to, "max_mem=", 8)) {
  379. to += 8;
  380. memsize = memparse(to, &to);
  381. if (memsize) {
  382. physical_mem_end = memsize;
  383. if (*to != ' ') {
  384. if (*to == '$'
  385. || *(to + 1) == '$')
  386. reserved_mem_dcache_on = 1;
  387. if (*to == '#'
  388. || *(to + 1) == '#')
  389. reserved_mem_icache_on = 1;
  390. }
  391. }
  392. } else if (!memcmp(to, "clkin_hz=", 9)) {
  393. to += 9;
  394. early_init_clkin_hz(to);
  395. } else if (!memcmp(to, "earlyprintk=", 12)) {
  396. to += 12;
  397. setup_early_printk(to);
  398. } else if (!memcmp(to, "memmap=", 7)) {
  399. to += 7;
  400. parse_memmap(to);
  401. }
  402. }
  403. c = *(to++);
  404. if (!c)
  405. break;
  406. }
  407. }
  408. /*
  409. * Setup memory defaults from user config.
  410. * The physical memory layout looks like:
  411. *
  412. * [_rambase, _ramstart]: kernel image
  413. * [memory_start, memory_end]: dynamic memory managed by kernel
  414. * [memory_end, _ramend]: reserved memory
  415. * [memory_mtd_start(memory_end),
  416. * memory_mtd_start + mtd_size]: rootfs (if any)
  417. * [_ramend - DMA_UNCACHED_REGION,
  418. * _ramend]: uncached DMA region
  419. * [_ramend, physical_mem_end]: memory not managed by kernel
  420. */
  421. static __init void memory_setup(void)
  422. {
  423. #ifdef CONFIG_MTD_UCLINUX
  424. unsigned long mtd_phys = 0;
  425. #endif
  426. _rambase = (unsigned long)_stext;
  427. _ramstart = (unsigned long)_end;
  428. if (DMA_UNCACHED_REGION > (_ramend - _ramstart)) {
  429. console_init();
  430. panic("DMA region exceeds memory limit: %lu.",
  431. _ramend - _ramstart);
  432. }
  433. memory_end = _ramend - DMA_UNCACHED_REGION;
  434. #ifdef CONFIG_MPU
  435. /* Round up to multiple of 4MB */
  436. memory_start = (_ramstart + 0x3fffff) & ~0x3fffff;
  437. #else
  438. memory_start = PAGE_ALIGN(_ramstart);
  439. #endif
  440. #if defined(CONFIG_MTD_UCLINUX)
  441. /* generic memory mapped MTD driver */
  442. memory_mtd_end = memory_end;
  443. mtd_phys = _ramstart;
  444. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 8)));
  445. # if defined(CONFIG_EXT2_FS) || defined(CONFIG_EXT3_FS)
  446. if (*((unsigned short *)(mtd_phys + 0x438)) == EXT2_SUPER_MAGIC)
  447. mtd_size =
  448. PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x404)) << 10);
  449. # endif
  450. # if defined(CONFIG_CRAMFS)
  451. if (*((unsigned long *)(mtd_phys)) == CRAMFS_MAGIC)
  452. mtd_size = PAGE_ALIGN(*((unsigned long *)(mtd_phys + 0x4)));
  453. # endif
  454. # if defined(CONFIG_ROMFS_FS)
  455. if (((unsigned long *)mtd_phys)[0] == ROMSB_WORD0
  456. && ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
  457. mtd_size =
  458. PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
  459. # if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  460. /* Due to a Hardware Anomaly we need to limit the size of usable
  461. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  462. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  463. */
  464. # if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  465. if (memory_end >= 56 * 1024 * 1024)
  466. memory_end = 56 * 1024 * 1024;
  467. # else
  468. if (memory_end >= 60 * 1024 * 1024)
  469. memory_end = 60 * 1024 * 1024;
  470. # endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  471. # endif /* ANOMALY_05000263 */
  472. # endif /* CONFIG_ROMFS_FS */
  473. memory_end -= mtd_size;
  474. if (mtd_size == 0) {
  475. console_init();
  476. panic("Don't boot kernel without rootfs attached.");
  477. }
  478. /* Relocate MTD image to the top of memory after the uncached memory area */
  479. uclinux_ram_map.phys = memory_mtd_start = memory_end;
  480. uclinux_ram_map.size = mtd_size;
  481. dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
  482. #endif /* CONFIG_MTD_UCLINUX */
  483. #if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
  484. /* Due to a Hardware Anomaly we need to limit the size of usable
  485. * instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
  486. * 05000263 - Hardware loop corrupted when taking an ICPLB exception
  487. */
  488. #if (defined(CONFIG_DEBUG_HUNT_FOR_ZERO))
  489. if (memory_end >= 56 * 1024 * 1024)
  490. memory_end = 56 * 1024 * 1024;
  491. #else
  492. if (memory_end >= 60 * 1024 * 1024)
  493. memory_end = 60 * 1024 * 1024;
  494. #endif /* CONFIG_DEBUG_HUNT_FOR_ZERO */
  495. printk(KERN_NOTICE "Warning: limiting memory to %liMB due to hardware anomaly 05000263\n", memory_end >> 20);
  496. #endif /* ANOMALY_05000263 */
  497. #ifdef CONFIG_MPU
  498. page_mask_nelts = ((_ramend >> PAGE_SHIFT) + 31) / 32;
  499. page_mask_order = get_order(3 * page_mask_nelts * sizeof(long));
  500. #endif
  501. #if !defined(CONFIG_MTD_UCLINUX)
  502. /*In case there is no valid CPLB behind memory_end make sure we don't get to close*/
  503. memory_end -= SIZE_4K;
  504. #endif
  505. init_mm.start_code = (unsigned long)_stext;
  506. init_mm.end_code = (unsigned long)_etext;
  507. init_mm.end_data = (unsigned long)_edata;
  508. init_mm.brk = (unsigned long)0;
  509. printk(KERN_INFO "Board Memory: %ldMB\n", physical_mem_end >> 20);
  510. printk(KERN_INFO "Kernel Managed Memory: %ldMB\n", _ramend >> 20);
  511. printk(KERN_INFO "Memory map:\n"
  512. KERN_INFO " fixedcode = 0x%p-0x%p\n"
  513. KERN_INFO " text = 0x%p-0x%p\n"
  514. KERN_INFO " rodata = 0x%p-0x%p\n"
  515. KERN_INFO " bss = 0x%p-0x%p\n"
  516. KERN_INFO " data = 0x%p-0x%p\n"
  517. KERN_INFO " stack = 0x%p-0x%p\n"
  518. KERN_INFO " init = 0x%p-0x%p\n"
  519. KERN_INFO " available = 0x%p-0x%p\n"
  520. #ifdef CONFIG_MTD_UCLINUX
  521. KERN_INFO " rootfs = 0x%p-0x%p\n"
  522. #endif
  523. #if DMA_UNCACHED_REGION > 0
  524. KERN_INFO " DMA Zone = 0x%p-0x%p\n"
  525. #endif
  526. , (void *)FIXED_CODE_START, (void *)FIXED_CODE_END,
  527. _stext, _etext,
  528. __start_rodata, __end_rodata,
  529. __bss_start, __bss_stop,
  530. _sdata, _edata,
  531. (void *)&init_thread_union,
  532. (void *)((int)(&init_thread_union) + 0x2000),
  533. __init_begin, __init_end,
  534. (void *)_ramstart, (void *)memory_end
  535. #ifdef CONFIG_MTD_UCLINUX
  536. , (void *)memory_mtd_start, (void *)(memory_mtd_start + mtd_size)
  537. #endif
  538. #if DMA_UNCACHED_REGION > 0
  539. , (void *)(_ramend - DMA_UNCACHED_REGION), (void *)(_ramend)
  540. #endif
  541. );
  542. }
  543. /*
  544. * Find the lowest, highest page frame number we have available
  545. */
  546. void __init find_min_max_pfn(void)
  547. {
  548. int i;
  549. max_pfn = 0;
  550. min_low_pfn = memory_end;
  551. for (i = 0; i < bfin_memmap.nr_map; i++) {
  552. unsigned long start, end;
  553. /* RAM? */
  554. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  555. continue;
  556. start = PFN_UP(bfin_memmap.map[i].addr);
  557. end = PFN_DOWN(bfin_memmap.map[i].addr +
  558. bfin_memmap.map[i].size);
  559. if (start >= end)
  560. continue;
  561. if (end > max_pfn)
  562. max_pfn = end;
  563. if (start < min_low_pfn)
  564. min_low_pfn = start;
  565. }
  566. }
  567. static __init void setup_bootmem_allocator(void)
  568. {
  569. int bootmap_size;
  570. int i;
  571. unsigned long start_pfn, end_pfn;
  572. unsigned long curr_pfn, last_pfn, size;
  573. /* mark memory between memory_start and memory_end usable */
  574. add_memory_region(memory_start,
  575. memory_end - memory_start, BFIN_MEMMAP_RAM);
  576. /* sanity check for overlap */
  577. sanitize_memmap(bfin_memmap.map, &bfin_memmap.nr_map);
  578. print_memory_map("boot memmap");
  579. /* intialize globals in linux/bootmem.h */
  580. find_min_max_pfn();
  581. /* pfn of the last usable page frame */
  582. if (max_pfn > memory_end >> PAGE_SHIFT)
  583. max_pfn = memory_end >> PAGE_SHIFT;
  584. /* pfn of last page frame directly mapped by kernel */
  585. max_low_pfn = max_pfn;
  586. /* pfn of the first usable page frame after kernel image*/
  587. if (min_low_pfn < memory_start >> PAGE_SHIFT)
  588. min_low_pfn = memory_start >> PAGE_SHIFT;
  589. start_pfn = PAGE_OFFSET >> PAGE_SHIFT;
  590. end_pfn = memory_end >> PAGE_SHIFT;
  591. /*
  592. * give all the memory to the bootmap allocator, tell it to put the
  593. * boot mem_map at the start of memory.
  594. */
  595. bootmap_size = init_bootmem_node(NODE_DATA(0),
  596. memory_start >> PAGE_SHIFT, /* map goes here */
  597. start_pfn, end_pfn);
  598. /* register the memmap regions with the bootmem allocator */
  599. for (i = 0; i < bfin_memmap.nr_map; i++) {
  600. /*
  601. * Reserve usable memory
  602. */
  603. if (bfin_memmap.map[i].type != BFIN_MEMMAP_RAM)
  604. continue;
  605. /*
  606. * We are rounding up the start address of usable memory:
  607. */
  608. curr_pfn = PFN_UP(bfin_memmap.map[i].addr);
  609. if (curr_pfn >= end_pfn)
  610. continue;
  611. /*
  612. * ... and at the end of the usable range downwards:
  613. */
  614. last_pfn = PFN_DOWN(bfin_memmap.map[i].addr +
  615. bfin_memmap.map[i].size);
  616. if (last_pfn > end_pfn)
  617. last_pfn = end_pfn;
  618. /*
  619. * .. finally, did all the rounding and playing
  620. * around just make the area go away?
  621. */
  622. if (last_pfn <= curr_pfn)
  623. continue;
  624. size = last_pfn - curr_pfn;
  625. free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size));
  626. }
  627. /* reserve memory before memory_start, including bootmap */
  628. reserve_bootmem(PAGE_OFFSET,
  629. memory_start + bootmap_size + PAGE_SIZE - 1 - PAGE_OFFSET,
  630. BOOTMEM_DEFAULT);
  631. }
  632. #define EBSZ_TO_MEG(ebsz) \
  633. ({ \
  634. int meg = 0; \
  635. switch (ebsz & 0xf) { \
  636. case 0x1: meg = 16; break; \
  637. case 0x3: meg = 32; break; \
  638. case 0x5: meg = 64; break; \
  639. case 0x7: meg = 128; break; \
  640. case 0x9: meg = 256; break; \
  641. case 0xb: meg = 512; break; \
  642. } \
  643. meg; \
  644. })
  645. static inline int __init get_mem_size(void)
  646. {
  647. #if defined(EBIU_SDBCTL)
  648. # if defined(BF561_FAMILY)
  649. int ret = 0;
  650. u32 sdbctl = bfin_read_EBIU_SDBCTL();
  651. ret += EBSZ_TO_MEG(sdbctl >> 0);
  652. ret += EBSZ_TO_MEG(sdbctl >> 8);
  653. ret += EBSZ_TO_MEG(sdbctl >> 16);
  654. ret += EBSZ_TO_MEG(sdbctl >> 24);
  655. return ret;
  656. # else
  657. return EBSZ_TO_MEG(bfin_read_EBIU_SDBCTL());
  658. # endif
  659. #elif defined(EBIU_DDRCTL1)
  660. u32 ddrctl = bfin_read_EBIU_DDRCTL1();
  661. int ret = 0;
  662. switch (ddrctl & 0xc0000) {
  663. case DEVSZ_64: ret = 64 / 8;
  664. case DEVSZ_128: ret = 128 / 8;
  665. case DEVSZ_256: ret = 256 / 8;
  666. case DEVSZ_512: ret = 512 / 8;
  667. }
  668. switch (ddrctl & 0x30000) {
  669. case DEVWD_4: ret *= 2;
  670. case DEVWD_8: ret *= 2;
  671. case DEVWD_16: break;
  672. }
  673. if ((ddrctl & 0xc000) == 0x4000)
  674. ret *= 2;
  675. return ret;
  676. #endif
  677. BUG();
  678. }
  679. void __init setup_arch(char **cmdline_p)
  680. {
  681. unsigned long sclk, cclk;
  682. #ifdef CONFIG_DUMMY_CONSOLE
  683. conswitchp = &dummy_con;
  684. #endif
  685. #if defined(CONFIG_CMDLINE_BOOL)
  686. strncpy(&command_line[0], CONFIG_CMDLINE, sizeof(command_line));
  687. command_line[sizeof(command_line) - 1] = 0;
  688. #endif
  689. /* Keep a copy of command line */
  690. *cmdline_p = &command_line[0];
  691. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  692. boot_command_line[COMMAND_LINE_SIZE - 1] = '\0';
  693. /* setup memory defaults from the user config */
  694. physical_mem_end = 0;
  695. _ramend = get_mem_size() * 1024 * 1024;
  696. memset(&bfin_memmap, 0, sizeof(bfin_memmap));
  697. parse_cmdline_early(&command_line[0]);
  698. if (physical_mem_end == 0)
  699. physical_mem_end = _ramend;
  700. memory_setup();
  701. /* Initialize Async memory banks */
  702. bfin_write_EBIU_AMBCTL0(AMBCTL0VAL);
  703. bfin_write_EBIU_AMBCTL1(AMBCTL1VAL);
  704. bfin_write_EBIU_AMGCTL(AMGCTLVAL);
  705. #ifdef CONFIG_EBIU_MBSCTLVAL
  706. bfin_write_EBIU_MBSCTL(CONFIG_EBIU_MBSCTLVAL);
  707. bfin_write_EBIU_MODE(CONFIG_EBIU_MODEVAL);
  708. bfin_write_EBIU_FCTL(CONFIG_EBIU_FCTLVAL);
  709. #endif
  710. cclk = get_cclk();
  711. sclk = get_sclk();
  712. if ((ANOMALY_05000273 || ANOMALY_05000274) && (cclk >> 1) < sclk)
  713. panic("ANOMALY 05000273 or 05000274: CCLK must be >= 2*SCLK");
  714. #ifdef BF561_FAMILY
  715. if (ANOMALY_05000266) {
  716. bfin_read_IMDMA_D0_IRQ_STATUS();
  717. bfin_read_IMDMA_D1_IRQ_STATUS();
  718. }
  719. #endif
  720. printk(KERN_INFO "Hardware Trace ");
  721. if (bfin_read_TBUFCTL() & 0x1)
  722. printk("Active ");
  723. else
  724. printk("Off ");
  725. if (bfin_read_TBUFCTL() & 0x2)
  726. printk("and Enabled\n");
  727. else
  728. printk("and Disabled\n");
  729. #if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
  730. /* we need to initialize the Flashrom device here since we might
  731. * do things with flash early on in the boot
  732. */
  733. flash_probe();
  734. #endif
  735. printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
  736. /* Newer parts mirror SWRST bits in SYSCR */
  737. #if defined(CONFIG_BF53x) || defined(CONFIG_BF561) || \
  738. defined(CONFIG_BF538) || defined(CONFIG_BF539)
  739. _bfin_swrst = bfin_read_SWRST();
  740. #else
  741. /* Clear boot mode field */
  742. _bfin_swrst = bfin_read_SYSCR() & ~0xf;
  743. #endif
  744. #ifdef CONFIG_DEBUG_DOUBLEFAULT_PRINT
  745. bfin_write_SWRST(_bfin_swrst & ~DOUBLE_FAULT);
  746. #endif
  747. #ifdef CONFIG_DEBUG_DOUBLEFAULT_RESET
  748. bfin_write_SWRST(_bfin_swrst | DOUBLE_FAULT);
  749. #endif
  750. #ifdef CONFIG_SMP
  751. if (_bfin_swrst & SWRST_DBL_FAULT_A) {
  752. #else
  753. if (_bfin_swrst & RESET_DOUBLE) {
  754. #endif
  755. printk(KERN_EMERG "Recovering from DOUBLE FAULT event\n");
  756. #ifdef CONFIG_DEBUG_DOUBLEFAULT
  757. /* We assume the crashing kernel, and the current symbol table match */
  758. printk(KERN_EMERG " While handling exception (EXCAUSE = 0x%x) at %pF\n",
  759. (int)init_saved_seqstat & SEQSTAT_EXCAUSE, init_saved_retx);
  760. printk(KERN_NOTICE " DCPLB_FAULT_ADDR: %pF\n", init_saved_dcplb_fault_addr);
  761. printk(KERN_NOTICE " ICPLB_FAULT_ADDR: %pF\n", init_saved_icplb_fault_addr);
  762. #endif
  763. printk(KERN_NOTICE " The instruction at %pF caused a double exception\n",
  764. init_retx);
  765. } else if (_bfin_swrst & RESET_WDOG)
  766. printk(KERN_INFO "Recovering from Watchdog event\n");
  767. else if (_bfin_swrst & RESET_SOFTWARE)
  768. printk(KERN_NOTICE "Reset caused by Software reset\n");
  769. printk(KERN_INFO "Blackfin support (C) 2004-2009 Analog Devices, Inc.\n");
  770. if (bfin_compiled_revid() == 0xffff)
  771. printk(KERN_INFO "Compiled for ADSP-%s Rev any\n", CPU);
  772. else if (bfin_compiled_revid() == -1)
  773. printk(KERN_INFO "Compiled for ADSP-%s Rev none\n", CPU);
  774. else
  775. printk(KERN_INFO "Compiled for ADSP-%s Rev 0.%d\n", CPU, bfin_compiled_revid());
  776. if (unlikely(CPUID != bfin_cpuid()))
  777. printk(KERN_ERR "ERROR: Not running on ADSP-%s: unknown CPUID 0x%04x Rev 0.%d\n",
  778. CPU, bfin_cpuid(), bfin_revid());
  779. else {
  780. if (bfin_revid() != bfin_compiled_revid()) {
  781. if (bfin_compiled_revid() == -1)
  782. printk(KERN_ERR "Warning: Compiled for Rev none, but running on Rev %d\n",
  783. bfin_revid());
  784. else if (bfin_compiled_revid() != 0xffff) {
  785. printk(KERN_ERR "Warning: Compiled for Rev %d, but running on Rev %d\n",
  786. bfin_compiled_revid(), bfin_revid());
  787. if (bfin_compiled_revid() > bfin_revid())
  788. panic("Error: you are missing anomaly workarounds for this rev");
  789. }
  790. }
  791. if (bfin_revid() < CONFIG_BF_REV_MIN || bfin_revid() > CONFIG_BF_REV_MAX)
  792. printk(KERN_ERR "Warning: Unsupported Chip Revision ADSP-%s Rev 0.%d detected\n",
  793. CPU, bfin_revid());
  794. }
  795. /* We can't run on BF548-0.1 due to ANOMALY 05000448 */
  796. if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
  797. panic("You can't run on this processor due to 05000448");
  798. printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
  799. printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
  800. cclk / 1000000, sclk / 1000000);
  801. setup_bootmem_allocator();
  802. paging_init();
  803. /* Copy atomic sequences to their fixed location, and sanity check that
  804. these locations are the ones that we advertise to userspace. */
  805. memcpy((void *)FIXED_CODE_START, &fixed_code_start,
  806. FIXED_CODE_END - FIXED_CODE_START);
  807. BUG_ON((char *)&sigreturn_stub - (char *)&fixed_code_start
  808. != SIGRETURN_STUB - FIXED_CODE_START);
  809. BUG_ON((char *)&atomic_xchg32 - (char *)&fixed_code_start
  810. != ATOMIC_XCHG32 - FIXED_CODE_START);
  811. BUG_ON((char *)&atomic_cas32 - (char *)&fixed_code_start
  812. != ATOMIC_CAS32 - FIXED_CODE_START);
  813. BUG_ON((char *)&atomic_add32 - (char *)&fixed_code_start
  814. != ATOMIC_ADD32 - FIXED_CODE_START);
  815. BUG_ON((char *)&atomic_sub32 - (char *)&fixed_code_start
  816. != ATOMIC_SUB32 - FIXED_CODE_START);
  817. BUG_ON((char *)&atomic_ior32 - (char *)&fixed_code_start
  818. != ATOMIC_IOR32 - FIXED_CODE_START);
  819. BUG_ON((char *)&atomic_and32 - (char *)&fixed_code_start
  820. != ATOMIC_AND32 - FIXED_CODE_START);
  821. BUG_ON((char *)&atomic_xor32 - (char *)&fixed_code_start
  822. != ATOMIC_XOR32 - FIXED_CODE_START);
  823. BUG_ON((char *)&safe_user_instruction - (char *)&fixed_code_start
  824. != SAFE_USER_INSTRUCTION - FIXED_CODE_START);
  825. #ifdef CONFIG_SMP
  826. platform_init_cpus();
  827. #endif
  828. init_exception_vectors();
  829. bfin_cache_init(); /* Initialize caches for the boot CPU */
  830. }
  831. static int __init topology_init(void)
  832. {
  833. unsigned int cpu;
  834. /* Record CPU-private information for the boot processor. */
  835. bfin_setup_cpudata(0);
  836. for_each_possible_cpu(cpu) {
  837. register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
  838. }
  839. return 0;
  840. }
  841. subsys_initcall(topology_init);
  842. /* Get the input clock frequency */
  843. static u_long cached_clkin_hz = CONFIG_CLKIN_HZ;
  844. static u_long get_clkin_hz(void)
  845. {
  846. return cached_clkin_hz;
  847. }
  848. static int __init early_init_clkin_hz(char *buf)
  849. {
  850. cached_clkin_hz = simple_strtoul(buf, NULL, 0);
  851. #ifdef BFIN_KERNEL_CLOCK
  852. if (cached_clkin_hz != CONFIG_CLKIN_HZ)
  853. panic("cannot change clkin_hz when reprogramming clocks");
  854. #endif
  855. return 1;
  856. }
  857. early_param("clkin_hz=", early_init_clkin_hz);
  858. /* Get the voltage input multiplier */
  859. static u_long get_vco(void)
  860. {
  861. static u_long cached_vco;
  862. u_long msel, pll_ctl;
  863. /* The assumption here is that VCO never changes at runtime.
  864. * If, someday, we support that, then we'll have to change this.
  865. */
  866. if (cached_vco)
  867. return cached_vco;
  868. pll_ctl = bfin_read_PLL_CTL();
  869. msel = (pll_ctl >> 9) & 0x3F;
  870. if (0 == msel)
  871. msel = 64;
  872. cached_vco = get_clkin_hz();
  873. cached_vco >>= (1 & pll_ctl); /* DF bit */
  874. cached_vco *= msel;
  875. return cached_vco;
  876. }
  877. /* Get the Core clock */
  878. u_long get_cclk(void)
  879. {
  880. static u_long cached_cclk_pll_div, cached_cclk;
  881. u_long csel, ssel;
  882. if (bfin_read_PLL_STAT() & 0x1)
  883. return get_clkin_hz();
  884. ssel = bfin_read_PLL_DIV();
  885. if (ssel == cached_cclk_pll_div)
  886. return cached_cclk;
  887. else
  888. cached_cclk_pll_div = ssel;
  889. csel = ((ssel >> 4) & 0x03);
  890. ssel &= 0xf;
  891. if (ssel && ssel < (1 << csel)) /* SCLK > CCLK */
  892. cached_cclk = get_vco() / ssel;
  893. else
  894. cached_cclk = get_vco() >> csel;
  895. return cached_cclk;
  896. }
  897. EXPORT_SYMBOL(get_cclk);
  898. /* Get the System clock */
  899. u_long get_sclk(void)
  900. {
  901. static u_long cached_sclk;
  902. u_long ssel;
  903. /* The assumption here is that SCLK never changes at runtime.
  904. * If, someday, we support that, then we'll have to change this.
  905. */
  906. if (cached_sclk)
  907. return cached_sclk;
  908. if (bfin_read_PLL_STAT() & 0x1)
  909. return get_clkin_hz();
  910. ssel = bfin_read_PLL_DIV() & 0xf;
  911. if (0 == ssel) {
  912. printk(KERN_WARNING "Invalid System Clock\n");
  913. ssel = 1;
  914. }
  915. cached_sclk = get_vco() / ssel;
  916. return cached_sclk;
  917. }
  918. EXPORT_SYMBOL(get_sclk);
  919. unsigned long sclk_to_usecs(unsigned long sclk)
  920. {
  921. u64 tmp = USEC_PER_SEC * (u64)sclk;
  922. do_div(tmp, get_sclk());
  923. return tmp;
  924. }
  925. EXPORT_SYMBOL(sclk_to_usecs);
  926. unsigned long usecs_to_sclk(unsigned long usecs)
  927. {
  928. u64 tmp = get_sclk() * (u64)usecs;
  929. do_div(tmp, USEC_PER_SEC);
  930. return tmp;
  931. }
  932. EXPORT_SYMBOL(usecs_to_sclk);
  933. /*
  934. * Get CPU information for use by the procfs.
  935. */
  936. static int show_cpuinfo(struct seq_file *m, void *v)
  937. {
  938. char *cpu, *mmu, *fpu, *vendor, *cache;
  939. uint32_t revid;
  940. int cpu_num = *(unsigned int *)v;
  941. u_long sclk, cclk;
  942. u_int icache_size = BFIN_ICACHESIZE / 1024, dcache_size = 0, dsup_banks = 0;
  943. struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu_num);
  944. cpu = CPU;
  945. mmu = "none";
  946. fpu = "none";
  947. revid = bfin_revid();
  948. sclk = get_sclk();
  949. cclk = get_cclk();
  950. switch (bfin_read_CHIPID() & CHIPID_MANUFACTURE) {
  951. case 0xca:
  952. vendor = "Analog Devices";
  953. break;
  954. default:
  955. vendor = "unknown";
  956. break;
  957. }
  958. seq_printf(m, "processor\t: %d\n" "vendor_id\t: %s\n", cpu_num, vendor);
  959. if (CPUID == bfin_cpuid())
  960. seq_printf(m, "cpu family\t: 0x%04x\n", CPUID);
  961. else
  962. seq_printf(m, "cpu family\t: Compiled for:0x%04x, running on:0x%04x\n",
  963. CPUID, bfin_cpuid());
  964. seq_printf(m, "model name\t: ADSP-%s %lu(MHz CCLK) %lu(MHz SCLK) (%s)\n"
  965. "stepping\t: %d ",
  966. cpu, cclk/1000000, sclk/1000000,
  967. #ifdef CONFIG_MPU
  968. "mpu on",
  969. #else
  970. "mpu off",
  971. #endif
  972. revid);
  973. if (bfin_revid() != bfin_compiled_revid()) {
  974. if (bfin_compiled_revid() == -1)
  975. seq_printf(m, "(Compiled for Rev none)");
  976. else if (bfin_compiled_revid() == 0xffff)
  977. seq_printf(m, "(Compiled for Rev any)");
  978. else
  979. seq_printf(m, "(Compiled for Rev %d)", bfin_compiled_revid());
  980. }
  981. seq_printf(m, "\ncpu MHz\t\t: %lu.%03lu/%lu.%03lu\n",
  982. cclk/1000000, cclk%1000000,
  983. sclk/1000000, sclk%1000000);
  984. seq_printf(m, "bogomips\t: %lu.%02lu\n"
  985. "Calibration\t: %lu loops\n",
  986. (cpudata->loops_per_jiffy * HZ) / 500000,
  987. ((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
  988. (cpudata->loops_per_jiffy * HZ));
  989. /* Check Cache configutation */
  990. switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {
  991. case ACACHE_BSRAM:
  992. cache = "dbank-A/B\t: cache/sram";
  993. dcache_size = 16;
  994. dsup_banks = 1;
  995. break;
  996. case ACACHE_BCACHE:
  997. cache = "dbank-A/B\t: cache/cache";
  998. dcache_size = 32;
  999. dsup_banks = 2;
  1000. break;
  1001. case ASRAM_BSRAM:
  1002. cache = "dbank-A/B\t: sram/sram";
  1003. dcache_size = 0;
  1004. dsup_banks = 0;
  1005. break;
  1006. default:
  1007. cache = "unknown";
  1008. dcache_size = 0;
  1009. dsup_banks = 0;
  1010. break;
  1011. }
  1012. /* Is it turned on? */
  1013. if ((cpudata->dmemctl & (ENDCPLB | DMC_ENABLE)) != (ENDCPLB | DMC_ENABLE))
  1014. dcache_size = 0;
  1015. if ((cpudata->imemctl & (IMC | ENICPLB)) != (IMC | ENICPLB))
  1016. icache_size = 0;
  1017. seq_printf(m, "cache size\t: %d KB(L1 icache) "
  1018. "%d KB(L1 dcache%s) %d KB(L2 cache)\n",
  1019. icache_size, dcache_size,
  1020. #if defined CONFIG_BFIN_WB
  1021. "-wb"
  1022. #elif defined CONFIG_BFIN_WT
  1023. "-wt"
  1024. #endif
  1025. "", 0);
  1026. seq_printf(m, "%s\n", cache);
  1027. if (icache_size)
  1028. seq_printf(m, "icache setup\t: %d Sub-banks/%d Ways, %d Lines/Way\n",
  1029. BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
  1030. else
  1031. seq_printf(m, "icache setup\t: off\n");
  1032. seq_printf(m,
  1033. "dcache setup\t: %d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
  1034. dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
  1035. BFIN_DLINES);
  1036. #ifdef __ARCH_SYNC_CORE_DCACHE
  1037. seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
  1038. #endif
  1039. #ifdef __ARCH_SYNC_CORE_ICACHE
  1040. seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
  1041. #endif
  1042. #ifdef CONFIG_BFIN_ICACHE_LOCK
  1043. switch ((cpudata->imemctl >> 3) & WAYALL_L) {
  1044. case WAY0_L:
  1045. seq_printf(m, "Way0 Locked-Down\n");
  1046. break;
  1047. case WAY1_L:
  1048. seq_printf(m, "Way1 Locked-Down\n");
  1049. break;
  1050. case WAY01_L:
  1051. seq_printf(m, "Way0,Way1 Locked-Down\n");
  1052. break;
  1053. case WAY2_L:
  1054. seq_printf(m, "Way2 Locked-Down\n");
  1055. break;
  1056. case WAY02_L:
  1057. seq_printf(m, "Way0,Way2 Locked-Down\n");
  1058. break;
  1059. case WAY12_L:
  1060. seq_printf(m, "Way1,Way2 Locked-Down\n");
  1061. break;
  1062. case WAY012_L:
  1063. seq_printf(m, "Way0,Way1 & Way2 Locked-Down\n");
  1064. break;
  1065. case WAY3_L:
  1066. seq_printf(m, "Way3 Locked-Down\n");
  1067. break;
  1068. case WAY03_L:
  1069. seq_printf(m, "Way0,Way3 Locked-Down\n");
  1070. break;
  1071. case WAY13_L:
  1072. seq_printf(m, "Way1,Way3 Locked-Down\n");
  1073. break;
  1074. case WAY013_L:
  1075. seq_printf(m, "Way 0,Way1,Way3 Locked-Down\n");
  1076. break;
  1077. case WAY32_L:
  1078. seq_printf(m, "Way3,Way2 Locked-Down\n");
  1079. break;
  1080. case WAY320_L:
  1081. seq_printf(m, "Way3,Way2,Way0 Locked-Down\n");
  1082. break;
  1083. case WAY321_L:
  1084. seq_printf(m, "Way3,Way2,Way1 Locked-Down\n");
  1085. break;
  1086. case WAYALL_L:
  1087. seq_printf(m, "All Ways are locked\n");
  1088. break;
  1089. default:
  1090. seq_printf(m, "No Ways are locked\n");
  1091. }
  1092. #endif
  1093. if (cpu_num != num_possible_cpus() - 1)
  1094. return 0;
  1095. if (L2_LENGTH)
  1096. seq_printf(m, "L2 SRAM\t\t: %dKB\n", L2_LENGTH/0x400);
  1097. seq_printf(m, "board name\t: %s\n", bfin_board_name);
  1098. seq_printf(m, "board memory\t: %ld kB (0x%p -> 0x%p)\n",
  1099. physical_mem_end >> 10, (void *)0, (void *)physical_mem_end);
  1100. seq_printf(m, "kernel memory\t: %d kB (0x%p -> 0x%p)\n",
  1101. ((int)memory_end - (int)_stext) >> 10,
  1102. _stext,
  1103. (void *)memory_end);
  1104. seq_printf(m, "\n");
  1105. return 0;
  1106. }
  1107. static void *c_start(struct seq_file *m, loff_t *pos)
  1108. {
  1109. if (*pos == 0)
  1110. *pos = first_cpu(cpu_online_map);
  1111. if (*pos >= num_online_cpus())
  1112. return NULL;
  1113. return pos;
  1114. }
  1115. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  1116. {
  1117. *pos = next_cpu(*pos, cpu_online_map);
  1118. return c_start(m, pos);
  1119. }
  1120. static void c_stop(struct seq_file *m, void *v)
  1121. {
  1122. }
  1123. const struct seq_operations cpuinfo_op = {
  1124. .start = c_start,
  1125. .next = c_next,
  1126. .stop = c_stop,
  1127. .show = show_cpuinfo,
  1128. };
  1129. void __init cmdline_init(const char *r0)
  1130. {
  1131. if (r0)
  1132. strncpy(command_line, r0, COMMAND_LINE_SIZE);
  1133. }