sp5100_tco.c 12 KB

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  1. /*
  2. * sp5100_tco : TCO timer driver for sp5100 chipsets
  3. *
  4. * (c) Copyright 2009 Google Inc., All Rights Reserved.
  5. *
  6. * Based on i8xx_tco.c:
  7. * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
  8. * Reserved.
  9. * http://www.kernelconcepts.de
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. *
  16. * See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide"
  17. */
  18. /*
  19. * Includes, defines, variables, module parameters, ...
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/types.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/watchdog.h>
  26. #include <linux/init.h>
  27. #include <linux/fs.h>
  28. #include <linux/pci.h>
  29. #include <linux/ioport.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/uaccess.h>
  32. #include <linux/io.h>
  33. #include "sp5100_tco.h"
  34. /* Module and version information */
  35. #define TCO_VERSION "0.01"
  36. #define TCO_MODULE_NAME "SP5100 TCO timer"
  37. #define TCO_DRIVER_NAME TCO_MODULE_NAME ", v" TCO_VERSION
  38. #define PFX TCO_MODULE_NAME ": "
  39. /* internal variables */
  40. static void __iomem *tcobase;
  41. static unsigned int pm_iobase;
  42. static DEFINE_SPINLOCK(tco_lock); /* Guards the hardware */
  43. static unsigned long timer_alive;
  44. static char tco_expect_close;
  45. static struct pci_dev *sp5100_tco_pci;
  46. /* the watchdog platform device */
  47. static struct platform_device *sp5100_tco_platform_device;
  48. /* module parameters */
  49. #define WATCHDOG_HEARTBEAT 60 /* 60 sec default heartbeat. */
  50. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  51. module_param(heartbeat, int, 0);
  52. MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
  53. __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  54. static int nowayout = WATCHDOG_NOWAYOUT;
  55. module_param(nowayout, int, 0);
  56. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started"
  57. " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  58. /*
  59. * Some TCO specific functions
  60. */
  61. static void tco_timer_start(void)
  62. {
  63. u32 val;
  64. unsigned long flags;
  65. spin_lock_irqsave(&tco_lock, flags);
  66. val = readl(SP5100_WDT_CONTROL(tcobase));
  67. val |= SP5100_WDT_START_STOP_BIT;
  68. writel(val, SP5100_WDT_CONTROL(tcobase));
  69. spin_unlock_irqrestore(&tco_lock, flags);
  70. }
  71. static void tco_timer_stop(void)
  72. {
  73. u32 val;
  74. unsigned long flags;
  75. spin_lock_irqsave(&tco_lock, flags);
  76. val = readl(SP5100_WDT_CONTROL(tcobase));
  77. val &= ~SP5100_WDT_START_STOP_BIT;
  78. writel(val, SP5100_WDT_CONTROL(tcobase));
  79. spin_unlock_irqrestore(&tco_lock, flags);
  80. }
  81. static void tco_timer_keepalive(void)
  82. {
  83. u32 val;
  84. unsigned long flags;
  85. spin_lock_irqsave(&tco_lock, flags);
  86. val = readl(SP5100_WDT_CONTROL(tcobase));
  87. val |= SP5100_WDT_TRIGGER_BIT;
  88. writel(val, SP5100_WDT_CONTROL(tcobase));
  89. spin_unlock_irqrestore(&tco_lock, flags);
  90. }
  91. static int tco_timer_set_heartbeat(int t)
  92. {
  93. unsigned long flags;
  94. if (t < 0 || t > 0xffff)
  95. return -EINVAL;
  96. /* Write new heartbeat to watchdog */
  97. spin_lock_irqsave(&tco_lock, flags);
  98. writel(t, SP5100_WDT_COUNT(tcobase));
  99. spin_unlock_irqrestore(&tco_lock, flags);
  100. heartbeat = t;
  101. return 0;
  102. }
  103. /*
  104. * /dev/watchdog handling
  105. */
  106. static int sp5100_tco_open(struct inode *inode, struct file *file)
  107. {
  108. /* /dev/watchdog can only be opened once */
  109. if (test_and_set_bit(0, &timer_alive))
  110. return -EBUSY;
  111. /* Reload and activate timer */
  112. tco_timer_start();
  113. tco_timer_keepalive();
  114. return nonseekable_open(inode, file);
  115. }
  116. static int sp5100_tco_release(struct inode *inode, struct file *file)
  117. {
  118. /* Shut off the timer. */
  119. if (tco_expect_close == 42) {
  120. tco_timer_stop();
  121. } else {
  122. printk(KERN_CRIT PFX
  123. "Unexpected close, not stopping watchdog!\n");
  124. tco_timer_keepalive();
  125. }
  126. clear_bit(0, &timer_alive);
  127. tco_expect_close = 0;
  128. return 0;
  129. }
  130. static ssize_t sp5100_tco_write(struct file *file, const char __user *data,
  131. size_t len, loff_t *ppos)
  132. {
  133. /* See if we got the magic character 'V' and reload the timer */
  134. if (len) {
  135. if (!nowayout) {
  136. size_t i;
  137. /* note: just in case someone wrote the magic character
  138. * five months ago... */
  139. tco_expect_close = 0;
  140. /* scan to see whether or not we got the magic character
  141. */
  142. for (i = 0; i != len; i++) {
  143. char c;
  144. if (get_user(c, data + i))
  145. return -EFAULT;
  146. if (c == 'V')
  147. tco_expect_close = 42;
  148. }
  149. }
  150. /* someone wrote to us, we should reload the timer */
  151. tco_timer_keepalive();
  152. }
  153. return len;
  154. }
  155. static long sp5100_tco_ioctl(struct file *file, unsigned int cmd,
  156. unsigned long arg)
  157. {
  158. int new_options, retval = -EINVAL;
  159. int new_heartbeat;
  160. void __user *argp = (void __user *)arg;
  161. int __user *p = argp;
  162. static const struct watchdog_info ident = {
  163. .options = WDIOF_SETTIMEOUT |
  164. WDIOF_KEEPALIVEPING |
  165. WDIOF_MAGICCLOSE,
  166. .firmware_version = 0,
  167. .identity = TCO_MODULE_NAME,
  168. };
  169. switch (cmd) {
  170. case WDIOC_GETSUPPORT:
  171. return copy_to_user(argp, &ident,
  172. sizeof(ident)) ? -EFAULT : 0;
  173. case WDIOC_GETSTATUS:
  174. case WDIOC_GETBOOTSTATUS:
  175. return put_user(0, p);
  176. case WDIOC_SETOPTIONS:
  177. if (get_user(new_options, p))
  178. return -EFAULT;
  179. if (new_options & WDIOS_DISABLECARD) {
  180. tco_timer_stop();
  181. retval = 0;
  182. }
  183. if (new_options & WDIOS_ENABLECARD) {
  184. tco_timer_start();
  185. tco_timer_keepalive();
  186. retval = 0;
  187. }
  188. return retval;
  189. case WDIOC_KEEPALIVE:
  190. tco_timer_keepalive();
  191. return 0;
  192. case WDIOC_SETTIMEOUT:
  193. if (get_user(new_heartbeat, p))
  194. return -EFAULT;
  195. if (tco_timer_set_heartbeat(new_heartbeat))
  196. return -EINVAL;
  197. tco_timer_keepalive();
  198. /* Fall through */
  199. case WDIOC_GETTIMEOUT:
  200. return put_user(heartbeat, p);
  201. default:
  202. return -ENOTTY;
  203. }
  204. }
  205. /*
  206. * Kernel Interfaces
  207. */
  208. static const struct file_operations sp5100_tco_fops = {
  209. .owner = THIS_MODULE,
  210. .llseek = no_llseek,
  211. .write = sp5100_tco_write,
  212. .unlocked_ioctl = sp5100_tco_ioctl,
  213. .open = sp5100_tco_open,
  214. .release = sp5100_tco_release,
  215. };
  216. static struct miscdevice sp5100_tco_miscdev = {
  217. .minor = WATCHDOG_MINOR,
  218. .name = "watchdog",
  219. .fops = &sp5100_tco_fops,
  220. };
  221. /*
  222. * Data for PCI driver interface
  223. *
  224. * This data only exists for exporting the supported
  225. * PCI ids via MODULE_DEVICE_TABLE. We do not actually
  226. * register a pci_driver, because someone else might
  227. * want to register another driver on the same PCI id.
  228. */
  229. static DEFINE_PCI_DEVICE_TABLE(sp5100_tco_pci_tbl) = {
  230. { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
  231. PCI_ANY_ID, },
  232. { 0, }, /* End of list */
  233. };
  234. MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
  235. /*
  236. * Init & exit routines
  237. */
  238. static unsigned char __devinit sp5100_tco_setupdevice(void)
  239. {
  240. struct pci_dev *dev = NULL;
  241. u32 val;
  242. /* Match the PCI device */
  243. for_each_pci_dev(dev) {
  244. if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
  245. sp5100_tco_pci = dev;
  246. break;
  247. }
  248. }
  249. if (!sp5100_tco_pci)
  250. return 0;
  251. /* Request the IO ports used by this driver */
  252. pm_iobase = SP5100_IO_PM_INDEX_REG;
  253. if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, "SP5100 TCO")) {
  254. printk(KERN_ERR PFX "I/O address 0x%04x already in use\n",
  255. pm_iobase);
  256. goto exit;
  257. }
  258. /* Find the watchdog base address. */
  259. outb(SP5100_PM_WATCHDOG_BASE3, SP5100_IO_PM_INDEX_REG);
  260. val = inb(SP5100_IO_PM_DATA_REG);
  261. outb(SP5100_PM_WATCHDOG_BASE2, SP5100_IO_PM_INDEX_REG);
  262. val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
  263. outb(SP5100_PM_WATCHDOG_BASE1, SP5100_IO_PM_INDEX_REG);
  264. val = val << 8 | inb(SP5100_IO_PM_DATA_REG);
  265. outb(SP5100_PM_WATCHDOG_BASE0, SP5100_IO_PM_INDEX_REG);
  266. /* Low three bits of BASE0 are reserved. */
  267. val = val << 8 | (inb(SP5100_IO_PM_DATA_REG) & 0xf8);
  268. tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
  269. if (tcobase == 0) {
  270. printk(KERN_ERR PFX "failed to get tcobase address\n");
  271. goto unreg_region;
  272. }
  273. /* Enable watchdog decode bit */
  274. pci_read_config_dword(sp5100_tco_pci,
  275. SP5100_PCI_WATCHDOG_MISC_REG,
  276. &val);
  277. val |= SP5100_PCI_WATCHDOG_DECODE_EN;
  278. pci_write_config_dword(sp5100_tco_pci,
  279. SP5100_PCI_WATCHDOG_MISC_REG,
  280. val);
  281. /* Enable Watchdog timer and set the resolution to 1 sec. */
  282. outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG);
  283. val = inb(SP5100_IO_PM_DATA_REG);
  284. val |= SP5100_PM_WATCHDOG_SECOND_RES;
  285. val &= ~SP5100_PM_WATCHDOG_DISABLE;
  286. outb(val, SP5100_IO_PM_DATA_REG);
  287. /* Check that the watchdog action is set to reset the system. */
  288. val = readl(SP5100_WDT_CONTROL(tcobase));
  289. val &= ~SP5100_PM_WATCHDOG_ACTION_RESET;
  290. writel(val, SP5100_WDT_CONTROL(tcobase));
  291. /* Set a reasonable heartbeat before we stop the timer */
  292. tco_timer_set_heartbeat(heartbeat);
  293. /*
  294. * Stop the TCO before we change anything so we don't race with
  295. * a zeroed timer.
  296. */
  297. tco_timer_stop();
  298. /* Done */
  299. return 1;
  300. iounmap(tcobase);
  301. unreg_region:
  302. release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
  303. exit:
  304. return 0;
  305. }
  306. static int __devinit sp5100_tco_init(struct platform_device *dev)
  307. {
  308. int ret;
  309. u32 val;
  310. /* Check whether or not the hardware watchdog is there. If found, then
  311. * set it up.
  312. */
  313. if (!sp5100_tco_setupdevice())
  314. return -ENODEV;
  315. /* Check to see if last reboot was due to watchdog timeout */
  316. printk(KERN_INFO PFX "Watchdog reboot %sdetected.\n",
  317. readl(SP5100_WDT_CONTROL(tcobase)) & SP5100_PM_WATCHDOG_FIRED ?
  318. "" : "not ");
  319. /* Clear out the old status */
  320. val = readl(SP5100_WDT_CONTROL(tcobase));
  321. val &= ~SP5100_PM_WATCHDOG_FIRED;
  322. writel(val, SP5100_WDT_CONTROL(tcobase));
  323. /*
  324. * Check that the heartbeat value is within it's range.
  325. * If not, reset to the default.
  326. */
  327. if (tco_timer_set_heartbeat(heartbeat)) {
  328. heartbeat = WATCHDOG_HEARTBEAT;
  329. tco_timer_set_heartbeat(heartbeat);
  330. }
  331. ret = misc_register(&sp5100_tco_miscdev);
  332. if (ret != 0) {
  333. printk(KERN_ERR PFX "cannot register miscdev on minor="
  334. "%d (err=%d)\n",
  335. WATCHDOG_MINOR, ret);
  336. goto exit;
  337. }
  338. clear_bit(0, &timer_alive);
  339. printk(KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec"
  340. " (nowayout=%d)\n",
  341. tcobase, heartbeat, nowayout);
  342. return 0;
  343. exit:
  344. iounmap(tcobase);
  345. release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
  346. return ret;
  347. }
  348. static void __devexit sp5100_tco_cleanup(void)
  349. {
  350. /* Stop the timer before we leave */
  351. if (!nowayout)
  352. tco_timer_stop();
  353. /* Deregister */
  354. misc_deregister(&sp5100_tco_miscdev);
  355. iounmap(tcobase);
  356. release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
  357. }
  358. static int __devexit sp5100_tco_remove(struct platform_device *dev)
  359. {
  360. if (tcobase)
  361. sp5100_tco_cleanup();
  362. return 0;
  363. }
  364. static void sp5100_tco_shutdown(struct platform_device *dev)
  365. {
  366. tco_timer_stop();
  367. }
  368. static struct platform_driver sp5100_tco_driver = {
  369. .probe = sp5100_tco_init,
  370. .remove = __devexit_p(sp5100_tco_remove),
  371. .shutdown = sp5100_tco_shutdown,
  372. .driver = {
  373. .owner = THIS_MODULE,
  374. .name = TCO_MODULE_NAME,
  375. },
  376. };
  377. static int __init sp5100_tco_init_module(void)
  378. {
  379. int err;
  380. printk(KERN_INFO PFX "SP5100 TCO WatchDog Timer Driver v%s\n",
  381. TCO_VERSION);
  382. err = platform_driver_register(&sp5100_tco_driver);
  383. if (err)
  384. return err;
  385. sp5100_tco_platform_device = platform_device_register_simple(
  386. TCO_MODULE_NAME, -1, NULL, 0);
  387. if (IS_ERR(sp5100_tco_platform_device)) {
  388. err = PTR_ERR(sp5100_tco_platform_device);
  389. goto unreg_platform_driver;
  390. }
  391. return 0;
  392. unreg_platform_driver:
  393. platform_driver_unregister(&sp5100_tco_driver);
  394. return err;
  395. }
  396. static void __exit sp5100_tco_cleanup_module(void)
  397. {
  398. platform_device_unregister(sp5100_tco_platform_device);
  399. platform_driver_unregister(&sp5100_tco_driver);
  400. printk(KERN_INFO PFX "SP5100 TCO Watchdog Module Unloaded.\n");
  401. }
  402. module_init(sp5100_tco_init_module);
  403. module_exit(sp5100_tco_cleanup_module);
  404. MODULE_AUTHOR("Priyanka Gupta");
  405. MODULE_DESCRIPTION("TCO timer driver for SP5100 chipset");
  406. MODULE_LICENSE("GPL");
  407. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);