wm831x-dcdc.c 26 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 6
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. struct regulator_desc desc;
  46. int base;
  47. struct wm831x *wm831x;
  48. struct regulator_dev *regulator;
  49. int dvs_gpio;
  50. int dvs_gpio_state;
  51. int on_vsel;
  52. int dvs_vsel;
  53. };
  54. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  55. {
  56. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  57. struct wm831x *wm831x = dcdc->wm831x;
  58. int mask = 1 << rdev_get_id(rdev);
  59. int reg;
  60. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  61. if (reg < 0)
  62. return reg;
  63. if (reg & mask)
  64. return 1;
  65. else
  66. return 0;
  67. }
  68. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  69. {
  70. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  71. struct wm831x *wm831x = dcdc->wm831x;
  72. int mask = 1 << rdev_get_id(rdev);
  73. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  74. }
  75. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  76. {
  77. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  78. struct wm831x *wm831x = dcdc->wm831x;
  79. int mask = 1 << rdev_get_id(rdev);
  80. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  81. }
  82. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  83. {
  84. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  85. struct wm831x *wm831x = dcdc->wm831x;
  86. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  87. int val;
  88. val = wm831x_reg_read(wm831x, reg);
  89. if (val < 0)
  90. return val;
  91. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  92. switch (val) {
  93. case WM831X_DCDC_MODE_FAST:
  94. return REGULATOR_MODE_FAST;
  95. case WM831X_DCDC_MODE_NORMAL:
  96. return REGULATOR_MODE_NORMAL;
  97. case WM831X_DCDC_MODE_STANDBY:
  98. return REGULATOR_MODE_STANDBY;
  99. case WM831X_DCDC_MODE_IDLE:
  100. return REGULATOR_MODE_IDLE;
  101. default:
  102. BUG();
  103. return -EINVAL;
  104. }
  105. }
  106. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  107. unsigned int mode)
  108. {
  109. int val;
  110. switch (mode) {
  111. case REGULATOR_MODE_FAST:
  112. val = WM831X_DCDC_MODE_FAST;
  113. break;
  114. case REGULATOR_MODE_NORMAL:
  115. val = WM831X_DCDC_MODE_NORMAL;
  116. break;
  117. case REGULATOR_MODE_STANDBY:
  118. val = WM831X_DCDC_MODE_STANDBY;
  119. break;
  120. case REGULATOR_MODE_IDLE:
  121. val = WM831X_DCDC_MODE_IDLE;
  122. break;
  123. default:
  124. return -EINVAL;
  125. }
  126. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  127. val << WM831X_DC1_ON_MODE_SHIFT);
  128. }
  129. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  130. {
  131. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  132. struct wm831x *wm831x = dcdc->wm831x;
  133. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  134. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  135. }
  136. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  137. unsigned int mode)
  138. {
  139. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  140. struct wm831x *wm831x = dcdc->wm831x;
  141. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  142. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  143. }
  144. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  145. {
  146. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  147. struct wm831x *wm831x = dcdc->wm831x;
  148. int ret;
  149. /* First, check for errors */
  150. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  151. if (ret < 0)
  152. return ret;
  153. if (ret & (1 << rdev_get_id(rdev))) {
  154. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  155. rdev_get_id(rdev) + 1);
  156. return REGULATOR_STATUS_ERROR;
  157. }
  158. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  159. if (rdev_get_id(rdev) < 2) {
  160. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  161. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  162. rdev_get_id(rdev) + 1);
  163. return REGULATOR_STATUS_ERROR;
  164. }
  165. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  166. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  167. rdev_get_id(rdev) + 1);
  168. return REGULATOR_STATUS_ERROR;
  169. }
  170. }
  171. /* Is the regulator on? */
  172. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  173. if (ret < 0)
  174. return ret;
  175. if (!(ret & (1 << rdev_get_id(rdev))))
  176. return REGULATOR_STATUS_OFF;
  177. /* TODO: When we handle hardware control modes so we can report the
  178. * current mode. */
  179. return REGULATOR_STATUS_ON;
  180. }
  181. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  182. {
  183. struct wm831x_dcdc *dcdc = data;
  184. regulator_notifier_call_chain(dcdc->regulator,
  185. REGULATOR_EVENT_UNDER_VOLTAGE,
  186. NULL);
  187. return IRQ_HANDLED;
  188. }
  189. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  190. {
  191. struct wm831x_dcdc *dcdc = data;
  192. regulator_notifier_call_chain(dcdc->regulator,
  193. REGULATOR_EVENT_OVER_CURRENT,
  194. NULL);
  195. return IRQ_HANDLED;
  196. }
  197. /*
  198. * BUCKV specifics
  199. */
  200. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  201. unsigned selector)
  202. {
  203. if (selector <= 0x8)
  204. return 600000;
  205. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  206. return 600000 + ((selector - 0x8) * 12500);
  207. return -EINVAL;
  208. }
  209. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  210. int min_uV, int max_uV)
  211. {
  212. u16 vsel;
  213. if (min_uV < 600000)
  214. vsel = 0;
  215. else if (min_uV <= 1800000)
  216. vsel = ((min_uV - 600000) / 12500) + 8;
  217. else
  218. return -EINVAL;
  219. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  220. return -EINVAL;
  221. return vsel;
  222. }
  223. static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
  224. int min_uV, int max_uV)
  225. {
  226. u16 vsel;
  227. if (max_uV < 600000 || max_uV > 1800000)
  228. return -EINVAL;
  229. vsel = ((max_uV - 600000) / 12500) + 8;
  230. if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
  231. wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
  232. return -EINVAL;
  233. return vsel;
  234. }
  235. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  236. {
  237. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  238. if (state == dcdc->dvs_gpio_state)
  239. return 0;
  240. dcdc->dvs_gpio_state = state;
  241. gpio_set_value(dcdc->dvs_gpio, state);
  242. /* Should wait for DVS state change to be asserted if we have
  243. * a GPIO for it, for now assume the device is configured
  244. * for the fastest possible transition.
  245. */
  246. return 0;
  247. }
  248. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  249. int min_uV, int max_uV, unsigned *selector)
  250. {
  251. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  252. struct wm831x *wm831x = dcdc->wm831x;
  253. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  254. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  255. int vsel, ret;
  256. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  257. if (vsel < 0)
  258. return vsel;
  259. *selector = vsel;
  260. /* If this value is already set then do a GPIO update if we can */
  261. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  262. return wm831x_buckv_set_dvs(rdev, 0);
  263. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  264. return wm831x_buckv_set_dvs(rdev, 1);
  265. /* Always set the ON status to the minimum voltage */
  266. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  267. if (ret < 0)
  268. return ret;
  269. dcdc->on_vsel = vsel;
  270. if (!dcdc->dvs_gpio)
  271. return ret;
  272. /* Kick the voltage transition now */
  273. ret = wm831x_buckv_set_dvs(rdev, 0);
  274. if (ret < 0)
  275. return ret;
  276. /* Set the high voltage as the DVS voltage. This is optimised
  277. * for CPUfreq usage, most processors will keep the maximum
  278. * voltage constant and lower the minimum with the frequency. */
  279. vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
  280. if (vsel < 0) {
  281. /* This should never happen - at worst the same vsel
  282. * should be chosen */
  283. WARN_ON(vsel < 0);
  284. return 0;
  285. }
  286. /* Don't bother if it's the same VSEL we're already using */
  287. if (vsel == dcdc->on_vsel)
  288. return 0;
  289. ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
  290. if (ret == 0)
  291. dcdc->dvs_vsel = vsel;
  292. else
  293. dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
  294. ret);
  295. return 0;
  296. }
  297. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  298. int uV)
  299. {
  300. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  301. struct wm831x *wm831x = dcdc->wm831x;
  302. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  303. int vsel;
  304. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  305. if (vsel < 0)
  306. return vsel;
  307. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  308. }
  309. static int wm831x_buckv_get_voltage_sel(struct regulator_dev *rdev)
  310. {
  311. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  312. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  313. return dcdc->dvs_vsel;
  314. else
  315. return dcdc->on_vsel;
  316. }
  317. /* Current limit options */
  318. static u16 wm831x_dcdc_ilim[] = {
  319. 125, 250, 375, 500, 625, 750, 875, 1000
  320. };
  321. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  322. int min_uA, int max_uA)
  323. {
  324. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  325. struct wm831x *wm831x = dcdc->wm831x;
  326. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  327. int i;
  328. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  329. if (max_uA <= wm831x_dcdc_ilim[i])
  330. break;
  331. }
  332. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  333. return -EINVAL;
  334. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
  335. }
  336. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  337. {
  338. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  339. struct wm831x *wm831x = dcdc->wm831x;
  340. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  341. int val;
  342. val = wm831x_reg_read(wm831x, reg);
  343. if (val < 0)
  344. return val;
  345. return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
  346. }
  347. static struct regulator_ops wm831x_buckv_ops = {
  348. .set_voltage = wm831x_buckv_set_voltage,
  349. .get_voltage_sel = wm831x_buckv_get_voltage_sel,
  350. .list_voltage = wm831x_buckv_list_voltage,
  351. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  352. .set_current_limit = wm831x_buckv_set_current_limit,
  353. .get_current_limit = wm831x_buckv_get_current_limit,
  354. .is_enabled = wm831x_dcdc_is_enabled,
  355. .enable = wm831x_dcdc_enable,
  356. .disable = wm831x_dcdc_disable,
  357. .get_status = wm831x_dcdc_get_status,
  358. .get_mode = wm831x_dcdc_get_mode,
  359. .set_mode = wm831x_dcdc_set_mode,
  360. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  361. };
  362. /*
  363. * Set up DVS control. We just log errors since we can still run
  364. * (with reduced performance) if we fail.
  365. */
  366. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  367. struct wm831x_buckv_pdata *pdata)
  368. {
  369. struct wm831x *wm831x = dcdc->wm831x;
  370. int ret;
  371. u16 ctrl;
  372. if (!pdata || !pdata->dvs_gpio)
  373. return;
  374. switch (pdata->dvs_control_src) {
  375. case 1:
  376. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  377. break;
  378. case 2:
  379. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  380. break;
  381. default:
  382. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  383. pdata->dvs_control_src, dcdc->name);
  384. return;
  385. }
  386. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  387. WM831X_DC1_DVS_SRC_MASK, ctrl);
  388. if (ret < 0) {
  389. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  390. dcdc->name, ret);
  391. return;
  392. }
  393. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  394. if (ret < 0) {
  395. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  396. dcdc->name, ret);
  397. return;
  398. }
  399. /* gpiolib won't let us read the GPIO status so pick the higher
  400. * of the two existing voltages so we take it as platform data.
  401. */
  402. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  403. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  404. if (ret < 0) {
  405. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  406. dcdc->name, ret);
  407. gpio_free(pdata->dvs_gpio);
  408. return;
  409. }
  410. dcdc->dvs_gpio = pdata->dvs_gpio;
  411. }
  412. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  413. {
  414. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  415. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  416. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  417. struct wm831x_dcdc *dcdc;
  418. struct resource *res;
  419. int ret, irq;
  420. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  421. if (pdata == NULL || pdata->dcdc[id] == NULL)
  422. return -ENODEV;
  423. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  424. if (dcdc == NULL) {
  425. dev_err(&pdev->dev, "Unable to allocate private data\n");
  426. return -ENOMEM;
  427. }
  428. dcdc->wm831x = wm831x;
  429. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  430. if (res == NULL) {
  431. dev_err(&pdev->dev, "No I/O resource\n");
  432. ret = -EINVAL;
  433. goto err;
  434. }
  435. dcdc->base = res->start;
  436. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  437. dcdc->desc.name = dcdc->name;
  438. dcdc->desc.id = id;
  439. dcdc->desc.type = REGULATOR_VOLTAGE;
  440. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  441. dcdc->desc.ops = &wm831x_buckv_ops;
  442. dcdc->desc.owner = THIS_MODULE;
  443. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  444. if (ret < 0) {
  445. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  446. goto err;
  447. }
  448. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  449. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  450. if (ret < 0) {
  451. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  452. goto err;
  453. }
  454. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  455. if (pdata->dcdc[id])
  456. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  457. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  458. pdata->dcdc[id], dcdc);
  459. if (IS_ERR(dcdc->regulator)) {
  460. ret = PTR_ERR(dcdc->regulator);
  461. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  462. id + 1, ret);
  463. goto err;
  464. }
  465. irq = platform_get_irq_byname(pdev, "UV");
  466. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  467. IRQF_TRIGGER_RISING, dcdc->name,
  468. dcdc);
  469. if (ret != 0) {
  470. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  471. irq, ret);
  472. goto err_regulator;
  473. }
  474. irq = platform_get_irq_byname(pdev, "HC");
  475. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq,
  476. IRQF_TRIGGER_RISING, dcdc->name,
  477. dcdc);
  478. if (ret != 0) {
  479. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  480. irq, ret);
  481. goto err_uv;
  482. }
  483. platform_set_drvdata(pdev, dcdc);
  484. return 0;
  485. err_uv:
  486. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  487. err_regulator:
  488. regulator_unregister(dcdc->regulator);
  489. err:
  490. if (dcdc->dvs_gpio)
  491. gpio_free(dcdc->dvs_gpio);
  492. kfree(dcdc);
  493. return ret;
  494. }
  495. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  496. {
  497. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  498. struct wm831x *wm831x = dcdc->wm831x;
  499. platform_set_drvdata(pdev, NULL);
  500. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
  501. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  502. regulator_unregister(dcdc->regulator);
  503. if (dcdc->dvs_gpio)
  504. gpio_free(dcdc->dvs_gpio);
  505. kfree(dcdc);
  506. return 0;
  507. }
  508. static struct platform_driver wm831x_buckv_driver = {
  509. .probe = wm831x_buckv_probe,
  510. .remove = __devexit_p(wm831x_buckv_remove),
  511. .driver = {
  512. .name = "wm831x-buckv",
  513. .owner = THIS_MODULE,
  514. },
  515. };
  516. /*
  517. * BUCKP specifics
  518. */
  519. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  520. unsigned selector)
  521. {
  522. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  523. return 850000 + (selector * 25000);
  524. else
  525. return -EINVAL;
  526. }
  527. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  528. int min_uV, int max_uV, int *selector)
  529. {
  530. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  531. struct wm831x *wm831x = dcdc->wm831x;
  532. u16 vsel;
  533. if (min_uV <= 34000000)
  534. vsel = (min_uV - 850000) / 25000;
  535. else
  536. return -EINVAL;
  537. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  538. return -EINVAL;
  539. *selector = vsel;
  540. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  541. }
  542. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  543. int min_uV, int max_uV,
  544. unsigned *selector)
  545. {
  546. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  547. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  548. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV,
  549. selector);
  550. }
  551. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  552. int uV)
  553. {
  554. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  555. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  556. unsigned selector;
  557. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV, &selector);
  558. }
  559. static int wm831x_buckp_get_voltage_sel(struct regulator_dev *rdev)
  560. {
  561. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  562. struct wm831x *wm831x = dcdc->wm831x;
  563. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  564. int val;
  565. val = wm831x_reg_read(wm831x, reg);
  566. if (val < 0)
  567. return val;
  568. return val & WM831X_DC3_ON_VSEL_MASK;
  569. }
  570. static struct regulator_ops wm831x_buckp_ops = {
  571. .set_voltage = wm831x_buckp_set_voltage,
  572. .get_voltage_sel = wm831x_buckp_get_voltage_sel,
  573. .list_voltage = wm831x_buckp_list_voltage,
  574. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  575. .is_enabled = wm831x_dcdc_is_enabled,
  576. .enable = wm831x_dcdc_enable,
  577. .disable = wm831x_dcdc_disable,
  578. .get_status = wm831x_dcdc_get_status,
  579. .get_mode = wm831x_dcdc_get_mode,
  580. .set_mode = wm831x_dcdc_set_mode,
  581. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  582. };
  583. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  584. {
  585. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  586. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  587. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  588. struct wm831x_dcdc *dcdc;
  589. struct resource *res;
  590. int ret, irq;
  591. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  592. if (pdata == NULL || pdata->dcdc[id] == NULL)
  593. return -ENODEV;
  594. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  595. if (dcdc == NULL) {
  596. dev_err(&pdev->dev, "Unable to allocate private data\n");
  597. return -ENOMEM;
  598. }
  599. dcdc->wm831x = wm831x;
  600. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  601. if (res == NULL) {
  602. dev_err(&pdev->dev, "No I/O resource\n");
  603. ret = -EINVAL;
  604. goto err;
  605. }
  606. dcdc->base = res->start;
  607. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  608. dcdc->desc.name = dcdc->name;
  609. dcdc->desc.id = id;
  610. dcdc->desc.type = REGULATOR_VOLTAGE;
  611. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  612. dcdc->desc.ops = &wm831x_buckp_ops;
  613. dcdc->desc.owner = THIS_MODULE;
  614. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  615. pdata->dcdc[id], dcdc);
  616. if (IS_ERR(dcdc->regulator)) {
  617. ret = PTR_ERR(dcdc->regulator);
  618. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  619. id + 1, ret);
  620. goto err;
  621. }
  622. irq = platform_get_irq_byname(pdev, "UV");
  623. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  624. IRQF_TRIGGER_RISING, dcdc->name,
  625. dcdc);
  626. if (ret != 0) {
  627. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  628. irq, ret);
  629. goto err_regulator;
  630. }
  631. platform_set_drvdata(pdev, dcdc);
  632. return 0;
  633. err_regulator:
  634. regulator_unregister(dcdc->regulator);
  635. err:
  636. kfree(dcdc);
  637. return ret;
  638. }
  639. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  640. {
  641. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  642. struct wm831x *wm831x = dcdc->wm831x;
  643. platform_set_drvdata(pdev, NULL);
  644. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  645. regulator_unregister(dcdc->regulator);
  646. kfree(dcdc);
  647. return 0;
  648. }
  649. static struct platform_driver wm831x_buckp_driver = {
  650. .probe = wm831x_buckp_probe,
  651. .remove = __devexit_p(wm831x_buckp_remove),
  652. .driver = {
  653. .name = "wm831x-buckp",
  654. .owner = THIS_MODULE,
  655. },
  656. };
  657. /*
  658. * DCDC boost convertors
  659. */
  660. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  661. {
  662. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  663. struct wm831x *wm831x = dcdc->wm831x;
  664. int ret;
  665. /* First, check for errors */
  666. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  667. if (ret < 0)
  668. return ret;
  669. if (ret & (1 << rdev_get_id(rdev))) {
  670. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  671. rdev_get_id(rdev) + 1);
  672. return REGULATOR_STATUS_ERROR;
  673. }
  674. /* Is the regulator on? */
  675. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  676. if (ret < 0)
  677. return ret;
  678. if (ret & (1 << rdev_get_id(rdev)))
  679. return REGULATOR_STATUS_ON;
  680. else
  681. return REGULATOR_STATUS_OFF;
  682. }
  683. static struct regulator_ops wm831x_boostp_ops = {
  684. .get_status = wm831x_boostp_get_status,
  685. .is_enabled = wm831x_dcdc_is_enabled,
  686. .enable = wm831x_dcdc_enable,
  687. .disable = wm831x_dcdc_disable,
  688. };
  689. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  690. {
  691. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  692. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  693. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  694. struct wm831x_dcdc *dcdc;
  695. struct resource *res;
  696. int ret, irq;
  697. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  698. if (pdata == NULL || pdata->dcdc[id] == NULL)
  699. return -ENODEV;
  700. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  701. if (dcdc == NULL) {
  702. dev_err(&pdev->dev, "Unable to allocate private data\n");
  703. return -ENOMEM;
  704. }
  705. dcdc->wm831x = wm831x;
  706. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  707. if (res == NULL) {
  708. dev_err(&pdev->dev, "No I/O resource\n");
  709. ret = -EINVAL;
  710. goto err;
  711. }
  712. dcdc->base = res->start;
  713. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  714. dcdc->desc.name = dcdc->name;
  715. dcdc->desc.id = id;
  716. dcdc->desc.type = REGULATOR_VOLTAGE;
  717. dcdc->desc.ops = &wm831x_boostp_ops;
  718. dcdc->desc.owner = THIS_MODULE;
  719. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  720. pdata->dcdc[id], dcdc);
  721. if (IS_ERR(dcdc->regulator)) {
  722. ret = PTR_ERR(dcdc->regulator);
  723. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  724. id + 1, ret);
  725. goto err;
  726. }
  727. irq = platform_get_irq_byname(pdev, "UV");
  728. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  729. IRQF_TRIGGER_RISING, dcdc->name,
  730. dcdc);
  731. if (ret != 0) {
  732. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  733. irq, ret);
  734. goto err_regulator;
  735. }
  736. platform_set_drvdata(pdev, dcdc);
  737. return 0;
  738. err_regulator:
  739. regulator_unregister(dcdc->regulator);
  740. err:
  741. kfree(dcdc);
  742. return ret;
  743. }
  744. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  745. {
  746. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  747. struct wm831x *wm831x = dcdc->wm831x;
  748. platform_set_drvdata(pdev, NULL);
  749. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  750. regulator_unregister(dcdc->regulator);
  751. kfree(dcdc);
  752. return 0;
  753. }
  754. static struct platform_driver wm831x_boostp_driver = {
  755. .probe = wm831x_boostp_probe,
  756. .remove = __devexit_p(wm831x_boostp_remove),
  757. .driver = {
  758. .name = "wm831x-boostp",
  759. .owner = THIS_MODULE,
  760. },
  761. };
  762. /*
  763. * External Power Enable
  764. *
  765. * These aren't actually DCDCs but look like them in hardware so share
  766. * code.
  767. */
  768. #define WM831X_EPE_BASE 6
  769. static struct regulator_ops wm831x_epe_ops = {
  770. .is_enabled = wm831x_dcdc_is_enabled,
  771. .enable = wm831x_dcdc_enable,
  772. .disable = wm831x_dcdc_disable,
  773. .get_status = wm831x_dcdc_get_status,
  774. };
  775. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  776. {
  777. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  778. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  779. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  780. struct wm831x_dcdc *dcdc;
  781. int ret;
  782. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  783. if (pdata == NULL || pdata->epe[id] == NULL)
  784. return -ENODEV;
  785. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  786. if (dcdc == NULL) {
  787. dev_err(&pdev->dev, "Unable to allocate private data\n");
  788. return -ENOMEM;
  789. }
  790. dcdc->wm831x = wm831x;
  791. /* For current parts this is correct; probably need to revisit
  792. * in future.
  793. */
  794. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  795. dcdc->desc.name = dcdc->name;
  796. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  797. dcdc->desc.ops = &wm831x_epe_ops;
  798. dcdc->desc.type = REGULATOR_VOLTAGE;
  799. dcdc->desc.owner = THIS_MODULE;
  800. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  801. pdata->epe[id], dcdc);
  802. if (IS_ERR(dcdc->regulator)) {
  803. ret = PTR_ERR(dcdc->regulator);
  804. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  805. id + 1, ret);
  806. goto err;
  807. }
  808. platform_set_drvdata(pdev, dcdc);
  809. return 0;
  810. err:
  811. kfree(dcdc);
  812. return ret;
  813. }
  814. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  815. {
  816. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  817. platform_set_drvdata(pdev, NULL);
  818. regulator_unregister(dcdc->regulator);
  819. kfree(dcdc);
  820. return 0;
  821. }
  822. static struct platform_driver wm831x_epe_driver = {
  823. .probe = wm831x_epe_probe,
  824. .remove = __devexit_p(wm831x_epe_remove),
  825. .driver = {
  826. .name = "wm831x-epe",
  827. .owner = THIS_MODULE,
  828. },
  829. };
  830. static int __init wm831x_dcdc_init(void)
  831. {
  832. int ret;
  833. ret = platform_driver_register(&wm831x_buckv_driver);
  834. if (ret != 0)
  835. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  836. ret = platform_driver_register(&wm831x_buckp_driver);
  837. if (ret != 0)
  838. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  839. ret = platform_driver_register(&wm831x_boostp_driver);
  840. if (ret != 0)
  841. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  842. ret = platform_driver_register(&wm831x_epe_driver);
  843. if (ret != 0)
  844. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  845. return 0;
  846. }
  847. subsys_initcall(wm831x_dcdc_init);
  848. static void __exit wm831x_dcdc_exit(void)
  849. {
  850. platform_driver_unregister(&wm831x_epe_driver);
  851. platform_driver_unregister(&wm831x_boostp_driver);
  852. platform_driver_unregister(&wm831x_buckp_driver);
  853. platform_driver_unregister(&wm831x_buckv_driver);
  854. }
  855. module_exit(wm831x_dcdc_exit);
  856. /* Module information */
  857. MODULE_AUTHOR("Mark Brown");
  858. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  859. MODULE_LICENSE("GPL");
  860. MODULE_ALIAS("platform:wm831x-buckv");
  861. MODULE_ALIAS("platform:wm831x-buckp");