portdrv_core.c 15 KB

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  1. /*
  2. * File: portdrv_core.c
  3. * Purpose: PCI Express Port Bus Driver's Core Functions
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/string.h>
  14. #include <linux/slab.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include <linux/pci-aspm.h>
  18. #include "../pci.h"
  19. #include "portdrv.h"
  20. /**
  21. * release_pcie_device - free PCI Express port service device structure
  22. * @dev: Port service device to release
  23. *
  24. * Invoked automatically when device is being removed in response to
  25. * device_unregister(dev). Release all resources being claimed.
  26. */
  27. static void release_pcie_device(struct device *dev)
  28. {
  29. kfree(to_pcie_device(dev));
  30. }
  31. /**
  32. * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
  33. * @entries: Array of MSI-X entries
  34. * @new_entry: Index of the entry to add to the array
  35. * @nr_entries: Number of entries aleady in the array
  36. *
  37. * Return value: Position of the added entry in the array
  38. */
  39. static int pcie_port_msix_add_entry(
  40. struct msix_entry *entries, int new_entry, int nr_entries)
  41. {
  42. int j;
  43. for (j = 0; j < nr_entries; j++)
  44. if (entries[j].entry == new_entry)
  45. return j;
  46. entries[j].entry = new_entry;
  47. return j;
  48. }
  49. /**
  50. * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
  51. * @dev: PCI Express port to handle
  52. * @vectors: Array of interrupt vectors to populate
  53. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  54. *
  55. * Return value: 0 on success, error code on failure
  56. */
  57. static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
  58. {
  59. struct msix_entry *msix_entries;
  60. int idx[PCIE_PORT_DEVICE_MAXSERVICES];
  61. int nr_entries, status, pos, i, nvec;
  62. u16 reg16;
  63. u32 reg32;
  64. nr_entries = pci_msix_table_size(dev);
  65. if (!nr_entries)
  66. return -EINVAL;
  67. if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
  68. nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
  69. msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
  70. if (!msix_entries)
  71. return -ENOMEM;
  72. /*
  73. * Allocate as many entries as the port wants, so that we can check
  74. * which of them will be useful. Moreover, if nr_entries is correctly
  75. * equal to the number of entries this port actually uses, we'll happily
  76. * go through without any tricks.
  77. */
  78. for (i = 0; i < nr_entries; i++)
  79. msix_entries[i].entry = i;
  80. status = pci_enable_msix(dev, msix_entries, nr_entries);
  81. if (status)
  82. goto Exit;
  83. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  84. idx[i] = -1;
  85. status = -EIO;
  86. nvec = 0;
  87. if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
  88. int entry;
  89. /*
  90. * The code below follows the PCI Express Base Specification 2.0
  91. * stating in Section 6.1.6 that "PME and Hot-Plug Event
  92. * interrupts (when both are implemented) always share the same
  93. * MSI or MSI-X vector, as indicated by the Interrupt Message
  94. * Number field in the PCI Express Capabilities register", where
  95. * according to Section 7.8.2 of the specification "For MSI-X,
  96. * the value in this field indicates which MSI-X Table entry is
  97. * used to generate the interrupt message."
  98. */
  99. pos = pci_pcie_cap(dev);
  100. pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
  101. entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
  102. if (entry >= nr_entries)
  103. goto Error;
  104. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  105. if (i == nvec)
  106. nvec++;
  107. idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
  108. idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
  109. }
  110. if (mask & PCIE_PORT_SERVICE_AER) {
  111. int entry;
  112. /*
  113. * The code below follows Section 7.10.10 of the PCI Express
  114. * Base Specification 2.0 stating that bits 31-27 of the Root
  115. * Error Status Register contain a value indicating which of the
  116. * MSI/MSI-X vectors assigned to the port is going to be used
  117. * for AER, where "For MSI-X, the value in this register
  118. * indicates which MSI-X Table entry is used to generate the
  119. * interrupt message."
  120. */
  121. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  122. pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  123. entry = reg32 >> 27;
  124. if (entry >= nr_entries)
  125. goto Error;
  126. i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
  127. if (i == nvec)
  128. nvec++;
  129. idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
  130. }
  131. /*
  132. * If nvec is equal to the allocated number of entries, we can just use
  133. * what we have. Otherwise, the port has some extra entries not for the
  134. * services we know and we need to work around that.
  135. */
  136. if (nvec == nr_entries) {
  137. status = 0;
  138. } else {
  139. /* Drop the temporary MSI-X setup */
  140. pci_disable_msix(dev);
  141. /* Now allocate the MSI-X vectors for real */
  142. status = pci_enable_msix(dev, msix_entries, nvec);
  143. if (status)
  144. goto Exit;
  145. }
  146. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  147. vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
  148. Exit:
  149. kfree(msix_entries);
  150. return status;
  151. Error:
  152. pci_disable_msix(dev);
  153. goto Exit;
  154. }
  155. /**
  156. * init_service_irqs - initialize irqs for PCI Express port services
  157. * @dev: PCI Express port to handle
  158. * @irqs: Array of irqs to populate
  159. * @mask: Bitmask of port capabilities returned by get_port_device_capability()
  160. *
  161. * Return value: Interrupt mode associated with the port
  162. */
  163. static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
  164. {
  165. int i, irq = -1;
  166. /* We have to use INTx if MSI cannot be used for PCIe PME. */
  167. if ((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) {
  168. if (dev->pin)
  169. irq = dev->irq;
  170. goto no_msi;
  171. }
  172. /* Try to use MSI-X if supported */
  173. if (!pcie_port_enable_msix(dev, irqs, mask))
  174. return 0;
  175. /* We're not going to use MSI-X, so try MSI and fall back to INTx */
  176. if (!pci_enable_msi(dev) || dev->pin)
  177. irq = dev->irq;
  178. no_msi:
  179. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
  180. irqs[i] = irq;
  181. irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
  182. if (irq < 0)
  183. return -ENODEV;
  184. return 0;
  185. }
  186. static void cleanup_service_irqs(struct pci_dev *dev)
  187. {
  188. if (dev->msix_enabled)
  189. pci_disable_msix(dev);
  190. else if (dev->msi_enabled)
  191. pci_disable_msi(dev);
  192. }
  193. /**
  194. * get_port_device_capability - discover capabilities of a PCI Express port
  195. * @dev: PCI Express port to examine
  196. *
  197. * The capabilities are read from the port's PCI Express configuration registers
  198. * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
  199. * 7.9 - 7.11.
  200. *
  201. * Return value: Bitmask of discovered port capabilities
  202. */
  203. static int get_port_device_capability(struct pci_dev *dev)
  204. {
  205. int services = 0, pos;
  206. u16 reg16;
  207. u32 reg32;
  208. int cap_mask;
  209. int err;
  210. if (pcie_ports_disabled)
  211. return 0;
  212. err = pcie_port_platform_notify(dev, &cap_mask);
  213. if (!pcie_ports_auto) {
  214. cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
  215. | PCIE_PORT_SERVICE_VC;
  216. if (pci_aer_available())
  217. cap_mask |= PCIE_PORT_SERVICE_AER;
  218. } else if (err) {
  219. return 0;
  220. }
  221. pos = pci_pcie_cap(dev);
  222. pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
  223. /* Hot-Plug Capable */
  224. if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
  225. pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
  226. if (reg32 & PCI_EXP_SLTCAP_HPC) {
  227. services |= PCIE_PORT_SERVICE_HP;
  228. /*
  229. * Disable hot-plug interrupts in case they have been
  230. * enabled by the BIOS and the hot-plug service driver
  231. * is not loaded.
  232. */
  233. pos += PCI_EXP_SLTCTL;
  234. pci_read_config_word(dev, pos, &reg16);
  235. reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
  236. pci_write_config_word(dev, pos, reg16);
  237. }
  238. }
  239. /* AER capable */
  240. if ((cap_mask & PCIE_PORT_SERVICE_AER)
  241. && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
  242. services |= PCIE_PORT_SERVICE_AER;
  243. /*
  244. * Disable AER on this port in case it's been enabled by the
  245. * BIOS (the AER service driver will enable it when necessary).
  246. */
  247. pci_disable_pcie_error_reporting(dev);
  248. }
  249. /* VC support */
  250. if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
  251. services |= PCIE_PORT_SERVICE_VC;
  252. /* Root ports are capable of generating PME too */
  253. if ((cap_mask & PCIE_PORT_SERVICE_PME)
  254. && dev->pcie_type == PCI_EXP_TYPE_ROOT_PORT) {
  255. services |= PCIE_PORT_SERVICE_PME;
  256. /*
  257. * Disable PME interrupt on this port in case it's been enabled
  258. * by the BIOS (the PME service driver will enable it when
  259. * necessary).
  260. */
  261. pcie_pme_interrupt_enable(dev, false);
  262. }
  263. return services;
  264. }
  265. /**
  266. * pcie_device_init - allocate and initialize PCI Express port service device
  267. * @pdev: PCI Express port to associate the service device with
  268. * @service: Type of service to associate with the service device
  269. * @irq: Interrupt vector to associate with the service device
  270. */
  271. static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
  272. {
  273. int retval;
  274. struct pcie_device *pcie;
  275. struct device *device;
  276. pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
  277. if (!pcie)
  278. return -ENOMEM;
  279. pcie->port = pdev;
  280. pcie->irq = irq;
  281. pcie->service = service;
  282. /* Initialize generic device interface */
  283. device = &pcie->device;
  284. device->bus = &pcie_port_bus_type;
  285. device->release = release_pcie_device; /* callback to free pcie dev */
  286. dev_set_name(device, "%s:pcie%02x",
  287. pci_name(pdev),
  288. get_descriptor_id(pdev->pcie_type, service));
  289. device->parent = &pdev->dev;
  290. device_enable_async_suspend(device);
  291. retval = device_register(device);
  292. if (retval)
  293. kfree(pcie);
  294. else
  295. get_device(device);
  296. return retval;
  297. }
  298. /**
  299. * pcie_port_device_register - register PCI Express port
  300. * @dev: PCI Express port to register
  301. *
  302. * Allocate the port extension structure and register services associated with
  303. * the port.
  304. */
  305. int pcie_port_device_register(struct pci_dev *dev)
  306. {
  307. int status, capabilities, i, nr_service;
  308. int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
  309. /* Enable PCI Express port device */
  310. status = pci_enable_device(dev);
  311. if (status)
  312. return status;
  313. /* Get and check PCI Express port services */
  314. capabilities = get_port_device_capability(dev);
  315. if (!capabilities) {
  316. pcie_no_aspm();
  317. return 0;
  318. }
  319. pci_set_master(dev);
  320. /*
  321. * Initialize service irqs. Don't use service devices that
  322. * require interrupts if there is no way to generate them.
  323. */
  324. status = init_service_irqs(dev, irqs, capabilities);
  325. if (status) {
  326. capabilities &= PCIE_PORT_SERVICE_VC;
  327. if (!capabilities)
  328. goto error_disable;
  329. }
  330. /* Allocate child services if any */
  331. status = -ENODEV;
  332. nr_service = 0;
  333. for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
  334. int service = 1 << i;
  335. if (!(capabilities & service))
  336. continue;
  337. if (!pcie_device_init(dev, service, irqs[i]))
  338. nr_service++;
  339. }
  340. if (!nr_service)
  341. goto error_cleanup_irqs;
  342. return 0;
  343. error_cleanup_irqs:
  344. cleanup_service_irqs(dev);
  345. error_disable:
  346. pci_disable_device(dev);
  347. return status;
  348. }
  349. #ifdef CONFIG_PM
  350. static int suspend_iter(struct device *dev, void *data)
  351. {
  352. struct pcie_port_service_driver *service_driver;
  353. if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
  354. service_driver = to_service_driver(dev->driver);
  355. if (service_driver->suspend)
  356. service_driver->suspend(to_pcie_device(dev));
  357. }
  358. return 0;
  359. }
  360. /**
  361. * pcie_port_device_suspend - suspend port services associated with a PCIe port
  362. * @dev: PCI Express port to handle
  363. */
  364. int pcie_port_device_suspend(struct device *dev)
  365. {
  366. return device_for_each_child(dev, NULL, suspend_iter);
  367. }
  368. static int resume_iter(struct device *dev, void *data)
  369. {
  370. struct pcie_port_service_driver *service_driver;
  371. if ((dev->bus == &pcie_port_bus_type) &&
  372. (dev->driver)) {
  373. service_driver = to_service_driver(dev->driver);
  374. if (service_driver->resume)
  375. service_driver->resume(to_pcie_device(dev));
  376. }
  377. return 0;
  378. }
  379. /**
  380. * pcie_port_device_suspend - resume port services associated with a PCIe port
  381. * @dev: PCI Express port to handle
  382. */
  383. int pcie_port_device_resume(struct device *dev)
  384. {
  385. return device_for_each_child(dev, NULL, resume_iter);
  386. }
  387. #endif /* PM */
  388. static int remove_iter(struct device *dev, void *data)
  389. {
  390. if (dev->bus == &pcie_port_bus_type) {
  391. put_device(dev);
  392. device_unregister(dev);
  393. }
  394. return 0;
  395. }
  396. /**
  397. * pcie_port_device_remove - unregister PCI Express port service devices
  398. * @dev: PCI Express port the service devices to unregister are associated with
  399. *
  400. * Remove PCI Express port service devices associated with given port and
  401. * disable MSI-X or MSI for the port.
  402. */
  403. void pcie_port_device_remove(struct pci_dev *dev)
  404. {
  405. device_for_each_child(&dev->dev, NULL, remove_iter);
  406. cleanup_service_irqs(dev);
  407. pci_disable_device(dev);
  408. }
  409. /**
  410. * pcie_port_probe_service - probe driver for given PCI Express port service
  411. * @dev: PCI Express port service device to probe against
  412. *
  413. * If PCI Express port service driver is registered with
  414. * pcie_port_service_register(), this function will be called by the driver core
  415. * whenever match is found between the driver and a port service device.
  416. */
  417. static int pcie_port_probe_service(struct device *dev)
  418. {
  419. struct pcie_device *pciedev;
  420. struct pcie_port_service_driver *driver;
  421. int status;
  422. if (!dev || !dev->driver)
  423. return -ENODEV;
  424. driver = to_service_driver(dev->driver);
  425. if (!driver || !driver->probe)
  426. return -ENODEV;
  427. pciedev = to_pcie_device(dev);
  428. status = driver->probe(pciedev);
  429. if (!status) {
  430. dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
  431. driver->name);
  432. get_device(dev);
  433. }
  434. return status;
  435. }
  436. /**
  437. * pcie_port_remove_service - detach driver from given PCI Express port service
  438. * @dev: PCI Express port service device to handle
  439. *
  440. * If PCI Express port service driver is registered with
  441. * pcie_port_service_register(), this function will be called by the driver core
  442. * when device_unregister() is called for the port service device associated
  443. * with the driver.
  444. */
  445. static int pcie_port_remove_service(struct device *dev)
  446. {
  447. struct pcie_device *pciedev;
  448. struct pcie_port_service_driver *driver;
  449. if (!dev || !dev->driver)
  450. return 0;
  451. pciedev = to_pcie_device(dev);
  452. driver = to_service_driver(dev->driver);
  453. if (driver && driver->remove) {
  454. dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
  455. driver->name);
  456. driver->remove(pciedev);
  457. put_device(dev);
  458. }
  459. return 0;
  460. }
  461. /**
  462. * pcie_port_shutdown_service - shut down given PCI Express port service
  463. * @dev: PCI Express port service device to handle
  464. *
  465. * If PCI Express port service driver is registered with
  466. * pcie_port_service_register(), this function will be called by the driver core
  467. * when device_shutdown() is called for the port service device associated
  468. * with the driver.
  469. */
  470. static void pcie_port_shutdown_service(struct device *dev) {}
  471. /**
  472. * pcie_port_service_register - register PCI Express port service driver
  473. * @new: PCI Express port service driver to register
  474. */
  475. int pcie_port_service_register(struct pcie_port_service_driver *new)
  476. {
  477. if (pcie_ports_disabled)
  478. return -ENODEV;
  479. new->driver.name = (char *)new->name;
  480. new->driver.bus = &pcie_port_bus_type;
  481. new->driver.probe = pcie_port_probe_service;
  482. new->driver.remove = pcie_port_remove_service;
  483. new->driver.shutdown = pcie_port_shutdown_service;
  484. return driver_register(&new->driver);
  485. }
  486. EXPORT_SYMBOL(pcie_port_service_register);
  487. /**
  488. * pcie_port_service_unregister - unregister PCI Express port service driver
  489. * @drv: PCI Express port service driver to unregister
  490. */
  491. void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
  492. {
  493. driver_unregister(&drv->driver);
  494. }
  495. EXPORT_SYMBOL(pcie_port_service_unregister);