pme.c 11 KB

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  1. /*
  2. * PCIe Native PME support
  3. *
  4. * Copyright (C) 2007 - 2009 Intel Corp
  5. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  6. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License V2. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/slab.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/device.h>
  20. #include <linux/pcieport_if.h>
  21. #include <linux/acpi.h>
  22. #include <linux/pci-acpi.h>
  23. #include <linux/pm_runtime.h>
  24. #include "../pci.h"
  25. #include "portdrv.h"
  26. /*
  27. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  28. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  29. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  30. * wake-up from system sleep states.
  31. */
  32. bool pcie_pme_msi_disabled;
  33. static int __init pcie_pme_setup(char *str)
  34. {
  35. if (!strncmp(str, "nomsi", 5))
  36. pcie_pme_msi_disabled = true;
  37. return 1;
  38. }
  39. __setup("pcie_pme=", pcie_pme_setup);
  40. struct pcie_pme_service_data {
  41. spinlock_t lock;
  42. struct pcie_device *srv;
  43. struct work_struct work;
  44. bool noirq; /* Don't enable the PME interrupt used by this service. */
  45. };
  46. /**
  47. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  48. * @dev: PCIe root port or event collector.
  49. * @enable: Enable or disable the interrupt.
  50. */
  51. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  52. {
  53. int rtctl_pos;
  54. u16 rtctl;
  55. rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL;
  56. pci_read_config_word(dev, rtctl_pos, &rtctl);
  57. if (enable)
  58. rtctl |= PCI_EXP_RTCTL_PMEIE;
  59. else
  60. rtctl &= ~PCI_EXP_RTCTL_PMEIE;
  61. pci_write_config_word(dev, rtctl_pos, rtctl);
  62. }
  63. /**
  64. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  65. * @bus: PCI bus to scan.
  66. *
  67. * Scan given PCI bus and all buses under it for devices asserting PME#.
  68. */
  69. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  70. {
  71. struct pci_dev *dev;
  72. bool ret = false;
  73. list_for_each_entry(dev, &bus->devices, bus_list) {
  74. /* Skip PCIe devices in case we started from a root port. */
  75. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  76. pci_wakeup_event(dev);
  77. pm_request_resume(&dev->dev);
  78. ret = true;
  79. }
  80. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  81. ret = true;
  82. }
  83. return ret;
  84. }
  85. /**
  86. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  87. * @bus: Secondary bus of the bridge.
  88. * @devfn: Device/function number to check.
  89. *
  90. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  91. * PCIe PME message. In such that case the bridge should use the Requester ID
  92. * of device/function number 0 on its secondary bus.
  93. */
  94. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  95. {
  96. struct pci_dev *dev;
  97. bool found = false;
  98. if (devfn)
  99. return false;
  100. dev = pci_dev_get(bus->self);
  101. if (!dev)
  102. return false;
  103. if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) {
  104. down_read(&pci_bus_sem);
  105. if (pcie_pme_walk_bus(bus))
  106. found = true;
  107. up_read(&pci_bus_sem);
  108. }
  109. pci_dev_put(dev);
  110. return found;
  111. }
  112. /**
  113. * pcie_pme_handle_request - Find device that generated PME and handle it.
  114. * @port: Root port or event collector that generated the PME interrupt.
  115. * @req_id: PCIe Requester ID of the device that generated the PME.
  116. */
  117. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  118. {
  119. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  120. struct pci_bus *bus;
  121. struct pci_dev *dev;
  122. bool found = false;
  123. /* First, check if the PME is from the root port itself. */
  124. if (port->devfn == devfn && port->bus->number == busnr) {
  125. if (pci_check_pme_status(port)) {
  126. pm_request_resume(&port->dev);
  127. found = true;
  128. } else {
  129. /*
  130. * Apparently, the root port generated the PME on behalf
  131. * of a non-PCIe device downstream. If this is done by
  132. * a root port, the Requester ID field in its status
  133. * register may contain either the root port's, or the
  134. * source device's information (PCI Express Base
  135. * Specification, Rev. 2.0, Section 6.1.9).
  136. */
  137. down_read(&pci_bus_sem);
  138. found = pcie_pme_walk_bus(port->subordinate);
  139. up_read(&pci_bus_sem);
  140. }
  141. goto out;
  142. }
  143. /* Second, find the bus the source device is on. */
  144. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  145. if (!bus)
  146. goto out;
  147. /* Next, check if the PME is from a PCIe-PCI bridge. */
  148. found = pcie_pme_from_pci_bridge(bus, devfn);
  149. if (found)
  150. goto out;
  151. /* Finally, try to find the PME source on the bus. */
  152. down_read(&pci_bus_sem);
  153. list_for_each_entry(dev, &bus->devices, bus_list) {
  154. pci_dev_get(dev);
  155. if (dev->devfn == devfn) {
  156. found = true;
  157. break;
  158. }
  159. pci_dev_put(dev);
  160. }
  161. up_read(&pci_bus_sem);
  162. if (found) {
  163. /* The device is there, but we have to check its PME status. */
  164. found = pci_check_pme_status(dev);
  165. if (found) {
  166. pci_wakeup_event(dev);
  167. pm_request_resume(&dev->dev);
  168. }
  169. pci_dev_put(dev);
  170. } else if (devfn) {
  171. /*
  172. * The device is not there, but we can still try to recover by
  173. * assuming that the PME was reported by a PCIe-PCI bridge that
  174. * used devfn different from zero.
  175. */
  176. dev_dbg(&port->dev, "PME interrupt generated for "
  177. "non-existent device %02x:%02x.%d\n",
  178. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  179. found = pcie_pme_from_pci_bridge(bus, 0);
  180. }
  181. out:
  182. if (!found)
  183. dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
  184. }
  185. /**
  186. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  187. * @work: Work structure giving access to service data.
  188. */
  189. static void pcie_pme_work_fn(struct work_struct *work)
  190. {
  191. struct pcie_pme_service_data *data =
  192. container_of(work, struct pcie_pme_service_data, work);
  193. struct pci_dev *port = data->srv->port;
  194. int rtsta_pos;
  195. u32 rtsta;
  196. rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
  197. spin_lock_irq(&data->lock);
  198. for (;;) {
  199. if (data->noirq)
  200. break;
  201. pci_read_config_dword(port, rtsta_pos, &rtsta);
  202. if (rtsta & PCI_EXP_RTSTA_PME) {
  203. /*
  204. * Clear PME status of the port. If there are other
  205. * pending PMEs, the status will be set again.
  206. */
  207. pcie_clear_root_pme_status(port);
  208. spin_unlock_irq(&data->lock);
  209. pcie_pme_handle_request(port, rtsta & 0xffff);
  210. spin_lock_irq(&data->lock);
  211. continue;
  212. }
  213. /* No need to loop if there are no more PMEs pending. */
  214. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  215. break;
  216. spin_unlock_irq(&data->lock);
  217. cpu_relax();
  218. spin_lock_irq(&data->lock);
  219. }
  220. if (!data->noirq)
  221. pcie_pme_interrupt_enable(port, true);
  222. spin_unlock_irq(&data->lock);
  223. }
  224. /**
  225. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  226. * @irq: Interrupt vector.
  227. * @context: Interrupt context pointer.
  228. */
  229. static irqreturn_t pcie_pme_irq(int irq, void *context)
  230. {
  231. struct pci_dev *port;
  232. struct pcie_pme_service_data *data;
  233. int rtsta_pos;
  234. u32 rtsta;
  235. unsigned long flags;
  236. port = ((struct pcie_device *)context)->port;
  237. data = get_service_data((struct pcie_device *)context);
  238. rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA;
  239. spin_lock_irqsave(&data->lock, flags);
  240. pci_read_config_dword(port, rtsta_pos, &rtsta);
  241. if (!(rtsta & PCI_EXP_RTSTA_PME)) {
  242. spin_unlock_irqrestore(&data->lock, flags);
  243. return IRQ_NONE;
  244. }
  245. pcie_pme_interrupt_enable(port, false);
  246. spin_unlock_irqrestore(&data->lock, flags);
  247. /* We don't use pm_wq, because it's freezable. */
  248. schedule_work(&data->work);
  249. return IRQ_HANDLED;
  250. }
  251. /**
  252. * pcie_pme_set_native - Set the PME interrupt flag for given device.
  253. * @dev: PCI device to handle.
  254. * @ign: Ignored.
  255. */
  256. static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
  257. {
  258. dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
  259. device_set_run_wake(&dev->dev, true);
  260. dev->pme_interrupt = true;
  261. return 0;
  262. }
  263. /**
  264. * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
  265. * @port: PCIe root port or event collector to handle.
  266. *
  267. * For each device below given root port, including the port itself (or for each
  268. * root complex integrated endpoint if @port is a root complex event collector)
  269. * set the flag indicating that it can signal run-time wake-up events via PCIe
  270. * PME interrupts.
  271. */
  272. static void pcie_pme_mark_devices(struct pci_dev *port)
  273. {
  274. pcie_pme_set_native(port, NULL);
  275. if (port->subordinate) {
  276. pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
  277. } else {
  278. struct pci_bus *bus = port->bus;
  279. struct pci_dev *dev;
  280. /* Check if this is a root port event collector. */
  281. if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus)
  282. return;
  283. down_read(&pci_bus_sem);
  284. list_for_each_entry(dev, &bus->devices, bus_list)
  285. if (pci_is_pcie(dev)
  286. && dev->pcie_type == PCI_EXP_TYPE_RC_END)
  287. pcie_pme_set_native(dev, NULL);
  288. up_read(&pci_bus_sem);
  289. }
  290. }
  291. /**
  292. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  293. * @srv: PCIe service to initialize.
  294. */
  295. static int pcie_pme_probe(struct pcie_device *srv)
  296. {
  297. struct pci_dev *port;
  298. struct pcie_pme_service_data *data;
  299. int ret;
  300. data = kzalloc(sizeof(*data), GFP_KERNEL);
  301. if (!data)
  302. return -ENOMEM;
  303. spin_lock_init(&data->lock);
  304. INIT_WORK(&data->work, pcie_pme_work_fn);
  305. data->srv = srv;
  306. set_service_data(srv, data);
  307. port = srv->port;
  308. pcie_pme_interrupt_enable(port, false);
  309. pcie_clear_root_pme_status(port);
  310. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  311. if (ret) {
  312. kfree(data);
  313. } else {
  314. pcie_pme_mark_devices(port);
  315. pcie_pme_interrupt_enable(port, true);
  316. }
  317. return ret;
  318. }
  319. /**
  320. * pcie_pme_suspend - Suspend PCIe PME service device.
  321. * @srv: PCIe service device to suspend.
  322. */
  323. static int pcie_pme_suspend(struct pcie_device *srv)
  324. {
  325. struct pcie_pme_service_data *data = get_service_data(srv);
  326. struct pci_dev *port = srv->port;
  327. spin_lock_irq(&data->lock);
  328. pcie_pme_interrupt_enable(port, false);
  329. pcie_clear_root_pme_status(port);
  330. data->noirq = true;
  331. spin_unlock_irq(&data->lock);
  332. synchronize_irq(srv->irq);
  333. return 0;
  334. }
  335. /**
  336. * pcie_pme_resume - Resume PCIe PME service device.
  337. * @srv - PCIe service device to resume.
  338. */
  339. static int pcie_pme_resume(struct pcie_device *srv)
  340. {
  341. struct pcie_pme_service_data *data = get_service_data(srv);
  342. struct pci_dev *port = srv->port;
  343. spin_lock_irq(&data->lock);
  344. data->noirq = false;
  345. pcie_clear_root_pme_status(port);
  346. pcie_pme_interrupt_enable(port, true);
  347. spin_unlock_irq(&data->lock);
  348. return 0;
  349. }
  350. /**
  351. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  352. * @srv - PCIe service device to resume.
  353. */
  354. static void pcie_pme_remove(struct pcie_device *srv)
  355. {
  356. pcie_pme_suspend(srv);
  357. free_irq(srv->irq, srv);
  358. kfree(get_service_data(srv));
  359. }
  360. static struct pcie_port_service_driver pcie_pme_driver = {
  361. .name = "pcie_pme",
  362. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  363. .service = PCIE_PORT_SERVICE_PME,
  364. .probe = pcie_pme_probe,
  365. .suspend = pcie_pme_suspend,
  366. .resume = pcie_pme_resume,
  367. .remove = pcie_pme_remove,
  368. };
  369. /**
  370. * pcie_pme_service_init - Register the PCIe PME service driver.
  371. */
  372. static int __init pcie_pme_service_init(void)
  373. {
  374. return pcie_port_service_register(&pcie_pme_driver);
  375. }
  376. module_init(pcie_pme_service_init);