aerdrv_core.c 21 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include "aerdrv.h"
  27. static int forceload;
  28. static int nosourceid;
  29. module_param(forceload, bool, 0);
  30. module_param(nosourceid, bool, 0);
  31. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  32. {
  33. u16 reg16 = 0;
  34. int pos;
  35. if (pcie_aer_get_firmware_first(dev))
  36. return -EIO;
  37. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  38. if (!pos)
  39. return -EIO;
  40. pos = pci_pcie_cap(dev);
  41. if (!pos)
  42. return -EIO;
  43. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  44. reg16 |= (PCI_EXP_DEVCTL_CERE |
  45. PCI_EXP_DEVCTL_NFERE |
  46. PCI_EXP_DEVCTL_FERE |
  47. PCI_EXP_DEVCTL_URRE);
  48. pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
  49. return 0;
  50. }
  51. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  52. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  53. {
  54. u16 reg16 = 0;
  55. int pos;
  56. if (pcie_aer_get_firmware_first(dev))
  57. return -EIO;
  58. pos = pci_pcie_cap(dev);
  59. if (!pos)
  60. return -EIO;
  61. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  62. reg16 &= ~(PCI_EXP_DEVCTL_CERE |
  63. PCI_EXP_DEVCTL_NFERE |
  64. PCI_EXP_DEVCTL_FERE |
  65. PCI_EXP_DEVCTL_URRE);
  66. pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
  67. return 0;
  68. }
  69. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  70. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  71. {
  72. int pos;
  73. u32 status;
  74. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  75. if (!pos)
  76. return -EIO;
  77. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  78. if (status)
  79. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  80. return 0;
  81. }
  82. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
  83. /**
  84. * add_error_device - list device to be handled
  85. * @e_info: pointer to error info
  86. * @dev: pointer to pci_dev to be added
  87. */
  88. static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
  89. {
  90. if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
  91. e_info->dev[e_info->error_dev_num] = dev;
  92. e_info->error_dev_num++;
  93. return 0;
  94. }
  95. return -ENOSPC;
  96. }
  97. #define PCI_BUS(x) (((x) >> 8) & 0xff)
  98. /**
  99. * is_error_source - check whether the device is source of reported error
  100. * @dev: pointer to pci_dev to be checked
  101. * @e_info: pointer to reported error info
  102. */
  103. static bool is_error_source(struct pci_dev *dev, struct aer_err_info *e_info)
  104. {
  105. int pos;
  106. u32 status, mask;
  107. u16 reg16;
  108. /*
  109. * When bus id is equal to 0, it might be a bad id
  110. * reported by root port.
  111. */
  112. if (!nosourceid && (PCI_BUS(e_info->id) != 0)) {
  113. /* Device ID match? */
  114. if (e_info->id == ((dev->bus->number << 8) | dev->devfn))
  115. return true;
  116. /* Continue id comparing if there is no multiple error */
  117. if (!e_info->multi_error_valid)
  118. return false;
  119. }
  120. /*
  121. * When either
  122. * 1) nosourceid==y;
  123. * 2) bus id is equal to 0. Some ports might lose the bus
  124. * id of error source id;
  125. * 3) There are multiple errors and prior id comparing fails;
  126. * We check AER status registers to find possible reporter.
  127. */
  128. if (atomic_read(&dev->enable_cnt) == 0)
  129. return false;
  130. pos = pci_pcie_cap(dev);
  131. if (!pos)
  132. return false;
  133. /* Check if AER is enabled */
  134. pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
  135. if (!(reg16 & (
  136. PCI_EXP_DEVCTL_CERE |
  137. PCI_EXP_DEVCTL_NFERE |
  138. PCI_EXP_DEVCTL_FERE |
  139. PCI_EXP_DEVCTL_URRE)))
  140. return false;
  141. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  142. if (!pos)
  143. return false;
  144. /* Check if error is recorded */
  145. if (e_info->severity == AER_CORRECTABLE) {
  146. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  147. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &mask);
  148. } else {
  149. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  150. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &mask);
  151. }
  152. if (status & ~mask)
  153. return true;
  154. return false;
  155. }
  156. static int find_device_iter(struct pci_dev *dev, void *data)
  157. {
  158. struct aer_err_info *e_info = (struct aer_err_info *)data;
  159. if (is_error_source(dev, e_info)) {
  160. /* List this device */
  161. if (add_error_device(e_info, dev)) {
  162. /* We cannot handle more... Stop iteration */
  163. /* TODO: Should print error message here? */
  164. return 1;
  165. }
  166. /* If there is only a single error, stop iteration */
  167. if (!e_info->multi_error_valid)
  168. return 1;
  169. }
  170. return 0;
  171. }
  172. /**
  173. * find_source_device - search through device hierarchy for source device
  174. * @parent: pointer to Root Port pci_dev data structure
  175. * @e_info: including detailed error information such like id
  176. *
  177. * Return true if found.
  178. *
  179. * Invoked by DPC when error is detected at the Root Port.
  180. * Caller of this function must set id, severity, and multi_error_valid of
  181. * struct aer_err_info pointed by @e_info properly. This function must fill
  182. * e_info->error_dev_num and e_info->dev[], based on the given information.
  183. */
  184. static bool find_source_device(struct pci_dev *parent,
  185. struct aer_err_info *e_info)
  186. {
  187. struct pci_dev *dev = parent;
  188. int result;
  189. /* Must reset in this function */
  190. e_info->error_dev_num = 0;
  191. /* Is Root Port an agent that sends error message? */
  192. result = find_device_iter(dev, e_info);
  193. if (result)
  194. return true;
  195. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  196. if (!e_info->error_dev_num) {
  197. dev_printk(KERN_DEBUG, &parent->dev,
  198. "can't find device of ID%04x\n",
  199. e_info->id);
  200. return false;
  201. }
  202. return true;
  203. }
  204. static int report_error_detected(struct pci_dev *dev, void *data)
  205. {
  206. pci_ers_result_t vote;
  207. struct pci_error_handlers *err_handler;
  208. struct aer_broadcast_data *result_data;
  209. result_data = (struct aer_broadcast_data *) data;
  210. dev->error_state = result_data->state;
  211. if (!dev->driver ||
  212. !dev->driver->err_handler ||
  213. !dev->driver->err_handler->error_detected) {
  214. if (result_data->state == pci_channel_io_frozen &&
  215. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  216. /*
  217. * In case of fatal recovery, if one of down-
  218. * stream device has no driver. We might be
  219. * unable to recover because a later insmod
  220. * of a driver for this device is unaware of
  221. * its hw state.
  222. */
  223. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  224. dev->driver ?
  225. "no AER-aware driver" : "no driver");
  226. }
  227. return 0;
  228. }
  229. err_handler = dev->driver->err_handler;
  230. vote = err_handler->error_detected(dev, result_data->state);
  231. result_data->result = merge_result(result_data->result, vote);
  232. return 0;
  233. }
  234. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  235. {
  236. pci_ers_result_t vote;
  237. struct pci_error_handlers *err_handler;
  238. struct aer_broadcast_data *result_data;
  239. result_data = (struct aer_broadcast_data *) data;
  240. if (!dev->driver ||
  241. !dev->driver->err_handler ||
  242. !dev->driver->err_handler->mmio_enabled)
  243. return 0;
  244. err_handler = dev->driver->err_handler;
  245. vote = err_handler->mmio_enabled(dev);
  246. result_data->result = merge_result(result_data->result, vote);
  247. return 0;
  248. }
  249. static int report_slot_reset(struct pci_dev *dev, void *data)
  250. {
  251. pci_ers_result_t vote;
  252. struct pci_error_handlers *err_handler;
  253. struct aer_broadcast_data *result_data;
  254. result_data = (struct aer_broadcast_data *) data;
  255. if (!dev->driver ||
  256. !dev->driver->err_handler ||
  257. !dev->driver->err_handler->slot_reset)
  258. return 0;
  259. err_handler = dev->driver->err_handler;
  260. vote = err_handler->slot_reset(dev);
  261. result_data->result = merge_result(result_data->result, vote);
  262. return 0;
  263. }
  264. static int report_resume(struct pci_dev *dev, void *data)
  265. {
  266. struct pci_error_handlers *err_handler;
  267. dev->error_state = pci_channel_io_normal;
  268. if (!dev->driver ||
  269. !dev->driver->err_handler ||
  270. !dev->driver->err_handler->resume)
  271. return 0;
  272. err_handler = dev->driver->err_handler;
  273. err_handler->resume(dev);
  274. return 0;
  275. }
  276. /**
  277. * broadcast_error_message - handle message broadcast to downstream drivers
  278. * @dev: pointer to from where in a hierarchy message is broadcasted down
  279. * @state: error state
  280. * @error_mesg: message to print
  281. * @cb: callback to be broadcasted
  282. *
  283. * Invoked during error recovery process. Once being invoked, the content
  284. * of error severity will be broadcasted to all downstream drivers in a
  285. * hierarchy in question.
  286. */
  287. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  288. enum pci_channel_state state,
  289. char *error_mesg,
  290. int (*cb)(struct pci_dev *, void *))
  291. {
  292. struct aer_broadcast_data result_data;
  293. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  294. result_data.state = state;
  295. if (cb == report_error_detected)
  296. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  297. else
  298. result_data.result = PCI_ERS_RESULT_RECOVERED;
  299. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  300. /*
  301. * If the error is reported by a bridge, we think this error
  302. * is related to the downstream link of the bridge, so we
  303. * do error recovery on all subordinates of the bridge instead
  304. * of the bridge and clear the error status of the bridge.
  305. */
  306. if (cb == report_error_detected)
  307. dev->error_state = state;
  308. pci_walk_bus(dev->subordinate, cb, &result_data);
  309. if (cb == report_resume) {
  310. pci_cleanup_aer_uncorrect_error_status(dev);
  311. dev->error_state = pci_channel_io_normal;
  312. }
  313. } else {
  314. /*
  315. * If the error is reported by an end point, we think this
  316. * error is related to the upstream link of the end point.
  317. */
  318. pci_walk_bus(dev->bus, cb, &result_data);
  319. }
  320. return result_data.result;
  321. }
  322. /**
  323. * aer_do_secondary_bus_reset - perform secondary bus reset
  324. * @dev: pointer to bridge's pci_dev data structure
  325. *
  326. * Invoked when performing link reset at Root Port or Downstream Port.
  327. */
  328. void aer_do_secondary_bus_reset(struct pci_dev *dev)
  329. {
  330. u16 p2p_ctrl;
  331. /* Assert Secondary Bus Reset */
  332. pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
  333. p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
  334. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  335. /*
  336. * we should send hot reset message for 2ms to allow it time to
  337. * propagate to all downstream ports
  338. */
  339. msleep(2);
  340. /* De-assert Secondary Bus Reset */
  341. p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
  342. pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
  343. /*
  344. * System software must wait for at least 100ms from the end
  345. * of a reset of one or more device before it is permitted
  346. * to issue Configuration Requests to those devices.
  347. */
  348. msleep(200);
  349. }
  350. /**
  351. * default_downstream_reset_link - default reset function for Downstream Port
  352. * @dev: pointer to downstream port's pci_dev data structure
  353. *
  354. * Invoked when performing link reset at Downstream Port w/ no aer driver.
  355. */
  356. static pci_ers_result_t default_downstream_reset_link(struct pci_dev *dev)
  357. {
  358. aer_do_secondary_bus_reset(dev);
  359. dev_printk(KERN_DEBUG, &dev->dev,
  360. "Downstream Port link has been reset\n");
  361. return PCI_ERS_RESULT_RECOVERED;
  362. }
  363. static int find_aer_service_iter(struct device *device, void *data)
  364. {
  365. struct pcie_port_service_driver *service_driver, **drv;
  366. drv = (struct pcie_port_service_driver **) data;
  367. if (device->bus == &pcie_port_bus_type && device->driver) {
  368. service_driver = to_service_driver(device->driver);
  369. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  370. *drv = service_driver;
  371. return 1;
  372. }
  373. }
  374. return 0;
  375. }
  376. static struct pcie_port_service_driver *find_aer_service(struct pci_dev *dev)
  377. {
  378. struct pcie_port_service_driver *drv = NULL;
  379. device_for_each_child(&dev->dev, &drv, find_aer_service_iter);
  380. return drv;
  381. }
  382. static pci_ers_result_t reset_link(struct pcie_device *aerdev,
  383. struct pci_dev *dev)
  384. {
  385. struct pci_dev *udev;
  386. pci_ers_result_t status;
  387. struct pcie_port_service_driver *driver;
  388. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  389. /* Reset this port for all subordinates */
  390. udev = dev;
  391. } else {
  392. /* Reset the upstream component (likely downstream port) */
  393. udev = dev->bus->self;
  394. }
  395. /* Use the aer driver of the component firstly */
  396. driver = find_aer_service(udev);
  397. if (driver && driver->reset_link) {
  398. status = driver->reset_link(udev);
  399. } else if (udev->pcie_type == PCI_EXP_TYPE_DOWNSTREAM) {
  400. status = default_downstream_reset_link(udev);
  401. } else {
  402. dev_printk(KERN_DEBUG, &dev->dev,
  403. "no link-reset support at upstream device %s\n",
  404. pci_name(udev));
  405. return PCI_ERS_RESULT_DISCONNECT;
  406. }
  407. if (status != PCI_ERS_RESULT_RECOVERED) {
  408. dev_printk(KERN_DEBUG, &dev->dev,
  409. "link reset at upstream device %s failed\n",
  410. pci_name(udev));
  411. return PCI_ERS_RESULT_DISCONNECT;
  412. }
  413. return status;
  414. }
  415. /**
  416. * do_recovery - handle nonfatal/fatal error recovery process
  417. * @aerdev: pointer to a pcie_device data structure of root port
  418. * @dev: pointer to a pci_dev data structure of agent detecting an error
  419. * @severity: error severity type
  420. *
  421. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  422. * error detected message to all downstream drivers within a hierarchy in
  423. * question and return the returned code.
  424. */
  425. static void do_recovery(struct pcie_device *aerdev, struct pci_dev *dev,
  426. int severity)
  427. {
  428. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  429. enum pci_channel_state state;
  430. if (severity == AER_FATAL)
  431. state = pci_channel_io_frozen;
  432. else
  433. state = pci_channel_io_normal;
  434. status = broadcast_error_message(dev,
  435. state,
  436. "error_detected",
  437. report_error_detected);
  438. if (severity == AER_FATAL) {
  439. result = reset_link(aerdev, dev);
  440. if (result != PCI_ERS_RESULT_RECOVERED)
  441. goto failed;
  442. }
  443. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  444. status = broadcast_error_message(dev,
  445. state,
  446. "mmio_enabled",
  447. report_mmio_enabled);
  448. if (status == PCI_ERS_RESULT_NEED_RESET) {
  449. /*
  450. * TODO: Should call platform-specific
  451. * functions to reset slot before calling
  452. * drivers' slot_reset callbacks?
  453. */
  454. status = broadcast_error_message(dev,
  455. state,
  456. "slot_reset",
  457. report_slot_reset);
  458. }
  459. if (status != PCI_ERS_RESULT_RECOVERED)
  460. goto failed;
  461. broadcast_error_message(dev,
  462. state,
  463. "resume",
  464. report_resume);
  465. dev_printk(KERN_DEBUG, &dev->dev,
  466. "AER driver successfully recovered\n");
  467. return;
  468. failed:
  469. /* TODO: Should kernel panic here? */
  470. dev_printk(KERN_DEBUG, &dev->dev,
  471. "AER driver didn't recover\n");
  472. }
  473. /**
  474. * handle_error_source - handle logging error into an event log
  475. * @aerdev: pointer to pcie_device data structure of the root port
  476. * @dev: pointer to pci_dev data structure of error source device
  477. * @info: comprehensive error information
  478. *
  479. * Invoked when an error being detected by Root Port.
  480. */
  481. static void handle_error_source(struct pcie_device *aerdev,
  482. struct pci_dev *dev,
  483. struct aer_err_info *info)
  484. {
  485. int pos;
  486. if (info->severity == AER_CORRECTABLE) {
  487. /*
  488. * Correctable error does not need software intevention.
  489. * No need to go through error recovery process.
  490. */
  491. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  492. if (pos)
  493. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  494. info->status);
  495. } else
  496. do_recovery(aerdev, dev, info->severity);
  497. }
  498. /**
  499. * get_device_error_info - read error status from dev and store it to info
  500. * @dev: pointer to the device expected to have a error record
  501. * @info: pointer to structure to store the error record
  502. *
  503. * Return 1 on success, 0 on error.
  504. *
  505. * Note that @info is reused among all error devices. Clear fields properly.
  506. */
  507. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  508. {
  509. int pos, temp;
  510. /* Must reset in this function */
  511. info->status = 0;
  512. info->tlp_header_valid = 0;
  513. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  514. /* The device might not support AER */
  515. if (!pos)
  516. return 1;
  517. if (info->severity == AER_CORRECTABLE) {
  518. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  519. &info->status);
  520. pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK,
  521. &info->mask);
  522. if (!(info->status & ~info->mask))
  523. return 0;
  524. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  525. info->severity == AER_NONFATAL) {
  526. /* Link is still healthy for IO reads */
  527. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  528. &info->status);
  529. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK,
  530. &info->mask);
  531. if (!(info->status & ~info->mask))
  532. return 0;
  533. /* Get First Error Pointer */
  534. pci_read_config_dword(dev, pos + PCI_ERR_CAP, &temp);
  535. info->first_error = PCI_ERR_CAP_FEP(temp);
  536. if (info->status & AER_LOG_TLP_MASKS) {
  537. info->tlp_header_valid = 1;
  538. pci_read_config_dword(dev,
  539. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  540. pci_read_config_dword(dev,
  541. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  542. pci_read_config_dword(dev,
  543. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  544. pci_read_config_dword(dev,
  545. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  546. }
  547. }
  548. return 1;
  549. }
  550. static inline void aer_process_err_devices(struct pcie_device *p_device,
  551. struct aer_err_info *e_info)
  552. {
  553. int i;
  554. /* Report all before handle them, not to lost records by reset etc. */
  555. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  556. if (get_device_error_info(e_info->dev[i], e_info))
  557. aer_print_error(e_info->dev[i], e_info);
  558. }
  559. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  560. if (get_device_error_info(e_info->dev[i], e_info))
  561. handle_error_source(p_device, e_info->dev[i], e_info);
  562. }
  563. }
  564. /**
  565. * aer_isr_one_error - consume an error detected by root port
  566. * @p_device: pointer to error root port service device
  567. * @e_src: pointer to an error source
  568. */
  569. static void aer_isr_one_error(struct pcie_device *p_device,
  570. struct aer_err_source *e_src)
  571. {
  572. struct aer_err_info *e_info;
  573. /* struct aer_err_info might be big, so we allocate it with slab */
  574. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  575. if (!e_info) {
  576. dev_printk(KERN_DEBUG, &p_device->port->dev,
  577. "Can't allocate mem when processing AER errors\n");
  578. return;
  579. }
  580. /*
  581. * There is a possibility that both correctable error and
  582. * uncorrectable error being logged. Report correctable error first.
  583. */
  584. if (e_src->status & PCI_ERR_ROOT_COR_RCV) {
  585. e_info->id = ERR_COR_ID(e_src->id);
  586. e_info->severity = AER_CORRECTABLE;
  587. if (e_src->status & PCI_ERR_ROOT_MULTI_COR_RCV)
  588. e_info->multi_error_valid = 1;
  589. else
  590. e_info->multi_error_valid = 0;
  591. aer_print_port_info(p_device->port, e_info);
  592. if (find_source_device(p_device->port, e_info))
  593. aer_process_err_devices(p_device, e_info);
  594. }
  595. if (e_src->status & PCI_ERR_ROOT_UNCOR_RCV) {
  596. e_info->id = ERR_UNCOR_ID(e_src->id);
  597. if (e_src->status & PCI_ERR_ROOT_FATAL_RCV)
  598. e_info->severity = AER_FATAL;
  599. else
  600. e_info->severity = AER_NONFATAL;
  601. if (e_src->status & PCI_ERR_ROOT_MULTI_UNCOR_RCV)
  602. e_info->multi_error_valid = 1;
  603. else
  604. e_info->multi_error_valid = 0;
  605. aer_print_port_info(p_device->port, e_info);
  606. if (find_source_device(p_device->port, e_info))
  607. aer_process_err_devices(p_device, e_info);
  608. }
  609. kfree(e_info);
  610. }
  611. /**
  612. * get_e_source - retrieve an error source
  613. * @rpc: pointer to the root port which holds an error
  614. * @e_src: pointer to store retrieved error source
  615. *
  616. * Return 1 if an error source is retrieved, otherwise 0.
  617. *
  618. * Invoked by DPC handler to consume an error.
  619. */
  620. static int get_e_source(struct aer_rpc *rpc, struct aer_err_source *e_src)
  621. {
  622. unsigned long flags;
  623. /* Lock access to Root error producer/consumer index */
  624. spin_lock_irqsave(&rpc->e_lock, flags);
  625. if (rpc->prod_idx == rpc->cons_idx) {
  626. spin_unlock_irqrestore(&rpc->e_lock, flags);
  627. return 0;
  628. }
  629. *e_src = rpc->e_sources[rpc->cons_idx];
  630. rpc->cons_idx++;
  631. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  632. rpc->cons_idx = 0;
  633. spin_unlock_irqrestore(&rpc->e_lock, flags);
  634. return 1;
  635. }
  636. /**
  637. * aer_isr - consume errors detected by root port
  638. * @work: definition of this work item
  639. *
  640. * Invoked, as DPC, when root port records new detected error
  641. */
  642. void aer_isr(struct work_struct *work)
  643. {
  644. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  645. struct pcie_device *p_device = rpc->rpd;
  646. struct aer_err_source uninitialized_var(e_src);
  647. mutex_lock(&rpc->rpc_mutex);
  648. while (get_e_source(rpc, &e_src))
  649. aer_isr_one_error(p_device, &e_src);
  650. mutex_unlock(&rpc->rpc_mutex);
  651. wake_up(&rpc->wait_release);
  652. }
  653. /**
  654. * aer_init - provide AER initialization
  655. * @dev: pointer to AER pcie device
  656. *
  657. * Invoked when AER service driver is loaded.
  658. */
  659. int aer_init(struct pcie_device *dev)
  660. {
  661. if (forceload) {
  662. dev_printk(KERN_DEBUG, &dev->device,
  663. "aerdrv forceload requested.\n");
  664. pcie_aer_force_firmware_first(dev->port, 0);
  665. }
  666. return 0;
  667. }