pci-sysfs.c 32 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/fs.h>
  23. #include <linux/capability.h>
  24. #include <linux/security.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/slab.h>
  27. #include "pci.h"
  28. static int sysfs_initialized; /* = 0 */
  29. /* show configuration fields */
  30. #define pci_config_attr(field, format_string) \
  31. static ssize_t \
  32. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  33. { \
  34. struct pci_dev *pdev; \
  35. \
  36. pdev = to_pci_dev (dev); \
  37. return sprintf (buf, format_string, pdev->field); \
  38. }
  39. pci_config_attr(vendor, "0x%04x\n");
  40. pci_config_attr(device, "0x%04x\n");
  41. pci_config_attr(subsystem_vendor, "0x%04x\n");
  42. pci_config_attr(subsystem_device, "0x%04x\n");
  43. pci_config_attr(class, "0x%06x\n");
  44. pci_config_attr(irq, "%u\n");
  45. static ssize_t broken_parity_status_show(struct device *dev,
  46. struct device_attribute *attr,
  47. char *buf)
  48. {
  49. struct pci_dev *pdev = to_pci_dev(dev);
  50. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  51. }
  52. static ssize_t broken_parity_status_store(struct device *dev,
  53. struct device_attribute *attr,
  54. const char *buf, size_t count)
  55. {
  56. struct pci_dev *pdev = to_pci_dev(dev);
  57. unsigned long val;
  58. if (strict_strtoul(buf, 0, &val) < 0)
  59. return -EINVAL;
  60. pdev->broken_parity_status = !!val;
  61. return count;
  62. }
  63. static ssize_t local_cpus_show(struct device *dev,
  64. struct device_attribute *attr, char *buf)
  65. {
  66. const struct cpumask *mask;
  67. int len;
  68. #ifdef CONFIG_NUMA
  69. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  70. cpumask_of_node(dev_to_node(dev));
  71. #else
  72. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  73. #endif
  74. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  75. buf[len++] = '\n';
  76. buf[len] = '\0';
  77. return len;
  78. }
  79. static ssize_t local_cpulist_show(struct device *dev,
  80. struct device_attribute *attr, char *buf)
  81. {
  82. const struct cpumask *mask;
  83. int len;
  84. #ifdef CONFIG_NUMA
  85. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  86. cpumask_of_node(dev_to_node(dev));
  87. #else
  88. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  89. #endif
  90. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  91. buf[len++] = '\n';
  92. buf[len] = '\0';
  93. return len;
  94. }
  95. /* show resources */
  96. static ssize_t
  97. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  98. {
  99. struct pci_dev * pci_dev = to_pci_dev(dev);
  100. char * str = buf;
  101. int i;
  102. int max;
  103. resource_size_t start, end;
  104. if (pci_dev->subordinate)
  105. max = DEVICE_COUNT_RESOURCE;
  106. else
  107. max = PCI_BRIDGE_RESOURCES;
  108. for (i = 0; i < max; i++) {
  109. struct resource *res = &pci_dev->resource[i];
  110. pci_resource_to_user(pci_dev, i, res, &start, &end);
  111. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  112. (unsigned long long)start,
  113. (unsigned long long)end,
  114. (unsigned long long)res->flags);
  115. }
  116. return (str - buf);
  117. }
  118. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  119. {
  120. struct pci_dev *pci_dev = to_pci_dev(dev);
  121. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  122. pci_dev->vendor, pci_dev->device,
  123. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  124. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  125. (u8)(pci_dev->class));
  126. }
  127. static ssize_t is_enabled_store(struct device *dev,
  128. struct device_attribute *attr, const char *buf,
  129. size_t count)
  130. {
  131. struct pci_dev *pdev = to_pci_dev(dev);
  132. unsigned long val;
  133. ssize_t result = strict_strtoul(buf, 0, &val);
  134. if (result < 0)
  135. return result;
  136. /* this can crash the machine when done on the "wrong" device */
  137. if (!capable(CAP_SYS_ADMIN))
  138. return -EPERM;
  139. if (!val) {
  140. if (pci_is_enabled(pdev))
  141. pci_disable_device(pdev);
  142. else
  143. result = -EIO;
  144. } else
  145. result = pci_enable_device(pdev);
  146. return result < 0 ? result : count;
  147. }
  148. static ssize_t is_enabled_show(struct device *dev,
  149. struct device_attribute *attr, char *buf)
  150. {
  151. struct pci_dev *pdev;
  152. pdev = to_pci_dev (dev);
  153. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  154. }
  155. #ifdef CONFIG_NUMA
  156. static ssize_t
  157. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  158. {
  159. return sprintf (buf, "%d\n", dev->numa_node);
  160. }
  161. #endif
  162. static ssize_t
  163. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  164. {
  165. struct pci_dev *pdev = to_pci_dev(dev);
  166. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  167. }
  168. static ssize_t
  169. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  170. char *buf)
  171. {
  172. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  173. }
  174. static ssize_t
  175. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  176. {
  177. struct pci_dev *pdev = to_pci_dev(dev);
  178. if (!pdev->subordinate)
  179. return 0;
  180. return sprintf (buf, "%u\n",
  181. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  182. }
  183. static ssize_t
  184. msi_bus_store(struct device *dev, struct device_attribute *attr,
  185. const char *buf, size_t count)
  186. {
  187. struct pci_dev *pdev = to_pci_dev(dev);
  188. unsigned long val;
  189. if (strict_strtoul(buf, 0, &val) < 0)
  190. return -EINVAL;
  191. /* bad things may happen if the no_msi flag is changed
  192. * while some drivers are loaded */
  193. if (!capable(CAP_SYS_ADMIN))
  194. return -EPERM;
  195. /* Maybe pci devices without subordinate busses shouldn't even have this
  196. * attribute in the first place? */
  197. if (!pdev->subordinate)
  198. return count;
  199. /* Is the flag going to change, or keep the value it already had? */
  200. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  201. !!val) {
  202. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  203. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  204. " bad things could happen\n", val ? "" : " not");
  205. }
  206. return count;
  207. }
  208. #ifdef CONFIG_HOTPLUG
  209. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  210. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  211. size_t count)
  212. {
  213. unsigned long val;
  214. struct pci_bus *b = NULL;
  215. if (strict_strtoul(buf, 0, &val) < 0)
  216. return -EINVAL;
  217. if (val) {
  218. mutex_lock(&pci_remove_rescan_mutex);
  219. while ((b = pci_find_next_bus(b)) != NULL)
  220. pci_rescan_bus(b);
  221. mutex_unlock(&pci_remove_rescan_mutex);
  222. }
  223. return count;
  224. }
  225. struct bus_attribute pci_bus_attrs[] = {
  226. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  227. __ATTR_NULL
  228. };
  229. static ssize_t
  230. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  231. const char *buf, size_t count)
  232. {
  233. unsigned long val;
  234. struct pci_dev *pdev = to_pci_dev(dev);
  235. if (strict_strtoul(buf, 0, &val) < 0)
  236. return -EINVAL;
  237. if (val) {
  238. mutex_lock(&pci_remove_rescan_mutex);
  239. pci_rescan_bus(pdev->bus);
  240. mutex_unlock(&pci_remove_rescan_mutex);
  241. }
  242. return count;
  243. }
  244. static void remove_callback(struct device *dev)
  245. {
  246. struct pci_dev *pdev = to_pci_dev(dev);
  247. mutex_lock(&pci_remove_rescan_mutex);
  248. pci_remove_bus_device(pdev);
  249. mutex_unlock(&pci_remove_rescan_mutex);
  250. }
  251. static ssize_t
  252. remove_store(struct device *dev, struct device_attribute *dummy,
  253. const char *buf, size_t count)
  254. {
  255. int ret = 0;
  256. unsigned long val;
  257. if (strict_strtoul(buf, 0, &val) < 0)
  258. return -EINVAL;
  259. /* An attribute cannot be unregistered by one of its own methods,
  260. * so we have to use this roundabout approach.
  261. */
  262. if (val)
  263. ret = device_schedule_callback(dev, remove_callback);
  264. if (ret)
  265. count = ret;
  266. return count;
  267. }
  268. #endif
  269. struct device_attribute pci_dev_attrs[] = {
  270. __ATTR_RO(resource),
  271. __ATTR_RO(vendor),
  272. __ATTR_RO(device),
  273. __ATTR_RO(subsystem_vendor),
  274. __ATTR_RO(subsystem_device),
  275. __ATTR_RO(class),
  276. __ATTR_RO(irq),
  277. __ATTR_RO(local_cpus),
  278. __ATTR_RO(local_cpulist),
  279. __ATTR_RO(modalias),
  280. #ifdef CONFIG_NUMA
  281. __ATTR_RO(numa_node),
  282. #endif
  283. __ATTR_RO(dma_mask_bits),
  284. __ATTR_RO(consistent_dma_mask_bits),
  285. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  286. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  287. broken_parity_status_show,broken_parity_status_store),
  288. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  289. #ifdef CONFIG_HOTPLUG
  290. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  291. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  292. #endif
  293. __ATTR_NULL,
  294. };
  295. static ssize_t
  296. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  297. {
  298. struct pci_dev *pdev = to_pci_dev(dev);
  299. return sprintf(buf, "%u\n",
  300. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  301. IORESOURCE_ROM_SHADOW));
  302. }
  303. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  304. static ssize_t
  305. pci_read_config(struct file *filp, struct kobject *kobj,
  306. struct bin_attribute *bin_attr,
  307. char *buf, loff_t off, size_t count)
  308. {
  309. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  310. unsigned int size = 64;
  311. loff_t init_off = off;
  312. u8 *data = (u8*) buf;
  313. /* Several chips lock up trying to read undefined config space */
  314. if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
  315. size = dev->cfg_size;
  316. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  317. size = 128;
  318. }
  319. if (off > size)
  320. return 0;
  321. if (off + count > size) {
  322. size -= off;
  323. count = size;
  324. } else {
  325. size = count;
  326. }
  327. if ((off & 1) && size) {
  328. u8 val;
  329. pci_user_read_config_byte(dev, off, &val);
  330. data[off - init_off] = val;
  331. off++;
  332. size--;
  333. }
  334. if ((off & 3) && size > 2) {
  335. u16 val;
  336. pci_user_read_config_word(dev, off, &val);
  337. data[off - init_off] = val & 0xff;
  338. data[off - init_off + 1] = (val >> 8) & 0xff;
  339. off += 2;
  340. size -= 2;
  341. }
  342. while (size > 3) {
  343. u32 val;
  344. pci_user_read_config_dword(dev, off, &val);
  345. data[off - init_off] = val & 0xff;
  346. data[off - init_off + 1] = (val >> 8) & 0xff;
  347. data[off - init_off + 2] = (val >> 16) & 0xff;
  348. data[off - init_off + 3] = (val >> 24) & 0xff;
  349. off += 4;
  350. size -= 4;
  351. }
  352. if (size >= 2) {
  353. u16 val;
  354. pci_user_read_config_word(dev, off, &val);
  355. data[off - init_off] = val & 0xff;
  356. data[off - init_off + 1] = (val >> 8) & 0xff;
  357. off += 2;
  358. size -= 2;
  359. }
  360. if (size > 0) {
  361. u8 val;
  362. pci_user_read_config_byte(dev, off, &val);
  363. data[off - init_off] = val;
  364. off++;
  365. --size;
  366. }
  367. return count;
  368. }
  369. static ssize_t
  370. pci_write_config(struct file* filp, struct kobject *kobj,
  371. struct bin_attribute *bin_attr,
  372. char *buf, loff_t off, size_t count)
  373. {
  374. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  375. unsigned int size = count;
  376. loff_t init_off = off;
  377. u8 *data = (u8*) buf;
  378. if (off > dev->cfg_size)
  379. return 0;
  380. if (off + count > dev->cfg_size) {
  381. size = dev->cfg_size - off;
  382. count = size;
  383. }
  384. if ((off & 1) && size) {
  385. pci_user_write_config_byte(dev, off, data[off - init_off]);
  386. off++;
  387. size--;
  388. }
  389. if ((off & 3) && size > 2) {
  390. u16 val = data[off - init_off];
  391. val |= (u16) data[off - init_off + 1] << 8;
  392. pci_user_write_config_word(dev, off, val);
  393. off += 2;
  394. size -= 2;
  395. }
  396. while (size > 3) {
  397. u32 val = data[off - init_off];
  398. val |= (u32) data[off - init_off + 1] << 8;
  399. val |= (u32) data[off - init_off + 2] << 16;
  400. val |= (u32) data[off - init_off + 3] << 24;
  401. pci_user_write_config_dword(dev, off, val);
  402. off += 4;
  403. size -= 4;
  404. }
  405. if (size >= 2) {
  406. u16 val = data[off - init_off];
  407. val |= (u16) data[off - init_off + 1] << 8;
  408. pci_user_write_config_word(dev, off, val);
  409. off += 2;
  410. size -= 2;
  411. }
  412. if (size) {
  413. pci_user_write_config_byte(dev, off, data[off - init_off]);
  414. off++;
  415. --size;
  416. }
  417. return count;
  418. }
  419. static ssize_t
  420. read_vpd_attr(struct file *filp, struct kobject *kobj,
  421. struct bin_attribute *bin_attr,
  422. char *buf, loff_t off, size_t count)
  423. {
  424. struct pci_dev *dev =
  425. to_pci_dev(container_of(kobj, struct device, kobj));
  426. if (off > bin_attr->size)
  427. count = 0;
  428. else if (count > bin_attr->size - off)
  429. count = bin_attr->size - off;
  430. return pci_read_vpd(dev, off, count, buf);
  431. }
  432. static ssize_t
  433. write_vpd_attr(struct file *filp, struct kobject *kobj,
  434. struct bin_attribute *bin_attr,
  435. char *buf, loff_t off, size_t count)
  436. {
  437. struct pci_dev *dev =
  438. to_pci_dev(container_of(kobj, struct device, kobj));
  439. if (off > bin_attr->size)
  440. count = 0;
  441. else if (count > bin_attr->size - off)
  442. count = bin_attr->size - off;
  443. return pci_write_vpd(dev, off, count, buf);
  444. }
  445. #ifdef HAVE_PCI_LEGACY
  446. /**
  447. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  448. * @filp: open sysfs file
  449. * @kobj: kobject corresponding to file to read from
  450. * @bin_attr: struct bin_attribute for this file
  451. * @buf: buffer to store results
  452. * @off: offset into legacy I/O port space
  453. * @count: number of bytes to read
  454. *
  455. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  456. * callback routine (pci_legacy_read).
  457. */
  458. static ssize_t
  459. pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  460. struct bin_attribute *bin_attr,
  461. char *buf, loff_t off, size_t count)
  462. {
  463. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  464. struct device,
  465. kobj));
  466. /* Only support 1, 2 or 4 byte accesses */
  467. if (count != 1 && count != 2 && count != 4)
  468. return -EINVAL;
  469. return pci_legacy_read(bus, off, (u32 *)buf, count);
  470. }
  471. /**
  472. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  473. * @filp: open sysfs file
  474. * @kobj: kobject corresponding to file to read from
  475. * @bin_attr: struct bin_attribute for this file
  476. * @buf: buffer containing value to be written
  477. * @off: offset into legacy I/O port space
  478. * @count: number of bytes to write
  479. *
  480. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  481. * callback routine (pci_legacy_write).
  482. */
  483. static ssize_t
  484. pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  485. struct bin_attribute *bin_attr,
  486. char *buf, loff_t off, size_t count)
  487. {
  488. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  489. struct device,
  490. kobj));
  491. /* Only support 1, 2 or 4 byte accesses */
  492. if (count != 1 && count != 2 && count != 4)
  493. return -EINVAL;
  494. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  495. }
  496. /**
  497. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  498. * @filp: open sysfs file
  499. * @kobj: kobject corresponding to device to be mapped
  500. * @attr: struct bin_attribute for this file
  501. * @vma: struct vm_area_struct passed to mmap
  502. *
  503. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  504. * legacy memory space (first meg of bus space) into application virtual
  505. * memory space.
  506. */
  507. static int
  508. pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  509. struct bin_attribute *attr,
  510. struct vm_area_struct *vma)
  511. {
  512. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  513. struct device,
  514. kobj));
  515. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  516. }
  517. /**
  518. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  519. * @filp: open sysfs file
  520. * @kobj: kobject corresponding to device to be mapped
  521. * @attr: struct bin_attribute for this file
  522. * @vma: struct vm_area_struct passed to mmap
  523. *
  524. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  525. * legacy IO space (first meg of bus space) into application virtual
  526. * memory space. Returns -ENOSYS if the operation isn't supported
  527. */
  528. static int
  529. pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  530. struct bin_attribute *attr,
  531. struct vm_area_struct *vma)
  532. {
  533. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  534. struct device,
  535. kobj));
  536. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  537. }
  538. /**
  539. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  540. * @b: bus to create files under
  541. * @mmap_type: I/O port or memory
  542. *
  543. * Stub implementation. Can be overridden by arch if necessary.
  544. */
  545. void __weak
  546. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  547. {
  548. return;
  549. }
  550. /**
  551. * pci_create_legacy_files - create legacy I/O port and memory files
  552. * @b: bus to create files under
  553. *
  554. * Some platforms allow access to legacy I/O port and ISA memory space on
  555. * a per-bus basis. This routine creates the files and ties them into
  556. * their associated read, write and mmap files from pci-sysfs.c
  557. *
  558. * On error unwind, but don't propogate the error to the caller
  559. * as it is ok to set up the PCI bus without these files.
  560. */
  561. void pci_create_legacy_files(struct pci_bus *b)
  562. {
  563. int error;
  564. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  565. GFP_ATOMIC);
  566. if (!b->legacy_io)
  567. goto kzalloc_err;
  568. sysfs_bin_attr_init(b->legacy_io);
  569. b->legacy_io->attr.name = "legacy_io";
  570. b->legacy_io->size = 0xffff;
  571. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  572. b->legacy_io->read = pci_read_legacy_io;
  573. b->legacy_io->write = pci_write_legacy_io;
  574. b->legacy_io->mmap = pci_mmap_legacy_io;
  575. pci_adjust_legacy_attr(b, pci_mmap_io);
  576. error = device_create_bin_file(&b->dev, b->legacy_io);
  577. if (error)
  578. goto legacy_io_err;
  579. /* Allocated above after the legacy_io struct */
  580. b->legacy_mem = b->legacy_io + 1;
  581. sysfs_bin_attr_init(b->legacy_mem);
  582. b->legacy_mem->attr.name = "legacy_mem";
  583. b->legacy_mem->size = 1024*1024;
  584. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  585. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  586. pci_adjust_legacy_attr(b, pci_mmap_mem);
  587. error = device_create_bin_file(&b->dev, b->legacy_mem);
  588. if (error)
  589. goto legacy_mem_err;
  590. return;
  591. legacy_mem_err:
  592. device_remove_bin_file(&b->dev, b->legacy_io);
  593. legacy_io_err:
  594. kfree(b->legacy_io);
  595. b->legacy_io = NULL;
  596. kzalloc_err:
  597. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  598. "and ISA memory resources to sysfs\n");
  599. return;
  600. }
  601. void pci_remove_legacy_files(struct pci_bus *b)
  602. {
  603. if (b->legacy_io) {
  604. device_remove_bin_file(&b->dev, b->legacy_io);
  605. device_remove_bin_file(&b->dev, b->legacy_mem);
  606. kfree(b->legacy_io); /* both are allocated here */
  607. }
  608. }
  609. #endif /* HAVE_PCI_LEGACY */
  610. #ifdef HAVE_PCI_MMAP
  611. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  612. enum pci_mmap_api mmap_api)
  613. {
  614. unsigned long nr, start, size, pci_start;
  615. if (pci_resource_len(pdev, resno) == 0)
  616. return 0;
  617. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  618. start = vma->vm_pgoff;
  619. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  620. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  621. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  622. if (start >= pci_start && start < pci_start + size &&
  623. start + nr <= pci_start + size)
  624. return 1;
  625. return 0;
  626. }
  627. /**
  628. * pci_mmap_resource - map a PCI resource into user memory space
  629. * @kobj: kobject for mapping
  630. * @attr: struct bin_attribute for the file being mapped
  631. * @vma: struct vm_area_struct passed into the mmap
  632. * @write_combine: 1 for write_combine mapping
  633. *
  634. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  635. */
  636. static int
  637. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  638. struct vm_area_struct *vma, int write_combine)
  639. {
  640. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  641. struct device, kobj));
  642. struct resource *res = attr->private;
  643. enum pci_mmap_state mmap_type;
  644. resource_size_t start, end;
  645. int i;
  646. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  647. if (res == &pdev->resource[i])
  648. break;
  649. if (i >= PCI_ROM_RESOURCE)
  650. return -ENODEV;
  651. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  652. WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
  653. "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  654. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  655. pci_name(pdev), i,
  656. (u64)pci_resource_start(pdev, i),
  657. (u64)pci_resource_len(pdev, i));
  658. return -EINVAL;
  659. }
  660. /* pci_mmap_page_range() expects the same kind of entry as coming
  661. * from /proc/bus/pci/ which is a "user visible" value. If this is
  662. * different from the resource itself, arch will do necessary fixup.
  663. */
  664. pci_resource_to_user(pdev, i, res, &start, &end);
  665. vma->vm_pgoff += start >> PAGE_SHIFT;
  666. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  667. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  668. return -EINVAL;
  669. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  670. }
  671. static int
  672. pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  673. struct bin_attribute *attr,
  674. struct vm_area_struct *vma)
  675. {
  676. return pci_mmap_resource(kobj, attr, vma, 0);
  677. }
  678. static int
  679. pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  680. struct bin_attribute *attr,
  681. struct vm_area_struct *vma)
  682. {
  683. return pci_mmap_resource(kobj, attr, vma, 1);
  684. }
  685. static ssize_t
  686. pci_resource_io(struct file *filp, struct kobject *kobj,
  687. struct bin_attribute *attr, char *buf,
  688. loff_t off, size_t count, bool write)
  689. {
  690. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  691. struct device, kobj));
  692. struct resource *res = attr->private;
  693. unsigned long port = off;
  694. int i;
  695. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  696. if (res == &pdev->resource[i])
  697. break;
  698. if (i >= PCI_ROM_RESOURCE)
  699. return -ENODEV;
  700. port += pci_resource_start(pdev, i);
  701. if (port > pci_resource_end(pdev, i))
  702. return 0;
  703. if (port + count - 1 > pci_resource_end(pdev, i))
  704. return -EINVAL;
  705. switch (count) {
  706. case 1:
  707. if (write)
  708. outb(*(u8 *)buf, port);
  709. else
  710. *(u8 *)buf = inb(port);
  711. return 1;
  712. case 2:
  713. if (write)
  714. outw(*(u16 *)buf, port);
  715. else
  716. *(u16 *)buf = inw(port);
  717. return 2;
  718. case 4:
  719. if (write)
  720. outl(*(u32 *)buf, port);
  721. else
  722. *(u32 *)buf = inl(port);
  723. return 4;
  724. }
  725. return -EINVAL;
  726. }
  727. static ssize_t
  728. pci_read_resource_io(struct file *filp, struct kobject *kobj,
  729. struct bin_attribute *attr, char *buf,
  730. loff_t off, size_t count)
  731. {
  732. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  733. }
  734. static ssize_t
  735. pci_write_resource_io(struct file *filp, struct kobject *kobj,
  736. struct bin_attribute *attr, char *buf,
  737. loff_t off, size_t count)
  738. {
  739. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  740. }
  741. /**
  742. * pci_remove_resource_files - cleanup resource files
  743. * @pdev: dev to cleanup
  744. *
  745. * If we created resource files for @pdev, remove them from sysfs and
  746. * free their resources.
  747. */
  748. static void
  749. pci_remove_resource_files(struct pci_dev *pdev)
  750. {
  751. int i;
  752. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  753. struct bin_attribute *res_attr;
  754. res_attr = pdev->res_attr[i];
  755. if (res_attr) {
  756. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  757. kfree(res_attr);
  758. }
  759. res_attr = pdev->res_attr_wc[i];
  760. if (res_attr) {
  761. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  762. kfree(res_attr);
  763. }
  764. }
  765. }
  766. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  767. {
  768. /* allocate attribute structure, piggyback attribute name */
  769. int name_len = write_combine ? 13 : 10;
  770. struct bin_attribute *res_attr;
  771. int retval;
  772. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  773. if (res_attr) {
  774. char *res_attr_name = (char *)(res_attr + 1);
  775. sysfs_bin_attr_init(res_attr);
  776. if (write_combine) {
  777. pdev->res_attr_wc[num] = res_attr;
  778. sprintf(res_attr_name, "resource%d_wc", num);
  779. res_attr->mmap = pci_mmap_resource_wc;
  780. } else {
  781. pdev->res_attr[num] = res_attr;
  782. sprintf(res_attr_name, "resource%d", num);
  783. res_attr->mmap = pci_mmap_resource_uc;
  784. }
  785. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  786. res_attr->read = pci_read_resource_io;
  787. res_attr->write = pci_write_resource_io;
  788. }
  789. res_attr->attr.name = res_attr_name;
  790. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  791. res_attr->size = pci_resource_len(pdev, num);
  792. res_attr->private = &pdev->resource[num];
  793. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  794. } else
  795. retval = -ENOMEM;
  796. return retval;
  797. }
  798. /**
  799. * pci_create_resource_files - create resource files in sysfs for @dev
  800. * @pdev: dev in question
  801. *
  802. * Walk the resources in @pdev creating files for each resource available.
  803. */
  804. static int pci_create_resource_files(struct pci_dev *pdev)
  805. {
  806. int i;
  807. int retval;
  808. /* Expose the PCI resources from this device as files */
  809. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  810. /* skip empty resources */
  811. if (!pci_resource_len(pdev, i))
  812. continue;
  813. retval = pci_create_attr(pdev, i, 0);
  814. /* for prefetchable resources, create a WC mappable file */
  815. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  816. retval = pci_create_attr(pdev, i, 1);
  817. if (retval) {
  818. pci_remove_resource_files(pdev);
  819. return retval;
  820. }
  821. }
  822. return 0;
  823. }
  824. #else /* !HAVE_PCI_MMAP */
  825. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  826. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  827. #endif /* HAVE_PCI_MMAP */
  828. /**
  829. * pci_write_rom - used to enable access to the PCI ROM display
  830. * @filp: sysfs file
  831. * @kobj: kernel object handle
  832. * @bin_attr: struct bin_attribute for this file
  833. * @buf: user input
  834. * @off: file offset
  835. * @count: number of byte in input
  836. *
  837. * writing anything except 0 enables it
  838. */
  839. static ssize_t
  840. pci_write_rom(struct file *filp, struct kobject *kobj,
  841. struct bin_attribute *bin_attr,
  842. char *buf, loff_t off, size_t count)
  843. {
  844. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  845. if ((off == 0) && (*buf == '0') && (count == 2))
  846. pdev->rom_attr_enabled = 0;
  847. else
  848. pdev->rom_attr_enabled = 1;
  849. return count;
  850. }
  851. /**
  852. * pci_read_rom - read a PCI ROM
  853. * @filp: sysfs file
  854. * @kobj: kernel object handle
  855. * @bin_attr: struct bin_attribute for this file
  856. * @buf: where to put the data we read from the ROM
  857. * @off: file offset
  858. * @count: number of bytes to read
  859. *
  860. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  861. * device corresponding to @kobj.
  862. */
  863. static ssize_t
  864. pci_read_rom(struct file *filp, struct kobject *kobj,
  865. struct bin_attribute *bin_attr,
  866. char *buf, loff_t off, size_t count)
  867. {
  868. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  869. void __iomem *rom;
  870. size_t size;
  871. if (!pdev->rom_attr_enabled)
  872. return -EINVAL;
  873. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  874. if (!rom || !size)
  875. return -EIO;
  876. if (off >= size)
  877. count = 0;
  878. else {
  879. if (off + count > size)
  880. count = size - off;
  881. memcpy_fromio(buf, rom + off, count);
  882. }
  883. pci_unmap_rom(pdev, rom);
  884. return count;
  885. }
  886. static struct bin_attribute pci_config_attr = {
  887. .attr = {
  888. .name = "config",
  889. .mode = S_IRUGO | S_IWUSR,
  890. },
  891. .size = PCI_CFG_SPACE_SIZE,
  892. .read = pci_read_config,
  893. .write = pci_write_config,
  894. };
  895. static struct bin_attribute pcie_config_attr = {
  896. .attr = {
  897. .name = "config",
  898. .mode = S_IRUGO | S_IWUSR,
  899. },
  900. .size = PCI_CFG_SPACE_EXP_SIZE,
  901. .read = pci_read_config,
  902. .write = pci_write_config,
  903. };
  904. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  905. {
  906. return 0;
  907. }
  908. static ssize_t reset_store(struct device *dev,
  909. struct device_attribute *attr, const char *buf,
  910. size_t count)
  911. {
  912. struct pci_dev *pdev = to_pci_dev(dev);
  913. unsigned long val;
  914. ssize_t result = strict_strtoul(buf, 0, &val);
  915. if (result < 0)
  916. return result;
  917. if (val != 1)
  918. return -EINVAL;
  919. result = pci_reset_function(pdev);
  920. if (result < 0)
  921. return result;
  922. return count;
  923. }
  924. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  925. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  926. {
  927. int retval;
  928. struct bin_attribute *attr;
  929. /* If the device has VPD, try to expose it in sysfs. */
  930. if (dev->vpd) {
  931. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  932. if (!attr)
  933. return -ENOMEM;
  934. sysfs_bin_attr_init(attr);
  935. attr->size = dev->vpd->len;
  936. attr->attr.name = "vpd";
  937. attr->attr.mode = S_IRUSR | S_IWUSR;
  938. attr->read = read_vpd_attr;
  939. attr->write = write_vpd_attr;
  940. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  941. if (retval) {
  942. kfree(attr);
  943. return retval;
  944. }
  945. dev->vpd->attr = attr;
  946. }
  947. /* Active State Power Management */
  948. pcie_aspm_create_sysfs_dev_files(dev);
  949. if (!pci_probe_reset_function(dev)) {
  950. retval = device_create_file(&dev->dev, &reset_attr);
  951. if (retval)
  952. goto error;
  953. dev->reset_fn = 1;
  954. }
  955. return 0;
  956. error:
  957. pcie_aspm_remove_sysfs_dev_files(dev);
  958. if (dev->vpd && dev->vpd->attr) {
  959. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  960. kfree(dev->vpd->attr);
  961. }
  962. return retval;
  963. }
  964. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  965. {
  966. int retval;
  967. int rom_size = 0;
  968. struct bin_attribute *attr;
  969. if (!sysfs_initialized)
  970. return -EACCES;
  971. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  972. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  973. else
  974. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  975. if (retval)
  976. goto err;
  977. retval = pci_create_resource_files(pdev);
  978. if (retval)
  979. goto err_config_file;
  980. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  981. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  982. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  983. rom_size = 0x20000;
  984. /* If the device has a ROM, try to expose it in sysfs. */
  985. if (rom_size) {
  986. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  987. if (!attr) {
  988. retval = -ENOMEM;
  989. goto err_resource_files;
  990. }
  991. sysfs_bin_attr_init(attr);
  992. attr->size = rom_size;
  993. attr->attr.name = "rom";
  994. attr->attr.mode = S_IRUSR | S_IWUSR;
  995. attr->read = pci_read_rom;
  996. attr->write = pci_write_rom;
  997. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  998. if (retval) {
  999. kfree(attr);
  1000. goto err_resource_files;
  1001. }
  1002. pdev->rom_attr = attr;
  1003. }
  1004. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  1005. retval = device_create_file(&pdev->dev, &vga_attr);
  1006. if (retval)
  1007. goto err_rom_file;
  1008. }
  1009. /* add platform-specific attributes */
  1010. retval = pcibios_add_platform_entries(pdev);
  1011. if (retval)
  1012. goto err_vga_file;
  1013. /* add sysfs entries for various capabilities */
  1014. retval = pci_create_capabilities_sysfs(pdev);
  1015. if (retval)
  1016. goto err_vga_file;
  1017. pci_create_firmware_label_files(pdev);
  1018. return 0;
  1019. err_vga_file:
  1020. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  1021. device_remove_file(&pdev->dev, &vga_attr);
  1022. err_rom_file:
  1023. if (rom_size) {
  1024. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1025. kfree(pdev->rom_attr);
  1026. pdev->rom_attr = NULL;
  1027. }
  1028. err_resource_files:
  1029. pci_remove_resource_files(pdev);
  1030. err_config_file:
  1031. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1032. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1033. else
  1034. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1035. err:
  1036. return retval;
  1037. }
  1038. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1039. {
  1040. if (dev->vpd && dev->vpd->attr) {
  1041. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1042. kfree(dev->vpd->attr);
  1043. }
  1044. pcie_aspm_remove_sysfs_dev_files(dev);
  1045. if (dev->reset_fn) {
  1046. device_remove_file(&dev->dev, &reset_attr);
  1047. dev->reset_fn = 0;
  1048. }
  1049. }
  1050. /**
  1051. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1052. * @pdev: device whose entries we should free
  1053. *
  1054. * Cleanup when @pdev is removed from sysfs.
  1055. */
  1056. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1057. {
  1058. int rom_size = 0;
  1059. if (!sysfs_initialized)
  1060. return;
  1061. pci_remove_capabilities_sysfs(pdev);
  1062. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1063. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1064. else
  1065. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1066. pci_remove_resource_files(pdev);
  1067. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1068. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1069. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1070. rom_size = 0x20000;
  1071. if (rom_size && pdev->rom_attr) {
  1072. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1073. kfree(pdev->rom_attr);
  1074. }
  1075. pci_remove_firmware_label_files(pdev);
  1076. }
  1077. static int __init pci_sysfs_init(void)
  1078. {
  1079. struct pci_dev *pdev = NULL;
  1080. int retval;
  1081. sysfs_initialized = 1;
  1082. for_each_pci_dev(pdev) {
  1083. retval = pci_create_sysfs_dev_files(pdev);
  1084. if (retval) {
  1085. pci_dev_put(pdev);
  1086. return retval;
  1087. }
  1088. }
  1089. return 0;
  1090. }
  1091. late_initcall(pci_sysfs_init);