hw-ops.h 7.0 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef ATH9K_HW_OPS_H
  17. #define ATH9K_HW_OPS_H
  18. #include "hw.h"
  19. /* Hardware core and driver accessible callbacks */
  20. static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
  21. int restore,
  22. int power_off)
  23. {
  24. ath9k_hw_ops(ah)->config_pci_powersave(ah, restore, power_off);
  25. }
  26. static inline void ath9k_hw_rxena(struct ath_hw *ah)
  27. {
  28. ath9k_hw_ops(ah)->rx_enable(ah);
  29. }
  30. static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
  31. u32 link)
  32. {
  33. ath9k_hw_ops(ah)->set_desc_link(ds, link);
  34. }
  35. static inline void ath9k_hw_get_desc_link(struct ath_hw *ah, void *ds,
  36. u32 **link)
  37. {
  38. ath9k_hw_ops(ah)->get_desc_link(ds, link);
  39. }
  40. static inline bool ath9k_hw_calibrate(struct ath_hw *ah,
  41. struct ath9k_channel *chan,
  42. u8 rxchainmask,
  43. bool longcal)
  44. {
  45. return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
  46. }
  47. static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
  48. {
  49. return ath9k_hw_ops(ah)->get_isr(ah, masked);
  50. }
  51. static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
  52. bool is_firstseg, bool is_lastseg,
  53. const void *ds0, dma_addr_t buf_addr,
  54. unsigned int qcu)
  55. {
  56. ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
  57. ds0, buf_addr, qcu);
  58. }
  59. static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
  60. struct ath_tx_status *ts)
  61. {
  62. return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
  63. }
  64. static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
  65. u32 pktLen, enum ath9k_pkt_type type,
  66. u32 txPower, u32 keyIx,
  67. enum ath9k_key_type keyType,
  68. u32 flags)
  69. {
  70. ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
  71. keyType, flags);
  72. }
  73. static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
  74. void *lastds,
  75. u32 durUpdateEn, u32 rtsctsRate,
  76. u32 rtsctsDuration,
  77. struct ath9k_11n_rate_series series[],
  78. u32 nseries, u32 flags)
  79. {
  80. ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
  81. rtsctsRate, rtsctsDuration, series,
  82. nseries, flags);
  83. }
  84. static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
  85. u32 aggrLen)
  86. {
  87. ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
  88. }
  89. static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
  90. u32 numDelims)
  91. {
  92. ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
  93. }
  94. static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
  95. {
  96. ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
  97. }
  98. static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
  99. {
  100. ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
  101. }
  102. static inline void ath9k_hw_set11n_burstduration(struct ath_hw *ah, void *ds,
  103. u32 burstDuration)
  104. {
  105. ath9k_hw_ops(ah)->set11n_burstduration(ah, ds, burstDuration);
  106. }
  107. static inline void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, void *ds,
  108. u32 vmf)
  109. {
  110. ath9k_hw_ops(ah)->set11n_virtualmorefrag(ah, ds, vmf);
  111. }
  112. /* Private hardware call ops */
  113. /* PHY ops */
  114. static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
  115. struct ath9k_channel *chan)
  116. {
  117. return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
  118. }
  119. static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
  120. struct ath9k_channel *chan)
  121. {
  122. ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
  123. }
  124. static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
  125. {
  126. if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
  127. return 0;
  128. return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
  129. }
  130. static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
  131. {
  132. if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
  133. return;
  134. ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
  135. }
  136. static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
  137. struct ath9k_channel *chan,
  138. u16 modesIndex)
  139. {
  140. if (!ath9k_hw_private_ops(ah)->set_rf_regs)
  141. return true;
  142. return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
  143. }
  144. static inline void ath9k_hw_init_bb(struct ath_hw *ah,
  145. struct ath9k_channel *chan)
  146. {
  147. return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
  148. }
  149. static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
  150. struct ath9k_channel *chan)
  151. {
  152. return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
  153. }
  154. static inline int ath9k_hw_process_ini(struct ath_hw *ah,
  155. struct ath9k_channel *chan)
  156. {
  157. return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
  158. }
  159. static inline void ath9k_olc_init(struct ath_hw *ah)
  160. {
  161. if (!ath9k_hw_private_ops(ah)->olc_init)
  162. return;
  163. return ath9k_hw_private_ops(ah)->olc_init(ah);
  164. }
  165. static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
  166. struct ath9k_channel *chan)
  167. {
  168. return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
  169. }
  170. static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
  171. {
  172. return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
  173. }
  174. static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
  175. struct ath9k_channel *chan)
  176. {
  177. return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
  178. }
  179. static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
  180. {
  181. return ath9k_hw_private_ops(ah)->rfbus_req(ah);
  182. }
  183. static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
  184. {
  185. return ath9k_hw_private_ops(ah)->rfbus_done(ah);
  186. }
  187. static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
  188. {
  189. if (!ath9k_hw_private_ops(ah)->restore_chainmask)
  190. return;
  191. return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
  192. }
  193. static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
  194. {
  195. return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
  196. }
  197. static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
  198. enum ath9k_ani_cmd cmd, int param)
  199. {
  200. return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
  201. }
  202. static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
  203. int16_t nfarray[NUM_NF_READINGS])
  204. {
  205. ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
  206. }
  207. static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
  208. struct ath9k_channel *chan)
  209. {
  210. return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
  211. }
  212. static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
  213. struct ath9k_cal_list *currCal)
  214. {
  215. ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
  216. }
  217. #endif /* ATH9K_HW_OPS_H */