debug.h 5.6 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef DEBUG_H
  17. #define DEBUG_H
  18. #include "hw.h"
  19. #include "rc.h"
  20. struct ath_txq;
  21. struct ath_buf;
  22. #ifdef CONFIG_ATH9K_DEBUGFS
  23. #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
  24. #else
  25. #define TX_STAT_INC(q, c) do { } while (0)
  26. #endif
  27. #ifdef CONFIG_ATH9K_DEBUGFS
  28. /**
  29. * struct ath_interrupt_stats - Contains statistics about interrupts
  30. * @total: Total no. of interrupts generated so far
  31. * @rxok: RX with no errors
  32. * @rxlp: RX with low priority RX
  33. * @rxhp: RX with high priority, uapsd only
  34. * @rxeol: RX with no more RXDESC available
  35. * @rxorn: RX FIFO overrun
  36. * @txok: TX completed at the requested rate
  37. * @txurn: TX FIFO underrun
  38. * @mib: MIB regs reaching its threshold
  39. * @rxphyerr: RX with phy errors
  40. * @rx_keycache_miss: RX with key cache misses
  41. * @swba: Software Beacon Alert
  42. * @bmiss: Beacon Miss
  43. * @bnr: Beacon Not Ready
  44. * @cst: Carrier Sense TImeout
  45. * @gtt: Global TX Timeout
  46. * @tim: RX beacon TIM occurrence
  47. * @cabend: RX End of CAB traffic
  48. * @dtimsync: DTIM sync lossage
  49. * @dtim: RX Beacon with DTIM
  50. * @bb_watchdog: Baseband watchdog
  51. */
  52. struct ath_interrupt_stats {
  53. u32 total;
  54. u32 rxok;
  55. u32 rxlp;
  56. u32 rxhp;
  57. u32 rxeol;
  58. u32 rxorn;
  59. u32 txok;
  60. u32 txeol;
  61. u32 txurn;
  62. u32 mib;
  63. u32 rxphyerr;
  64. u32 rx_keycache_miss;
  65. u32 swba;
  66. u32 bmiss;
  67. u32 bnr;
  68. u32 cst;
  69. u32 gtt;
  70. u32 tim;
  71. u32 cabend;
  72. u32 dtimsync;
  73. u32 dtim;
  74. u32 bb_watchdog;
  75. };
  76. /**
  77. * struct ath_tx_stats - Statistics about TX
  78. * @tx_pkts_all: No. of total frames transmitted, including ones that
  79. may have had errors.
  80. * @tx_bytes_all: No. of total bytes transmitted, including ones that
  81. may have had errors.
  82. * @queued: Total MPDUs (non-aggr) queued
  83. * @completed: Total MPDUs (non-aggr) completed
  84. * @a_aggr: Total no. of aggregates queued
  85. * @a_queued_hw: Total AMPDUs queued to hardware
  86. * @a_queued_sw: Total AMPDUs queued to software queues
  87. * @a_completed: Total AMPDUs completed
  88. * @a_retries: No. of AMPDUs retried (SW)
  89. * @a_xretries: No. of AMPDUs dropped due to xretries
  90. * @fifo_underrun: FIFO underrun occurrences
  91. Valid only for:
  92. - non-aggregate condition.
  93. - first packet of aggregate.
  94. * @xtxop: No. of frames filtered because of TXOP limit
  95. * @timer_exp: Transmit timer expiry
  96. * @desc_cfg_err: Descriptor configuration errors
  97. * @data_urn: TX data underrun errors
  98. * @delim_urn: TX delimiter underrun errors
  99. * @puttxbuf: Number of times hardware was given txbuf to write.
  100. * @txstart: Number of times hardware was told to start tx.
  101. * @txprocdesc: Number of times tx descriptor was processed
  102. */
  103. struct ath_tx_stats {
  104. u32 tx_pkts_all;
  105. u32 tx_bytes_all;
  106. u32 queued;
  107. u32 completed;
  108. u32 a_aggr;
  109. u32 a_queued_hw;
  110. u32 a_queued_sw;
  111. u32 a_completed;
  112. u32 a_retries;
  113. u32 a_xretries;
  114. u32 fifo_underrun;
  115. u32 xtxop;
  116. u32 timer_exp;
  117. u32 desc_cfg_err;
  118. u32 data_underrun;
  119. u32 delim_underrun;
  120. u32 puttxbuf;
  121. u32 txstart;
  122. u32 txprocdesc;
  123. };
  124. /**
  125. * struct ath_rx_stats - RX Statistics
  126. * @rx_pkts_all: No. of total frames received, including ones that
  127. may have had errors.
  128. * @rx_bytes_all: No. of total bytes received, including ones that
  129. may have had errors.
  130. * @crc_err: No. of frames with incorrect CRC value
  131. * @decrypt_crc_err: No. of frames whose CRC check failed after
  132. decryption process completed
  133. * @phy_err: No. of frames whose reception failed because the PHY
  134. encountered an error
  135. * @mic_err: No. of frames with incorrect TKIP MIC verification failure
  136. * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
  137. * @post_delim_crc_err: Post-Frame delimiter CRC error detections
  138. * @decrypt_busy_err: Decryption interruptions counter
  139. * @phy_err_stats: Individual PHY error statistics
  140. */
  141. struct ath_rx_stats {
  142. u32 rx_pkts_all;
  143. u32 rx_bytes_all;
  144. u32 crc_err;
  145. u32 decrypt_crc_err;
  146. u32 phy_err;
  147. u32 mic_err;
  148. u32 pre_delim_crc_err;
  149. u32 post_delim_crc_err;
  150. u32 decrypt_busy_err;
  151. u32 phy_err_stats[ATH9K_PHYERR_MAX];
  152. };
  153. struct ath_stats {
  154. struct ath_interrupt_stats istats;
  155. struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
  156. struct ath_rx_stats rxstats;
  157. };
  158. struct ath9k_debug {
  159. struct dentry *debugfs_phy;
  160. u32 regidx;
  161. struct ath_stats stats;
  162. };
  163. int ath9k_init_debug(struct ath_hw *ah);
  164. void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
  165. void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
  166. struct ath_tx_status *ts, struct ath_txq *txq);
  167. void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
  168. #else
  169. static inline int ath9k_init_debug(struct ath_hw *ah)
  170. {
  171. return 0;
  172. }
  173. static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
  174. enum ath9k_int status)
  175. {
  176. }
  177. static inline void ath_debug_stat_tx(struct ath_softc *sc,
  178. struct ath_buf *bf,
  179. struct ath_tx_status *ts,
  180. struct ath_txq *txq)
  181. {
  182. }
  183. static inline void ath_debug_stat_rx(struct ath_softc *sc,
  184. struct ath_rx_status *rs)
  185. {
  186. }
  187. #endif /* CONFIG_ATH9K_DEBUGFS */
  188. #endif /* DEBUG_H */