qlcnic_init.c 41 KB

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  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/netdevice.h>
  8. #include <linux/delay.h>
  9. #include <linux/slab.h>
  10. #include <linux/if_vlan.h>
  11. #include "qlcnic.h"
  12. struct crb_addr_pair {
  13. u32 addr;
  14. u32 data;
  15. };
  16. #define QLCNIC_MAX_CRB_XFORM 60
  17. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  18. #define crb_addr_transform(name) \
  19. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  20. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  21. #define QLCNIC_ADDR_ERROR (0xffffffff)
  22. static void
  23. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  24. struct qlcnic_host_rds_ring *rds_ring);
  25. static int
  26. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  27. static void crb_addr_transform_setup(void)
  28. {
  29. crb_addr_transform(XDMA);
  30. crb_addr_transform(TIMR);
  31. crb_addr_transform(SRE);
  32. crb_addr_transform(SQN3);
  33. crb_addr_transform(SQN2);
  34. crb_addr_transform(SQN1);
  35. crb_addr_transform(SQN0);
  36. crb_addr_transform(SQS3);
  37. crb_addr_transform(SQS2);
  38. crb_addr_transform(SQS1);
  39. crb_addr_transform(SQS0);
  40. crb_addr_transform(RPMX7);
  41. crb_addr_transform(RPMX6);
  42. crb_addr_transform(RPMX5);
  43. crb_addr_transform(RPMX4);
  44. crb_addr_transform(RPMX3);
  45. crb_addr_transform(RPMX2);
  46. crb_addr_transform(RPMX1);
  47. crb_addr_transform(RPMX0);
  48. crb_addr_transform(ROMUSB);
  49. crb_addr_transform(SN);
  50. crb_addr_transform(QMN);
  51. crb_addr_transform(QMS);
  52. crb_addr_transform(PGNI);
  53. crb_addr_transform(PGND);
  54. crb_addr_transform(PGN3);
  55. crb_addr_transform(PGN2);
  56. crb_addr_transform(PGN1);
  57. crb_addr_transform(PGN0);
  58. crb_addr_transform(PGSI);
  59. crb_addr_transform(PGSD);
  60. crb_addr_transform(PGS3);
  61. crb_addr_transform(PGS2);
  62. crb_addr_transform(PGS1);
  63. crb_addr_transform(PGS0);
  64. crb_addr_transform(PS);
  65. crb_addr_transform(PH);
  66. crb_addr_transform(NIU);
  67. crb_addr_transform(I2Q);
  68. crb_addr_transform(EG);
  69. crb_addr_transform(MN);
  70. crb_addr_transform(MS);
  71. crb_addr_transform(CAS2);
  72. crb_addr_transform(CAS1);
  73. crb_addr_transform(CAS0);
  74. crb_addr_transform(CAM);
  75. crb_addr_transform(C2C1);
  76. crb_addr_transform(C2C0);
  77. crb_addr_transform(SMB);
  78. crb_addr_transform(OCM0);
  79. crb_addr_transform(I2C0);
  80. }
  81. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  82. {
  83. struct qlcnic_recv_context *recv_ctx;
  84. struct qlcnic_host_rds_ring *rds_ring;
  85. struct qlcnic_rx_buffer *rx_buf;
  86. int i, ring;
  87. recv_ctx = &adapter->recv_ctx;
  88. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  89. rds_ring = &recv_ctx->rds_rings[ring];
  90. for (i = 0; i < rds_ring->num_desc; ++i) {
  91. rx_buf = &(rds_ring->rx_buf_arr[i]);
  92. if (rx_buf->skb == NULL)
  93. continue;
  94. pci_unmap_single(adapter->pdev,
  95. rx_buf->dma,
  96. rds_ring->dma_size,
  97. PCI_DMA_FROMDEVICE);
  98. dev_kfree_skb_any(rx_buf->skb);
  99. }
  100. }
  101. }
  102. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  103. {
  104. struct qlcnic_recv_context *recv_ctx;
  105. struct qlcnic_host_rds_ring *rds_ring;
  106. struct qlcnic_rx_buffer *rx_buf;
  107. int i, ring;
  108. recv_ctx = &adapter->recv_ctx;
  109. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  110. rds_ring = &recv_ctx->rds_rings[ring];
  111. INIT_LIST_HEAD(&rds_ring->free_list);
  112. rx_buf = rds_ring->rx_buf_arr;
  113. for (i = 0; i < rds_ring->num_desc; i++) {
  114. list_add_tail(&rx_buf->list,
  115. &rds_ring->free_list);
  116. rx_buf++;
  117. }
  118. }
  119. }
  120. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  121. {
  122. struct qlcnic_cmd_buffer *cmd_buf;
  123. struct qlcnic_skb_frag *buffrag;
  124. int i, j;
  125. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  126. cmd_buf = tx_ring->cmd_buf_arr;
  127. for (i = 0; i < tx_ring->num_desc; i++) {
  128. buffrag = cmd_buf->frag_array;
  129. if (buffrag->dma) {
  130. pci_unmap_single(adapter->pdev, buffrag->dma,
  131. buffrag->length, PCI_DMA_TODEVICE);
  132. buffrag->dma = 0ULL;
  133. }
  134. for (j = 0; j < cmd_buf->frag_count; j++) {
  135. buffrag++;
  136. if (buffrag->dma) {
  137. pci_unmap_page(adapter->pdev, buffrag->dma,
  138. buffrag->length,
  139. PCI_DMA_TODEVICE);
  140. buffrag->dma = 0ULL;
  141. }
  142. }
  143. if (cmd_buf->skb) {
  144. dev_kfree_skb_any(cmd_buf->skb);
  145. cmd_buf->skb = NULL;
  146. }
  147. cmd_buf++;
  148. }
  149. }
  150. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  151. {
  152. struct qlcnic_recv_context *recv_ctx;
  153. struct qlcnic_host_rds_ring *rds_ring;
  154. struct qlcnic_host_tx_ring *tx_ring;
  155. int ring;
  156. recv_ctx = &adapter->recv_ctx;
  157. if (recv_ctx->rds_rings == NULL)
  158. goto skip_rds;
  159. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  160. rds_ring = &recv_ctx->rds_rings[ring];
  161. vfree(rds_ring->rx_buf_arr);
  162. rds_ring->rx_buf_arr = NULL;
  163. }
  164. kfree(recv_ctx->rds_rings);
  165. skip_rds:
  166. if (adapter->tx_ring == NULL)
  167. return;
  168. tx_ring = adapter->tx_ring;
  169. vfree(tx_ring->cmd_buf_arr);
  170. tx_ring->cmd_buf_arr = NULL;
  171. kfree(adapter->tx_ring);
  172. adapter->tx_ring = NULL;
  173. }
  174. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  175. {
  176. struct qlcnic_recv_context *recv_ctx;
  177. struct qlcnic_host_rds_ring *rds_ring;
  178. struct qlcnic_host_sds_ring *sds_ring;
  179. struct qlcnic_host_tx_ring *tx_ring;
  180. struct qlcnic_rx_buffer *rx_buf;
  181. int ring, i, size;
  182. struct qlcnic_cmd_buffer *cmd_buf_arr;
  183. struct net_device *netdev = adapter->netdev;
  184. size = sizeof(struct qlcnic_host_tx_ring);
  185. tx_ring = kzalloc(size, GFP_KERNEL);
  186. if (tx_ring == NULL) {
  187. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  188. return -ENOMEM;
  189. }
  190. adapter->tx_ring = tx_ring;
  191. tx_ring->num_desc = adapter->num_txd;
  192. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  193. cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
  194. if (cmd_buf_arr == NULL) {
  195. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  196. goto err_out;
  197. }
  198. tx_ring->cmd_buf_arr = cmd_buf_arr;
  199. recv_ctx = &adapter->recv_ctx;
  200. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  201. rds_ring = kzalloc(size, GFP_KERNEL);
  202. if (rds_ring == NULL) {
  203. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  204. goto err_out;
  205. }
  206. recv_ctx->rds_rings = rds_ring;
  207. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  208. rds_ring = &recv_ctx->rds_rings[ring];
  209. switch (ring) {
  210. case RCV_RING_NORMAL:
  211. rds_ring->num_desc = adapter->num_rxd;
  212. rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
  213. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  214. break;
  215. case RCV_RING_JUMBO:
  216. rds_ring->num_desc = adapter->num_jumbo_rxd;
  217. rds_ring->dma_size =
  218. QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
  219. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  220. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  221. rds_ring->skb_size =
  222. rds_ring->dma_size + NET_IP_ALIGN;
  223. break;
  224. }
  225. rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
  226. if (rds_ring->rx_buf_arr == NULL) {
  227. dev_err(&netdev->dev, "Failed to allocate "
  228. "rx buffer ring %d\n", ring);
  229. goto err_out;
  230. }
  231. INIT_LIST_HEAD(&rds_ring->free_list);
  232. /*
  233. * Now go through all of them, set reference handles
  234. * and put them in the queues.
  235. */
  236. rx_buf = rds_ring->rx_buf_arr;
  237. for (i = 0; i < rds_ring->num_desc; i++) {
  238. list_add_tail(&rx_buf->list,
  239. &rds_ring->free_list);
  240. rx_buf->ref_handle = i;
  241. rx_buf++;
  242. }
  243. spin_lock_init(&rds_ring->lock);
  244. }
  245. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  246. sds_ring = &recv_ctx->sds_rings[ring];
  247. sds_ring->irq = adapter->msix_entries[ring].vector;
  248. sds_ring->adapter = adapter;
  249. sds_ring->num_desc = adapter->num_rxd;
  250. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  251. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  252. }
  253. return 0;
  254. err_out:
  255. qlcnic_free_sw_resources(adapter);
  256. return -ENOMEM;
  257. }
  258. /*
  259. * Utility to translate from internal Phantom CRB address
  260. * to external PCI CRB address.
  261. */
  262. static u32 qlcnic_decode_crb_addr(u32 addr)
  263. {
  264. int i;
  265. u32 base_addr, offset, pci_base;
  266. crb_addr_transform_setup();
  267. pci_base = QLCNIC_ADDR_ERROR;
  268. base_addr = addr & 0xfff00000;
  269. offset = addr & 0x000fffff;
  270. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  271. if (crb_addr_xform[i] == base_addr) {
  272. pci_base = i << 20;
  273. break;
  274. }
  275. }
  276. if (pci_base == QLCNIC_ADDR_ERROR)
  277. return pci_base;
  278. else
  279. return pci_base + offset;
  280. }
  281. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  282. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  283. {
  284. long timeout = 0;
  285. long done = 0;
  286. cond_resched();
  287. while (done == 0) {
  288. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  289. done &= 2;
  290. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  291. dev_err(&adapter->pdev->dev,
  292. "Timeout reached waiting for rom done");
  293. return -EIO;
  294. }
  295. udelay(1);
  296. }
  297. return 0;
  298. }
  299. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  300. int addr, int *valp)
  301. {
  302. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  303. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  304. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  305. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  306. if (qlcnic_wait_rom_done(adapter)) {
  307. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  308. return -EIO;
  309. }
  310. /* reset abyte_cnt and dummy_byte_cnt */
  311. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  312. udelay(10);
  313. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  314. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  315. return 0;
  316. }
  317. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  318. u8 *bytes, size_t size)
  319. {
  320. int addridx;
  321. int ret = 0;
  322. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  323. int v;
  324. ret = do_rom_fast_read(adapter, addridx, &v);
  325. if (ret != 0)
  326. break;
  327. *(__le32 *)bytes = cpu_to_le32(v);
  328. bytes += 4;
  329. }
  330. return ret;
  331. }
  332. int
  333. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  334. u8 *bytes, size_t size)
  335. {
  336. int ret;
  337. ret = qlcnic_rom_lock(adapter);
  338. if (ret < 0)
  339. return ret;
  340. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  341. qlcnic_rom_unlock(adapter);
  342. return ret;
  343. }
  344. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  345. {
  346. int ret;
  347. if (qlcnic_rom_lock(adapter) != 0)
  348. return -EIO;
  349. ret = do_rom_fast_read(adapter, addr, valp);
  350. qlcnic_rom_unlock(adapter);
  351. return ret;
  352. }
  353. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  354. {
  355. int addr, val;
  356. int i, n, init_delay;
  357. struct crb_addr_pair *buf;
  358. unsigned offset;
  359. u32 off;
  360. struct pci_dev *pdev = adapter->pdev;
  361. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  362. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  363. qlcnic_rom_lock(adapter);
  364. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  365. qlcnic_rom_unlock(adapter);
  366. /* Init HW CRB block */
  367. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  368. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  369. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  370. return -EIO;
  371. }
  372. offset = n & 0xffffU;
  373. n = (n >> 16) & 0xffffU;
  374. if (n >= 1024) {
  375. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  376. return -EIO;
  377. }
  378. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  379. if (buf == NULL) {
  380. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  381. return -ENOMEM;
  382. }
  383. for (i = 0; i < n; i++) {
  384. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  385. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  386. kfree(buf);
  387. return -EIO;
  388. }
  389. buf[i].addr = addr;
  390. buf[i].data = val;
  391. }
  392. for (i = 0; i < n; i++) {
  393. off = qlcnic_decode_crb_addr(buf[i].addr);
  394. if (off == QLCNIC_ADDR_ERROR) {
  395. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  396. buf[i].addr);
  397. continue;
  398. }
  399. off += QLCNIC_PCI_CRBSPACE;
  400. if (off & 1)
  401. continue;
  402. /* skipping cold reboot MAGIC */
  403. if (off == QLCNIC_CAM_RAM(0x1fc))
  404. continue;
  405. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  406. continue;
  407. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  408. continue;
  409. if (off == (ROMUSB_GLB + 0xa8))
  410. continue;
  411. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  412. continue;
  413. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  414. continue;
  415. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  416. continue;
  417. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  418. continue;
  419. /* skip the function enable register */
  420. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  421. continue;
  422. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  423. continue;
  424. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  425. continue;
  426. init_delay = 1;
  427. /* After writing this register, HW needs time for CRB */
  428. /* to quiet down (else crb_window returns 0xffffffff) */
  429. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  430. init_delay = 1000;
  431. QLCWR32(adapter, off, buf[i].data);
  432. msleep(init_delay);
  433. }
  434. kfree(buf);
  435. /* Initialize protocol process engine */
  436. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  437. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  438. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  439. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  440. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  441. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  442. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  443. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  444. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  445. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  446. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  447. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  448. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  449. msleep(1);
  450. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  451. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  452. return 0;
  453. }
  454. static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
  455. {
  456. u32 val;
  457. int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
  458. do {
  459. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  460. switch (val) {
  461. case PHAN_INITIALIZE_COMPLETE:
  462. case PHAN_INITIALIZE_ACK:
  463. return 0;
  464. case PHAN_INITIALIZE_FAILED:
  465. goto out_err;
  466. default:
  467. break;
  468. }
  469. msleep(QLCNIC_CMDPEG_CHECK_DELAY);
  470. } while (--retries);
  471. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  472. out_err:
  473. dev_err(&adapter->pdev->dev, "Command Peg initialization not "
  474. "complete, state: 0x%x.\n", val);
  475. return -EIO;
  476. }
  477. static int
  478. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  479. {
  480. u32 val;
  481. int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
  482. do {
  483. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  484. if (val == PHAN_PEG_RCV_INITIALIZED)
  485. return 0;
  486. msleep(QLCNIC_RCVPEG_CHECK_DELAY);
  487. } while (--retries);
  488. if (!retries) {
  489. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  490. "complete, state: 0x%x.\n", val);
  491. return -EIO;
  492. }
  493. return 0;
  494. }
  495. int
  496. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  497. {
  498. int err;
  499. err = qlcnic_cmd_peg_ready(adapter);
  500. if (err)
  501. return err;
  502. err = qlcnic_receive_peg_ready(adapter);
  503. if (err)
  504. return err;
  505. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  506. return err;
  507. }
  508. int
  509. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  510. int timeo;
  511. u32 val;
  512. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  513. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  514. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  515. dev_err(&adapter->pdev->dev,
  516. "Not an Ethernet NIC func=%u\n", val);
  517. return -EIO;
  518. }
  519. adapter->physical_port = (val >> 2);
  520. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  521. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  522. adapter->dev_init_timeo = timeo;
  523. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  524. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  525. adapter->reset_ack_timeo = timeo;
  526. return 0;
  527. }
  528. static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
  529. struct qlcnic_flt_entry *region_entry)
  530. {
  531. struct qlcnic_flt_header flt_hdr;
  532. struct qlcnic_flt_entry *flt_entry;
  533. int i = 0, ret;
  534. u32 entry_size;
  535. memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
  536. ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
  537. (u8 *)&flt_hdr,
  538. sizeof(struct qlcnic_flt_header));
  539. if (ret) {
  540. dev_warn(&adapter->pdev->dev,
  541. "error reading flash layout header\n");
  542. return -EIO;
  543. }
  544. entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
  545. flt_entry = (struct qlcnic_flt_entry *)vzalloc(entry_size);
  546. if (flt_entry == NULL) {
  547. dev_warn(&adapter->pdev->dev, "error allocating memory\n");
  548. return -EIO;
  549. }
  550. ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
  551. sizeof(struct qlcnic_flt_header),
  552. (u8 *)flt_entry, entry_size);
  553. if (ret) {
  554. dev_warn(&adapter->pdev->dev,
  555. "error reading flash layout entries\n");
  556. goto err_out;
  557. }
  558. while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
  559. if (flt_entry[i].region == region)
  560. break;
  561. i++;
  562. }
  563. if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
  564. dev_warn(&adapter->pdev->dev,
  565. "region=%x not found in %d regions\n", region, i);
  566. ret = -EIO;
  567. goto err_out;
  568. }
  569. memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
  570. err_out:
  571. vfree(flt_entry);
  572. return ret;
  573. }
  574. int
  575. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  576. {
  577. struct qlcnic_flt_entry fw_entry;
  578. u32 ver = -1, min_ver;
  579. int ret;
  580. ret = qlcnic_get_flt_entry(adapter, QLCNIC_FW_IMAGE_REGION, &fw_entry);
  581. if (!ret)
  582. /* 0-4:-signature, 4-8:-fw version */
  583. qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
  584. (int *)&ver);
  585. else
  586. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
  587. (int *)&ver);
  588. ver = QLCNIC_DECODE_VERSION(ver);
  589. min_ver = QLCNIC_MIN_FW_VERSION;
  590. if (ver < min_ver) {
  591. dev_err(&adapter->pdev->dev,
  592. "firmware version %d.%d.%d unsupported."
  593. "Min supported version %d.%d.%d\n",
  594. _major(ver), _minor(ver), _build(ver),
  595. _major(min_ver), _minor(min_ver), _build(min_ver));
  596. return -EINVAL;
  597. }
  598. return 0;
  599. }
  600. static int
  601. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  602. {
  603. u32 capability;
  604. capability = 0;
  605. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  606. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  607. return 1;
  608. return 0;
  609. }
  610. static
  611. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  612. {
  613. u32 i;
  614. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  615. __le32 entries = cpu_to_le32(directory->num_entries);
  616. for (i = 0; i < entries; i++) {
  617. __le32 offs = cpu_to_le32(directory->findex) +
  618. (i * cpu_to_le32(directory->entry_size));
  619. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  620. if (tab_type == section)
  621. return (struct uni_table_desc *) &unirom[offs];
  622. }
  623. return NULL;
  624. }
  625. #define FILEHEADER_SIZE (14 * 4)
  626. static int
  627. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  628. {
  629. const u8 *unirom = adapter->fw->data;
  630. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  631. __le32 fw_file_size = adapter->fw->size;
  632. __le32 entries;
  633. __le32 entry_size;
  634. __le32 tab_size;
  635. if (fw_file_size < FILEHEADER_SIZE)
  636. return -EINVAL;
  637. entries = cpu_to_le32(directory->num_entries);
  638. entry_size = cpu_to_le32(directory->entry_size);
  639. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  640. if (fw_file_size < tab_size)
  641. return -EINVAL;
  642. return 0;
  643. }
  644. static int
  645. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  646. {
  647. struct uni_table_desc *tab_desc;
  648. struct uni_data_desc *descr;
  649. const u8 *unirom = adapter->fw->data;
  650. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  651. QLCNIC_UNI_BOOTLD_IDX_OFF));
  652. __le32 offs;
  653. __le32 tab_size;
  654. __le32 data_size;
  655. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  656. if (!tab_desc)
  657. return -EINVAL;
  658. tab_size = cpu_to_le32(tab_desc->findex) +
  659. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  660. if (adapter->fw->size < tab_size)
  661. return -EINVAL;
  662. offs = cpu_to_le32(tab_desc->findex) +
  663. (cpu_to_le32(tab_desc->entry_size) * (idx));
  664. descr = (struct uni_data_desc *)&unirom[offs];
  665. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  666. if (adapter->fw->size < data_size)
  667. return -EINVAL;
  668. return 0;
  669. }
  670. static int
  671. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  672. {
  673. struct uni_table_desc *tab_desc;
  674. struct uni_data_desc *descr;
  675. const u8 *unirom = adapter->fw->data;
  676. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  677. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  678. __le32 offs;
  679. __le32 tab_size;
  680. __le32 data_size;
  681. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  682. if (!tab_desc)
  683. return -EINVAL;
  684. tab_size = cpu_to_le32(tab_desc->findex) +
  685. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  686. if (adapter->fw->size < tab_size)
  687. return -EINVAL;
  688. offs = cpu_to_le32(tab_desc->findex) +
  689. (cpu_to_le32(tab_desc->entry_size) * (idx));
  690. descr = (struct uni_data_desc *)&unirom[offs];
  691. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  692. if (adapter->fw->size < data_size)
  693. return -EINVAL;
  694. return 0;
  695. }
  696. static int
  697. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  698. {
  699. struct uni_table_desc *ptab_descr;
  700. const u8 *unirom = adapter->fw->data;
  701. int mn_present = qlcnic_has_mn(adapter);
  702. __le32 entries;
  703. __le32 entry_size;
  704. __le32 tab_size;
  705. u32 i;
  706. ptab_descr = qlcnic_get_table_desc(unirom,
  707. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  708. if (!ptab_descr)
  709. return -EINVAL;
  710. entries = cpu_to_le32(ptab_descr->num_entries);
  711. entry_size = cpu_to_le32(ptab_descr->entry_size);
  712. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  713. if (adapter->fw->size < tab_size)
  714. return -EINVAL;
  715. nomn:
  716. for (i = 0; i < entries; i++) {
  717. __le32 flags, file_chiprev, offs;
  718. u8 chiprev = adapter->ahw.revision_id;
  719. u32 flagbit;
  720. offs = cpu_to_le32(ptab_descr->findex) +
  721. (i * cpu_to_le32(ptab_descr->entry_size));
  722. flags = cpu_to_le32(*((int *)&unirom[offs] +
  723. QLCNIC_UNI_FLAGS_OFF));
  724. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  725. QLCNIC_UNI_CHIP_REV_OFF));
  726. flagbit = mn_present ? 1 : 2;
  727. if ((chiprev == file_chiprev) &&
  728. ((1ULL << flagbit) & flags)) {
  729. adapter->file_prd_off = offs;
  730. return 0;
  731. }
  732. }
  733. if (mn_present) {
  734. mn_present = 0;
  735. goto nomn;
  736. }
  737. return -EINVAL;
  738. }
  739. static int
  740. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  741. {
  742. if (qlcnic_validate_header(adapter)) {
  743. dev_err(&adapter->pdev->dev,
  744. "unified image: header validation failed\n");
  745. return -EINVAL;
  746. }
  747. if (qlcnic_validate_product_offs(adapter)) {
  748. dev_err(&adapter->pdev->dev,
  749. "unified image: product validation failed\n");
  750. return -EINVAL;
  751. }
  752. if (qlcnic_validate_bootld(adapter)) {
  753. dev_err(&adapter->pdev->dev,
  754. "unified image: bootld validation failed\n");
  755. return -EINVAL;
  756. }
  757. if (qlcnic_validate_fw(adapter)) {
  758. dev_err(&adapter->pdev->dev,
  759. "unified image: firmware validation failed\n");
  760. return -EINVAL;
  761. }
  762. return 0;
  763. }
  764. static
  765. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  766. u32 section, u32 idx_offset)
  767. {
  768. const u8 *unirom = adapter->fw->data;
  769. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  770. idx_offset));
  771. struct uni_table_desc *tab_desc;
  772. __le32 offs;
  773. tab_desc = qlcnic_get_table_desc(unirom, section);
  774. if (tab_desc == NULL)
  775. return NULL;
  776. offs = cpu_to_le32(tab_desc->findex) +
  777. (cpu_to_le32(tab_desc->entry_size) * idx);
  778. return (struct uni_data_desc *)&unirom[offs];
  779. }
  780. static u8 *
  781. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  782. {
  783. u32 offs = QLCNIC_BOOTLD_START;
  784. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  785. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  786. QLCNIC_UNI_DIR_SECT_BOOTLD,
  787. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  788. return (u8 *)&adapter->fw->data[offs];
  789. }
  790. static u8 *
  791. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  792. {
  793. u32 offs = QLCNIC_IMAGE_START;
  794. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  795. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  796. QLCNIC_UNI_DIR_SECT_FW,
  797. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  798. return (u8 *)&adapter->fw->data[offs];
  799. }
  800. static __le32
  801. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  802. {
  803. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  804. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  805. QLCNIC_UNI_DIR_SECT_FW,
  806. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  807. else
  808. return cpu_to_le32(
  809. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  810. }
  811. static __le32
  812. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  813. {
  814. struct uni_data_desc *fw_data_desc;
  815. const struct firmware *fw = adapter->fw;
  816. __le32 major, minor, sub;
  817. const u8 *ver_str;
  818. int i, ret;
  819. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  820. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  821. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  822. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  823. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  824. cpu_to_le32(fw_data_desc->size) - 17;
  825. for (i = 0; i < 12; i++) {
  826. if (!strncmp(&ver_str[i], "REV=", 4)) {
  827. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  828. &major, &minor, &sub);
  829. if (ret != 3)
  830. return 0;
  831. else
  832. return major + (minor << 8) + (sub << 16);
  833. }
  834. }
  835. return 0;
  836. }
  837. static __le32
  838. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  839. {
  840. const struct firmware *fw = adapter->fw;
  841. __le32 bios_ver, prd_off = adapter->file_prd_off;
  842. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  843. return cpu_to_le32(
  844. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  845. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  846. + QLCNIC_UNI_BIOS_VERSION_OFF));
  847. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  848. }
  849. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  850. {
  851. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  852. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  853. qlcnic_pcie_sem_unlock(adapter, 2);
  854. }
  855. static int
  856. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
  857. {
  858. u32 heartbeat, ret = -EIO;
  859. int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
  860. adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  861. do {
  862. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  863. heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  864. if (heartbeat != adapter->heartbeat) {
  865. ret = QLCNIC_RCODE_SUCCESS;
  866. break;
  867. }
  868. } while (--retries);
  869. return ret;
  870. }
  871. int
  872. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  873. {
  874. if (qlcnic_check_fw_hearbeat(adapter)) {
  875. qlcnic_rom_lock_recovery(adapter);
  876. return 1;
  877. }
  878. if (adapter->need_fw_reset)
  879. return 1;
  880. if (adapter->fw)
  881. return 1;
  882. return 0;
  883. }
  884. static const char *fw_name[] = {
  885. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  886. QLCNIC_FLASH_ROMIMAGE_NAME,
  887. };
  888. int
  889. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  890. {
  891. u64 *ptr64;
  892. u32 i, flashaddr, size;
  893. const struct firmware *fw = adapter->fw;
  894. struct pci_dev *pdev = adapter->pdev;
  895. dev_info(&pdev->dev, "loading firmware from %s\n",
  896. fw_name[adapter->fw_type]);
  897. if (fw) {
  898. __le64 data;
  899. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  900. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  901. flashaddr = QLCNIC_BOOTLD_START;
  902. for (i = 0; i < size; i++) {
  903. data = cpu_to_le64(ptr64[i]);
  904. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  905. return -EIO;
  906. flashaddr += 8;
  907. }
  908. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  909. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  910. flashaddr = QLCNIC_IMAGE_START;
  911. for (i = 0; i < size; i++) {
  912. data = cpu_to_le64(ptr64[i]);
  913. if (qlcnic_pci_mem_write_2M(adapter,
  914. flashaddr, data))
  915. return -EIO;
  916. flashaddr += 8;
  917. }
  918. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  919. if (size) {
  920. data = cpu_to_le64(ptr64[i]);
  921. if (qlcnic_pci_mem_write_2M(adapter,
  922. flashaddr, data))
  923. return -EIO;
  924. }
  925. } else {
  926. u64 data;
  927. u32 hi, lo;
  928. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  929. flashaddr = QLCNIC_BOOTLD_START;
  930. for (i = 0; i < size; i++) {
  931. if (qlcnic_rom_fast_read(adapter,
  932. flashaddr, (int *)&lo) != 0)
  933. return -EIO;
  934. if (qlcnic_rom_fast_read(adapter,
  935. flashaddr + 4, (int *)&hi) != 0)
  936. return -EIO;
  937. data = (((u64)hi << 32) | lo);
  938. if (qlcnic_pci_mem_write_2M(adapter,
  939. flashaddr, data))
  940. return -EIO;
  941. flashaddr += 8;
  942. }
  943. }
  944. msleep(1);
  945. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  946. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  947. return 0;
  948. }
  949. static int
  950. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  951. {
  952. __le32 val;
  953. u32 ver, bios, min_size;
  954. struct pci_dev *pdev = adapter->pdev;
  955. const struct firmware *fw = adapter->fw;
  956. u8 fw_type = adapter->fw_type;
  957. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  958. if (qlcnic_validate_unified_romimage(adapter))
  959. return -EINVAL;
  960. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  961. } else {
  962. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  963. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  964. return -EINVAL;
  965. min_size = QLCNIC_FW_MIN_SIZE;
  966. }
  967. if (fw->size < min_size)
  968. return -EINVAL;
  969. val = qlcnic_get_fw_version(adapter);
  970. ver = QLCNIC_DECODE_VERSION(val);
  971. if (ver < QLCNIC_MIN_FW_VERSION) {
  972. dev_err(&pdev->dev,
  973. "%s: firmware version %d.%d.%d unsupported\n",
  974. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  975. return -EINVAL;
  976. }
  977. val = qlcnic_get_bios_version(adapter);
  978. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  979. if ((__force u32)val != bios) {
  980. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  981. fw_name[fw_type]);
  982. return -EINVAL;
  983. }
  984. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  985. return 0;
  986. }
  987. static void
  988. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  989. {
  990. u8 fw_type;
  991. switch (adapter->fw_type) {
  992. case QLCNIC_UNKNOWN_ROMIMAGE:
  993. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  994. break;
  995. case QLCNIC_UNIFIED_ROMIMAGE:
  996. default:
  997. fw_type = QLCNIC_FLASH_ROMIMAGE;
  998. break;
  999. }
  1000. adapter->fw_type = fw_type;
  1001. }
  1002. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  1003. {
  1004. struct pci_dev *pdev = adapter->pdev;
  1005. int rc;
  1006. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  1007. next:
  1008. qlcnic_get_next_fwtype(adapter);
  1009. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  1010. adapter->fw = NULL;
  1011. } else {
  1012. rc = request_firmware(&adapter->fw,
  1013. fw_name[adapter->fw_type], &pdev->dev);
  1014. if (rc != 0)
  1015. goto next;
  1016. rc = qlcnic_validate_firmware(adapter);
  1017. if (rc != 0) {
  1018. release_firmware(adapter->fw);
  1019. msleep(1);
  1020. goto next;
  1021. }
  1022. }
  1023. }
  1024. void
  1025. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  1026. {
  1027. if (adapter->fw)
  1028. release_firmware(adapter->fw);
  1029. adapter->fw = NULL;
  1030. }
  1031. static void
  1032. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  1033. struct qlcnic_fw_msg *msg)
  1034. {
  1035. u32 cable_OUI;
  1036. u16 cable_len;
  1037. u16 link_speed;
  1038. u8 link_status, module, duplex, autoneg;
  1039. struct net_device *netdev = adapter->netdev;
  1040. adapter->has_link_events = 1;
  1041. cable_OUI = msg->body[1] & 0xffffffff;
  1042. cable_len = (msg->body[1] >> 32) & 0xffff;
  1043. link_speed = (msg->body[1] >> 48) & 0xffff;
  1044. link_status = msg->body[2] & 0xff;
  1045. duplex = (msg->body[2] >> 16) & 0xff;
  1046. autoneg = (msg->body[2] >> 24) & 0xff;
  1047. module = (msg->body[2] >> 8) & 0xff;
  1048. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1049. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1050. "length %d\n", cable_OUI, cable_len);
  1051. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1052. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1053. cable_len);
  1054. qlcnic_advert_link_change(adapter, link_status);
  1055. if (duplex == LINKEVENT_FULL_DUPLEX)
  1056. adapter->link_duplex = DUPLEX_FULL;
  1057. else
  1058. adapter->link_duplex = DUPLEX_HALF;
  1059. adapter->module_type = module;
  1060. adapter->link_autoneg = autoneg;
  1061. adapter->link_speed = link_speed;
  1062. }
  1063. static void
  1064. qlcnic_handle_fw_message(int desc_cnt, int index,
  1065. struct qlcnic_host_sds_ring *sds_ring)
  1066. {
  1067. struct qlcnic_fw_msg msg;
  1068. struct status_desc *desc;
  1069. int i = 0, opcode;
  1070. while (desc_cnt > 0 && i < 8) {
  1071. desc = &sds_ring->desc_head[index];
  1072. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1073. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1074. index = get_next_index(index, sds_ring->num_desc);
  1075. desc_cnt--;
  1076. }
  1077. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1078. switch (opcode) {
  1079. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1080. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1081. break;
  1082. default:
  1083. break;
  1084. }
  1085. }
  1086. static int
  1087. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1088. struct qlcnic_host_rds_ring *rds_ring,
  1089. struct qlcnic_rx_buffer *buffer)
  1090. {
  1091. struct sk_buff *skb;
  1092. dma_addr_t dma;
  1093. struct pci_dev *pdev = adapter->pdev;
  1094. skb = dev_alloc_skb(rds_ring->skb_size);
  1095. if (!skb) {
  1096. adapter->stats.skb_alloc_failure++;
  1097. return -ENOMEM;
  1098. }
  1099. skb_reserve(skb, NET_IP_ALIGN);
  1100. dma = pci_map_single(pdev, skb->data,
  1101. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1102. if (pci_dma_mapping_error(pdev, dma)) {
  1103. adapter->stats.rx_dma_map_error++;
  1104. dev_kfree_skb_any(skb);
  1105. return -ENOMEM;
  1106. }
  1107. buffer->skb = skb;
  1108. buffer->dma = dma;
  1109. return 0;
  1110. }
  1111. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1112. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1113. {
  1114. struct qlcnic_rx_buffer *buffer;
  1115. struct sk_buff *skb;
  1116. buffer = &rds_ring->rx_buf_arr[index];
  1117. if (unlikely(buffer->skb == NULL)) {
  1118. WARN_ON(1);
  1119. return NULL;
  1120. }
  1121. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1122. PCI_DMA_FROMDEVICE);
  1123. skb = buffer->skb;
  1124. if (likely(adapter->rx_csum && (cksum == STATUS_CKSUM_OK ||
  1125. cksum == STATUS_CKSUM_LOOP))) {
  1126. adapter->stats.csummed++;
  1127. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1128. } else {
  1129. skb_checksum_none_assert(skb);
  1130. }
  1131. skb->dev = adapter->netdev;
  1132. buffer->skb = NULL;
  1133. return skb;
  1134. }
  1135. static int
  1136. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb,
  1137. u16 *vlan_tag)
  1138. {
  1139. struct ethhdr *eth_hdr;
  1140. if (!__vlan_get_tag(skb, vlan_tag)) {
  1141. eth_hdr = (struct ethhdr *) skb->data;
  1142. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1143. skb_pull(skb, VLAN_HLEN);
  1144. }
  1145. if (!adapter->pvid)
  1146. return 0;
  1147. if (*vlan_tag == adapter->pvid) {
  1148. /* Outer vlan tag. Packet should follow non-vlan path */
  1149. *vlan_tag = 0xffff;
  1150. return 0;
  1151. }
  1152. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1153. return 0;
  1154. return -EINVAL;
  1155. }
  1156. static struct qlcnic_rx_buffer *
  1157. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1158. struct qlcnic_host_sds_ring *sds_ring,
  1159. int ring, u64 sts_data0)
  1160. {
  1161. struct net_device *netdev = adapter->netdev;
  1162. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1163. struct qlcnic_rx_buffer *buffer;
  1164. struct sk_buff *skb;
  1165. struct qlcnic_host_rds_ring *rds_ring;
  1166. int index, length, cksum, pkt_offset;
  1167. u16 vid = 0xffff;
  1168. if (unlikely(ring >= adapter->max_rds_rings))
  1169. return NULL;
  1170. rds_ring = &recv_ctx->rds_rings[ring];
  1171. index = qlcnic_get_sts_refhandle(sts_data0);
  1172. if (unlikely(index >= rds_ring->num_desc))
  1173. return NULL;
  1174. buffer = &rds_ring->rx_buf_arr[index];
  1175. length = qlcnic_get_sts_totallength(sts_data0);
  1176. cksum = qlcnic_get_sts_status(sts_data0);
  1177. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1178. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1179. if (!skb)
  1180. return buffer;
  1181. if (length > rds_ring->skb_size)
  1182. skb_put(skb, rds_ring->skb_size);
  1183. else
  1184. skb_put(skb, length);
  1185. if (pkt_offset)
  1186. skb_pull(skb, pkt_offset);
  1187. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1188. adapter->stats.rxdropped++;
  1189. dev_kfree_skb(skb);
  1190. return buffer;
  1191. }
  1192. skb->protocol = eth_type_trans(skb, netdev);
  1193. if ((vid != 0xffff) && adapter->vlgrp)
  1194. vlan_gro_receive(&sds_ring->napi, adapter->vlgrp, vid, skb);
  1195. else
  1196. napi_gro_receive(&sds_ring->napi, skb);
  1197. adapter->stats.rx_pkts++;
  1198. adapter->stats.rxbytes += length;
  1199. return buffer;
  1200. }
  1201. #define QLC_TCP_HDR_SIZE 20
  1202. #define QLC_TCP_TS_OPTION_SIZE 12
  1203. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1204. static struct qlcnic_rx_buffer *
  1205. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1206. struct qlcnic_host_sds_ring *sds_ring,
  1207. int ring, u64 sts_data0, u64 sts_data1)
  1208. {
  1209. struct net_device *netdev = adapter->netdev;
  1210. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1211. struct qlcnic_rx_buffer *buffer;
  1212. struct sk_buff *skb;
  1213. struct qlcnic_host_rds_ring *rds_ring;
  1214. struct iphdr *iph;
  1215. struct tcphdr *th;
  1216. bool push, timestamp;
  1217. int l2_hdr_offset, l4_hdr_offset;
  1218. int index;
  1219. u16 lro_length, length, data_offset;
  1220. u32 seq_number;
  1221. u16 vid = 0xffff;
  1222. if (unlikely(ring > adapter->max_rds_rings))
  1223. return NULL;
  1224. rds_ring = &recv_ctx->rds_rings[ring];
  1225. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1226. if (unlikely(index > rds_ring->num_desc))
  1227. return NULL;
  1228. buffer = &rds_ring->rx_buf_arr[index];
  1229. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1230. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1231. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1232. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1233. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1234. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1235. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1236. if (!skb)
  1237. return buffer;
  1238. if (timestamp)
  1239. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1240. else
  1241. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1242. skb_put(skb, lro_length + data_offset);
  1243. skb_pull(skb, l2_hdr_offset);
  1244. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1245. adapter->stats.rxdropped++;
  1246. dev_kfree_skb(skb);
  1247. return buffer;
  1248. }
  1249. skb->protocol = eth_type_trans(skb, netdev);
  1250. iph = (struct iphdr *)skb->data;
  1251. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1252. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1253. iph->tot_len = htons(length);
  1254. iph->check = 0;
  1255. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1256. th->psh = push;
  1257. th->seq = htonl(seq_number);
  1258. length = skb->len;
  1259. if ((vid != 0xffff) && adapter->vlgrp)
  1260. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vid);
  1261. else
  1262. netif_receive_skb(skb);
  1263. adapter->stats.lro_pkts++;
  1264. adapter->stats.lrobytes += length;
  1265. return buffer;
  1266. }
  1267. int
  1268. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1269. {
  1270. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1271. struct list_head *cur;
  1272. struct status_desc *desc;
  1273. struct qlcnic_rx_buffer *rxbuf;
  1274. u64 sts_data0, sts_data1;
  1275. int count = 0;
  1276. int opcode, ring, desc_cnt;
  1277. u32 consumer = sds_ring->consumer;
  1278. while (count < max) {
  1279. desc = &sds_ring->desc_head[consumer];
  1280. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1281. if (!(sts_data0 & STATUS_OWNER_HOST))
  1282. break;
  1283. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1284. opcode = qlcnic_get_sts_opcode(sts_data0);
  1285. switch (opcode) {
  1286. case QLCNIC_RXPKT_DESC:
  1287. case QLCNIC_OLD_RXPKT_DESC:
  1288. case QLCNIC_SYN_OFFLOAD:
  1289. ring = qlcnic_get_sts_type(sts_data0);
  1290. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1291. ring, sts_data0);
  1292. break;
  1293. case QLCNIC_LRO_DESC:
  1294. ring = qlcnic_get_lro_sts_type(sts_data0);
  1295. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1296. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1297. ring, sts_data0, sts_data1);
  1298. break;
  1299. case QLCNIC_RESPONSE_DESC:
  1300. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1301. default:
  1302. goto skip;
  1303. }
  1304. WARN_ON(desc_cnt > 1);
  1305. if (likely(rxbuf))
  1306. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1307. else
  1308. adapter->stats.null_rxbuf++;
  1309. skip:
  1310. for (; desc_cnt > 0; desc_cnt--) {
  1311. desc = &sds_ring->desc_head[consumer];
  1312. desc->status_desc_data[0] =
  1313. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1314. consumer = get_next_index(consumer, sds_ring->num_desc);
  1315. }
  1316. count++;
  1317. }
  1318. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1319. struct qlcnic_host_rds_ring *rds_ring =
  1320. &adapter->recv_ctx.rds_rings[ring];
  1321. if (!list_empty(&sds_ring->free_list[ring])) {
  1322. list_for_each(cur, &sds_ring->free_list[ring]) {
  1323. rxbuf = list_entry(cur,
  1324. struct qlcnic_rx_buffer, list);
  1325. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1326. }
  1327. spin_lock(&rds_ring->lock);
  1328. list_splice_tail_init(&sds_ring->free_list[ring],
  1329. &rds_ring->free_list);
  1330. spin_unlock(&rds_ring->lock);
  1331. }
  1332. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1333. }
  1334. if (count) {
  1335. sds_ring->consumer = consumer;
  1336. writel(consumer, sds_ring->crb_sts_consumer);
  1337. }
  1338. return count;
  1339. }
  1340. void
  1341. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1342. struct qlcnic_host_rds_ring *rds_ring)
  1343. {
  1344. struct rcv_desc *pdesc;
  1345. struct qlcnic_rx_buffer *buffer;
  1346. int producer, count = 0;
  1347. struct list_head *head;
  1348. producer = rds_ring->producer;
  1349. head = &rds_ring->free_list;
  1350. while (!list_empty(head)) {
  1351. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1352. if (!buffer->skb) {
  1353. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1354. break;
  1355. }
  1356. count++;
  1357. list_del(&buffer->list);
  1358. /* make a rcv descriptor */
  1359. pdesc = &rds_ring->desc_head[producer];
  1360. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1361. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1362. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1363. producer = get_next_index(producer, rds_ring->num_desc);
  1364. }
  1365. if (count) {
  1366. rds_ring->producer = producer;
  1367. writel((producer-1) & (rds_ring->num_desc-1),
  1368. rds_ring->crb_rcv_producer);
  1369. }
  1370. }
  1371. static void
  1372. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1373. struct qlcnic_host_rds_ring *rds_ring)
  1374. {
  1375. struct rcv_desc *pdesc;
  1376. struct qlcnic_rx_buffer *buffer;
  1377. int producer, count = 0;
  1378. struct list_head *head;
  1379. if (!spin_trylock(&rds_ring->lock))
  1380. return;
  1381. producer = rds_ring->producer;
  1382. head = &rds_ring->free_list;
  1383. while (!list_empty(head)) {
  1384. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1385. if (!buffer->skb) {
  1386. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1387. break;
  1388. }
  1389. count++;
  1390. list_del(&buffer->list);
  1391. /* make a rcv descriptor */
  1392. pdesc = &rds_ring->desc_head[producer];
  1393. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1394. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1395. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1396. producer = get_next_index(producer, rds_ring->num_desc);
  1397. }
  1398. if (count) {
  1399. rds_ring->producer = producer;
  1400. writel((producer - 1) & (rds_ring->num_desc - 1),
  1401. rds_ring->crb_rcv_producer);
  1402. }
  1403. spin_unlock(&rds_ring->lock);
  1404. }
  1405. void
  1406. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1407. u8 alt_mac, u8 *mac)
  1408. {
  1409. u32 mac_low, mac_high;
  1410. int i;
  1411. mac_low = QLCRD32(adapter, off1);
  1412. mac_high = QLCRD32(adapter, off2);
  1413. if (alt_mac) {
  1414. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1415. mac_high >>= 16;
  1416. }
  1417. for (i = 0; i < 2; i++)
  1418. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1419. for (i = 2; i < 6; i++)
  1420. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1421. }