qlcnic_ethtool.c 28 KB

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  1. /*
  2. * QLogic qlcnic NIC Driver
  3. * Copyright (c) 2009-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qlcnic for copyright and licensing details.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/delay.h>
  9. #include <linux/pci.h>
  10. #include <linux/io.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/ethtool.h>
  13. #include "qlcnic.h"
  14. struct qlcnic_stats {
  15. char stat_string[ETH_GSTRING_LEN];
  16. int sizeof_stat;
  17. int stat_offset;
  18. };
  19. #define QLC_SIZEOF(m) FIELD_SIZEOF(struct qlcnic_adapter, m)
  20. #define QLC_OFF(m) offsetof(struct qlcnic_adapter, m)
  21. static const struct qlcnic_stats qlcnic_gstrings_stats[] = {
  22. {"xmit_called",
  23. QLC_SIZEOF(stats.xmitcalled), QLC_OFF(stats.xmitcalled)},
  24. {"xmit_finished",
  25. QLC_SIZEOF(stats.xmitfinished), QLC_OFF(stats.xmitfinished)},
  26. {"rx_dropped",
  27. QLC_SIZEOF(stats.rxdropped), QLC_OFF(stats.rxdropped)},
  28. {"tx_dropped",
  29. QLC_SIZEOF(stats.txdropped), QLC_OFF(stats.txdropped)},
  30. {"csummed",
  31. QLC_SIZEOF(stats.csummed), QLC_OFF(stats.csummed)},
  32. {"rx_pkts",
  33. QLC_SIZEOF(stats.rx_pkts), QLC_OFF(stats.rx_pkts)},
  34. {"lro_pkts",
  35. QLC_SIZEOF(stats.lro_pkts), QLC_OFF(stats.lro_pkts)},
  36. {"rx_bytes",
  37. QLC_SIZEOF(stats.rxbytes), QLC_OFF(stats.rxbytes)},
  38. {"tx_bytes",
  39. QLC_SIZEOF(stats.txbytes), QLC_OFF(stats.txbytes)},
  40. {"lrobytes",
  41. QLC_SIZEOF(stats.lrobytes), QLC_OFF(stats.lrobytes)},
  42. {"lso_frames",
  43. QLC_SIZEOF(stats.lso_frames), QLC_OFF(stats.lso_frames)},
  44. {"xmit_on",
  45. QLC_SIZEOF(stats.xmit_on), QLC_OFF(stats.xmit_on)},
  46. {"xmit_off",
  47. QLC_SIZEOF(stats.xmit_off), QLC_OFF(stats.xmit_off)},
  48. {"skb_alloc_failure", QLC_SIZEOF(stats.skb_alloc_failure),
  49. QLC_OFF(stats.skb_alloc_failure)},
  50. {"null rxbuf",
  51. QLC_SIZEOF(stats.null_rxbuf), QLC_OFF(stats.null_rxbuf)},
  52. {"rx dma map error", QLC_SIZEOF(stats.rx_dma_map_error),
  53. QLC_OFF(stats.rx_dma_map_error)},
  54. {"tx dma map error", QLC_SIZEOF(stats.tx_dma_map_error),
  55. QLC_OFF(stats.tx_dma_map_error)},
  56. };
  57. static const char qlcnic_device_gstrings_stats[][ETH_GSTRING_LEN] = {
  58. "rx unicast frames",
  59. "rx multicast frames",
  60. "rx broadcast frames",
  61. "rx dropped frames",
  62. "rx errors",
  63. "rx local frames",
  64. "rx numbytes",
  65. "tx unicast frames",
  66. "tx multicast frames",
  67. "tx broadcast frames",
  68. "tx dropped frames",
  69. "tx errors",
  70. "tx local frames",
  71. "tx numbytes",
  72. };
  73. #define QLCNIC_STATS_LEN ARRAY_SIZE(qlcnic_gstrings_stats)
  74. #define QLCNIC_DEVICE_STATS_LEN ARRAY_SIZE(qlcnic_device_gstrings_stats)
  75. static const char qlcnic_gstrings_test[][ETH_GSTRING_LEN] = {
  76. "Register_Test_on_offline",
  77. "Link_Test_on_offline",
  78. "Interrupt_Test_offline"
  79. };
  80. #define QLCNIC_TEST_LEN ARRAY_SIZE(qlcnic_gstrings_test)
  81. #define QLCNIC_RING_REGS_COUNT 20
  82. #define QLCNIC_RING_REGS_LEN (QLCNIC_RING_REGS_COUNT * sizeof(u32))
  83. #define QLCNIC_MAX_EEPROM_LEN 1024
  84. static const u32 diag_registers[] = {
  85. CRB_CMDPEG_STATE,
  86. CRB_RCVPEG_STATE,
  87. CRB_XG_STATE_P3P,
  88. CRB_FW_CAPABILITIES_1,
  89. ISR_INT_STATE_REG,
  90. QLCNIC_CRB_DRV_ACTIVE,
  91. QLCNIC_CRB_DEV_STATE,
  92. QLCNIC_CRB_DRV_STATE,
  93. QLCNIC_CRB_DRV_SCRATCH,
  94. QLCNIC_CRB_DEV_PARTITION_INFO,
  95. QLCNIC_CRB_DRV_IDC_VER,
  96. QLCNIC_PEG_ALIVE_COUNTER,
  97. QLCNIC_PEG_HALT_STATUS1,
  98. QLCNIC_PEG_HALT_STATUS2,
  99. QLCNIC_CRB_PEG_NET_0+0x3c,
  100. QLCNIC_CRB_PEG_NET_1+0x3c,
  101. QLCNIC_CRB_PEG_NET_2+0x3c,
  102. QLCNIC_CRB_PEG_NET_4+0x3c,
  103. -1
  104. };
  105. #define QLCNIC_MGMT_API_VERSION 2
  106. #define QLCNIC_DEV_INFO_SIZE 1
  107. #define QLCNIC_ETHTOOL_REGS_VER 2
  108. static int qlcnic_get_regs_len(struct net_device *dev)
  109. {
  110. return sizeof(diag_registers) + QLCNIC_RING_REGS_LEN +
  111. QLCNIC_DEV_INFO_SIZE + 1;
  112. }
  113. static int qlcnic_get_eeprom_len(struct net_device *dev)
  114. {
  115. return QLCNIC_FLASH_TOTAL_SIZE;
  116. }
  117. static void
  118. qlcnic_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
  119. {
  120. struct qlcnic_adapter *adapter = netdev_priv(dev);
  121. u32 fw_major, fw_minor, fw_build;
  122. fw_major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  123. fw_minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  124. fw_build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  125. sprintf(drvinfo->fw_version, "%d.%d.%d", fw_major, fw_minor, fw_build);
  126. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  127. strlcpy(drvinfo->driver, qlcnic_driver_name, 32);
  128. strlcpy(drvinfo->version, QLCNIC_LINUX_VERSIONID, 32);
  129. }
  130. static int
  131. qlcnic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  132. {
  133. struct qlcnic_adapter *adapter = netdev_priv(dev);
  134. int check_sfp_module = 0;
  135. u16 pcifn = adapter->ahw.pci_func;
  136. /* read which mode */
  137. if (adapter->ahw.port_type == QLCNIC_GBE) {
  138. ecmd->supported = (SUPPORTED_10baseT_Half |
  139. SUPPORTED_10baseT_Full |
  140. SUPPORTED_100baseT_Half |
  141. SUPPORTED_100baseT_Full |
  142. SUPPORTED_1000baseT_Half |
  143. SUPPORTED_1000baseT_Full);
  144. ecmd->advertising = (ADVERTISED_100baseT_Half |
  145. ADVERTISED_100baseT_Full |
  146. ADVERTISED_1000baseT_Half |
  147. ADVERTISED_1000baseT_Full);
  148. ecmd->speed = adapter->link_speed;
  149. ecmd->duplex = adapter->link_duplex;
  150. ecmd->autoneg = adapter->link_autoneg;
  151. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  152. u32 val;
  153. val = QLCRD32(adapter, QLCNIC_PORT_MODE_ADDR);
  154. if (val == QLCNIC_PORT_MODE_802_3_AP) {
  155. ecmd->supported = SUPPORTED_1000baseT_Full;
  156. ecmd->advertising = ADVERTISED_1000baseT_Full;
  157. } else {
  158. ecmd->supported = SUPPORTED_10000baseT_Full;
  159. ecmd->advertising = ADVERTISED_10000baseT_Full;
  160. }
  161. if (netif_running(dev) && adapter->has_link_events) {
  162. ecmd->speed = adapter->link_speed;
  163. ecmd->autoneg = adapter->link_autoneg;
  164. ecmd->duplex = adapter->link_duplex;
  165. goto skip;
  166. }
  167. val = QLCRD32(adapter, P3P_LINK_SPEED_REG(pcifn));
  168. ecmd->speed = P3P_LINK_SPEED_MHZ *
  169. P3P_LINK_SPEED_VAL(pcifn, val);
  170. ecmd->duplex = DUPLEX_FULL;
  171. ecmd->autoneg = AUTONEG_DISABLE;
  172. } else
  173. return -EIO;
  174. skip:
  175. ecmd->phy_address = adapter->physical_port;
  176. ecmd->transceiver = XCVR_EXTERNAL;
  177. switch (adapter->ahw.board_type) {
  178. case QLCNIC_BRDTYPE_P3P_REF_QG:
  179. case QLCNIC_BRDTYPE_P3P_4_GB:
  180. case QLCNIC_BRDTYPE_P3P_4_GB_MM:
  181. ecmd->supported |= SUPPORTED_Autoneg;
  182. ecmd->advertising |= ADVERTISED_Autoneg;
  183. case QLCNIC_BRDTYPE_P3P_10G_CX4:
  184. case QLCNIC_BRDTYPE_P3P_10G_CX4_LP:
  185. case QLCNIC_BRDTYPE_P3P_10000_BASE_T:
  186. ecmd->supported |= SUPPORTED_TP;
  187. ecmd->advertising |= ADVERTISED_TP;
  188. ecmd->port = PORT_TP;
  189. ecmd->autoneg = adapter->link_autoneg;
  190. break;
  191. case QLCNIC_BRDTYPE_P3P_IMEZ:
  192. case QLCNIC_BRDTYPE_P3P_XG_LOM:
  193. case QLCNIC_BRDTYPE_P3P_HMEZ:
  194. ecmd->supported |= SUPPORTED_MII;
  195. ecmd->advertising |= ADVERTISED_MII;
  196. ecmd->port = PORT_MII;
  197. ecmd->autoneg = AUTONEG_DISABLE;
  198. break;
  199. case QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS:
  200. case QLCNIC_BRDTYPE_P3P_10G_SFP_CT:
  201. case QLCNIC_BRDTYPE_P3P_10G_SFP_QT:
  202. ecmd->advertising |= ADVERTISED_TP;
  203. ecmd->supported |= SUPPORTED_TP;
  204. check_sfp_module = netif_running(dev) &&
  205. adapter->has_link_events;
  206. case QLCNIC_BRDTYPE_P3P_10G_XFP:
  207. ecmd->supported |= SUPPORTED_FIBRE;
  208. ecmd->advertising |= ADVERTISED_FIBRE;
  209. ecmd->port = PORT_FIBRE;
  210. ecmd->autoneg = AUTONEG_DISABLE;
  211. break;
  212. case QLCNIC_BRDTYPE_P3P_10G_TP:
  213. if (adapter->ahw.port_type == QLCNIC_XGBE) {
  214. ecmd->autoneg = AUTONEG_DISABLE;
  215. ecmd->supported |= (SUPPORTED_FIBRE | SUPPORTED_TP);
  216. ecmd->advertising |=
  217. (ADVERTISED_FIBRE | ADVERTISED_TP);
  218. ecmd->port = PORT_FIBRE;
  219. check_sfp_module = netif_running(dev) &&
  220. adapter->has_link_events;
  221. } else {
  222. ecmd->autoneg = AUTONEG_ENABLE;
  223. ecmd->supported |= (SUPPORTED_TP | SUPPORTED_Autoneg);
  224. ecmd->advertising |=
  225. (ADVERTISED_TP | ADVERTISED_Autoneg);
  226. ecmd->port = PORT_TP;
  227. }
  228. break;
  229. default:
  230. dev_err(&adapter->pdev->dev, "Unsupported board model %d\n",
  231. adapter->ahw.board_type);
  232. return -EIO;
  233. }
  234. if (check_sfp_module) {
  235. switch (adapter->module_type) {
  236. case LINKEVENT_MODULE_OPTICAL_UNKNOWN:
  237. case LINKEVENT_MODULE_OPTICAL_SRLR:
  238. case LINKEVENT_MODULE_OPTICAL_LRM:
  239. case LINKEVENT_MODULE_OPTICAL_SFP_1G:
  240. ecmd->port = PORT_FIBRE;
  241. break;
  242. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE:
  243. case LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN:
  244. case LINKEVENT_MODULE_TWINAX:
  245. ecmd->port = PORT_TP;
  246. break;
  247. default:
  248. ecmd->port = PORT_OTHER;
  249. }
  250. }
  251. return 0;
  252. }
  253. static int
  254. qlcnic_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
  255. {
  256. struct qlcnic_adapter *adapter = netdev_priv(dev);
  257. __u32 status;
  258. /* read which mode */
  259. if (adapter->ahw.port_type == QLCNIC_GBE) {
  260. /* autonegotiation */
  261. if (qlcnic_fw_cmd_set_phy(adapter,
  262. QLCNIC_NIU_GB_MII_MGMT_ADDR_AUTONEG,
  263. ecmd->autoneg) != 0)
  264. return -EIO;
  265. else
  266. adapter->link_autoneg = ecmd->autoneg;
  267. if (qlcnic_fw_cmd_query_phy(adapter,
  268. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  269. &status) != 0)
  270. return -EIO;
  271. switch (ecmd->speed) {
  272. case SPEED_10:
  273. qlcnic_set_phy_speed(status, 0);
  274. break;
  275. case SPEED_100:
  276. qlcnic_set_phy_speed(status, 1);
  277. break;
  278. case SPEED_1000:
  279. qlcnic_set_phy_speed(status, 2);
  280. break;
  281. }
  282. if (ecmd->duplex == DUPLEX_HALF)
  283. qlcnic_clear_phy_duplex(status);
  284. if (ecmd->duplex == DUPLEX_FULL)
  285. qlcnic_set_phy_duplex(status);
  286. if (qlcnic_fw_cmd_set_phy(adapter,
  287. QLCNIC_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
  288. *((int *)&status)) != 0)
  289. return -EIO;
  290. else {
  291. adapter->link_speed = ecmd->speed;
  292. adapter->link_duplex = ecmd->duplex;
  293. }
  294. } else
  295. return -EOPNOTSUPP;
  296. if (!netif_running(dev))
  297. return 0;
  298. dev->netdev_ops->ndo_stop(dev);
  299. return dev->netdev_ops->ndo_open(dev);
  300. }
  301. static void
  302. qlcnic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
  303. {
  304. struct qlcnic_adapter *adapter = netdev_priv(dev);
  305. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  306. struct qlcnic_host_sds_ring *sds_ring;
  307. u32 *regs_buff = p;
  308. int ring, i = 0, j = 0;
  309. memset(p, 0, qlcnic_get_regs_len(dev));
  310. regs->version = (QLCNIC_ETHTOOL_REGS_VER << 24) |
  311. (adapter->ahw.revision_id << 16) | (adapter->pdev)->device;
  312. regs_buff[0] = (0xcafe0000 | (QLCNIC_DEV_INFO_SIZE & 0xffff));
  313. regs_buff[1] = QLCNIC_MGMT_API_VERSION;
  314. for (i = QLCNIC_DEV_INFO_SIZE + 1; diag_registers[j] != -1; j++, i++)
  315. regs_buff[i] = QLCRD32(adapter, diag_registers[j]);
  316. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  317. return;
  318. regs_buff[i++] = 0xFFEFCDAB; /* Marker btw regs and ring count*/
  319. regs_buff[i++] = 1; /* No. of tx ring */
  320. regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
  321. regs_buff[i++] = readl(adapter->tx_ring->crb_cmd_producer);
  322. regs_buff[i++] = 2; /* No. of rx ring */
  323. regs_buff[i++] = readl(recv_ctx->rds_rings[0].crb_rcv_producer);
  324. regs_buff[i++] = readl(recv_ctx->rds_rings[1].crb_rcv_producer);
  325. regs_buff[i++] = adapter->max_sds_rings;
  326. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  327. sds_ring = &(recv_ctx->sds_rings[ring]);
  328. regs_buff[i++] = readl(sds_ring->crb_sts_consumer);
  329. }
  330. }
  331. static u32 qlcnic_test_link(struct net_device *dev)
  332. {
  333. struct qlcnic_adapter *adapter = netdev_priv(dev);
  334. u32 val;
  335. val = QLCRD32(adapter, CRB_XG_STATE_P3P);
  336. val = XG_LINK_STATE_P3P(adapter->ahw.pci_func, val);
  337. return (val == XG_LINK_UP_P3P) ? 0 : 1;
  338. }
  339. static int
  340. qlcnic_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
  341. u8 *bytes)
  342. {
  343. struct qlcnic_adapter *adapter = netdev_priv(dev);
  344. int offset;
  345. int ret;
  346. if (eeprom->len == 0)
  347. return -EINVAL;
  348. eeprom->magic = (adapter->pdev)->vendor |
  349. ((adapter->pdev)->device << 16);
  350. offset = eeprom->offset;
  351. ret = qlcnic_rom_fast_read_words(adapter, offset, bytes,
  352. eeprom->len);
  353. if (ret < 0)
  354. return ret;
  355. return 0;
  356. }
  357. static void
  358. qlcnic_get_ringparam(struct net_device *dev,
  359. struct ethtool_ringparam *ring)
  360. {
  361. struct qlcnic_adapter *adapter = netdev_priv(dev);
  362. ring->rx_pending = adapter->num_rxd;
  363. ring->rx_jumbo_pending = adapter->num_jumbo_rxd;
  364. ring->tx_pending = adapter->num_txd;
  365. ring->rx_max_pending = adapter->max_rxd;
  366. ring->rx_jumbo_max_pending = adapter->max_jumbo_rxd;
  367. ring->tx_max_pending = MAX_CMD_DESCRIPTORS;
  368. ring->rx_mini_max_pending = 0;
  369. ring->rx_mini_pending = 0;
  370. }
  371. static u32
  372. qlcnic_validate_ringparam(u32 val, u32 min, u32 max, char *r_name)
  373. {
  374. u32 num_desc;
  375. num_desc = max(val, min);
  376. num_desc = min(num_desc, max);
  377. num_desc = roundup_pow_of_two(num_desc);
  378. if (val != num_desc) {
  379. printk(KERN_INFO "%s: setting %s ring size %d instead of %d\n",
  380. qlcnic_driver_name, r_name, num_desc, val);
  381. }
  382. return num_desc;
  383. }
  384. static int
  385. qlcnic_set_ringparam(struct net_device *dev,
  386. struct ethtool_ringparam *ring)
  387. {
  388. struct qlcnic_adapter *adapter = netdev_priv(dev);
  389. u16 num_rxd, num_jumbo_rxd, num_txd;
  390. if (ring->rx_mini_pending)
  391. return -EOPNOTSUPP;
  392. num_rxd = qlcnic_validate_ringparam(ring->rx_pending,
  393. MIN_RCV_DESCRIPTORS, adapter->max_rxd, "rx");
  394. num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending,
  395. MIN_JUMBO_DESCRIPTORS, adapter->max_jumbo_rxd,
  396. "rx jumbo");
  397. num_txd = qlcnic_validate_ringparam(ring->tx_pending,
  398. MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx");
  399. if (num_rxd == adapter->num_rxd && num_txd == adapter->num_txd &&
  400. num_jumbo_rxd == adapter->num_jumbo_rxd)
  401. return 0;
  402. adapter->num_rxd = num_rxd;
  403. adapter->num_jumbo_rxd = num_jumbo_rxd;
  404. adapter->num_txd = num_txd;
  405. return qlcnic_reset_context(adapter);
  406. }
  407. static void
  408. qlcnic_get_pauseparam(struct net_device *netdev,
  409. struct ethtool_pauseparam *pause)
  410. {
  411. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  412. int port = adapter->physical_port;
  413. __u32 val;
  414. if (adapter->ahw.port_type == QLCNIC_GBE) {
  415. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  416. return;
  417. /* get flow control settings */
  418. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  419. pause->rx_pause = qlcnic_gb_get_rx_flowctl(val);
  420. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  421. switch (port) {
  422. case 0:
  423. pause->tx_pause = !(qlcnic_gb_get_gb0_mask(val));
  424. break;
  425. case 1:
  426. pause->tx_pause = !(qlcnic_gb_get_gb1_mask(val));
  427. break;
  428. case 2:
  429. pause->tx_pause = !(qlcnic_gb_get_gb2_mask(val));
  430. break;
  431. case 3:
  432. default:
  433. pause->tx_pause = !(qlcnic_gb_get_gb3_mask(val));
  434. break;
  435. }
  436. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  437. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  438. return;
  439. pause->rx_pause = 1;
  440. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  441. if (port == 0)
  442. pause->tx_pause = !(qlcnic_xg_get_xg0_mask(val));
  443. else
  444. pause->tx_pause = !(qlcnic_xg_get_xg1_mask(val));
  445. } else {
  446. dev_err(&netdev->dev, "Unknown board type: %x\n",
  447. adapter->ahw.port_type);
  448. }
  449. }
  450. static int
  451. qlcnic_set_pauseparam(struct net_device *netdev,
  452. struct ethtool_pauseparam *pause)
  453. {
  454. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  455. int port = adapter->physical_port;
  456. __u32 val;
  457. /* read mode */
  458. if (adapter->ahw.port_type == QLCNIC_GBE) {
  459. if ((port < 0) || (port > QLCNIC_NIU_MAX_GBE_PORTS))
  460. return -EIO;
  461. /* set flow control */
  462. val = QLCRD32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port));
  463. if (pause->rx_pause)
  464. qlcnic_gb_rx_flowctl(val);
  465. else
  466. qlcnic_gb_unset_rx_flowctl(val);
  467. QLCWR32(adapter, QLCNIC_NIU_GB_MAC_CONFIG_0(port),
  468. val);
  469. /* set autoneg */
  470. val = QLCRD32(adapter, QLCNIC_NIU_GB_PAUSE_CTL);
  471. switch (port) {
  472. case 0:
  473. if (pause->tx_pause)
  474. qlcnic_gb_unset_gb0_mask(val);
  475. else
  476. qlcnic_gb_set_gb0_mask(val);
  477. break;
  478. case 1:
  479. if (pause->tx_pause)
  480. qlcnic_gb_unset_gb1_mask(val);
  481. else
  482. qlcnic_gb_set_gb1_mask(val);
  483. break;
  484. case 2:
  485. if (pause->tx_pause)
  486. qlcnic_gb_unset_gb2_mask(val);
  487. else
  488. qlcnic_gb_set_gb2_mask(val);
  489. break;
  490. case 3:
  491. default:
  492. if (pause->tx_pause)
  493. qlcnic_gb_unset_gb3_mask(val);
  494. else
  495. qlcnic_gb_set_gb3_mask(val);
  496. break;
  497. }
  498. QLCWR32(adapter, QLCNIC_NIU_GB_PAUSE_CTL, val);
  499. } else if (adapter->ahw.port_type == QLCNIC_XGBE) {
  500. if (!pause->rx_pause || pause->autoneg)
  501. return -EOPNOTSUPP;
  502. if ((port < 0) || (port > QLCNIC_NIU_MAX_XG_PORTS))
  503. return -EIO;
  504. val = QLCRD32(adapter, QLCNIC_NIU_XG_PAUSE_CTL);
  505. if (port == 0) {
  506. if (pause->tx_pause)
  507. qlcnic_xg_unset_xg0_mask(val);
  508. else
  509. qlcnic_xg_set_xg0_mask(val);
  510. } else {
  511. if (pause->tx_pause)
  512. qlcnic_xg_unset_xg1_mask(val);
  513. else
  514. qlcnic_xg_set_xg1_mask(val);
  515. }
  516. QLCWR32(adapter, QLCNIC_NIU_XG_PAUSE_CTL, val);
  517. } else {
  518. dev_err(&netdev->dev, "Unknown board type: %x\n",
  519. adapter->ahw.port_type);
  520. }
  521. return 0;
  522. }
  523. static int qlcnic_reg_test(struct net_device *dev)
  524. {
  525. struct qlcnic_adapter *adapter = netdev_priv(dev);
  526. u32 data_read;
  527. data_read = QLCRD32(adapter, QLCNIC_PCIX_PH_REG(0));
  528. if ((data_read & 0xffff) != adapter->pdev->vendor)
  529. return 1;
  530. return 0;
  531. }
  532. static int qlcnic_get_sset_count(struct net_device *dev, int sset)
  533. {
  534. struct qlcnic_adapter *adapter = netdev_priv(dev);
  535. switch (sset) {
  536. case ETH_SS_TEST:
  537. return QLCNIC_TEST_LEN;
  538. case ETH_SS_STATS:
  539. if (adapter->flags & QLCNIC_ESWITCH_ENABLED)
  540. return QLCNIC_STATS_LEN + QLCNIC_DEVICE_STATS_LEN;
  541. return QLCNIC_STATS_LEN;
  542. default:
  543. return -EOPNOTSUPP;
  544. }
  545. }
  546. static int qlcnic_irq_test(struct net_device *netdev)
  547. {
  548. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  549. int max_sds_rings = adapter->max_sds_rings;
  550. int ret;
  551. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  552. return -EIO;
  553. ret = qlcnic_diag_alloc_res(netdev, QLCNIC_INTERRUPT_TEST);
  554. if (ret)
  555. goto clear_it;
  556. adapter->diag_cnt = 0;
  557. ret = qlcnic_issue_cmd(adapter, adapter->ahw.pci_func,
  558. adapter->fw_hal_version, adapter->portnum,
  559. 0, 0, 0x00000011);
  560. if (ret)
  561. goto done;
  562. msleep(10);
  563. ret = !adapter->diag_cnt;
  564. done:
  565. qlcnic_diag_free_res(netdev, max_sds_rings);
  566. clear_it:
  567. adapter->max_sds_rings = max_sds_rings;
  568. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  569. return ret;
  570. }
  571. static void
  572. qlcnic_diag_test(struct net_device *dev, struct ethtool_test *eth_test,
  573. u64 *data)
  574. {
  575. memset(data, 0, sizeof(u64) * QLCNIC_TEST_LEN);
  576. data[0] = qlcnic_reg_test(dev);
  577. if (data[0])
  578. eth_test->flags |= ETH_TEST_FL_FAILED;
  579. data[1] = (u64) qlcnic_test_link(dev);
  580. if (data[1])
  581. eth_test->flags |= ETH_TEST_FL_FAILED;
  582. if (eth_test->flags & ETH_TEST_FL_OFFLINE) {
  583. data[2] = qlcnic_irq_test(dev);
  584. if (data[2])
  585. eth_test->flags |= ETH_TEST_FL_FAILED;
  586. }
  587. }
  588. static void
  589. qlcnic_get_strings(struct net_device *dev, u32 stringset, u8 * data)
  590. {
  591. struct qlcnic_adapter *adapter = netdev_priv(dev);
  592. int index, i;
  593. switch (stringset) {
  594. case ETH_SS_TEST:
  595. memcpy(data, *qlcnic_gstrings_test,
  596. QLCNIC_TEST_LEN * ETH_GSTRING_LEN);
  597. break;
  598. case ETH_SS_STATS:
  599. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  600. memcpy(data + index * ETH_GSTRING_LEN,
  601. qlcnic_gstrings_stats[index].stat_string,
  602. ETH_GSTRING_LEN);
  603. }
  604. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  605. return;
  606. for (i = 0; i < QLCNIC_DEVICE_STATS_LEN; index++, i++) {
  607. memcpy(data + index * ETH_GSTRING_LEN,
  608. qlcnic_device_gstrings_stats[i],
  609. ETH_GSTRING_LEN);
  610. }
  611. }
  612. }
  613. #define QLCNIC_FILL_ESWITCH_STATS(VAL1) \
  614. (((VAL1) == QLCNIC_ESW_STATS_NOT_AVAIL) ? 0 : VAL1)
  615. static void
  616. qlcnic_fill_device_stats(int *index, u64 *data,
  617. struct __qlcnic_esw_statistics *stats)
  618. {
  619. int ind = *index;
  620. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->unicast_frames);
  621. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->multicast_frames);
  622. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->broadcast_frames);
  623. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->dropped_frames);
  624. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->errors);
  625. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->local_frames);
  626. data[ind++] = QLCNIC_FILL_ESWITCH_STATS(stats->numbytes);
  627. *index = ind;
  628. }
  629. static void
  630. qlcnic_get_ethtool_stats(struct net_device *dev,
  631. struct ethtool_stats *stats, u64 * data)
  632. {
  633. struct qlcnic_adapter *adapter = netdev_priv(dev);
  634. struct qlcnic_esw_statistics port_stats;
  635. int index, ret;
  636. for (index = 0; index < QLCNIC_STATS_LEN; index++) {
  637. char *p =
  638. (char *)adapter +
  639. qlcnic_gstrings_stats[index].stat_offset;
  640. data[index] =
  641. (qlcnic_gstrings_stats[index].sizeof_stat ==
  642. sizeof(u64)) ? *(u64 *)p:(*(u32 *)p);
  643. }
  644. if (!(adapter->flags & QLCNIC_ESWITCH_ENABLED))
  645. return;
  646. memset(&port_stats, 0, sizeof(struct qlcnic_esw_statistics));
  647. ret = qlcnic_get_port_stats(adapter, adapter->ahw.pci_func,
  648. QLCNIC_QUERY_RX_COUNTER, &port_stats.rx);
  649. if (ret)
  650. return;
  651. qlcnic_fill_device_stats(&index, data, &port_stats.rx);
  652. ret = qlcnic_get_port_stats(adapter, adapter->ahw.pci_func,
  653. QLCNIC_QUERY_TX_COUNTER, &port_stats.tx);
  654. if (ret)
  655. return;
  656. qlcnic_fill_device_stats(&index, data, &port_stats.tx);
  657. }
  658. static int qlcnic_set_tx_csum(struct net_device *dev, u32 data)
  659. {
  660. struct qlcnic_adapter *adapter = netdev_priv(dev);
  661. if ((adapter->flags & QLCNIC_ESWITCH_ENABLED))
  662. return -EOPNOTSUPP;
  663. if (data)
  664. dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
  665. else
  666. dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
  667. return 0;
  668. }
  669. static u32 qlcnic_get_tx_csum(struct net_device *dev)
  670. {
  671. return dev->features & NETIF_F_IP_CSUM;
  672. }
  673. static u32 qlcnic_get_rx_csum(struct net_device *dev)
  674. {
  675. struct qlcnic_adapter *adapter = netdev_priv(dev);
  676. return adapter->rx_csum;
  677. }
  678. static int qlcnic_set_rx_csum(struct net_device *dev, u32 data)
  679. {
  680. struct qlcnic_adapter *adapter = netdev_priv(dev);
  681. if ((adapter->flags & QLCNIC_ESWITCH_ENABLED))
  682. return -EOPNOTSUPP;
  683. if (!!data) {
  684. adapter->rx_csum = !!data;
  685. return 0;
  686. }
  687. if (dev->features & NETIF_F_LRO) {
  688. if (qlcnic_config_hw_lro(adapter, QLCNIC_LRO_DISABLED))
  689. return -EIO;
  690. dev->features &= ~NETIF_F_LRO;
  691. qlcnic_send_lro_cleanup(adapter);
  692. dev_info(&adapter->pdev->dev,
  693. "disabling LRO as rx_csum is off\n");
  694. }
  695. adapter->rx_csum = !!data;
  696. return 0;
  697. }
  698. static u32 qlcnic_get_tso(struct net_device *dev)
  699. {
  700. return (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) != 0;
  701. }
  702. static int qlcnic_set_tso(struct net_device *dev, u32 data)
  703. {
  704. struct qlcnic_adapter *adapter = netdev_priv(dev);
  705. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_TSO))
  706. return -EOPNOTSUPP;
  707. if (data)
  708. dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
  709. else
  710. dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  711. return 0;
  712. }
  713. static int qlcnic_blink_led(struct net_device *dev, u32 val)
  714. {
  715. struct qlcnic_adapter *adapter = netdev_priv(dev);
  716. int max_sds_rings = adapter->max_sds_rings;
  717. int dev_down = 0;
  718. int ret;
  719. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state)) {
  720. dev_down = 1;
  721. if (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
  722. return -EIO;
  723. ret = qlcnic_diag_alloc_res(dev, QLCNIC_LED_TEST);
  724. if (ret) {
  725. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  726. return ret;
  727. }
  728. }
  729. ret = adapter->nic_ops->config_led(adapter, 1, 0xf);
  730. if (ret) {
  731. dev_err(&adapter->pdev->dev,
  732. "Failed to set LED blink state.\n");
  733. goto done;
  734. }
  735. msleep_interruptible(val * 1000);
  736. ret = adapter->nic_ops->config_led(adapter, 0, 0xf);
  737. if (ret) {
  738. dev_err(&adapter->pdev->dev,
  739. "Failed to reset LED blink state.\n");
  740. goto done;
  741. }
  742. done:
  743. if (dev_down) {
  744. qlcnic_diag_free_res(dev, max_sds_rings);
  745. clear_bit(__QLCNIC_RESETTING, &adapter->state);
  746. }
  747. return ret;
  748. }
  749. static void
  750. qlcnic_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  751. {
  752. struct qlcnic_adapter *adapter = netdev_priv(dev);
  753. u32 wol_cfg;
  754. wol->supported = 0;
  755. wol->wolopts = 0;
  756. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  757. if (wol_cfg & (1UL << adapter->portnum))
  758. wol->supported |= WAKE_MAGIC;
  759. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  760. if (wol_cfg & (1UL << adapter->portnum))
  761. wol->wolopts |= WAKE_MAGIC;
  762. }
  763. static int
  764. qlcnic_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  765. {
  766. struct qlcnic_adapter *adapter = netdev_priv(dev);
  767. u32 wol_cfg;
  768. if (wol->wolopts & ~WAKE_MAGIC)
  769. return -EOPNOTSUPP;
  770. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG_NV);
  771. if (!(wol_cfg & (1 << adapter->portnum)))
  772. return -EOPNOTSUPP;
  773. wol_cfg = QLCRD32(adapter, QLCNIC_WOL_CONFIG);
  774. if (wol->wolopts & WAKE_MAGIC)
  775. wol_cfg |= 1UL << adapter->portnum;
  776. else
  777. wol_cfg &= ~(1UL << adapter->portnum);
  778. QLCWR32(adapter, QLCNIC_WOL_CONFIG, wol_cfg);
  779. return 0;
  780. }
  781. /*
  782. * Set the coalescing parameters. Currently only normal is supported.
  783. * If rx_coalesce_usecs == 0 or rx_max_coalesced_frames == 0 then set the
  784. * firmware coalescing to default.
  785. */
  786. static int qlcnic_set_intr_coalesce(struct net_device *netdev,
  787. struct ethtool_coalesce *ethcoal)
  788. {
  789. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  790. if (!test_bit(__QLCNIC_DEV_UP, &adapter->state))
  791. return -EINVAL;
  792. /*
  793. * Return Error if unsupported values or
  794. * unsupported parameters are set.
  795. */
  796. if (ethcoal->rx_coalesce_usecs > 0xffff ||
  797. ethcoal->rx_max_coalesced_frames > 0xffff ||
  798. ethcoal->tx_coalesce_usecs > 0xffff ||
  799. ethcoal->tx_max_coalesced_frames > 0xffff ||
  800. ethcoal->rx_coalesce_usecs_irq ||
  801. ethcoal->rx_max_coalesced_frames_irq ||
  802. ethcoal->tx_coalesce_usecs_irq ||
  803. ethcoal->tx_max_coalesced_frames_irq ||
  804. ethcoal->stats_block_coalesce_usecs ||
  805. ethcoal->use_adaptive_rx_coalesce ||
  806. ethcoal->use_adaptive_tx_coalesce ||
  807. ethcoal->pkt_rate_low ||
  808. ethcoal->rx_coalesce_usecs_low ||
  809. ethcoal->rx_max_coalesced_frames_low ||
  810. ethcoal->tx_coalesce_usecs_low ||
  811. ethcoal->tx_max_coalesced_frames_low ||
  812. ethcoal->pkt_rate_high ||
  813. ethcoal->rx_coalesce_usecs_high ||
  814. ethcoal->rx_max_coalesced_frames_high ||
  815. ethcoal->tx_coalesce_usecs_high ||
  816. ethcoal->tx_max_coalesced_frames_high)
  817. return -EINVAL;
  818. if (!ethcoal->rx_coalesce_usecs ||
  819. !ethcoal->rx_max_coalesced_frames) {
  820. adapter->coal.flags = QLCNIC_INTR_DEFAULT;
  821. adapter->coal.normal.data.rx_time_us =
  822. QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US;
  823. adapter->coal.normal.data.rx_packets =
  824. QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS;
  825. } else {
  826. adapter->coal.flags = 0;
  827. adapter->coal.normal.data.rx_time_us =
  828. ethcoal->rx_coalesce_usecs;
  829. adapter->coal.normal.data.rx_packets =
  830. ethcoal->rx_max_coalesced_frames;
  831. }
  832. adapter->coal.normal.data.tx_time_us = ethcoal->tx_coalesce_usecs;
  833. adapter->coal.normal.data.tx_packets =
  834. ethcoal->tx_max_coalesced_frames;
  835. qlcnic_config_intr_coalesce(adapter);
  836. return 0;
  837. }
  838. static int qlcnic_get_intr_coalesce(struct net_device *netdev,
  839. struct ethtool_coalesce *ethcoal)
  840. {
  841. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  842. if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC)
  843. return -EINVAL;
  844. ethcoal->rx_coalesce_usecs = adapter->coal.normal.data.rx_time_us;
  845. ethcoal->tx_coalesce_usecs = adapter->coal.normal.data.tx_time_us;
  846. ethcoal->rx_max_coalesced_frames =
  847. adapter->coal.normal.data.rx_packets;
  848. ethcoal->tx_max_coalesced_frames =
  849. adapter->coal.normal.data.tx_packets;
  850. return 0;
  851. }
  852. static int qlcnic_set_flags(struct net_device *netdev, u32 data)
  853. {
  854. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  855. int hw_lro;
  856. if (data & ~ETH_FLAG_LRO)
  857. return -EINVAL;
  858. if (!(adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO))
  859. return -EINVAL;
  860. if (!adapter->rx_csum) {
  861. dev_info(&adapter->pdev->dev, "rx csum is off, "
  862. "cannot toggle lro\n");
  863. return -EINVAL;
  864. }
  865. if ((data & ETH_FLAG_LRO) && (netdev->features & NETIF_F_LRO))
  866. return 0;
  867. if (data & ETH_FLAG_LRO) {
  868. hw_lro = QLCNIC_LRO_ENABLED;
  869. netdev->features |= NETIF_F_LRO;
  870. } else {
  871. hw_lro = 0;
  872. netdev->features &= ~NETIF_F_LRO;
  873. }
  874. if (qlcnic_config_hw_lro(adapter, hw_lro))
  875. return -EIO;
  876. if ((hw_lro == 0) && qlcnic_send_lro_cleanup(adapter))
  877. return -EIO;
  878. return 0;
  879. }
  880. static u32 qlcnic_get_msglevel(struct net_device *netdev)
  881. {
  882. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  883. return adapter->msg_enable;
  884. }
  885. static void qlcnic_set_msglevel(struct net_device *netdev, u32 msglvl)
  886. {
  887. struct qlcnic_adapter *adapter = netdev_priv(netdev);
  888. adapter->msg_enable = msglvl;
  889. }
  890. const struct ethtool_ops qlcnic_ethtool_ops = {
  891. .get_settings = qlcnic_get_settings,
  892. .set_settings = qlcnic_set_settings,
  893. .get_drvinfo = qlcnic_get_drvinfo,
  894. .get_regs_len = qlcnic_get_regs_len,
  895. .get_regs = qlcnic_get_regs,
  896. .get_link = ethtool_op_get_link,
  897. .get_eeprom_len = qlcnic_get_eeprom_len,
  898. .get_eeprom = qlcnic_get_eeprom,
  899. .get_ringparam = qlcnic_get_ringparam,
  900. .set_ringparam = qlcnic_set_ringparam,
  901. .get_pauseparam = qlcnic_get_pauseparam,
  902. .set_pauseparam = qlcnic_set_pauseparam,
  903. .get_tx_csum = qlcnic_get_tx_csum,
  904. .set_tx_csum = qlcnic_set_tx_csum,
  905. .set_sg = ethtool_op_set_sg,
  906. .get_tso = qlcnic_get_tso,
  907. .set_tso = qlcnic_set_tso,
  908. .get_wol = qlcnic_get_wol,
  909. .set_wol = qlcnic_set_wol,
  910. .self_test = qlcnic_diag_test,
  911. .get_strings = qlcnic_get_strings,
  912. .get_ethtool_stats = qlcnic_get_ethtool_stats,
  913. .get_sset_count = qlcnic_get_sset_count,
  914. .get_rx_csum = qlcnic_get_rx_csum,
  915. .set_rx_csum = qlcnic_set_rx_csum,
  916. .get_coalesce = qlcnic_get_intr_coalesce,
  917. .set_coalesce = qlcnic_set_intr_coalesce,
  918. .get_flags = ethtool_op_get_flags,
  919. .set_flags = qlcnic_set_flags,
  920. .phys_id = qlcnic_blink_led,
  921. .set_msglevel = qlcnic_set_msglevel,
  922. .get_msglevel = qlcnic_get_msglevel,
  923. };