vf.c 11 KB

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  1. /*******************************************************************************
  2. Intel 82599 Virtual Function driver
  3. Copyright(c) 1999 - 2010 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "vf.h"
  21. /**
  22. * ixgbevf_start_hw_vf - Prepare hardware for Tx/Rx
  23. * @hw: pointer to hardware structure
  24. *
  25. * Starts the hardware by filling the bus info structure and media type, clears
  26. * all on chip counters, initializes receive address registers, multicast
  27. * table, VLAN filter table, calls routine to set up link and flow control
  28. * settings, and leaves transmit and receive units disabled and uninitialized
  29. **/
  30. static s32 ixgbevf_start_hw_vf(struct ixgbe_hw *hw)
  31. {
  32. /* Clear adapter stopped flag */
  33. hw->adapter_stopped = false;
  34. return 0;
  35. }
  36. /**
  37. * ixgbevf_init_hw_vf - virtual function hardware initialization
  38. * @hw: pointer to hardware structure
  39. *
  40. * Initialize the hardware by resetting the hardware and then starting
  41. * the hardware
  42. **/
  43. static s32 ixgbevf_init_hw_vf(struct ixgbe_hw *hw)
  44. {
  45. s32 status = hw->mac.ops.start_hw(hw);
  46. hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  47. return status;
  48. }
  49. /**
  50. * ixgbevf_reset_hw_vf - Performs hardware reset
  51. * @hw: pointer to hardware structure
  52. *
  53. * Resets the hardware by reseting the transmit and receive units, masks and
  54. * clears all interrupts.
  55. **/
  56. static s32 ixgbevf_reset_hw_vf(struct ixgbe_hw *hw)
  57. {
  58. struct ixgbe_mbx_info *mbx = &hw->mbx;
  59. u32 timeout = IXGBE_VF_INIT_TIMEOUT;
  60. s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
  61. u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
  62. u8 *addr = (u8 *)(&msgbuf[1]);
  63. /* Call adapter stop to disable tx/rx and clear interrupts */
  64. hw->mac.ops.stop_adapter(hw);
  65. IXGBE_WRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
  66. IXGBE_WRITE_FLUSH(hw);
  67. /* we cannot reset while the RSTI / RSTD bits are asserted */
  68. while (!mbx->ops.check_for_rst(hw) && timeout) {
  69. timeout--;
  70. udelay(5);
  71. }
  72. if (!timeout)
  73. return IXGBE_ERR_RESET_FAILED;
  74. /* mailbox timeout can now become active */
  75. mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
  76. msgbuf[0] = IXGBE_VF_RESET;
  77. mbx->ops.write_posted(hw, msgbuf, 1);
  78. msleep(10);
  79. /* set our "perm_addr" based on info provided by PF */
  80. /* also set up the mc_filter_type which is piggy backed
  81. * on the mac address in word 3 */
  82. ret_val = mbx->ops.read_posted(hw, msgbuf, IXGBE_VF_PERMADDR_MSG_LEN);
  83. if (ret_val)
  84. return ret_val;
  85. if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
  86. return IXGBE_ERR_INVALID_MAC_ADDR;
  87. memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
  88. hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
  89. return 0;
  90. }
  91. /**
  92. * ixgbevf_stop_hw_vf - Generic stop Tx/Rx units
  93. * @hw: pointer to hardware structure
  94. *
  95. * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
  96. * disables transmit and receive units. The adapter_stopped flag is used by
  97. * the shared code and drivers to determine if the adapter is in a stopped
  98. * state and should not touch the hardware.
  99. **/
  100. static s32 ixgbevf_stop_hw_vf(struct ixgbe_hw *hw)
  101. {
  102. u32 number_of_queues;
  103. u32 reg_val;
  104. u16 i;
  105. /*
  106. * Set the adapter_stopped flag so other driver functions stop touching
  107. * the hardware
  108. */
  109. hw->adapter_stopped = true;
  110. /* Disable the receive unit by stopped each queue */
  111. number_of_queues = hw->mac.max_rx_queues;
  112. for (i = 0; i < number_of_queues; i++) {
  113. reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i));
  114. if (reg_val & IXGBE_RXDCTL_ENABLE) {
  115. reg_val &= ~IXGBE_RXDCTL_ENABLE;
  116. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
  117. }
  118. }
  119. IXGBE_WRITE_FLUSH(hw);
  120. /* Clear interrupt mask to stop from interrupts being generated */
  121. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
  122. /* Clear any pending interrupts */
  123. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  124. /* Disable the transmit unit. Each queue must be disabled. */
  125. number_of_queues = hw->mac.max_tx_queues;
  126. for (i = 0; i < number_of_queues; i++) {
  127. reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i));
  128. if (reg_val & IXGBE_TXDCTL_ENABLE) {
  129. reg_val &= ~IXGBE_TXDCTL_ENABLE;
  130. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val);
  131. }
  132. }
  133. return 0;
  134. }
  135. /**
  136. * ixgbevf_mta_vector - Determines bit-vector in multicast table to set
  137. * @hw: pointer to hardware structure
  138. * @mc_addr: the multicast address
  139. *
  140. * Extracts the 12 bits, from a multicast address, to determine which
  141. * bit-vector to set in the multicast table. The hardware uses 12 bits, from
  142. * incoming rx multicast addresses, to determine the bit-vector to check in
  143. * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
  144. * by the MO field of the MCSTCTRL. The MO field is set during initialization
  145. * to mc_filter_type.
  146. **/
  147. static s32 ixgbevf_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
  148. {
  149. u32 vector = 0;
  150. switch (hw->mac.mc_filter_type) {
  151. case 0: /* use bits [47:36] of the address */
  152. vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
  153. break;
  154. case 1: /* use bits [46:35] of the address */
  155. vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
  156. break;
  157. case 2: /* use bits [45:34] of the address */
  158. vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
  159. break;
  160. case 3: /* use bits [43:32] of the address */
  161. vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
  162. break;
  163. default: /* Invalid mc_filter_type */
  164. break;
  165. }
  166. /* vector can only be 12-bits or boundary will be exceeded */
  167. vector &= 0xFFF;
  168. return vector;
  169. }
  170. /**
  171. * ixgbevf_get_mac_addr_vf - Read device MAC address
  172. * @hw: pointer to the HW structure
  173. * @mac_addr: pointer to storage for retrieved MAC address
  174. **/
  175. static s32 ixgbevf_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
  176. {
  177. memcpy(mac_addr, hw->mac.perm_addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
  178. return 0;
  179. }
  180. /**
  181. * ixgbevf_set_rar_vf - set device MAC address
  182. * @hw: pointer to hardware structure
  183. * @index: Receive address register to write
  184. * @addr: Address to put into receive address register
  185. * @vmdq: Unused in this implementation
  186. **/
  187. static s32 ixgbevf_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
  188. u32 vmdq)
  189. {
  190. struct ixgbe_mbx_info *mbx = &hw->mbx;
  191. u32 msgbuf[3];
  192. u8 *msg_addr = (u8 *)(&msgbuf[1]);
  193. s32 ret_val;
  194. memset(msgbuf, 0, sizeof(msgbuf));
  195. msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
  196. memcpy(msg_addr, addr, 6);
  197. ret_val = mbx->ops.write_posted(hw, msgbuf, 3);
  198. if (!ret_val)
  199. ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
  200. msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
  201. /* if nacked the address was rejected, use "perm_addr" */
  202. if (!ret_val &&
  203. (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
  204. ixgbevf_get_mac_addr_vf(hw, hw->mac.addr);
  205. return ret_val;
  206. }
  207. /**
  208. * ixgbevf_update_mc_addr_list_vf - Update Multicast addresses
  209. * @hw: pointer to the HW structure
  210. * @netdev: pointer to net device structure
  211. *
  212. * Updates the Multicast Table Array.
  213. **/
  214. static s32 ixgbevf_update_mc_addr_list_vf(struct ixgbe_hw *hw,
  215. struct net_device *netdev)
  216. {
  217. struct netdev_hw_addr *ha;
  218. struct ixgbe_mbx_info *mbx = &hw->mbx;
  219. u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
  220. u16 *vector_list = (u16 *)&msgbuf[1];
  221. u32 cnt, i;
  222. /* Each entry in the list uses 1 16 bit word. We have 30
  223. * 16 bit words available in our HW msg buffer (minus 1 for the
  224. * msg type). That's 30 hash values if we pack 'em right. If
  225. * there are more than 30 MC addresses to add then punt the
  226. * extras for now and then add code to handle more than 30 later.
  227. * It would be unusual for a server to request that many multi-cast
  228. * addresses except for in large enterprise network environments.
  229. */
  230. cnt = netdev_mc_count(netdev);
  231. if (cnt > 30)
  232. cnt = 30;
  233. msgbuf[0] = IXGBE_VF_SET_MULTICAST;
  234. msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
  235. i = 0;
  236. netdev_for_each_mc_addr(ha, netdev) {
  237. if (i == cnt)
  238. break;
  239. vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr);
  240. }
  241. mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE);
  242. return 0;
  243. }
  244. /**
  245. * ixgbevf_set_vfta_vf - Set/Unset vlan filter table address
  246. * @hw: pointer to the HW structure
  247. * @vlan: 12 bit VLAN ID
  248. * @vind: unused by VF drivers
  249. * @vlan_on: if true then set bit, else clear bit
  250. **/
  251. static s32 ixgbevf_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
  252. bool vlan_on)
  253. {
  254. struct ixgbe_mbx_info *mbx = &hw->mbx;
  255. u32 msgbuf[2];
  256. msgbuf[0] = IXGBE_VF_SET_VLAN;
  257. msgbuf[1] = vlan;
  258. /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
  259. msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
  260. return mbx->ops.write_posted(hw, msgbuf, 2);
  261. }
  262. /**
  263. * ixgbevf_setup_mac_link_vf - Setup MAC link settings
  264. * @hw: pointer to hardware structure
  265. * @speed: Unused in this implementation
  266. * @autoneg: Unused in this implementation
  267. * @autoneg_wait_to_complete: Unused in this implementation
  268. *
  269. * Do nothing and return success. VF drivers are not allowed to change
  270. * global settings. Maintained for driver compatibility.
  271. **/
  272. static s32 ixgbevf_setup_mac_link_vf(struct ixgbe_hw *hw,
  273. ixgbe_link_speed speed, bool autoneg,
  274. bool autoneg_wait_to_complete)
  275. {
  276. return 0;
  277. }
  278. /**
  279. * ixgbevf_check_mac_link_vf - Get link/speed status
  280. * @hw: pointer to hardware structure
  281. * @speed: pointer to link speed
  282. * @link_up: true is link is up, false otherwise
  283. * @autoneg_wait_to_complete: true when waiting for completion is needed
  284. *
  285. * Reads the links register to determine if link is up and the current speed
  286. **/
  287. static s32 ixgbevf_check_mac_link_vf(struct ixgbe_hw *hw,
  288. ixgbe_link_speed *speed,
  289. bool *link_up,
  290. bool autoneg_wait_to_complete)
  291. {
  292. u32 links_reg;
  293. if (!(hw->mbx.ops.check_for_rst(hw))) {
  294. *link_up = false;
  295. *speed = 0;
  296. return -1;
  297. }
  298. links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
  299. if (links_reg & IXGBE_LINKS_UP)
  300. *link_up = true;
  301. else
  302. *link_up = false;
  303. if ((links_reg & IXGBE_LINKS_SPEED_82599) ==
  304. IXGBE_LINKS_SPEED_10G_82599)
  305. *speed = IXGBE_LINK_SPEED_10GB_FULL;
  306. else
  307. *speed = IXGBE_LINK_SPEED_1GB_FULL;
  308. return 0;
  309. }
  310. static struct ixgbe_mac_operations ixgbevf_mac_ops = {
  311. .init_hw = ixgbevf_init_hw_vf,
  312. .reset_hw = ixgbevf_reset_hw_vf,
  313. .start_hw = ixgbevf_start_hw_vf,
  314. .get_mac_addr = ixgbevf_get_mac_addr_vf,
  315. .stop_adapter = ixgbevf_stop_hw_vf,
  316. .setup_link = ixgbevf_setup_mac_link_vf,
  317. .check_link = ixgbevf_check_mac_link_vf,
  318. .set_rar = ixgbevf_set_rar_vf,
  319. .update_mc_addr_list = ixgbevf_update_mc_addr_list_vf,
  320. .set_vfta = ixgbevf_set_vfta_vf,
  321. };
  322. struct ixgbevf_info ixgbevf_82599_vf_info = {
  323. .mac = ixgbe_mac_82599_vf,
  324. .mac_ops = &ixgbevf_mac_ops,
  325. };
  326. struct ixgbevf_info ixgbevf_X540_vf_info = {
  327. .mac = ixgbe_mac_X540_vf,
  328. .mac_ops = &ixgbevf_mac_ops,
  329. };