bnx2x_stats.c 44 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2010 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #include "bnx2x_cmn.h"
  18. #include "bnx2x_stats.h"
  19. /* Statistics */
  20. /****************************************************************************
  21. * Macros
  22. ****************************************************************************/
  23. /* sum[hi:lo] += add[hi:lo] */
  24. #define ADD_64(s_hi, a_hi, s_lo, a_lo) \
  25. do { \
  26. s_lo += a_lo; \
  27. s_hi += a_hi + ((s_lo < a_lo) ? 1 : 0); \
  28. } while (0)
  29. /* difference = minuend - subtrahend */
  30. #define DIFF_64(d_hi, m_hi, s_hi, d_lo, m_lo, s_lo) \
  31. do { \
  32. if (m_lo < s_lo) { \
  33. /* underflow */ \
  34. d_hi = m_hi - s_hi; \
  35. if (d_hi > 0) { \
  36. /* we can 'loan' 1 */ \
  37. d_hi--; \
  38. d_lo = m_lo + (UINT_MAX - s_lo) + 1; \
  39. } else { \
  40. /* m_hi <= s_hi */ \
  41. d_hi = 0; \
  42. d_lo = 0; \
  43. } \
  44. } else { \
  45. /* m_lo >= s_lo */ \
  46. if (m_hi < s_hi) { \
  47. d_hi = 0; \
  48. d_lo = 0; \
  49. } else { \
  50. /* m_hi >= s_hi */ \
  51. d_hi = m_hi - s_hi; \
  52. d_lo = m_lo - s_lo; \
  53. } \
  54. } \
  55. } while (0)
  56. #define UPDATE_STAT64(s, t) \
  57. do { \
  58. DIFF_64(diff.hi, new->s##_hi, pstats->mac_stx[0].t##_hi, \
  59. diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \
  60. pstats->mac_stx[0].t##_hi = new->s##_hi; \
  61. pstats->mac_stx[0].t##_lo = new->s##_lo; \
  62. ADD_64(pstats->mac_stx[1].t##_hi, diff.hi, \
  63. pstats->mac_stx[1].t##_lo, diff.lo); \
  64. } while (0)
  65. #define UPDATE_STAT64_NIG(s, t) \
  66. do { \
  67. DIFF_64(diff.hi, new->s##_hi, old->s##_hi, \
  68. diff.lo, new->s##_lo, old->s##_lo); \
  69. ADD_64(estats->t##_hi, diff.hi, \
  70. estats->t##_lo, diff.lo); \
  71. } while (0)
  72. /* sum[hi:lo] += add */
  73. #define ADD_EXTEND_64(s_hi, s_lo, a) \
  74. do { \
  75. s_lo += a; \
  76. s_hi += (s_lo < a) ? 1 : 0; \
  77. } while (0)
  78. #define UPDATE_EXTEND_STAT(s) \
  79. do { \
  80. ADD_EXTEND_64(pstats->mac_stx[1].s##_hi, \
  81. pstats->mac_stx[1].s##_lo, \
  82. new->s); \
  83. } while (0)
  84. #define UPDATE_EXTEND_TSTAT(s, t) \
  85. do { \
  86. diff = le32_to_cpu(tclient->s) - le32_to_cpu(old_tclient->s); \
  87. old_tclient->s = tclient->s; \
  88. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  89. } while (0)
  90. #define UPDATE_EXTEND_USTAT(s, t) \
  91. do { \
  92. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  93. old_uclient->s = uclient->s; \
  94. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  95. } while (0)
  96. #define UPDATE_EXTEND_XSTAT(s, t) \
  97. do { \
  98. diff = le32_to_cpu(xclient->s) - le32_to_cpu(old_xclient->s); \
  99. old_xclient->s = xclient->s; \
  100. ADD_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  101. } while (0)
  102. /* minuend -= subtrahend */
  103. #define SUB_64(m_hi, s_hi, m_lo, s_lo) \
  104. do { \
  105. DIFF_64(m_hi, m_hi, s_hi, m_lo, m_lo, s_lo); \
  106. } while (0)
  107. /* minuend[hi:lo] -= subtrahend */
  108. #define SUB_EXTEND_64(m_hi, m_lo, s) \
  109. do { \
  110. SUB_64(m_hi, 0, m_lo, s); \
  111. } while (0)
  112. #define SUB_EXTEND_USTAT(s, t) \
  113. do { \
  114. diff = le32_to_cpu(uclient->s) - le32_to_cpu(old_uclient->s); \
  115. SUB_EXTEND_64(qstats->t##_hi, qstats->t##_lo, diff); \
  116. } while (0)
  117. /*
  118. * General service functions
  119. */
  120. static inline long bnx2x_hilo(u32 *hiref)
  121. {
  122. u32 lo = *(hiref + 1);
  123. #if (BITS_PER_LONG == 64)
  124. u32 hi = *hiref;
  125. return HILO_U64(hi, lo);
  126. #else
  127. return lo;
  128. #endif
  129. }
  130. /*
  131. * Init service functions
  132. */
  133. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  134. {
  135. if (!bp->stats_pending) {
  136. struct common_query_ramrod_data ramrod_data = {0};
  137. int i, rc;
  138. spin_lock_bh(&bp->stats_lock);
  139. if (bp->stats_pending) {
  140. spin_unlock_bh(&bp->stats_lock);
  141. return;
  142. }
  143. ramrod_data.drv_counter = bp->stats_counter++;
  144. ramrod_data.collect_port = bp->port.pmf ? 1 : 0;
  145. for_each_eth_queue(bp, i)
  146. ramrod_data.ctr_id_vector |= (1 << bp->fp[i].cl_id);
  147. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  148. ((u32 *)&ramrod_data)[1],
  149. ((u32 *)&ramrod_data)[0], 1);
  150. if (rc == 0)
  151. bp->stats_pending = 1;
  152. spin_unlock_bh(&bp->stats_lock);
  153. }
  154. }
  155. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  156. {
  157. struct dmae_command *dmae = &bp->stats_dmae;
  158. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  159. *stats_comp = DMAE_COMP_VAL;
  160. if (CHIP_REV_IS_SLOW(bp))
  161. return;
  162. /* loader */
  163. if (bp->executer_idx) {
  164. int loader_idx = PMF_DMAE_C(bp);
  165. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  166. true, DMAE_COMP_GRC);
  167. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  168. memset(dmae, 0, sizeof(struct dmae_command));
  169. dmae->opcode = opcode;
  170. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  171. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  172. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  173. sizeof(struct dmae_command) *
  174. (loader_idx + 1)) >> 2;
  175. dmae->dst_addr_hi = 0;
  176. dmae->len = sizeof(struct dmae_command) >> 2;
  177. if (CHIP_IS_E1(bp))
  178. dmae->len--;
  179. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  180. dmae->comp_addr_hi = 0;
  181. dmae->comp_val = 1;
  182. *stats_comp = 0;
  183. bnx2x_post_dmae(bp, dmae, loader_idx);
  184. } else if (bp->func_stx) {
  185. *stats_comp = 0;
  186. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  187. }
  188. }
  189. static int bnx2x_stats_comp(struct bnx2x *bp)
  190. {
  191. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  192. int cnt = 10;
  193. might_sleep();
  194. while (*stats_comp != DMAE_COMP_VAL) {
  195. if (!cnt) {
  196. BNX2X_ERR("timeout waiting for stats finished\n");
  197. break;
  198. }
  199. cnt--;
  200. msleep(1);
  201. }
  202. return 1;
  203. }
  204. /*
  205. * Statistics service functions
  206. */
  207. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  208. {
  209. struct dmae_command *dmae;
  210. u32 opcode;
  211. int loader_idx = PMF_DMAE_C(bp);
  212. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  213. /* sanity */
  214. if (!IS_MF(bp) || !bp->port.pmf || !bp->port.port_stx) {
  215. BNX2X_ERR("BUG!\n");
  216. return;
  217. }
  218. bp->executer_idx = 0;
  219. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  220. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  221. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  222. dmae->src_addr_lo = bp->port.port_stx >> 2;
  223. dmae->src_addr_hi = 0;
  224. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  225. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  226. dmae->len = DMAE_LEN32_RD_MAX;
  227. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  228. dmae->comp_addr_hi = 0;
  229. dmae->comp_val = 1;
  230. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  231. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  232. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  233. dmae->src_addr_hi = 0;
  234. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  235. DMAE_LEN32_RD_MAX * 4);
  236. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  237. DMAE_LEN32_RD_MAX * 4);
  238. dmae->len = (sizeof(struct host_port_stats) >> 2) - DMAE_LEN32_RD_MAX;
  239. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  240. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  241. dmae->comp_val = DMAE_COMP_VAL;
  242. *stats_comp = 0;
  243. bnx2x_hw_stats_post(bp);
  244. bnx2x_stats_comp(bp);
  245. }
  246. static void bnx2x_port_stats_init(struct bnx2x *bp)
  247. {
  248. struct dmae_command *dmae;
  249. int port = BP_PORT(bp);
  250. u32 opcode;
  251. int loader_idx = PMF_DMAE_C(bp);
  252. u32 mac_addr;
  253. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  254. /* sanity */
  255. if (!bp->link_vars.link_up || !bp->port.pmf) {
  256. BNX2X_ERR("BUG!\n");
  257. return;
  258. }
  259. bp->executer_idx = 0;
  260. /* MCP */
  261. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  262. true, DMAE_COMP_GRC);
  263. if (bp->port.port_stx) {
  264. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  265. dmae->opcode = opcode;
  266. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  267. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  268. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  269. dmae->dst_addr_hi = 0;
  270. dmae->len = sizeof(struct host_port_stats) >> 2;
  271. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  272. dmae->comp_addr_hi = 0;
  273. dmae->comp_val = 1;
  274. }
  275. if (bp->func_stx) {
  276. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  277. dmae->opcode = opcode;
  278. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  279. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  280. dmae->dst_addr_lo = bp->func_stx >> 2;
  281. dmae->dst_addr_hi = 0;
  282. dmae->len = sizeof(struct host_func_stats) >> 2;
  283. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  284. dmae->comp_addr_hi = 0;
  285. dmae->comp_val = 1;
  286. }
  287. /* MAC */
  288. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  289. true, DMAE_COMP_GRC);
  290. if (bp->link_vars.mac_type == MAC_TYPE_BMAC) {
  291. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  292. NIG_REG_INGRESS_BMAC0_MEM);
  293. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  294. BIGMAC_REGISTER_TX_STAT_GTBYT */
  295. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  296. dmae->opcode = opcode;
  297. if (CHIP_IS_E1x(bp)) {
  298. dmae->src_addr_lo = (mac_addr +
  299. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  300. dmae->len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  301. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  302. } else {
  303. dmae->src_addr_lo = (mac_addr +
  304. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  305. dmae->len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  306. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  307. }
  308. dmae->src_addr_hi = 0;
  309. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  310. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  311. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  312. dmae->comp_addr_hi = 0;
  313. dmae->comp_val = 1;
  314. /* BIGMAC_REGISTER_RX_STAT_GR64 ..
  315. BIGMAC_REGISTER_RX_STAT_GRIPJ */
  316. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  317. dmae->opcode = opcode;
  318. dmae->src_addr_hi = 0;
  319. if (CHIP_IS_E1x(bp)) {
  320. dmae->src_addr_lo = (mac_addr +
  321. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  322. dmae->dst_addr_lo =
  323. U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  324. offsetof(struct bmac1_stats, rx_stat_gr64_lo));
  325. dmae->dst_addr_hi =
  326. U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  327. offsetof(struct bmac1_stats, rx_stat_gr64_lo));
  328. dmae->len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  329. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  330. } else {
  331. dmae->src_addr_lo =
  332. (mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  333. dmae->dst_addr_lo =
  334. U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  335. offsetof(struct bmac2_stats, rx_stat_gr64_lo));
  336. dmae->dst_addr_hi =
  337. U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  338. offsetof(struct bmac2_stats, rx_stat_gr64_lo));
  339. dmae->len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  340. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  341. }
  342. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  343. dmae->comp_addr_hi = 0;
  344. dmae->comp_val = 1;
  345. } else if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  346. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  347. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  348. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  349. dmae->opcode = opcode;
  350. dmae->src_addr_lo = (mac_addr +
  351. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  352. dmae->src_addr_hi = 0;
  353. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  354. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  355. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  356. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  357. dmae->comp_addr_hi = 0;
  358. dmae->comp_val = 1;
  359. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  360. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  361. dmae->opcode = opcode;
  362. dmae->src_addr_lo = (mac_addr +
  363. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  364. dmae->src_addr_hi = 0;
  365. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  366. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  367. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  368. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  369. dmae->len = 1;
  370. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  371. dmae->comp_addr_hi = 0;
  372. dmae->comp_val = 1;
  373. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  374. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  375. dmae->opcode = opcode;
  376. dmae->src_addr_lo = (mac_addr +
  377. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  378. dmae->src_addr_hi = 0;
  379. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  380. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  381. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  382. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  383. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  384. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  385. dmae->comp_addr_hi = 0;
  386. dmae->comp_val = 1;
  387. }
  388. /* NIG */
  389. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  390. dmae->opcode = opcode;
  391. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  392. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  393. dmae->src_addr_hi = 0;
  394. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  395. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  396. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  397. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  398. dmae->comp_addr_hi = 0;
  399. dmae->comp_val = 1;
  400. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  401. dmae->opcode = opcode;
  402. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  403. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  404. dmae->src_addr_hi = 0;
  405. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  406. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  407. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  408. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  409. dmae->len = (2*sizeof(u32)) >> 2;
  410. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  411. dmae->comp_addr_hi = 0;
  412. dmae->comp_val = 1;
  413. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  414. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  415. true, DMAE_COMP_PCI);
  416. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  417. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  418. dmae->src_addr_hi = 0;
  419. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  420. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  421. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  422. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  423. dmae->len = (2*sizeof(u32)) >> 2;
  424. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  425. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  426. dmae->comp_val = DMAE_COMP_VAL;
  427. *stats_comp = 0;
  428. }
  429. static void bnx2x_func_stats_init(struct bnx2x *bp)
  430. {
  431. struct dmae_command *dmae = &bp->stats_dmae;
  432. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  433. /* sanity */
  434. if (!bp->func_stx) {
  435. BNX2X_ERR("BUG!\n");
  436. return;
  437. }
  438. bp->executer_idx = 0;
  439. memset(dmae, 0, sizeof(struct dmae_command));
  440. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  441. true, DMAE_COMP_PCI);
  442. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  443. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  444. dmae->dst_addr_lo = bp->func_stx >> 2;
  445. dmae->dst_addr_hi = 0;
  446. dmae->len = sizeof(struct host_func_stats) >> 2;
  447. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  448. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  449. dmae->comp_val = DMAE_COMP_VAL;
  450. *stats_comp = 0;
  451. }
  452. static void bnx2x_stats_start(struct bnx2x *bp)
  453. {
  454. if (bp->port.pmf)
  455. bnx2x_port_stats_init(bp);
  456. else if (bp->func_stx)
  457. bnx2x_func_stats_init(bp);
  458. bnx2x_hw_stats_post(bp);
  459. bnx2x_storm_stats_post(bp);
  460. }
  461. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  462. {
  463. bnx2x_stats_comp(bp);
  464. bnx2x_stats_pmf_update(bp);
  465. bnx2x_stats_start(bp);
  466. }
  467. static void bnx2x_stats_restart(struct bnx2x *bp)
  468. {
  469. bnx2x_stats_comp(bp);
  470. bnx2x_stats_start(bp);
  471. }
  472. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  473. {
  474. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  475. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  476. struct {
  477. u32 lo;
  478. u32 hi;
  479. } diff;
  480. if (CHIP_IS_E1x(bp)) {
  481. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  482. /* the macros below will use "bmac1_stats" type */
  483. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  484. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  485. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  486. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  487. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  488. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  489. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  490. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  491. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  492. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  493. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  494. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  495. UPDATE_STAT64(tx_stat_gt127,
  496. tx_stat_etherstatspkts65octetsto127octets);
  497. UPDATE_STAT64(tx_stat_gt255,
  498. tx_stat_etherstatspkts128octetsto255octets);
  499. UPDATE_STAT64(tx_stat_gt511,
  500. tx_stat_etherstatspkts256octetsto511octets);
  501. UPDATE_STAT64(tx_stat_gt1023,
  502. tx_stat_etherstatspkts512octetsto1023octets);
  503. UPDATE_STAT64(tx_stat_gt1518,
  504. tx_stat_etherstatspkts1024octetsto1522octets);
  505. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  506. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  507. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  508. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  509. UPDATE_STAT64(tx_stat_gterr,
  510. tx_stat_dot3statsinternalmactransmiterrors);
  511. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  512. } else {
  513. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  514. /* the macros below will use "bmac2_stats" type */
  515. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  516. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  517. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  518. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  519. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  520. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  521. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  522. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  523. UPDATE_STAT64(rx_stat_grxpf, rx_stat_bmac_xpf);
  524. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  525. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  526. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  527. UPDATE_STAT64(tx_stat_gt127,
  528. tx_stat_etherstatspkts65octetsto127octets);
  529. UPDATE_STAT64(tx_stat_gt255,
  530. tx_stat_etherstatspkts128octetsto255octets);
  531. UPDATE_STAT64(tx_stat_gt511,
  532. tx_stat_etherstatspkts256octetsto511octets);
  533. UPDATE_STAT64(tx_stat_gt1023,
  534. tx_stat_etherstatspkts512octetsto1023octets);
  535. UPDATE_STAT64(tx_stat_gt1518,
  536. tx_stat_etherstatspkts1024octetsto1522octets);
  537. UPDATE_STAT64(tx_stat_gt2047, tx_stat_bmac_2047);
  538. UPDATE_STAT64(tx_stat_gt4095, tx_stat_bmac_4095);
  539. UPDATE_STAT64(tx_stat_gt9216, tx_stat_bmac_9216);
  540. UPDATE_STAT64(tx_stat_gt16383, tx_stat_bmac_16383);
  541. UPDATE_STAT64(tx_stat_gterr,
  542. tx_stat_dot3statsinternalmactransmiterrors);
  543. UPDATE_STAT64(tx_stat_gtufl, tx_stat_bmac_ufl);
  544. }
  545. estats->pause_frames_received_hi =
  546. pstats->mac_stx[1].rx_stat_bmac_xpf_hi;
  547. estats->pause_frames_received_lo =
  548. pstats->mac_stx[1].rx_stat_bmac_xpf_lo;
  549. estats->pause_frames_sent_hi =
  550. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  551. estats->pause_frames_sent_lo =
  552. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  553. }
  554. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  555. {
  556. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  557. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  558. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  559. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  560. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  561. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  562. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  563. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  564. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  565. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  566. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  567. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  568. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  569. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  570. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  571. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  572. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  573. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  574. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  575. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  576. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  577. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  578. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  579. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  580. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  581. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  582. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  583. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  584. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  585. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  586. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  587. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  588. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  589. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  590. estats->pause_frames_received_hi =
  591. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  592. estats->pause_frames_received_lo =
  593. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  594. ADD_64(estats->pause_frames_received_hi,
  595. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  596. estats->pause_frames_received_lo,
  597. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  598. estats->pause_frames_sent_hi =
  599. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  600. estats->pause_frames_sent_lo =
  601. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  602. ADD_64(estats->pause_frames_sent_hi,
  603. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  604. estats->pause_frames_sent_lo,
  605. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  606. }
  607. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  608. {
  609. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  610. struct nig_stats *old = &(bp->port.old_nig_stats);
  611. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  612. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  613. struct {
  614. u32 lo;
  615. u32 hi;
  616. } diff;
  617. if (bp->link_vars.mac_type == MAC_TYPE_BMAC)
  618. bnx2x_bmac_stats_update(bp);
  619. else if (bp->link_vars.mac_type == MAC_TYPE_EMAC)
  620. bnx2x_emac_stats_update(bp);
  621. else { /* unreached */
  622. BNX2X_ERR("stats updated by DMAE but no MAC active\n");
  623. return -1;
  624. }
  625. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  626. new->brb_discard - old->brb_discard);
  627. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  628. new->brb_truncate - old->brb_truncate);
  629. UPDATE_STAT64_NIG(egress_mac_pkt0,
  630. etherstatspkts1024octetsto1522octets);
  631. UPDATE_STAT64_NIG(egress_mac_pkt1, etherstatspktsover1522octets);
  632. memcpy(old, new, sizeof(struct nig_stats));
  633. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  634. sizeof(struct mac_stx));
  635. estats->brb_drop_hi = pstats->brb_drop_hi;
  636. estats->brb_drop_lo = pstats->brb_drop_lo;
  637. pstats->host_port_stats_start = ++pstats->host_port_stats_end;
  638. if (!BP_NOMCP(bp)) {
  639. u32 nig_timer_max =
  640. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  641. if (nig_timer_max != estats->nig_timer_max) {
  642. estats->nig_timer_max = nig_timer_max;
  643. BNX2X_ERR("NIG timer max (%u)\n",
  644. estats->nig_timer_max);
  645. }
  646. }
  647. return 0;
  648. }
  649. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  650. {
  651. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  652. struct tstorm_per_port_stats *tport =
  653. &stats->tstorm_common.port_statistics;
  654. struct host_func_stats *fstats = bnx2x_sp(bp, func_stats);
  655. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  656. int i;
  657. u16 cur_stats_counter;
  658. /* Make sure we use the value of the counter
  659. * used for sending the last stats ramrod.
  660. */
  661. spin_lock_bh(&bp->stats_lock);
  662. cur_stats_counter = bp->stats_counter - 1;
  663. spin_unlock_bh(&bp->stats_lock);
  664. memcpy(&(fstats->total_bytes_received_hi),
  665. &(bnx2x_sp(bp, func_stats_base)->total_bytes_received_hi),
  666. sizeof(struct host_func_stats) - 2*sizeof(u32));
  667. estats->error_bytes_received_hi = 0;
  668. estats->error_bytes_received_lo = 0;
  669. estats->etherstatsoverrsizepkts_hi = 0;
  670. estats->etherstatsoverrsizepkts_lo = 0;
  671. estats->no_buff_discard_hi = 0;
  672. estats->no_buff_discard_lo = 0;
  673. for_each_eth_queue(bp, i) {
  674. struct bnx2x_fastpath *fp = &bp->fp[i];
  675. int cl_id = fp->cl_id;
  676. struct tstorm_per_client_stats *tclient =
  677. &stats->tstorm_common.client_statistics[cl_id];
  678. struct tstorm_per_client_stats *old_tclient = &fp->old_tclient;
  679. struct ustorm_per_client_stats *uclient =
  680. &stats->ustorm_common.client_statistics[cl_id];
  681. struct ustorm_per_client_stats *old_uclient = &fp->old_uclient;
  682. struct xstorm_per_client_stats *xclient =
  683. &stats->xstorm_common.client_statistics[cl_id];
  684. struct xstorm_per_client_stats *old_xclient = &fp->old_xclient;
  685. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  686. u32 diff;
  687. /* are storm stats valid? */
  688. if (le16_to_cpu(xclient->stats_counter) != cur_stats_counter) {
  689. DP(BNX2X_MSG_STATS, "[%d] stats not updated by xstorm"
  690. " xstorm counter (0x%x) != stats_counter (0x%x)\n",
  691. i, xclient->stats_counter, cur_stats_counter + 1);
  692. return -1;
  693. }
  694. if (le16_to_cpu(tclient->stats_counter) != cur_stats_counter) {
  695. DP(BNX2X_MSG_STATS, "[%d] stats not updated by tstorm"
  696. " tstorm counter (0x%x) != stats_counter (0x%x)\n",
  697. i, tclient->stats_counter, cur_stats_counter + 1);
  698. return -2;
  699. }
  700. if (le16_to_cpu(uclient->stats_counter) != cur_stats_counter) {
  701. DP(BNX2X_MSG_STATS, "[%d] stats not updated by ustorm"
  702. " ustorm counter (0x%x) != stats_counter (0x%x)\n",
  703. i, uclient->stats_counter, cur_stats_counter + 1);
  704. return -4;
  705. }
  706. qstats->total_bytes_received_hi =
  707. le32_to_cpu(tclient->rcv_broadcast_bytes.hi);
  708. qstats->total_bytes_received_lo =
  709. le32_to_cpu(tclient->rcv_broadcast_bytes.lo);
  710. ADD_64(qstats->total_bytes_received_hi,
  711. le32_to_cpu(tclient->rcv_multicast_bytes.hi),
  712. qstats->total_bytes_received_lo,
  713. le32_to_cpu(tclient->rcv_multicast_bytes.lo));
  714. ADD_64(qstats->total_bytes_received_hi,
  715. le32_to_cpu(tclient->rcv_unicast_bytes.hi),
  716. qstats->total_bytes_received_lo,
  717. le32_to_cpu(tclient->rcv_unicast_bytes.lo));
  718. SUB_64(qstats->total_bytes_received_hi,
  719. le32_to_cpu(uclient->bcast_no_buff_bytes.hi),
  720. qstats->total_bytes_received_lo,
  721. le32_to_cpu(uclient->bcast_no_buff_bytes.lo));
  722. SUB_64(qstats->total_bytes_received_hi,
  723. le32_to_cpu(uclient->mcast_no_buff_bytes.hi),
  724. qstats->total_bytes_received_lo,
  725. le32_to_cpu(uclient->mcast_no_buff_bytes.lo));
  726. SUB_64(qstats->total_bytes_received_hi,
  727. le32_to_cpu(uclient->ucast_no_buff_bytes.hi),
  728. qstats->total_bytes_received_lo,
  729. le32_to_cpu(uclient->ucast_no_buff_bytes.lo));
  730. qstats->valid_bytes_received_hi =
  731. qstats->total_bytes_received_hi;
  732. qstats->valid_bytes_received_lo =
  733. qstats->total_bytes_received_lo;
  734. qstats->error_bytes_received_hi =
  735. le32_to_cpu(tclient->rcv_error_bytes.hi);
  736. qstats->error_bytes_received_lo =
  737. le32_to_cpu(tclient->rcv_error_bytes.lo);
  738. ADD_64(qstats->total_bytes_received_hi,
  739. qstats->error_bytes_received_hi,
  740. qstats->total_bytes_received_lo,
  741. qstats->error_bytes_received_lo);
  742. UPDATE_EXTEND_TSTAT(rcv_unicast_pkts,
  743. total_unicast_packets_received);
  744. UPDATE_EXTEND_TSTAT(rcv_multicast_pkts,
  745. total_multicast_packets_received);
  746. UPDATE_EXTEND_TSTAT(rcv_broadcast_pkts,
  747. total_broadcast_packets_received);
  748. UPDATE_EXTEND_TSTAT(packets_too_big_discard,
  749. etherstatsoverrsizepkts);
  750. UPDATE_EXTEND_TSTAT(no_buff_discard, no_buff_discard);
  751. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  752. total_unicast_packets_received);
  753. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  754. total_multicast_packets_received);
  755. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  756. total_broadcast_packets_received);
  757. UPDATE_EXTEND_USTAT(ucast_no_buff_pkts, no_buff_discard);
  758. UPDATE_EXTEND_USTAT(mcast_no_buff_pkts, no_buff_discard);
  759. UPDATE_EXTEND_USTAT(bcast_no_buff_pkts, no_buff_discard);
  760. qstats->total_bytes_transmitted_hi =
  761. le32_to_cpu(xclient->unicast_bytes_sent.hi);
  762. qstats->total_bytes_transmitted_lo =
  763. le32_to_cpu(xclient->unicast_bytes_sent.lo);
  764. ADD_64(qstats->total_bytes_transmitted_hi,
  765. le32_to_cpu(xclient->multicast_bytes_sent.hi),
  766. qstats->total_bytes_transmitted_lo,
  767. le32_to_cpu(xclient->multicast_bytes_sent.lo));
  768. ADD_64(qstats->total_bytes_transmitted_hi,
  769. le32_to_cpu(xclient->broadcast_bytes_sent.hi),
  770. qstats->total_bytes_transmitted_lo,
  771. le32_to_cpu(xclient->broadcast_bytes_sent.lo));
  772. UPDATE_EXTEND_XSTAT(unicast_pkts_sent,
  773. total_unicast_packets_transmitted);
  774. UPDATE_EXTEND_XSTAT(multicast_pkts_sent,
  775. total_multicast_packets_transmitted);
  776. UPDATE_EXTEND_XSTAT(broadcast_pkts_sent,
  777. total_broadcast_packets_transmitted);
  778. old_tclient->checksum_discard = tclient->checksum_discard;
  779. old_tclient->ttl0_discard = tclient->ttl0_discard;
  780. ADD_64(fstats->total_bytes_received_hi,
  781. qstats->total_bytes_received_hi,
  782. fstats->total_bytes_received_lo,
  783. qstats->total_bytes_received_lo);
  784. ADD_64(fstats->total_bytes_transmitted_hi,
  785. qstats->total_bytes_transmitted_hi,
  786. fstats->total_bytes_transmitted_lo,
  787. qstats->total_bytes_transmitted_lo);
  788. ADD_64(fstats->total_unicast_packets_received_hi,
  789. qstats->total_unicast_packets_received_hi,
  790. fstats->total_unicast_packets_received_lo,
  791. qstats->total_unicast_packets_received_lo);
  792. ADD_64(fstats->total_multicast_packets_received_hi,
  793. qstats->total_multicast_packets_received_hi,
  794. fstats->total_multicast_packets_received_lo,
  795. qstats->total_multicast_packets_received_lo);
  796. ADD_64(fstats->total_broadcast_packets_received_hi,
  797. qstats->total_broadcast_packets_received_hi,
  798. fstats->total_broadcast_packets_received_lo,
  799. qstats->total_broadcast_packets_received_lo);
  800. ADD_64(fstats->total_unicast_packets_transmitted_hi,
  801. qstats->total_unicast_packets_transmitted_hi,
  802. fstats->total_unicast_packets_transmitted_lo,
  803. qstats->total_unicast_packets_transmitted_lo);
  804. ADD_64(fstats->total_multicast_packets_transmitted_hi,
  805. qstats->total_multicast_packets_transmitted_hi,
  806. fstats->total_multicast_packets_transmitted_lo,
  807. qstats->total_multicast_packets_transmitted_lo);
  808. ADD_64(fstats->total_broadcast_packets_transmitted_hi,
  809. qstats->total_broadcast_packets_transmitted_hi,
  810. fstats->total_broadcast_packets_transmitted_lo,
  811. qstats->total_broadcast_packets_transmitted_lo);
  812. ADD_64(fstats->valid_bytes_received_hi,
  813. qstats->valid_bytes_received_hi,
  814. fstats->valid_bytes_received_lo,
  815. qstats->valid_bytes_received_lo);
  816. ADD_64(estats->error_bytes_received_hi,
  817. qstats->error_bytes_received_hi,
  818. estats->error_bytes_received_lo,
  819. qstats->error_bytes_received_lo);
  820. ADD_64(estats->etherstatsoverrsizepkts_hi,
  821. qstats->etherstatsoverrsizepkts_hi,
  822. estats->etherstatsoverrsizepkts_lo,
  823. qstats->etherstatsoverrsizepkts_lo);
  824. ADD_64(estats->no_buff_discard_hi, qstats->no_buff_discard_hi,
  825. estats->no_buff_discard_lo, qstats->no_buff_discard_lo);
  826. }
  827. ADD_64(fstats->total_bytes_received_hi,
  828. estats->rx_stat_ifhcinbadoctets_hi,
  829. fstats->total_bytes_received_lo,
  830. estats->rx_stat_ifhcinbadoctets_lo);
  831. memcpy(estats, &(fstats->total_bytes_received_hi),
  832. sizeof(struct host_func_stats) - 2*sizeof(u32));
  833. ADD_64(estats->etherstatsoverrsizepkts_hi,
  834. estats->rx_stat_dot3statsframestoolong_hi,
  835. estats->etherstatsoverrsizepkts_lo,
  836. estats->rx_stat_dot3statsframestoolong_lo);
  837. ADD_64(estats->error_bytes_received_hi,
  838. estats->rx_stat_ifhcinbadoctets_hi,
  839. estats->error_bytes_received_lo,
  840. estats->rx_stat_ifhcinbadoctets_lo);
  841. if (bp->port.pmf) {
  842. estats->mac_filter_discard =
  843. le32_to_cpu(tport->mac_filter_discard);
  844. estats->xxoverflow_discard =
  845. le32_to_cpu(tport->xxoverflow_discard);
  846. estats->brb_truncate_discard =
  847. le32_to_cpu(tport->brb_truncate_discard);
  848. estats->mac_discard = le32_to_cpu(tport->mac_discard);
  849. }
  850. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  851. bp->stats_pending = 0;
  852. return 0;
  853. }
  854. static void bnx2x_net_stats_update(struct bnx2x *bp)
  855. {
  856. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  857. struct net_device_stats *nstats = &bp->dev->stats;
  858. unsigned long tmp;
  859. int i;
  860. nstats->rx_packets =
  861. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  862. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  863. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  864. nstats->tx_packets =
  865. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  866. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  867. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  868. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  869. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  870. tmp = estats->mac_discard;
  871. for_each_rx_queue(bp, i)
  872. tmp += le32_to_cpu(bp->fp[i].old_tclient.checksum_discard);
  873. nstats->rx_dropped = tmp;
  874. nstats->tx_dropped = 0;
  875. nstats->multicast =
  876. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  877. nstats->collisions =
  878. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  879. nstats->rx_length_errors =
  880. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  881. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  882. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  883. bnx2x_hilo(&estats->brb_truncate_hi);
  884. nstats->rx_crc_errors =
  885. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  886. nstats->rx_frame_errors =
  887. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  888. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  889. nstats->rx_missed_errors = estats->xxoverflow_discard;
  890. nstats->rx_errors = nstats->rx_length_errors +
  891. nstats->rx_over_errors +
  892. nstats->rx_crc_errors +
  893. nstats->rx_frame_errors +
  894. nstats->rx_fifo_errors +
  895. nstats->rx_missed_errors;
  896. nstats->tx_aborted_errors =
  897. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  898. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  899. nstats->tx_carrier_errors =
  900. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  901. nstats->tx_fifo_errors = 0;
  902. nstats->tx_heartbeat_errors = 0;
  903. nstats->tx_window_errors = 0;
  904. nstats->tx_errors = nstats->tx_aborted_errors +
  905. nstats->tx_carrier_errors +
  906. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  907. }
  908. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  909. {
  910. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  911. int i;
  912. estats->driver_xoff = 0;
  913. estats->rx_err_discard_pkt = 0;
  914. estats->rx_skb_alloc_failed = 0;
  915. estats->hw_csum_err = 0;
  916. for_each_queue(bp, i) {
  917. struct bnx2x_eth_q_stats *qstats = &bp->fp[i].eth_q_stats;
  918. estats->driver_xoff += qstats->driver_xoff;
  919. estats->rx_err_discard_pkt += qstats->rx_err_discard_pkt;
  920. estats->rx_skb_alloc_failed += qstats->rx_skb_alloc_failed;
  921. estats->hw_csum_err += qstats->hw_csum_err;
  922. }
  923. }
  924. static void bnx2x_stats_update(struct bnx2x *bp)
  925. {
  926. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  927. if (*stats_comp != DMAE_COMP_VAL)
  928. return;
  929. if (bp->port.pmf)
  930. bnx2x_hw_stats_update(bp);
  931. if (bnx2x_storm_stats_update(bp) && (bp->stats_pending++ == 3)) {
  932. BNX2X_ERR("storm stats were not updated for 3 times\n");
  933. bnx2x_panic();
  934. return;
  935. }
  936. bnx2x_net_stats_update(bp);
  937. bnx2x_drv_stats_update(bp);
  938. if (netif_msg_timer(bp)) {
  939. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  940. int i;
  941. printk(KERN_DEBUG "%s: brb drops %u brb truncate %u\n",
  942. bp->dev->name,
  943. estats->brb_drop_lo, estats->brb_truncate_lo);
  944. for_each_eth_queue(bp, i) {
  945. struct bnx2x_fastpath *fp = &bp->fp[i];
  946. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  947. printk(KERN_DEBUG "%s: rx usage(%4u) *rx_cons_sb(%u)"
  948. " rx pkt(%lu) rx calls(%lu %lu)\n",
  949. fp->name, (le16_to_cpu(*fp->rx_cons_sb) -
  950. fp->rx_comp_cons),
  951. le16_to_cpu(*fp->rx_cons_sb),
  952. bnx2x_hilo(&qstats->
  953. total_unicast_packets_received_hi),
  954. fp->rx_calls, fp->rx_pkt);
  955. }
  956. for_each_eth_queue(bp, i) {
  957. struct bnx2x_fastpath *fp = &bp->fp[i];
  958. struct bnx2x_eth_q_stats *qstats = &fp->eth_q_stats;
  959. struct netdev_queue *txq =
  960. netdev_get_tx_queue(bp->dev, i);
  961. printk(KERN_DEBUG "%s: tx avail(%4u) *tx_cons_sb(%u)"
  962. " tx pkt(%lu) tx calls (%lu)"
  963. " %s (Xoff events %u)\n",
  964. fp->name, bnx2x_tx_avail(fp),
  965. le16_to_cpu(*fp->tx_cons_sb),
  966. bnx2x_hilo(&qstats->
  967. total_unicast_packets_transmitted_hi),
  968. fp->tx_pkt,
  969. (netif_tx_queue_stopped(txq) ? "Xoff" : "Xon"),
  970. qstats->driver_xoff);
  971. }
  972. }
  973. bnx2x_hw_stats_post(bp);
  974. bnx2x_storm_stats_post(bp);
  975. }
  976. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  977. {
  978. struct dmae_command *dmae;
  979. u32 opcode;
  980. int loader_idx = PMF_DMAE_C(bp);
  981. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  982. bp->executer_idx = 0;
  983. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  984. if (bp->port.port_stx) {
  985. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  986. if (bp->func_stx)
  987. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  988. opcode, DMAE_COMP_GRC);
  989. else
  990. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  991. opcode, DMAE_COMP_PCI);
  992. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  993. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  994. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  995. dmae->dst_addr_hi = 0;
  996. dmae->len = sizeof(struct host_port_stats) >> 2;
  997. if (bp->func_stx) {
  998. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  999. dmae->comp_addr_hi = 0;
  1000. dmae->comp_val = 1;
  1001. } else {
  1002. dmae->comp_addr_lo =
  1003. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1004. dmae->comp_addr_hi =
  1005. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1006. dmae->comp_val = DMAE_COMP_VAL;
  1007. *stats_comp = 0;
  1008. }
  1009. }
  1010. if (bp->func_stx) {
  1011. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1012. dmae->opcode =
  1013. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1014. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1015. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1016. dmae->dst_addr_lo = bp->func_stx >> 2;
  1017. dmae->dst_addr_hi = 0;
  1018. dmae->len = sizeof(struct host_func_stats) >> 2;
  1019. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1020. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1021. dmae->comp_val = DMAE_COMP_VAL;
  1022. *stats_comp = 0;
  1023. }
  1024. }
  1025. static void bnx2x_stats_stop(struct bnx2x *bp)
  1026. {
  1027. int update = 0;
  1028. bnx2x_stats_comp(bp);
  1029. if (bp->port.pmf)
  1030. update = (bnx2x_hw_stats_update(bp) == 0);
  1031. update |= (bnx2x_storm_stats_update(bp) == 0);
  1032. if (update) {
  1033. bnx2x_net_stats_update(bp);
  1034. if (bp->port.pmf)
  1035. bnx2x_port_stats_stop(bp);
  1036. bnx2x_hw_stats_post(bp);
  1037. bnx2x_stats_comp(bp);
  1038. }
  1039. }
  1040. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1041. {
  1042. }
  1043. static const struct {
  1044. void (*action)(struct bnx2x *bp);
  1045. enum bnx2x_stats_state next_state;
  1046. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1047. /* state event */
  1048. {
  1049. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1050. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1051. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1052. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1053. },
  1054. {
  1055. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1056. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1057. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1058. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1059. }
  1060. };
  1061. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1062. {
  1063. enum bnx2x_stats_state state;
  1064. if (unlikely(bp->panic))
  1065. return;
  1066. bnx2x_stats_stm[bp->stats_state][event].action(bp);
  1067. /* Protect a state change flow */
  1068. spin_lock_bh(&bp->stats_lock);
  1069. state = bp->stats_state;
  1070. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1071. spin_unlock_bh(&bp->stats_lock);
  1072. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1073. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1074. state, event, bp->stats_state);
  1075. }
  1076. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1077. {
  1078. struct dmae_command *dmae;
  1079. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1080. /* sanity */
  1081. if (!bp->port.pmf || !bp->port.port_stx) {
  1082. BNX2X_ERR("BUG!\n");
  1083. return;
  1084. }
  1085. bp->executer_idx = 0;
  1086. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1087. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1088. true, DMAE_COMP_PCI);
  1089. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1090. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1091. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1092. dmae->dst_addr_hi = 0;
  1093. dmae->len = sizeof(struct host_port_stats) >> 2;
  1094. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1095. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1096. dmae->comp_val = DMAE_COMP_VAL;
  1097. *stats_comp = 0;
  1098. bnx2x_hw_stats_post(bp);
  1099. bnx2x_stats_comp(bp);
  1100. }
  1101. static void bnx2x_func_stats_base_init(struct bnx2x *bp)
  1102. {
  1103. int vn, vn_max = IS_MF(bp) ? E1HVN_MAX : E1VN_MAX;
  1104. u32 func_stx;
  1105. /* sanity */
  1106. if (!bp->port.pmf || !bp->func_stx) {
  1107. BNX2X_ERR("BUG!\n");
  1108. return;
  1109. }
  1110. /* save our func_stx */
  1111. func_stx = bp->func_stx;
  1112. for (vn = VN_0; vn < vn_max; vn++) {
  1113. int mb_idx = !CHIP_IS_E2(bp) ? 2*vn + BP_PORT(bp) : vn;
  1114. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1115. bnx2x_func_stats_init(bp);
  1116. bnx2x_hw_stats_post(bp);
  1117. bnx2x_stats_comp(bp);
  1118. }
  1119. /* restore our func_stx */
  1120. bp->func_stx = func_stx;
  1121. }
  1122. static void bnx2x_func_stats_base_update(struct bnx2x *bp)
  1123. {
  1124. struct dmae_command *dmae = &bp->stats_dmae;
  1125. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1126. /* sanity */
  1127. if (!bp->func_stx) {
  1128. BNX2X_ERR("BUG!\n");
  1129. return;
  1130. }
  1131. bp->executer_idx = 0;
  1132. memset(dmae, 0, sizeof(struct dmae_command));
  1133. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  1134. true, DMAE_COMP_PCI);
  1135. dmae->src_addr_lo = bp->func_stx >> 2;
  1136. dmae->src_addr_hi = 0;
  1137. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats_base));
  1138. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats_base));
  1139. dmae->len = sizeof(struct host_func_stats) >> 2;
  1140. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1141. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1142. dmae->comp_val = DMAE_COMP_VAL;
  1143. *stats_comp = 0;
  1144. bnx2x_hw_stats_post(bp);
  1145. bnx2x_stats_comp(bp);
  1146. }
  1147. void bnx2x_stats_init(struct bnx2x *bp)
  1148. {
  1149. int port = BP_PORT(bp);
  1150. int mb_idx = BP_FW_MB_IDX(bp);
  1151. int i;
  1152. struct eth_stats_query *stats = bnx2x_sp(bp, fw_stats);
  1153. bp->stats_pending = 0;
  1154. bp->executer_idx = 0;
  1155. bp->stats_counter = 0;
  1156. /* port and func stats for management */
  1157. if (!BP_NOMCP(bp)) {
  1158. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1159. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1160. } else {
  1161. bp->port.port_stx = 0;
  1162. bp->func_stx = 0;
  1163. }
  1164. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1165. bp->port.port_stx, bp->func_stx);
  1166. /* port stats */
  1167. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1168. bp->port.old_nig_stats.brb_discard =
  1169. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1170. bp->port.old_nig_stats.brb_truncate =
  1171. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1172. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1173. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1174. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1175. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1176. /* function stats */
  1177. for_each_queue(bp, i) {
  1178. struct bnx2x_fastpath *fp = &bp->fp[i];
  1179. memset(&fp->old_tclient, 0,
  1180. sizeof(struct tstorm_per_client_stats));
  1181. memset(&fp->old_uclient, 0,
  1182. sizeof(struct ustorm_per_client_stats));
  1183. memset(&fp->old_xclient, 0,
  1184. sizeof(struct xstorm_per_client_stats));
  1185. memset(&fp->eth_q_stats, 0, sizeof(struct bnx2x_eth_q_stats));
  1186. }
  1187. /* FW stats are currently collected for ETH clients only */
  1188. for_each_eth_queue(bp, i) {
  1189. /* Set initial stats counter in the stats ramrod data to -1 */
  1190. int cl_id = bp->fp[i].cl_id;
  1191. stats->xstorm_common.client_statistics[cl_id].
  1192. stats_counter = 0xffff;
  1193. stats->ustorm_common.client_statistics[cl_id].
  1194. stats_counter = 0xffff;
  1195. stats->tstorm_common.client_statistics[cl_id].
  1196. stats_counter = 0xffff;
  1197. }
  1198. memset(&bp->dev->stats, 0, sizeof(struct net_device_stats));
  1199. memset(&bp->eth_stats, 0, sizeof(struct bnx2x_eth_stats));
  1200. bp->stats_state = STATS_STATE_DISABLED;
  1201. if (bp->port.pmf) {
  1202. if (bp->port.port_stx)
  1203. bnx2x_port_stats_base_init(bp);
  1204. if (bp->func_stx)
  1205. bnx2x_func_stats_base_init(bp);
  1206. } else if (bp->func_stx)
  1207. bnx2x_func_stats_base_update(bp);
  1208. }