bnad_ethtool.c 33 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #include "cna.h"
  19. #include <linux/netdevice.h>
  20. #include <linux/skbuff.h>
  21. #include <linux/ethtool.h>
  22. #include <linux/rtnetlink.h>
  23. #include "bna.h"
  24. #include "bnad.h"
  25. #define BNAD_NUM_TXF_COUNTERS 12
  26. #define BNAD_NUM_RXF_COUNTERS 10
  27. #define BNAD_NUM_CQ_COUNTERS 3
  28. #define BNAD_NUM_RXQ_COUNTERS 6
  29. #define BNAD_NUM_TXQ_COUNTERS 5
  30. #define BNAD_ETHTOOL_STATS_NUM \
  31. (sizeof(struct rtnl_link_stats64) / sizeof(u64) + \
  32. sizeof(struct bnad_drv_stats) / sizeof(u64) + \
  33. offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64))
  34. static char *bnad_net_stats_strings[BNAD_ETHTOOL_STATS_NUM] = {
  35. "rx_packets",
  36. "tx_packets",
  37. "rx_bytes",
  38. "tx_bytes",
  39. "rx_errors",
  40. "tx_errors",
  41. "rx_dropped",
  42. "tx_dropped",
  43. "multicast",
  44. "collisions",
  45. "rx_length_errors",
  46. "rx_over_errors",
  47. "rx_crc_errors",
  48. "rx_frame_errors",
  49. "rx_fifo_errors",
  50. "rx_missed_errors",
  51. "tx_aborted_errors",
  52. "tx_carrier_errors",
  53. "tx_fifo_errors",
  54. "tx_heartbeat_errors",
  55. "tx_window_errors",
  56. "rx_compressed",
  57. "tx_compressed",
  58. "netif_queue_stop",
  59. "netif_queue_wakeup",
  60. "netif_queue_stopped",
  61. "tso4",
  62. "tso6",
  63. "tso_err",
  64. "tcpcsum_offload",
  65. "udpcsum_offload",
  66. "csum_help",
  67. "csum_help_err",
  68. "hw_stats_updates",
  69. "netif_rx_schedule",
  70. "netif_rx_complete",
  71. "netif_rx_dropped",
  72. "link_toggle",
  73. "cee_up",
  74. "rxp_info_alloc_failed",
  75. "mbox_intr_disabled",
  76. "mbox_intr_enabled",
  77. "tx_unmap_q_alloc_failed",
  78. "rx_unmap_q_alloc_failed",
  79. "rxbuf_alloc_failed",
  80. "mac_frame_64",
  81. "mac_frame_65_127",
  82. "mac_frame_128_255",
  83. "mac_frame_256_511",
  84. "mac_frame_512_1023",
  85. "mac_frame_1024_1518",
  86. "mac_frame_1518_1522",
  87. "mac_rx_bytes",
  88. "mac_rx_packets",
  89. "mac_rx_fcs_error",
  90. "mac_rx_multicast",
  91. "mac_rx_broadcast",
  92. "mac_rx_control_frames",
  93. "mac_rx_pause",
  94. "mac_rx_unknown_opcode",
  95. "mac_rx_alignment_error",
  96. "mac_rx_frame_length_error",
  97. "mac_rx_code_error",
  98. "mac_rx_carrier_sense_error",
  99. "mac_rx_undersize",
  100. "mac_rx_oversize",
  101. "mac_rx_fragments",
  102. "mac_rx_jabber",
  103. "mac_rx_drop",
  104. "mac_tx_bytes",
  105. "mac_tx_packets",
  106. "mac_tx_multicast",
  107. "mac_tx_broadcast",
  108. "mac_tx_pause",
  109. "mac_tx_deferral",
  110. "mac_tx_excessive_deferral",
  111. "mac_tx_single_collision",
  112. "mac_tx_muliple_collision",
  113. "mac_tx_late_collision",
  114. "mac_tx_excessive_collision",
  115. "mac_tx_total_collision",
  116. "mac_tx_pause_honored",
  117. "mac_tx_drop",
  118. "mac_tx_jabber",
  119. "mac_tx_fcs_error",
  120. "mac_tx_control_frame",
  121. "mac_tx_oversize",
  122. "mac_tx_undersize",
  123. "mac_tx_fragments",
  124. "bpc_tx_pause_0",
  125. "bpc_tx_pause_1",
  126. "bpc_tx_pause_2",
  127. "bpc_tx_pause_3",
  128. "bpc_tx_pause_4",
  129. "bpc_tx_pause_5",
  130. "bpc_tx_pause_6",
  131. "bpc_tx_pause_7",
  132. "bpc_tx_zero_pause_0",
  133. "bpc_tx_zero_pause_1",
  134. "bpc_tx_zero_pause_2",
  135. "bpc_tx_zero_pause_3",
  136. "bpc_tx_zero_pause_4",
  137. "bpc_tx_zero_pause_5",
  138. "bpc_tx_zero_pause_6",
  139. "bpc_tx_zero_pause_7",
  140. "bpc_tx_first_pause_0",
  141. "bpc_tx_first_pause_1",
  142. "bpc_tx_first_pause_2",
  143. "bpc_tx_first_pause_3",
  144. "bpc_tx_first_pause_4",
  145. "bpc_tx_first_pause_5",
  146. "bpc_tx_first_pause_6",
  147. "bpc_tx_first_pause_7",
  148. "bpc_rx_pause_0",
  149. "bpc_rx_pause_1",
  150. "bpc_rx_pause_2",
  151. "bpc_rx_pause_3",
  152. "bpc_rx_pause_4",
  153. "bpc_rx_pause_5",
  154. "bpc_rx_pause_6",
  155. "bpc_rx_pause_7",
  156. "bpc_rx_zero_pause_0",
  157. "bpc_rx_zero_pause_1",
  158. "bpc_rx_zero_pause_2",
  159. "bpc_rx_zero_pause_3",
  160. "bpc_rx_zero_pause_4",
  161. "bpc_rx_zero_pause_5",
  162. "bpc_rx_zero_pause_6",
  163. "bpc_rx_zero_pause_7",
  164. "bpc_rx_first_pause_0",
  165. "bpc_rx_first_pause_1",
  166. "bpc_rx_first_pause_2",
  167. "bpc_rx_first_pause_3",
  168. "bpc_rx_first_pause_4",
  169. "bpc_rx_first_pause_5",
  170. "bpc_rx_first_pause_6",
  171. "bpc_rx_first_pause_7",
  172. "rad_rx_frames",
  173. "rad_rx_octets",
  174. "rad_rx_vlan_frames",
  175. "rad_rx_ucast",
  176. "rad_rx_ucast_octets",
  177. "rad_rx_ucast_vlan",
  178. "rad_rx_mcast",
  179. "rad_rx_mcast_octets",
  180. "rad_rx_mcast_vlan",
  181. "rad_rx_bcast",
  182. "rad_rx_bcast_octets",
  183. "rad_rx_bcast_vlan",
  184. "rad_rx_drops",
  185. "fc_rx_ucast_octets",
  186. "fc_rx_ucast",
  187. "fc_rx_ucast_vlan",
  188. "fc_rx_mcast_octets",
  189. "fc_rx_mcast",
  190. "fc_rx_mcast_vlan",
  191. "fc_rx_bcast_octets",
  192. "fc_rx_bcast",
  193. "fc_rx_bcast_vlan",
  194. "fc_tx_ucast_octets",
  195. "fc_tx_ucast",
  196. "fc_tx_ucast_vlan",
  197. "fc_tx_mcast_octets",
  198. "fc_tx_mcast",
  199. "fc_tx_mcast_vlan",
  200. "fc_tx_bcast_octets",
  201. "fc_tx_bcast",
  202. "fc_tx_bcast_vlan",
  203. "fc_tx_parity_errors",
  204. "fc_tx_timeout",
  205. "fc_tx_fid_parity_errors",
  206. };
  207. static int
  208. bnad_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  209. {
  210. cmd->supported = SUPPORTED_10000baseT_Full;
  211. cmd->advertising = ADVERTISED_10000baseT_Full;
  212. cmd->autoneg = AUTONEG_DISABLE;
  213. cmd->supported |= SUPPORTED_FIBRE;
  214. cmd->advertising |= ADVERTISED_FIBRE;
  215. cmd->port = PORT_FIBRE;
  216. cmd->phy_address = 0;
  217. if (netif_carrier_ok(netdev)) {
  218. cmd->speed = SPEED_10000;
  219. cmd->duplex = DUPLEX_FULL;
  220. } else {
  221. cmd->speed = -1;
  222. cmd->duplex = -1;
  223. }
  224. cmd->transceiver = XCVR_EXTERNAL;
  225. cmd->maxtxpkt = 0;
  226. cmd->maxrxpkt = 0;
  227. return 0;
  228. }
  229. static int
  230. bnad_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
  231. {
  232. /* 10G full duplex setting supported only */
  233. if (cmd->autoneg == AUTONEG_ENABLE)
  234. return -EOPNOTSUPP; else {
  235. if ((cmd->speed == SPEED_10000) && (cmd->duplex == DUPLEX_FULL))
  236. return 0;
  237. }
  238. return -EOPNOTSUPP;
  239. }
  240. static void
  241. bnad_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
  242. {
  243. struct bnad *bnad = netdev_priv(netdev);
  244. struct bfa_ioc_attr *ioc_attr;
  245. unsigned long flags;
  246. strcpy(drvinfo->driver, BNAD_NAME);
  247. strcpy(drvinfo->version, BNAD_VERSION);
  248. ioc_attr = kzalloc(sizeof(*ioc_attr), GFP_KERNEL);
  249. if (ioc_attr) {
  250. spin_lock_irqsave(&bnad->bna_lock, flags);
  251. bfa_nw_ioc_get_attr(&bnad->bna.device.ioc, ioc_attr);
  252. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  253. strncpy(drvinfo->fw_version, ioc_attr->adapter_attr.fw_ver,
  254. sizeof(drvinfo->fw_version) - 1);
  255. kfree(ioc_attr);
  256. }
  257. strncpy(drvinfo->bus_info, pci_name(bnad->pcidev), ETHTOOL_BUSINFO_LEN);
  258. }
  259. static int
  260. get_regs(struct bnad *bnad, u32 * regs)
  261. {
  262. int num = 0, i;
  263. u32 reg_addr;
  264. unsigned long flags;
  265. #define BNAD_GET_REG(addr) \
  266. do { \
  267. if (regs) \
  268. regs[num++] = readl(bnad->bar0 + (addr)); \
  269. else \
  270. num++; \
  271. } while (0)
  272. spin_lock_irqsave(&bnad->bna_lock, flags);
  273. /* DMA Block Internal Registers */
  274. BNAD_GET_REG(DMA_CTRL_REG0);
  275. BNAD_GET_REG(DMA_CTRL_REG1);
  276. BNAD_GET_REG(DMA_ERR_INT_STATUS);
  277. BNAD_GET_REG(DMA_ERR_INT_ENABLE);
  278. BNAD_GET_REG(DMA_ERR_INT_STATUS_SET);
  279. /* APP Block Register Address Offset from BAR0 */
  280. BNAD_GET_REG(HOSTFN0_INT_STATUS);
  281. BNAD_GET_REG(HOSTFN0_INT_MASK);
  282. BNAD_GET_REG(HOST_PAGE_NUM_FN0);
  283. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN0);
  284. BNAD_GET_REG(FN0_PCIE_ERR_REG);
  285. BNAD_GET_REG(FN0_ERR_TYPE_STATUS_REG);
  286. BNAD_GET_REG(FN0_ERR_TYPE_MSK_STATUS_REG);
  287. BNAD_GET_REG(HOSTFN1_INT_STATUS);
  288. BNAD_GET_REG(HOSTFN1_INT_MASK);
  289. BNAD_GET_REG(HOST_PAGE_NUM_FN1);
  290. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN1);
  291. BNAD_GET_REG(FN1_PCIE_ERR_REG);
  292. BNAD_GET_REG(FN1_ERR_TYPE_STATUS_REG);
  293. BNAD_GET_REG(FN1_ERR_TYPE_MSK_STATUS_REG);
  294. BNAD_GET_REG(PCIE_MISC_REG);
  295. BNAD_GET_REG(HOST_SEM0_INFO_REG);
  296. BNAD_GET_REG(HOST_SEM1_INFO_REG);
  297. BNAD_GET_REG(HOST_SEM2_INFO_REG);
  298. BNAD_GET_REG(HOST_SEM3_INFO_REG);
  299. BNAD_GET_REG(TEMPSENSE_CNTL_REG);
  300. BNAD_GET_REG(TEMPSENSE_STAT_REG);
  301. BNAD_GET_REG(APP_LOCAL_ERR_STAT);
  302. BNAD_GET_REG(APP_LOCAL_ERR_MSK);
  303. BNAD_GET_REG(PCIE_LNK_ERR_STAT);
  304. BNAD_GET_REG(PCIE_LNK_ERR_MSK);
  305. BNAD_GET_REG(FCOE_FIP_ETH_TYPE);
  306. BNAD_GET_REG(RESV_ETH_TYPE);
  307. BNAD_GET_REG(HOSTFN2_INT_STATUS);
  308. BNAD_GET_REG(HOSTFN2_INT_MASK);
  309. BNAD_GET_REG(HOST_PAGE_NUM_FN2);
  310. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN2);
  311. BNAD_GET_REG(FN2_PCIE_ERR_REG);
  312. BNAD_GET_REG(FN2_ERR_TYPE_STATUS_REG);
  313. BNAD_GET_REG(FN2_ERR_TYPE_MSK_STATUS_REG);
  314. BNAD_GET_REG(HOSTFN3_INT_STATUS);
  315. BNAD_GET_REG(HOSTFN3_INT_MASK);
  316. BNAD_GET_REG(HOST_PAGE_NUM_FN3);
  317. BNAD_GET_REG(HOST_MSIX_ERR_INDEX_FN3);
  318. BNAD_GET_REG(FN3_PCIE_ERR_REG);
  319. BNAD_GET_REG(FN3_ERR_TYPE_STATUS_REG);
  320. BNAD_GET_REG(FN3_ERR_TYPE_MSK_STATUS_REG);
  321. /* Host Command Status Registers */
  322. reg_addr = HOST_CMDSTS0_CLR_REG;
  323. for (i = 0; i < 16; i++) {
  324. BNAD_GET_REG(reg_addr);
  325. BNAD_GET_REG(reg_addr + 4);
  326. BNAD_GET_REG(reg_addr + 8);
  327. reg_addr += 0x10;
  328. }
  329. /* Function ID register */
  330. BNAD_GET_REG(FNC_ID_REG);
  331. /* Function personality register */
  332. BNAD_GET_REG(FNC_PERS_REG);
  333. /* Operation mode register */
  334. BNAD_GET_REG(OP_MODE);
  335. /* LPU0 Registers */
  336. BNAD_GET_REG(LPU0_MBOX_CTL_REG);
  337. BNAD_GET_REG(LPU0_MBOX_CMD_REG);
  338. BNAD_GET_REG(LPU0_MBOX_LINK_0REG);
  339. BNAD_GET_REG(LPU1_MBOX_LINK_0REG);
  340. BNAD_GET_REG(LPU0_MBOX_STATUS_0REG);
  341. BNAD_GET_REG(LPU1_MBOX_STATUS_0REG);
  342. BNAD_GET_REG(LPU0_ERR_STATUS_REG);
  343. BNAD_GET_REG(LPU0_ERR_SET_REG);
  344. /* LPU1 Registers */
  345. BNAD_GET_REG(LPU1_MBOX_CTL_REG);
  346. BNAD_GET_REG(LPU1_MBOX_CMD_REG);
  347. BNAD_GET_REG(LPU0_MBOX_LINK_1REG);
  348. BNAD_GET_REG(LPU1_MBOX_LINK_1REG);
  349. BNAD_GET_REG(LPU0_MBOX_STATUS_1REG);
  350. BNAD_GET_REG(LPU1_MBOX_STATUS_1REG);
  351. BNAD_GET_REG(LPU1_ERR_STATUS_REG);
  352. BNAD_GET_REG(LPU1_ERR_SET_REG);
  353. /* PSS Registers */
  354. BNAD_GET_REG(PSS_CTL_REG);
  355. BNAD_GET_REG(PSS_ERR_STATUS_REG);
  356. BNAD_GET_REG(ERR_STATUS_SET);
  357. BNAD_GET_REG(PSS_RAM_ERR_STATUS_REG);
  358. /* Catapult CPQ Registers */
  359. BNAD_GET_REG(HOSTFN0_LPU0_MBOX0_CMD_STAT);
  360. BNAD_GET_REG(HOSTFN0_LPU1_MBOX0_CMD_STAT);
  361. BNAD_GET_REG(LPU0_HOSTFN0_MBOX0_CMD_STAT);
  362. BNAD_GET_REG(LPU1_HOSTFN0_MBOX0_CMD_STAT);
  363. BNAD_GET_REG(HOSTFN0_LPU0_MBOX1_CMD_STAT);
  364. BNAD_GET_REG(HOSTFN0_LPU1_MBOX1_CMD_STAT);
  365. BNAD_GET_REG(LPU0_HOSTFN0_MBOX1_CMD_STAT);
  366. BNAD_GET_REG(LPU1_HOSTFN0_MBOX1_CMD_STAT);
  367. BNAD_GET_REG(HOSTFN1_LPU0_MBOX0_CMD_STAT);
  368. BNAD_GET_REG(HOSTFN1_LPU1_MBOX0_CMD_STAT);
  369. BNAD_GET_REG(LPU0_HOSTFN1_MBOX0_CMD_STAT);
  370. BNAD_GET_REG(LPU1_HOSTFN1_MBOX0_CMD_STAT);
  371. BNAD_GET_REG(HOSTFN1_LPU0_MBOX1_CMD_STAT);
  372. BNAD_GET_REG(HOSTFN1_LPU1_MBOX1_CMD_STAT);
  373. BNAD_GET_REG(LPU0_HOSTFN1_MBOX1_CMD_STAT);
  374. BNAD_GET_REG(LPU1_HOSTFN1_MBOX1_CMD_STAT);
  375. BNAD_GET_REG(HOSTFN2_LPU0_MBOX0_CMD_STAT);
  376. BNAD_GET_REG(HOSTFN2_LPU1_MBOX0_CMD_STAT);
  377. BNAD_GET_REG(LPU0_HOSTFN2_MBOX0_CMD_STAT);
  378. BNAD_GET_REG(LPU1_HOSTFN2_MBOX0_CMD_STAT);
  379. BNAD_GET_REG(HOSTFN2_LPU0_MBOX1_CMD_STAT);
  380. BNAD_GET_REG(HOSTFN2_LPU1_MBOX1_CMD_STAT);
  381. BNAD_GET_REG(LPU0_HOSTFN2_MBOX1_CMD_STAT);
  382. BNAD_GET_REG(LPU1_HOSTFN2_MBOX1_CMD_STAT);
  383. BNAD_GET_REG(HOSTFN3_LPU0_MBOX0_CMD_STAT);
  384. BNAD_GET_REG(HOSTFN3_LPU1_MBOX0_CMD_STAT);
  385. BNAD_GET_REG(LPU0_HOSTFN3_MBOX0_CMD_STAT);
  386. BNAD_GET_REG(LPU1_HOSTFN3_MBOX0_CMD_STAT);
  387. BNAD_GET_REG(HOSTFN3_LPU0_MBOX1_CMD_STAT);
  388. BNAD_GET_REG(HOSTFN3_LPU1_MBOX1_CMD_STAT);
  389. BNAD_GET_REG(LPU0_HOSTFN3_MBOX1_CMD_STAT);
  390. BNAD_GET_REG(LPU1_HOSTFN3_MBOX1_CMD_STAT);
  391. /* Host Function Force Parity Error Registers */
  392. BNAD_GET_REG(HOSTFN0_LPU_FORCE_PERR);
  393. BNAD_GET_REG(HOSTFN1_LPU_FORCE_PERR);
  394. BNAD_GET_REG(HOSTFN2_LPU_FORCE_PERR);
  395. BNAD_GET_REG(HOSTFN3_LPU_FORCE_PERR);
  396. /* LL Port[0|1] Halt Mask Registers */
  397. BNAD_GET_REG(LL_HALT_MSK_P0);
  398. BNAD_GET_REG(LL_HALT_MSK_P1);
  399. /* LL Port[0|1] Error Mask Registers */
  400. BNAD_GET_REG(LL_ERR_MSK_P0);
  401. BNAD_GET_REG(LL_ERR_MSK_P1);
  402. /* EMC FLI Registers */
  403. BNAD_GET_REG(FLI_CMD_REG);
  404. BNAD_GET_REG(FLI_ADDR_REG);
  405. BNAD_GET_REG(FLI_CTL_REG);
  406. BNAD_GET_REG(FLI_WRDATA_REG);
  407. BNAD_GET_REG(FLI_RDDATA_REG);
  408. BNAD_GET_REG(FLI_DEV_STATUS_REG);
  409. BNAD_GET_REG(FLI_SIG_WD_REG);
  410. BNAD_GET_REG(FLI_DEV_VENDOR_REG);
  411. BNAD_GET_REG(FLI_ERR_STATUS_REG);
  412. /* RxAdm 0 Registers */
  413. BNAD_GET_REG(RAD0_CTL_REG);
  414. BNAD_GET_REG(RAD0_PE_PARM_REG);
  415. BNAD_GET_REG(RAD0_BCN_REG);
  416. BNAD_GET_REG(RAD0_DEFAULT_REG);
  417. BNAD_GET_REG(RAD0_PROMISC_REG);
  418. BNAD_GET_REG(RAD0_BCNQ_REG);
  419. BNAD_GET_REG(RAD0_DEFAULTQ_REG);
  420. BNAD_GET_REG(RAD0_ERR_STS);
  421. BNAD_GET_REG(RAD0_SET_ERR_STS);
  422. BNAD_GET_REG(RAD0_ERR_INT_EN);
  423. BNAD_GET_REG(RAD0_FIRST_ERR);
  424. BNAD_GET_REG(RAD0_FORCE_ERR);
  425. BNAD_GET_REG(RAD0_MAC_MAN_1H);
  426. BNAD_GET_REG(RAD0_MAC_MAN_1L);
  427. BNAD_GET_REG(RAD0_MAC_MAN_2H);
  428. BNAD_GET_REG(RAD0_MAC_MAN_2L);
  429. BNAD_GET_REG(RAD0_MAC_MAN_3H);
  430. BNAD_GET_REG(RAD0_MAC_MAN_3L);
  431. BNAD_GET_REG(RAD0_MAC_MAN_4H);
  432. BNAD_GET_REG(RAD0_MAC_MAN_4L);
  433. BNAD_GET_REG(RAD0_LAST4_IP);
  434. /* RxAdm 1 Registers */
  435. BNAD_GET_REG(RAD1_CTL_REG);
  436. BNAD_GET_REG(RAD1_PE_PARM_REG);
  437. BNAD_GET_REG(RAD1_BCN_REG);
  438. BNAD_GET_REG(RAD1_DEFAULT_REG);
  439. BNAD_GET_REG(RAD1_PROMISC_REG);
  440. BNAD_GET_REG(RAD1_BCNQ_REG);
  441. BNAD_GET_REG(RAD1_DEFAULTQ_REG);
  442. BNAD_GET_REG(RAD1_ERR_STS);
  443. BNAD_GET_REG(RAD1_SET_ERR_STS);
  444. BNAD_GET_REG(RAD1_ERR_INT_EN);
  445. /* TxA0 Registers */
  446. BNAD_GET_REG(TXA0_CTRL_REG);
  447. /* TxA0 TSO Sequence # Registers (RO) */
  448. for (i = 0; i < 8; i++) {
  449. BNAD_GET_REG(TXA0_TSO_TCP_SEQ_REG(i));
  450. BNAD_GET_REG(TXA0_TSO_IP_INFO_REG(i));
  451. }
  452. /* TxA1 Registers */
  453. BNAD_GET_REG(TXA1_CTRL_REG);
  454. /* TxA1 TSO Sequence # Registers (RO) */
  455. for (i = 0; i < 8; i++) {
  456. BNAD_GET_REG(TXA1_TSO_TCP_SEQ_REG(i));
  457. BNAD_GET_REG(TXA1_TSO_IP_INFO_REG(i));
  458. }
  459. /* RxA Registers */
  460. BNAD_GET_REG(RXA0_CTL_REG);
  461. BNAD_GET_REG(RXA1_CTL_REG);
  462. /* PLB0 Registers */
  463. BNAD_GET_REG(PLB0_ECM_TIMER_REG);
  464. BNAD_GET_REG(PLB0_RL_CTL);
  465. for (i = 0; i < 8; i++)
  466. BNAD_GET_REG(PLB0_RL_MAX_BC(i));
  467. BNAD_GET_REG(PLB0_RL_TU_PRIO);
  468. for (i = 0; i < 8; i++)
  469. BNAD_GET_REG(PLB0_RL_BYTE_CNT(i));
  470. BNAD_GET_REG(PLB0_RL_MIN_REG);
  471. BNAD_GET_REG(PLB0_RL_MAX_REG);
  472. BNAD_GET_REG(PLB0_EMS_ADD_REG);
  473. /* PLB1 Registers */
  474. BNAD_GET_REG(PLB1_ECM_TIMER_REG);
  475. BNAD_GET_REG(PLB1_RL_CTL);
  476. for (i = 0; i < 8; i++)
  477. BNAD_GET_REG(PLB1_RL_MAX_BC(i));
  478. BNAD_GET_REG(PLB1_RL_TU_PRIO);
  479. for (i = 0; i < 8; i++)
  480. BNAD_GET_REG(PLB1_RL_BYTE_CNT(i));
  481. BNAD_GET_REG(PLB1_RL_MIN_REG);
  482. BNAD_GET_REG(PLB1_RL_MAX_REG);
  483. BNAD_GET_REG(PLB1_EMS_ADD_REG);
  484. /* HQM Control Register */
  485. BNAD_GET_REG(HQM0_CTL_REG);
  486. BNAD_GET_REG(HQM0_RXQ_STOP_SEM);
  487. BNAD_GET_REG(HQM0_TXQ_STOP_SEM);
  488. BNAD_GET_REG(HQM1_CTL_REG);
  489. BNAD_GET_REG(HQM1_RXQ_STOP_SEM);
  490. BNAD_GET_REG(HQM1_TXQ_STOP_SEM);
  491. /* LUT Registers */
  492. BNAD_GET_REG(LUT0_ERR_STS);
  493. BNAD_GET_REG(LUT0_SET_ERR_STS);
  494. BNAD_GET_REG(LUT1_ERR_STS);
  495. BNAD_GET_REG(LUT1_SET_ERR_STS);
  496. /* TRC Registers */
  497. BNAD_GET_REG(TRC_CTL_REG);
  498. BNAD_GET_REG(TRC_MODS_REG);
  499. BNAD_GET_REG(TRC_TRGC_REG);
  500. BNAD_GET_REG(TRC_CNT1_REG);
  501. BNAD_GET_REG(TRC_CNT2_REG);
  502. BNAD_GET_REG(TRC_NXTS_REG);
  503. BNAD_GET_REG(TRC_DIRR_REG);
  504. for (i = 0; i < 10; i++)
  505. BNAD_GET_REG(TRC_TRGM_REG(i));
  506. for (i = 0; i < 10; i++)
  507. BNAD_GET_REG(TRC_NXTM_REG(i));
  508. for (i = 0; i < 10; i++)
  509. BNAD_GET_REG(TRC_STRM_REG(i));
  510. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  511. #undef BNAD_GET_REG
  512. return num;
  513. }
  514. static int
  515. bnad_get_regs_len(struct net_device *netdev)
  516. {
  517. int ret = get_regs(netdev_priv(netdev), NULL) * sizeof(u32);
  518. return ret;
  519. }
  520. static void
  521. bnad_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *buf)
  522. {
  523. memset(buf, 0, bnad_get_regs_len(netdev));
  524. get_regs(netdev_priv(netdev), buf);
  525. }
  526. static void
  527. bnad_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wolinfo)
  528. {
  529. wolinfo->supported = 0;
  530. wolinfo->wolopts = 0;
  531. }
  532. static int
  533. bnad_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  534. {
  535. struct bnad *bnad = netdev_priv(netdev);
  536. unsigned long flags;
  537. /* Lock rqd. to access bnad->bna_lock */
  538. spin_lock_irqsave(&bnad->bna_lock, flags);
  539. coalesce->use_adaptive_rx_coalesce =
  540. (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) ? true : false;
  541. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  542. coalesce->rx_coalesce_usecs = bnad->rx_coalescing_timeo *
  543. BFI_COALESCING_TIMER_UNIT;
  544. coalesce->tx_coalesce_usecs = bnad->tx_coalescing_timeo *
  545. BFI_COALESCING_TIMER_UNIT;
  546. coalesce->tx_max_coalesced_frames = BFI_TX_INTERPKT_COUNT;
  547. return 0;
  548. }
  549. static int
  550. bnad_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
  551. {
  552. struct bnad *bnad = netdev_priv(netdev);
  553. unsigned long flags;
  554. int dim_timer_del = 0;
  555. if (coalesce->rx_coalesce_usecs == 0 ||
  556. coalesce->rx_coalesce_usecs >
  557. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  558. return -EINVAL;
  559. if (coalesce->tx_coalesce_usecs == 0 ||
  560. coalesce->tx_coalesce_usecs >
  561. BFI_MAX_COALESCING_TIMEO * BFI_COALESCING_TIMER_UNIT)
  562. return -EINVAL;
  563. mutex_lock(&bnad->conf_mutex);
  564. /*
  565. * Do not need to store rx_coalesce_usecs here
  566. * Every time DIM is disabled, we can get it from the
  567. * stack.
  568. */
  569. spin_lock_irqsave(&bnad->bna_lock, flags);
  570. if (coalesce->use_adaptive_rx_coalesce) {
  571. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED)) {
  572. bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
  573. bnad_dim_timer_start(bnad);
  574. }
  575. } else {
  576. if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED) {
  577. bnad->cfg_flags &= ~BNAD_CF_DIM_ENABLED;
  578. dim_timer_del = bnad_dim_timer_running(bnad);
  579. if (dim_timer_del) {
  580. clear_bit(BNAD_RF_DIM_TIMER_RUNNING,
  581. &bnad->run_flags);
  582. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  583. del_timer_sync(&bnad->dim_timer);
  584. spin_lock_irqsave(&bnad->bna_lock, flags);
  585. }
  586. bnad_rx_coalescing_timeo_set(bnad);
  587. }
  588. }
  589. if (bnad->tx_coalescing_timeo != coalesce->tx_coalesce_usecs /
  590. BFI_COALESCING_TIMER_UNIT) {
  591. bnad->tx_coalescing_timeo = coalesce->tx_coalesce_usecs /
  592. BFI_COALESCING_TIMER_UNIT;
  593. bnad_tx_coalescing_timeo_set(bnad);
  594. }
  595. if (bnad->rx_coalescing_timeo != coalesce->rx_coalesce_usecs /
  596. BFI_COALESCING_TIMER_UNIT) {
  597. bnad->rx_coalescing_timeo = coalesce->rx_coalesce_usecs /
  598. BFI_COALESCING_TIMER_UNIT;
  599. if (!(bnad->cfg_flags & BNAD_CF_DIM_ENABLED))
  600. bnad_rx_coalescing_timeo_set(bnad);
  601. }
  602. /* Add Tx Inter-pkt DMA count? */
  603. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  604. mutex_unlock(&bnad->conf_mutex);
  605. return 0;
  606. }
  607. static void
  608. bnad_get_ringparam(struct net_device *netdev,
  609. struct ethtool_ringparam *ringparam)
  610. {
  611. struct bnad *bnad = netdev_priv(netdev);
  612. ringparam->rx_max_pending = BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq;
  613. ringparam->rx_mini_max_pending = 0;
  614. ringparam->rx_jumbo_max_pending = 0;
  615. ringparam->tx_max_pending = BNAD_MAX_Q_DEPTH;
  616. ringparam->rx_pending = bnad->rxq_depth;
  617. ringparam->rx_mini_max_pending = 0;
  618. ringparam->rx_jumbo_max_pending = 0;
  619. ringparam->tx_pending = bnad->txq_depth;
  620. }
  621. static int
  622. bnad_set_ringparam(struct net_device *netdev,
  623. struct ethtool_ringparam *ringparam)
  624. {
  625. int i, current_err, err = 0;
  626. struct bnad *bnad = netdev_priv(netdev);
  627. mutex_lock(&bnad->conf_mutex);
  628. if (ringparam->rx_pending == bnad->rxq_depth &&
  629. ringparam->tx_pending == bnad->txq_depth) {
  630. mutex_unlock(&bnad->conf_mutex);
  631. return 0;
  632. }
  633. if (ringparam->rx_pending < BNAD_MIN_Q_DEPTH ||
  634. ringparam->rx_pending > BNAD_MAX_Q_DEPTH / bnad_rxqs_per_cq ||
  635. !BNA_POWER_OF_2(ringparam->rx_pending)) {
  636. mutex_unlock(&bnad->conf_mutex);
  637. return -EINVAL;
  638. }
  639. if (ringparam->tx_pending < BNAD_MIN_Q_DEPTH ||
  640. ringparam->tx_pending > BNAD_MAX_Q_DEPTH ||
  641. !BNA_POWER_OF_2(ringparam->tx_pending)) {
  642. mutex_unlock(&bnad->conf_mutex);
  643. return -EINVAL;
  644. }
  645. if (ringparam->rx_pending != bnad->rxq_depth) {
  646. bnad->rxq_depth = ringparam->rx_pending;
  647. for (i = 0; i < bnad->num_rx; i++) {
  648. if (!bnad->rx_info[i].rx)
  649. continue;
  650. bnad_cleanup_rx(bnad, i);
  651. current_err = bnad_setup_rx(bnad, i);
  652. if (current_err && !err)
  653. err = current_err;
  654. }
  655. }
  656. if (ringparam->tx_pending != bnad->txq_depth) {
  657. bnad->txq_depth = ringparam->tx_pending;
  658. for (i = 0; i < bnad->num_tx; i++) {
  659. if (!bnad->tx_info[i].tx)
  660. continue;
  661. bnad_cleanup_tx(bnad, i);
  662. current_err = bnad_setup_tx(bnad, i);
  663. if (current_err && !err)
  664. err = current_err;
  665. }
  666. }
  667. mutex_unlock(&bnad->conf_mutex);
  668. return err;
  669. }
  670. static void
  671. bnad_get_pauseparam(struct net_device *netdev,
  672. struct ethtool_pauseparam *pauseparam)
  673. {
  674. struct bnad *bnad = netdev_priv(netdev);
  675. pauseparam->autoneg = 0;
  676. pauseparam->rx_pause = bnad->bna.port.pause_config.rx_pause;
  677. pauseparam->tx_pause = bnad->bna.port.pause_config.tx_pause;
  678. }
  679. static int
  680. bnad_set_pauseparam(struct net_device *netdev,
  681. struct ethtool_pauseparam *pauseparam)
  682. {
  683. struct bnad *bnad = netdev_priv(netdev);
  684. struct bna_pause_config pause_config;
  685. unsigned long flags;
  686. if (pauseparam->autoneg == AUTONEG_ENABLE)
  687. return -EINVAL;
  688. mutex_lock(&bnad->conf_mutex);
  689. if (pauseparam->rx_pause != bnad->bna.port.pause_config.rx_pause ||
  690. pauseparam->tx_pause != bnad->bna.port.pause_config.tx_pause) {
  691. pause_config.rx_pause = pauseparam->rx_pause;
  692. pause_config.tx_pause = pauseparam->tx_pause;
  693. spin_lock_irqsave(&bnad->bna_lock, flags);
  694. bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
  695. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  696. }
  697. mutex_unlock(&bnad->conf_mutex);
  698. return 0;
  699. }
  700. static u32
  701. bnad_get_rx_csum(struct net_device *netdev)
  702. {
  703. u32 rx_csum;
  704. struct bnad *bnad = netdev_priv(netdev);
  705. rx_csum = bnad->rx_csum;
  706. return rx_csum;
  707. }
  708. static int
  709. bnad_set_rx_csum(struct net_device *netdev, u32 rx_csum)
  710. {
  711. struct bnad *bnad = netdev_priv(netdev);
  712. mutex_lock(&bnad->conf_mutex);
  713. bnad->rx_csum = rx_csum;
  714. mutex_unlock(&bnad->conf_mutex);
  715. return 0;
  716. }
  717. static int
  718. bnad_set_tx_csum(struct net_device *netdev, u32 tx_csum)
  719. {
  720. struct bnad *bnad = netdev_priv(netdev);
  721. mutex_lock(&bnad->conf_mutex);
  722. if (tx_csum) {
  723. netdev->features |= NETIF_F_IP_CSUM;
  724. netdev->features |= NETIF_F_IPV6_CSUM;
  725. } else {
  726. netdev->features &= ~NETIF_F_IP_CSUM;
  727. netdev->features &= ~NETIF_F_IPV6_CSUM;
  728. }
  729. mutex_unlock(&bnad->conf_mutex);
  730. return 0;
  731. }
  732. static int
  733. bnad_set_tso(struct net_device *netdev, u32 tso)
  734. {
  735. struct bnad *bnad = netdev_priv(netdev);
  736. mutex_lock(&bnad->conf_mutex);
  737. if (tso) {
  738. netdev->features |= NETIF_F_TSO;
  739. netdev->features |= NETIF_F_TSO6;
  740. } else {
  741. netdev->features &= ~NETIF_F_TSO;
  742. netdev->features &= ~NETIF_F_TSO6;
  743. }
  744. mutex_unlock(&bnad->conf_mutex);
  745. return 0;
  746. }
  747. static void
  748. bnad_get_strings(struct net_device *netdev, u32 stringset, u8 * string)
  749. {
  750. struct bnad *bnad = netdev_priv(netdev);
  751. int i, j, q_num;
  752. u64 bmap;
  753. mutex_lock(&bnad->conf_mutex);
  754. switch (stringset) {
  755. case ETH_SS_STATS:
  756. for (i = 0; i < BNAD_ETHTOOL_STATS_NUM; i++) {
  757. BUG_ON(!(strlen(bnad_net_stats_strings[i]) <
  758. ETH_GSTRING_LEN));
  759. memcpy(string, bnad_net_stats_strings[i],
  760. ETH_GSTRING_LEN);
  761. string += ETH_GSTRING_LEN;
  762. }
  763. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  764. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  765. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  766. if (bmap & 1) {
  767. sprintf(string, "txf%d_ucast_octets", i);
  768. string += ETH_GSTRING_LEN;
  769. sprintf(string, "txf%d_ucast", i);
  770. string += ETH_GSTRING_LEN;
  771. sprintf(string, "txf%d_ucast_vlan", i);
  772. string += ETH_GSTRING_LEN;
  773. sprintf(string, "txf%d_mcast_octets", i);
  774. string += ETH_GSTRING_LEN;
  775. sprintf(string, "txf%d_mcast", i);
  776. string += ETH_GSTRING_LEN;
  777. sprintf(string, "txf%d_mcast_vlan", i);
  778. string += ETH_GSTRING_LEN;
  779. sprintf(string, "txf%d_bcast_octets", i);
  780. string += ETH_GSTRING_LEN;
  781. sprintf(string, "txf%d_bcast", i);
  782. string += ETH_GSTRING_LEN;
  783. sprintf(string, "txf%d_bcast_vlan", i);
  784. string += ETH_GSTRING_LEN;
  785. sprintf(string, "txf%d_errors", i);
  786. string += ETH_GSTRING_LEN;
  787. sprintf(string, "txf%d_filter_vlan", i);
  788. string += ETH_GSTRING_LEN;
  789. sprintf(string, "txf%d_filter_mac_sa", i);
  790. string += ETH_GSTRING_LEN;
  791. }
  792. bmap >>= 1;
  793. }
  794. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  795. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  796. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  797. if (bmap & 1) {
  798. sprintf(string, "rxf%d_ucast_octets", i);
  799. string += ETH_GSTRING_LEN;
  800. sprintf(string, "rxf%d_ucast", i);
  801. string += ETH_GSTRING_LEN;
  802. sprintf(string, "rxf%d_ucast_vlan", i);
  803. string += ETH_GSTRING_LEN;
  804. sprintf(string, "rxf%d_mcast_octets", i);
  805. string += ETH_GSTRING_LEN;
  806. sprintf(string, "rxf%d_mcast", i);
  807. string += ETH_GSTRING_LEN;
  808. sprintf(string, "rxf%d_mcast_vlan", i);
  809. string += ETH_GSTRING_LEN;
  810. sprintf(string, "rxf%d_bcast_octets", i);
  811. string += ETH_GSTRING_LEN;
  812. sprintf(string, "rxf%d_bcast", i);
  813. string += ETH_GSTRING_LEN;
  814. sprintf(string, "rxf%d_bcast_vlan", i);
  815. string += ETH_GSTRING_LEN;
  816. sprintf(string, "rxf%d_frame_drops", i);
  817. string += ETH_GSTRING_LEN;
  818. }
  819. bmap >>= 1;
  820. }
  821. q_num = 0;
  822. for (i = 0; i < bnad->num_rx; i++) {
  823. if (!bnad->rx_info[i].rx)
  824. continue;
  825. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  826. sprintf(string, "cq%d_producer_index", q_num);
  827. string += ETH_GSTRING_LEN;
  828. sprintf(string, "cq%d_consumer_index", q_num);
  829. string += ETH_GSTRING_LEN;
  830. sprintf(string, "cq%d_hw_producer_index",
  831. q_num);
  832. string += ETH_GSTRING_LEN;
  833. q_num++;
  834. }
  835. }
  836. q_num = 0;
  837. for (i = 0; i < bnad->num_rx; i++) {
  838. if (!bnad->rx_info[i].rx)
  839. continue;
  840. for (j = 0; j < bnad->num_rxp_per_rx; j++) {
  841. sprintf(string, "rxq%d_packets", q_num);
  842. string += ETH_GSTRING_LEN;
  843. sprintf(string, "rxq%d_bytes", q_num);
  844. string += ETH_GSTRING_LEN;
  845. sprintf(string, "rxq%d_packets_with_error",
  846. q_num);
  847. string += ETH_GSTRING_LEN;
  848. sprintf(string, "rxq%d_allocbuf_failed", q_num);
  849. string += ETH_GSTRING_LEN;
  850. sprintf(string, "rxq%d_producer_index", q_num);
  851. string += ETH_GSTRING_LEN;
  852. sprintf(string, "rxq%d_consumer_index", q_num);
  853. string += ETH_GSTRING_LEN;
  854. q_num++;
  855. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  856. bnad->rx_info[i].rx_ctrl[j].ccb->
  857. rcb[1] &&
  858. bnad->rx_info[i].rx_ctrl[j].ccb->
  859. rcb[1]->rxq) {
  860. sprintf(string, "rxq%d_packets", q_num);
  861. string += ETH_GSTRING_LEN;
  862. sprintf(string, "rxq%d_bytes", q_num);
  863. string += ETH_GSTRING_LEN;
  864. sprintf(string,
  865. "rxq%d_packets_with_error", q_num);
  866. string += ETH_GSTRING_LEN;
  867. sprintf(string, "rxq%d_allocbuf_failed",
  868. q_num);
  869. string += ETH_GSTRING_LEN;
  870. sprintf(string, "rxq%d_producer_index",
  871. q_num);
  872. string += ETH_GSTRING_LEN;
  873. sprintf(string, "rxq%d_consumer_index",
  874. q_num);
  875. string += ETH_GSTRING_LEN;
  876. q_num++;
  877. }
  878. }
  879. }
  880. q_num = 0;
  881. for (i = 0; i < bnad->num_tx; i++) {
  882. if (!bnad->tx_info[i].tx)
  883. continue;
  884. for (j = 0; j < bnad->num_txq_per_tx; j++) {
  885. sprintf(string, "txq%d_packets", q_num);
  886. string += ETH_GSTRING_LEN;
  887. sprintf(string, "txq%d_bytes", q_num);
  888. string += ETH_GSTRING_LEN;
  889. sprintf(string, "txq%d_producer_index", q_num);
  890. string += ETH_GSTRING_LEN;
  891. sprintf(string, "txq%d_consumer_index", q_num);
  892. string += ETH_GSTRING_LEN;
  893. sprintf(string, "txq%d_hw_consumer_index",
  894. q_num);
  895. string += ETH_GSTRING_LEN;
  896. q_num++;
  897. }
  898. }
  899. break;
  900. default:
  901. break;
  902. }
  903. mutex_unlock(&bnad->conf_mutex);
  904. }
  905. static int
  906. bnad_get_stats_count_locked(struct net_device *netdev)
  907. {
  908. struct bnad *bnad = netdev_priv(netdev);
  909. int i, j, count, rxf_active_num = 0, txf_active_num = 0;
  910. u64 bmap;
  911. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  912. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  913. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  914. if (bmap & 1)
  915. txf_active_num++;
  916. bmap >>= 1;
  917. }
  918. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  919. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  920. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  921. if (bmap & 1)
  922. rxf_active_num++;
  923. bmap >>= 1;
  924. }
  925. count = BNAD_ETHTOOL_STATS_NUM +
  926. txf_active_num * BNAD_NUM_TXF_COUNTERS +
  927. rxf_active_num * BNAD_NUM_RXF_COUNTERS;
  928. for (i = 0; i < bnad->num_rx; i++) {
  929. if (!bnad->rx_info[i].rx)
  930. continue;
  931. count += bnad->num_rxp_per_rx * BNAD_NUM_CQ_COUNTERS;
  932. count += bnad->num_rxp_per_rx * BNAD_NUM_RXQ_COUNTERS;
  933. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  934. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  935. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  936. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1]->rxq)
  937. count += BNAD_NUM_RXQ_COUNTERS;
  938. }
  939. for (i = 0; i < bnad->num_tx; i++) {
  940. if (!bnad->tx_info[i].tx)
  941. continue;
  942. count += bnad->num_txq_per_tx * BNAD_NUM_TXQ_COUNTERS;
  943. }
  944. return count;
  945. }
  946. static int
  947. bnad_per_q_stats_fill(struct bnad *bnad, u64 *buf, int bi)
  948. {
  949. int i, j;
  950. struct bna_rcb *rcb = NULL;
  951. struct bna_tcb *tcb = NULL;
  952. for (i = 0; i < bnad->num_rx; i++) {
  953. if (!bnad->rx_info[i].rx)
  954. continue;
  955. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  956. if (bnad->rx_info[i].rx_ctrl[j].ccb &&
  957. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  958. bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0]->rxq) {
  959. buf[bi++] = bnad->rx_info[i].rx_ctrl[j].
  960. ccb->producer_index;
  961. buf[bi++] = 0; /* ccb->consumer_index */
  962. buf[bi++] = *(bnad->rx_info[i].rx_ctrl[j].
  963. ccb->hw_producer_index);
  964. }
  965. }
  966. for (i = 0; i < bnad->num_rx; i++) {
  967. if (!bnad->rx_info[i].rx)
  968. continue;
  969. for (j = 0; j < bnad->num_rxp_per_rx; j++)
  970. if (bnad->rx_info[i].rx_ctrl[j].ccb) {
  971. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[0] &&
  972. bnad->rx_info[i].rx_ctrl[j].ccb->
  973. rcb[0]->rxq) {
  974. rcb = bnad->rx_info[i].rx_ctrl[j].
  975. ccb->rcb[0];
  976. buf[bi++] = rcb->rxq->rx_packets;
  977. buf[bi++] = rcb->rxq->rx_bytes;
  978. buf[bi++] = rcb->rxq->
  979. rx_packets_with_error;
  980. buf[bi++] = rcb->rxq->
  981. rxbuf_alloc_failed;
  982. buf[bi++] = rcb->producer_index;
  983. buf[bi++] = rcb->consumer_index;
  984. }
  985. if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
  986. bnad->rx_info[i].rx_ctrl[j].ccb->
  987. rcb[1]->rxq) {
  988. rcb = bnad->rx_info[i].rx_ctrl[j].
  989. ccb->rcb[1];
  990. buf[bi++] = rcb->rxq->rx_packets;
  991. buf[bi++] = rcb->rxq->rx_bytes;
  992. buf[bi++] = rcb->rxq->
  993. rx_packets_with_error;
  994. buf[bi++] = rcb->rxq->
  995. rxbuf_alloc_failed;
  996. buf[bi++] = rcb->producer_index;
  997. buf[bi++] = rcb->consumer_index;
  998. }
  999. }
  1000. }
  1001. for (i = 0; i < bnad->num_tx; i++) {
  1002. if (!bnad->tx_info[i].tx)
  1003. continue;
  1004. for (j = 0; j < bnad->num_txq_per_tx; j++)
  1005. if (bnad->tx_info[i].tcb[j] &&
  1006. bnad->tx_info[i].tcb[j]->txq) {
  1007. tcb = bnad->tx_info[i].tcb[j];
  1008. buf[bi++] = tcb->txq->tx_packets;
  1009. buf[bi++] = tcb->txq->tx_bytes;
  1010. buf[bi++] = tcb->producer_index;
  1011. buf[bi++] = tcb->consumer_index;
  1012. buf[bi++] = *(tcb->hw_consumer_index);
  1013. }
  1014. }
  1015. return bi;
  1016. }
  1017. static void
  1018. bnad_get_ethtool_stats(struct net_device *netdev, struct ethtool_stats *stats,
  1019. u64 *buf)
  1020. {
  1021. struct bnad *bnad = netdev_priv(netdev);
  1022. int i, j, bi;
  1023. unsigned long flags;
  1024. struct rtnl_link_stats64 *net_stats64;
  1025. u64 *stats64;
  1026. u64 bmap;
  1027. mutex_lock(&bnad->conf_mutex);
  1028. if (bnad_get_stats_count_locked(netdev) != stats->n_stats) {
  1029. mutex_unlock(&bnad->conf_mutex);
  1030. return;
  1031. }
  1032. /*
  1033. * Used bna_lock to sync reads from bna_stats, which is written
  1034. * under the same lock
  1035. */
  1036. spin_lock_irqsave(&bnad->bna_lock, flags);
  1037. bi = 0;
  1038. memset(buf, 0, stats->n_stats * sizeof(u64));
  1039. net_stats64 = (struct rtnl_link_stats64 *)buf;
  1040. bnad_netdev_qstats_fill(bnad, net_stats64);
  1041. bnad_netdev_hwstats_fill(bnad, net_stats64);
  1042. bi = sizeof(*net_stats64) / sizeof(u64);
  1043. /* Get netif_queue_stopped from stack */
  1044. bnad->stats.drv_stats.netif_queue_stopped = netif_queue_stopped(netdev);
  1045. /* Fill driver stats into ethtool buffers */
  1046. stats64 = (u64 *)&bnad->stats.drv_stats;
  1047. for (i = 0; i < sizeof(struct bnad_drv_stats) / sizeof(u64); i++)
  1048. buf[bi++] = stats64[i];
  1049. /* Fill hardware stats excluding the rxf/txf into ethtool bufs */
  1050. stats64 = (u64 *) bnad->stats.bna_stats->hw_stats;
  1051. for (i = 0;
  1052. i < offsetof(struct bfi_ll_stats, rxf_stats[0]) / sizeof(u64);
  1053. i++)
  1054. buf[bi++] = stats64[i];
  1055. /* Fill txf stats into ethtool buffers */
  1056. bmap = (u64)bnad->bna.tx_mod.txf_bmap[0] |
  1057. ((u64)bnad->bna.tx_mod.txf_bmap[1] << 32);
  1058. for (i = 0; bmap && (i < BFI_LL_TXF_ID_MAX); i++) {
  1059. if (bmap & 1) {
  1060. stats64 = (u64 *)&bnad->stats.bna_stats->
  1061. hw_stats->txf_stats[i];
  1062. for (j = 0; j < sizeof(struct bfi_ll_stats_txf) /
  1063. sizeof(u64); j++)
  1064. buf[bi++] = stats64[j];
  1065. }
  1066. bmap >>= 1;
  1067. }
  1068. /* Fill rxf stats into ethtool buffers */
  1069. bmap = (u64)bnad->bna.rx_mod.rxf_bmap[0] |
  1070. ((u64)bnad->bna.rx_mod.rxf_bmap[1] << 32);
  1071. for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
  1072. if (bmap & 1) {
  1073. stats64 = (u64 *)&bnad->stats.bna_stats->
  1074. hw_stats->rxf_stats[i];
  1075. for (j = 0; j < sizeof(struct bfi_ll_stats_rxf) /
  1076. sizeof(u64); j++)
  1077. buf[bi++] = stats64[j];
  1078. }
  1079. bmap >>= 1;
  1080. }
  1081. /* Fill per Q stats into ethtool buffers */
  1082. bi = bnad_per_q_stats_fill(bnad, buf, bi);
  1083. spin_unlock_irqrestore(&bnad->bna_lock, flags);
  1084. mutex_unlock(&bnad->conf_mutex);
  1085. }
  1086. static int
  1087. bnad_get_sset_count(struct net_device *netdev, int sset)
  1088. {
  1089. switch (sset) {
  1090. case ETH_SS_STATS:
  1091. return bnad_get_stats_count_locked(netdev);
  1092. default:
  1093. return -EOPNOTSUPP;
  1094. }
  1095. }
  1096. static struct ethtool_ops bnad_ethtool_ops = {
  1097. .get_settings = bnad_get_settings,
  1098. .set_settings = bnad_set_settings,
  1099. .get_drvinfo = bnad_get_drvinfo,
  1100. .get_regs_len = bnad_get_regs_len,
  1101. .get_regs = bnad_get_regs,
  1102. .get_wol = bnad_get_wol,
  1103. .get_link = ethtool_op_get_link,
  1104. .get_coalesce = bnad_get_coalesce,
  1105. .set_coalesce = bnad_set_coalesce,
  1106. .get_ringparam = bnad_get_ringparam,
  1107. .set_ringparam = bnad_set_ringparam,
  1108. .get_pauseparam = bnad_get_pauseparam,
  1109. .set_pauseparam = bnad_set_pauseparam,
  1110. .get_rx_csum = bnad_get_rx_csum,
  1111. .set_rx_csum = bnad_set_rx_csum,
  1112. .get_tx_csum = ethtool_op_get_tx_csum,
  1113. .set_tx_csum = bnad_set_tx_csum,
  1114. .get_sg = ethtool_op_get_sg,
  1115. .set_sg = ethtool_op_set_sg,
  1116. .get_tso = ethtool_op_get_tso,
  1117. .set_tso = bnad_set_tso,
  1118. .get_strings = bnad_get_strings,
  1119. .get_ethtool_stats = bnad_get_ethtool_stats,
  1120. .get_sset_count = bnad_get_sset_count
  1121. };
  1122. void
  1123. bnad_set_ethtool_ops(struct net_device *netdev)
  1124. {
  1125. SET_ETHTOOL_OPS(netdev, &bnad_ethtool_ops);
  1126. }