am79c961a.c 18 KB

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  1. /*
  2. * linux/drivers/net/am79c961.c
  3. *
  4. * by Russell King <rmk@arm.linux.org.uk> 1995-2001.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Derived from various things including skeleton.c
  11. *
  12. * This is a special driver for the am79c961A Lance chip used in the
  13. * Intel (formally Digital Equipment Corp) EBSA110 platform. Please
  14. * note that this can not be built as a module (it doesn't make sense).
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/ioport.h>
  20. #include <linux/slab.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/init.h>
  27. #include <linux/crc32.h>
  28. #include <linux/bitops.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/io.h>
  31. #include <mach/hardware.h>
  32. #include <asm/system.h>
  33. #define TX_BUFFERS 15
  34. #define RX_BUFFERS 25
  35. #include "am79c961a.h"
  36. static irqreturn_t
  37. am79c961_interrupt (int irq, void *dev_id);
  38. static unsigned int net_debug = NET_DEBUG;
  39. static const char version[] =
  40. "am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";
  41. /* --------------------------------------------------------------------------- */
  42. #ifdef __arm__
  43. static void write_rreg(u_long base, u_int reg, u_int val)
  44. {
  45. __asm__(
  46. "str%?h %1, [%2] @ NET_RAP\n\t"
  47. "str%?h %0, [%2, #-4] @ NET_RDP"
  48. :
  49. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  50. }
  51. static inline unsigned short read_rreg(u_long base_addr, u_int reg)
  52. {
  53. unsigned short v;
  54. __asm__(
  55. "str%?h %1, [%2] @ NET_RAP\n\t"
  56. "ldr%?h %0, [%2, #-4] @ NET_RDP"
  57. : "=r" (v)
  58. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  59. return v;
  60. }
  61. static inline void write_ireg(u_long base, u_int reg, u_int val)
  62. {
  63. __asm__(
  64. "str%?h %1, [%2] @ NET_RAP\n\t"
  65. "str%?h %0, [%2, #8] @ NET_IDP"
  66. :
  67. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  68. }
  69. static inline unsigned short read_ireg(u_long base_addr, u_int reg)
  70. {
  71. u_short v;
  72. __asm__(
  73. "str%?h %1, [%2] @ NAT_RAP\n\t"
  74. "ldr%?h %0, [%2, #8] @ NET_IDP\n\t"
  75. : "=r" (v)
  76. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  77. return v;
  78. }
  79. #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1))
  80. #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
  81. static inline void
  82. am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  83. {
  84. offset = ISAMEM_BASE + (offset << 1);
  85. length = (length + 1) & ~1;
  86. if ((int)buf & 2) {
  87. __asm__ __volatile__("str%?h %2, [%0], #4"
  88. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  89. buf += 2;
  90. length -= 2;
  91. }
  92. while (length > 8) {
  93. unsigned int tmp, tmp2;
  94. __asm__ __volatile__(
  95. "ldm%?ia %1!, {%2, %3}\n\t"
  96. "str%?h %2, [%0], #4\n\t"
  97. "mov%? %2, %2, lsr #16\n\t"
  98. "str%?h %2, [%0], #4\n\t"
  99. "str%?h %3, [%0], #4\n\t"
  100. "mov%? %3, %3, lsr #16\n\t"
  101. "str%?h %3, [%0], #4"
  102. : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2)
  103. : "0" (offset), "1" (buf));
  104. length -= 8;
  105. }
  106. while (length > 0) {
  107. __asm__ __volatile__("str%?h %2, [%0], #4"
  108. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  109. buf += 2;
  110. length -= 2;
  111. }
  112. }
  113. static inline void
  114. am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  115. {
  116. offset = ISAMEM_BASE + (offset << 1);
  117. length = (length + 1) & ~1;
  118. if ((int)buf & 2) {
  119. unsigned int tmp;
  120. __asm__ __volatile__(
  121. "ldr%?h %2, [%0], #4\n\t"
  122. "str%?b %2, [%1], #1\n\t"
  123. "mov%? %2, %2, lsr #8\n\t"
  124. "str%?b %2, [%1], #1"
  125. : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
  126. length -= 2;
  127. }
  128. while (length > 8) {
  129. unsigned int tmp, tmp2, tmp3;
  130. __asm__ __volatile__(
  131. "ldr%?h %2, [%0], #4\n\t"
  132. "ldr%?h %3, [%0], #4\n\t"
  133. "orr%? %2, %2, %3, lsl #16\n\t"
  134. "ldr%?h %3, [%0], #4\n\t"
  135. "ldr%?h %4, [%0], #4\n\t"
  136. "orr%? %3, %3, %4, lsl #16\n\t"
  137. "stm%?ia %1!, {%2, %3}"
  138. : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
  139. : "0" (offset), "1" (buf));
  140. length -= 8;
  141. }
  142. while (length > 0) {
  143. unsigned int tmp;
  144. __asm__ __volatile__(
  145. "ldr%?h %2, [%0], #4\n\t"
  146. "str%?b %2, [%1], #1\n\t"
  147. "mov%? %2, %2, lsr #8\n\t"
  148. "str%?b %2, [%1], #1"
  149. : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
  150. length -= 2;
  151. }
  152. }
  153. #else
  154. #error Not compatible
  155. #endif
  156. static int
  157. am79c961_ramtest(struct net_device *dev, unsigned int val)
  158. {
  159. unsigned char *buffer = kmalloc (65536, GFP_KERNEL);
  160. int i, error = 0, errorcount = 0;
  161. if (!buffer)
  162. return 0;
  163. memset (buffer, val, 65536);
  164. am_writebuffer(dev, 0, buffer, 65536);
  165. memset (buffer, val ^ 255, 65536);
  166. am_readbuffer(dev, 0, buffer, 65536);
  167. for (i = 0; i < 65536; i++) {
  168. if (buffer[i] != val && !error) {
  169. printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i);
  170. error = 1;
  171. errorcount ++;
  172. } else if (error && buffer[i] == val) {
  173. printk ("%05X\n", i);
  174. error = 0;
  175. }
  176. }
  177. if (error)
  178. printk ("10000\n");
  179. kfree (buffer);
  180. return errorcount;
  181. }
  182. static void
  183. am79c961_init_for_open(struct net_device *dev)
  184. {
  185. struct dev_priv *priv = netdev_priv(dev);
  186. unsigned long flags;
  187. unsigned char *p;
  188. u_int hdr_addr, first_free_addr;
  189. int i;
  190. /*
  191. * Stop the chip.
  192. */
  193. spin_lock_irqsave(&priv->chip_lock, flags);
  194. write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
  195. spin_unlock_irqrestore(&priv->chip_lock, flags);
  196. write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
  197. write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
  198. write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */
  199. write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */
  200. for (i = LADRL; i <= LADRH; i++)
  201. write_rreg (dev->base_addr, i, 0);
  202. for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2)
  203. write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
  204. i = MODE_PORT_10BT;
  205. if (dev->flags & IFF_PROMISC)
  206. i |= MODE_PROMISC;
  207. write_rreg (dev->base_addr, MODE, i);
  208. write_rreg (dev->base_addr, POLLINT, 0);
  209. write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
  210. write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
  211. first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;
  212. hdr_addr = 0;
  213. priv->rxhead = 0;
  214. priv->rxtail = 0;
  215. priv->rxhdr = hdr_addr;
  216. for (i = 0; i < RX_BUFFERS; i++) {
  217. priv->rxbuffer[i] = first_free_addr;
  218. am_writeword (dev, hdr_addr, first_free_addr);
  219. am_writeword (dev, hdr_addr + 2, RMD_OWN);
  220. am_writeword (dev, hdr_addr + 4, (-1600));
  221. am_writeword (dev, hdr_addr + 6, 0);
  222. first_free_addr += 1600;
  223. hdr_addr += 8;
  224. }
  225. priv->txhead = 0;
  226. priv->txtail = 0;
  227. priv->txhdr = hdr_addr;
  228. for (i = 0; i < TX_BUFFERS; i++) {
  229. priv->txbuffer[i] = first_free_addr;
  230. am_writeword (dev, hdr_addr, first_free_addr);
  231. am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);
  232. am_writeword (dev, hdr_addr + 4, 0xf000);
  233. am_writeword (dev, hdr_addr + 6, 0);
  234. first_free_addr += 1600;
  235. hdr_addr += 8;
  236. }
  237. write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
  238. write_rreg (dev->base_addr, BASERXH, 0);
  239. write_rreg (dev->base_addr, BASETXL, priv->txhdr);
  240. write_rreg (dev->base_addr, BASERXH, 0);
  241. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  242. write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
  243. write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
  244. write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
  245. }
  246. static void am79c961_timer(unsigned long data)
  247. {
  248. struct net_device *dev = (struct net_device *)data;
  249. struct dev_priv *priv = netdev_priv(dev);
  250. unsigned int lnkstat, carrier;
  251. lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST;
  252. carrier = netif_carrier_ok(dev);
  253. if (lnkstat && !carrier) {
  254. netif_carrier_on(dev);
  255. printk("%s: link up\n", dev->name);
  256. } else if (!lnkstat && carrier) {
  257. netif_carrier_off(dev);
  258. printk("%s: link down\n", dev->name);
  259. }
  260. mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500));
  261. }
  262. /*
  263. * Open/initialize the board.
  264. */
  265. static int
  266. am79c961_open(struct net_device *dev)
  267. {
  268. struct dev_priv *priv = netdev_priv(dev);
  269. int ret;
  270. ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev);
  271. if (ret)
  272. return ret;
  273. am79c961_init_for_open(dev);
  274. netif_carrier_off(dev);
  275. priv->timer.expires = jiffies;
  276. add_timer(&priv->timer);
  277. netif_start_queue(dev);
  278. return 0;
  279. }
  280. /*
  281. * The inverse routine to am79c961_open().
  282. */
  283. static int
  284. am79c961_close(struct net_device *dev)
  285. {
  286. struct dev_priv *priv = netdev_priv(dev);
  287. unsigned long flags;
  288. del_timer_sync(&priv->timer);
  289. netif_stop_queue(dev);
  290. netif_carrier_off(dev);
  291. spin_lock_irqsave(&priv->chip_lock, flags);
  292. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  293. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  294. spin_unlock_irqrestore(&priv->chip_lock, flags);
  295. free_irq (dev->irq, dev);
  296. return 0;
  297. }
  298. static void am79c961_mc_hash(char *addr, unsigned short *hash)
  299. {
  300. if (addr[0] & 0x01) {
  301. int idx, bit;
  302. u32 crc;
  303. crc = ether_crc_le(ETH_ALEN, addr);
  304. idx = crc >> 30;
  305. bit = (crc >> 26) & 15;
  306. hash[idx] |= 1 << bit;
  307. }
  308. }
  309. /*
  310. * Set or clear promiscuous/multicast mode filter for this adapter.
  311. */
  312. static void am79c961_setmulticastlist (struct net_device *dev)
  313. {
  314. struct dev_priv *priv = netdev_priv(dev);
  315. unsigned long flags;
  316. unsigned short multi_hash[4], mode;
  317. int i, stopped;
  318. mode = MODE_PORT_10BT;
  319. if (dev->flags & IFF_PROMISC) {
  320. mode |= MODE_PROMISC;
  321. } else if (dev->flags & IFF_ALLMULTI) {
  322. memset(multi_hash, 0xff, sizeof(multi_hash));
  323. } else {
  324. struct netdev_hw_addr *ha;
  325. memset(multi_hash, 0x00, sizeof(multi_hash));
  326. netdev_for_each_mc_addr(ha, dev)
  327. am79c961_mc_hash(ha->addr, multi_hash);
  328. }
  329. spin_lock_irqsave(&priv->chip_lock, flags);
  330. stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
  331. if (!stopped) {
  332. /*
  333. * Put the chip into suspend mode
  334. */
  335. write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
  336. /*
  337. * Spin waiting for chip to report suspend mode
  338. */
  339. while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
  340. spin_unlock_irqrestore(&priv->chip_lock, flags);
  341. nop();
  342. spin_lock_irqsave(&priv->chip_lock, flags);
  343. }
  344. }
  345. /*
  346. * Update the multicast hash table
  347. */
  348. for (i = 0; i < ARRAY_SIZE(multi_hash); i++)
  349. write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
  350. /*
  351. * Write the mode register
  352. */
  353. write_rreg(dev->base_addr, MODE, mode);
  354. if (!stopped) {
  355. /*
  356. * Put the chip back into running mode
  357. */
  358. write_rreg(dev->base_addr, CTRL1, 0);
  359. }
  360. spin_unlock_irqrestore(&priv->chip_lock, flags);
  361. }
  362. static void am79c961_timeout(struct net_device *dev)
  363. {
  364. printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",
  365. dev->name);
  366. /*
  367. * ought to do some setup of the tx side here
  368. */
  369. netif_wake_queue(dev);
  370. }
  371. /*
  372. * Transmit a packet
  373. */
  374. static int
  375. am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
  376. {
  377. struct dev_priv *priv = netdev_priv(dev);
  378. unsigned int hdraddr, bufaddr;
  379. unsigned int head;
  380. unsigned long flags;
  381. head = priv->txhead;
  382. hdraddr = priv->txhdr + (head << 3);
  383. bufaddr = priv->txbuffer[head];
  384. head += 1;
  385. if (head >= TX_BUFFERS)
  386. head = 0;
  387. am_writebuffer (dev, bufaddr, skb->data, skb->len);
  388. am_writeword (dev, hdraddr + 4, -skb->len);
  389. am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
  390. priv->txhead = head;
  391. spin_lock_irqsave(&priv->chip_lock, flags);
  392. write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
  393. spin_unlock_irqrestore(&priv->chip_lock, flags);
  394. /*
  395. * If the next packet is owned by the ethernet device,
  396. * then the tx ring is full and we can't add another
  397. * packet.
  398. */
  399. if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN)
  400. netif_stop_queue(dev);
  401. dev_kfree_skb(skb);
  402. return NETDEV_TX_OK;
  403. }
  404. /*
  405. * If we have a good packet(s), get it/them out of the buffers.
  406. */
  407. static void
  408. am79c961_rx(struct net_device *dev, struct dev_priv *priv)
  409. {
  410. do {
  411. struct sk_buff *skb;
  412. u_int hdraddr;
  413. u_int pktaddr;
  414. u_int status;
  415. int len;
  416. hdraddr = priv->rxhdr + (priv->rxtail << 3);
  417. pktaddr = priv->rxbuffer[priv->rxtail];
  418. status = am_readword (dev, hdraddr + 2);
  419. if (status & RMD_OWN) /* do we own it? */
  420. break;
  421. priv->rxtail ++;
  422. if (priv->rxtail >= RX_BUFFERS)
  423. priv->rxtail = 0;
  424. if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {
  425. am_writeword (dev, hdraddr + 2, RMD_OWN);
  426. dev->stats.rx_errors++;
  427. if (status & RMD_ERR) {
  428. if (status & RMD_FRAM)
  429. dev->stats.rx_frame_errors++;
  430. if (status & RMD_CRC)
  431. dev->stats.rx_crc_errors++;
  432. } else if (status & RMD_STP)
  433. dev->stats.rx_length_errors++;
  434. continue;
  435. }
  436. len = am_readword(dev, hdraddr + 6);
  437. skb = dev_alloc_skb(len + 2);
  438. if (skb) {
  439. skb_reserve(skb, 2);
  440. am_readbuffer(dev, pktaddr, skb_put(skb, len), len);
  441. am_writeword(dev, hdraddr + 2, RMD_OWN);
  442. skb->protocol = eth_type_trans(skb, dev);
  443. netif_rx(skb);
  444. dev->stats.rx_bytes += len;
  445. dev->stats.rx_packets++;
  446. } else {
  447. am_writeword (dev, hdraddr + 2, RMD_OWN);
  448. printk (KERN_WARNING "%s: memory squeeze, dropping packet.\n", dev->name);
  449. dev->stats.rx_dropped++;
  450. break;
  451. }
  452. } while (1);
  453. }
  454. /*
  455. * Update stats for the transmitted packet
  456. */
  457. static void
  458. am79c961_tx(struct net_device *dev, struct dev_priv *priv)
  459. {
  460. do {
  461. short len;
  462. u_int hdraddr;
  463. u_int status;
  464. hdraddr = priv->txhdr + (priv->txtail << 3);
  465. status = am_readword (dev, hdraddr + 2);
  466. if (status & TMD_OWN)
  467. break;
  468. priv->txtail ++;
  469. if (priv->txtail >= TX_BUFFERS)
  470. priv->txtail = 0;
  471. if (status & TMD_ERR) {
  472. u_int status2;
  473. dev->stats.tx_errors++;
  474. status2 = am_readword (dev, hdraddr + 6);
  475. /*
  476. * Clear the error byte
  477. */
  478. am_writeword (dev, hdraddr + 6, 0);
  479. if (status2 & TST_RTRY)
  480. dev->stats.collisions += 16;
  481. if (status2 & TST_LCOL)
  482. dev->stats.tx_window_errors++;
  483. if (status2 & TST_LCAR)
  484. dev->stats.tx_carrier_errors++;
  485. if (status2 & TST_UFLO)
  486. dev->stats.tx_fifo_errors++;
  487. continue;
  488. }
  489. dev->stats.tx_packets++;
  490. len = am_readword (dev, hdraddr + 4);
  491. dev->stats.tx_bytes += -len;
  492. } while (priv->txtail != priv->txhead);
  493. netif_wake_queue(dev);
  494. }
  495. static irqreturn_t
  496. am79c961_interrupt(int irq, void *dev_id)
  497. {
  498. struct net_device *dev = (struct net_device *)dev_id;
  499. struct dev_priv *priv = netdev_priv(dev);
  500. u_int status, n = 100;
  501. int handled = 0;
  502. do {
  503. status = read_rreg(dev->base_addr, CSR0);
  504. write_rreg(dev->base_addr, CSR0, status &
  505. (CSR0_IENA|CSR0_TINT|CSR0_RINT|
  506. CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));
  507. if (status & CSR0_RINT) {
  508. handled = 1;
  509. am79c961_rx(dev, priv);
  510. }
  511. if (status & CSR0_TINT) {
  512. handled = 1;
  513. am79c961_tx(dev, priv);
  514. }
  515. if (status & CSR0_MISS) {
  516. handled = 1;
  517. dev->stats.rx_dropped++;
  518. }
  519. if (status & CSR0_CERR) {
  520. handled = 1;
  521. mod_timer(&priv->timer, jiffies);
  522. }
  523. } while (--n && status & (CSR0_RINT | CSR0_TINT));
  524. return IRQ_RETVAL(handled);
  525. }
  526. #ifdef CONFIG_NET_POLL_CONTROLLER
  527. static void am79c961_poll_controller(struct net_device *dev)
  528. {
  529. unsigned long flags;
  530. local_irq_save(flags);
  531. am79c961_interrupt(dev->irq, dev);
  532. local_irq_restore(flags);
  533. }
  534. #endif
  535. /*
  536. * Initialise the chip. Note that we always expect
  537. * to be entered with interrupts enabled.
  538. */
  539. static int
  540. am79c961_hw_init(struct net_device *dev)
  541. {
  542. struct dev_priv *priv = netdev_priv(dev);
  543. spin_lock_irq(&priv->chip_lock);
  544. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  545. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  546. spin_unlock_irq(&priv->chip_lock);
  547. am79c961_ramtest(dev, 0x66);
  548. am79c961_ramtest(dev, 0x99);
  549. return 0;
  550. }
  551. static void __init am79c961_banner(void)
  552. {
  553. static unsigned version_printed;
  554. if (net_debug && version_printed++ == 0)
  555. printk(KERN_INFO "%s", version);
  556. }
  557. static const struct net_device_ops am79c961_netdev_ops = {
  558. .ndo_open = am79c961_open,
  559. .ndo_stop = am79c961_close,
  560. .ndo_start_xmit = am79c961_sendpacket,
  561. .ndo_set_multicast_list = am79c961_setmulticastlist,
  562. .ndo_tx_timeout = am79c961_timeout,
  563. .ndo_validate_addr = eth_validate_addr,
  564. .ndo_change_mtu = eth_change_mtu,
  565. .ndo_set_mac_address = eth_mac_addr,
  566. #ifdef CONFIG_NET_POLL_CONTROLLER
  567. .ndo_poll_controller = am79c961_poll_controller,
  568. #endif
  569. };
  570. static int __devinit am79c961_probe(struct platform_device *pdev)
  571. {
  572. struct resource *res;
  573. struct net_device *dev;
  574. struct dev_priv *priv;
  575. int i, ret;
  576. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  577. if (!res)
  578. return -ENODEV;
  579. dev = alloc_etherdev(sizeof(struct dev_priv));
  580. ret = -ENOMEM;
  581. if (!dev)
  582. goto out;
  583. SET_NETDEV_DEV(dev, &pdev->dev);
  584. priv = netdev_priv(dev);
  585. /*
  586. * Fixed address and IRQ lines here.
  587. * The PNP initialisation should have been
  588. * done by the ether bootp loader.
  589. */
  590. dev->base_addr = res->start;
  591. ret = platform_get_irq(pdev, 0);
  592. if (ret < 0) {
  593. ret = -ENODEV;
  594. goto nodev;
  595. }
  596. dev->irq = ret;
  597. ret = -ENODEV;
  598. if (!request_region(dev->base_addr, 0x18, dev->name))
  599. goto nodev;
  600. /*
  601. * Reset the device.
  602. */
  603. inb(dev->base_addr + NET_RESET);
  604. udelay(5);
  605. /*
  606. * Check the manufacturer part of the
  607. * ether address.
  608. */
  609. if (inb(dev->base_addr) != 0x08 ||
  610. inb(dev->base_addr + 2) != 0x00 ||
  611. inb(dev->base_addr + 4) != 0x2b)
  612. goto release;
  613. for (i = 0; i < 6; i++)
  614. dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff;
  615. am79c961_banner();
  616. spin_lock_init(&priv->chip_lock);
  617. init_timer(&priv->timer);
  618. priv->timer.data = (unsigned long)dev;
  619. priv->timer.function = am79c961_timer;
  620. if (am79c961_hw_init(dev))
  621. goto release;
  622. dev->netdev_ops = &am79c961_netdev_ops;
  623. ret = register_netdev(dev);
  624. if (ret == 0) {
  625. printk(KERN_INFO "%s: ether address %pM\n",
  626. dev->name, dev->dev_addr);
  627. return 0;
  628. }
  629. release:
  630. release_region(dev->base_addr, 0x18);
  631. nodev:
  632. free_netdev(dev);
  633. out:
  634. return ret;
  635. }
  636. static struct platform_driver am79c961_driver = {
  637. .probe = am79c961_probe,
  638. .driver = {
  639. .name = "am79c961",
  640. },
  641. };
  642. static int __init am79c961_init(void)
  643. {
  644. return platform_driver_register(&am79c961_driver);
  645. }
  646. __initcall(am79c961_init);