ispccdc.c 62 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <media/v4l2-event.h>
  34. #include "isp.h"
  35. #include "ispreg.h"
  36. #include "ispccdc.h"
  37. static struct v4l2_mbus_framefmt *
  38. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  39. unsigned int pad, enum v4l2_subdev_format_whence which);
  40. static const unsigned int ccdc_fmts[] = {
  41. V4L2_MBUS_FMT_Y8_1X8,
  42. V4L2_MBUS_FMT_SGRBG10_1X10,
  43. V4L2_MBUS_FMT_SRGGB10_1X10,
  44. V4L2_MBUS_FMT_SBGGR10_1X10,
  45. V4L2_MBUS_FMT_SGBRG10_1X10,
  46. V4L2_MBUS_FMT_SGRBG12_1X12,
  47. V4L2_MBUS_FMT_SRGGB12_1X12,
  48. V4L2_MBUS_FMT_SBGGR12_1X12,
  49. V4L2_MBUS_FMT_SGBRG12_1X12,
  50. };
  51. /*
  52. * ccdc_print_status - Print current CCDC Module register values.
  53. * @ccdc: Pointer to ISP CCDC device.
  54. *
  55. * Also prints other debug information stored in the CCDC module.
  56. */
  57. #define CCDC_PRINT_REGISTER(isp, name)\
  58. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  59. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  60. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  61. {
  62. struct isp_device *isp = to_isp_device(ccdc);
  63. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  64. CCDC_PRINT_REGISTER(isp, PCR);
  65. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  66. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  67. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  68. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  69. CCDC_PRINT_REGISTER(isp, VERT_START);
  70. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  71. CCDC_PRINT_REGISTER(isp, CULLING);
  72. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  73. CCDC_PRINT_REGISTER(isp, SDOFST);
  74. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  75. CCDC_PRINT_REGISTER(isp, CLAMP);
  76. CCDC_PRINT_REGISTER(isp, DCSUB);
  77. CCDC_PRINT_REGISTER(isp, COLPTN);
  78. CCDC_PRINT_REGISTER(isp, BLKCMP);
  79. CCDC_PRINT_REGISTER(isp, FPC);
  80. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  81. CCDC_PRINT_REGISTER(isp, VDINT);
  82. CCDC_PRINT_REGISTER(isp, ALAW);
  83. CCDC_PRINT_REGISTER(isp, REC656IF);
  84. CCDC_PRINT_REGISTER(isp, CFG);
  85. CCDC_PRINT_REGISTER(isp, FMTCFG);
  86. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  87. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  88. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  89. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  90. CCDC_PRINT_REGISTER(isp, PRGODD0);
  91. CCDC_PRINT_REGISTER(isp, PRGODD1);
  92. CCDC_PRINT_REGISTER(isp, VP_OUT);
  93. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  94. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  95. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  96. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  97. dev_dbg(isp->dev, "--------------------------------------------\n");
  98. }
  99. /*
  100. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  101. * @ccdc: Pointer to ISP CCDC device.
  102. */
  103. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  104. {
  105. struct isp_device *isp = to_isp_device(ccdc);
  106. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  107. ISPCCDC_PCR_BUSY;
  108. }
  109. /* -----------------------------------------------------------------------------
  110. * Lens Shading Compensation
  111. */
  112. /*
  113. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  114. * @ccdc: Pointer to ISP CCDC device.
  115. * @lsc_cfg: the LSC configuration to check.
  116. *
  117. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  118. */
  119. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  120. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  121. {
  122. struct isp_device *isp = to_isp_device(ccdc);
  123. struct v4l2_mbus_framefmt *format;
  124. unsigned int paxel_width, paxel_height;
  125. unsigned int paxel_shift_x, paxel_shift_y;
  126. unsigned int min_width, min_height, min_size;
  127. unsigned int input_width, input_height;
  128. paxel_shift_x = lsc_cfg->gain_mode_m;
  129. paxel_shift_y = lsc_cfg->gain_mode_n;
  130. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  131. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  132. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  133. return -EINVAL;
  134. }
  135. if (lsc_cfg->offset & 3) {
  136. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  137. "4\n");
  138. return -EINVAL;
  139. }
  140. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  141. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  142. return -EINVAL;
  143. }
  144. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  145. V4L2_SUBDEV_FORMAT_ACTIVE);
  146. input_width = format->width;
  147. input_height = format->height;
  148. /* Calculate minimum bytesize for validation */
  149. paxel_width = 1 << paxel_shift_x;
  150. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  151. >> paxel_shift_x) + 1;
  152. paxel_height = 1 << paxel_shift_y;
  153. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  154. >> paxel_shift_y) + 1;
  155. min_size = 4 * min_width * min_height;
  156. if (min_size > lsc_cfg->size) {
  157. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  158. return -EINVAL;
  159. }
  160. if (lsc_cfg->offset < (min_width * 4)) {
  161. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  162. return -EINVAL;
  163. }
  164. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  165. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  166. return -EINVAL;
  167. }
  168. return 0;
  169. }
  170. /*
  171. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  172. * @ccdc: Pointer to ISP CCDC device.
  173. */
  174. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  175. {
  176. isp_reg_writel(to_isp_device(ccdc), addr,
  177. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  178. }
  179. /*
  180. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  181. * @ccdc: Pointer to ISP CCDC device.
  182. */
  183. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  184. struct omap3isp_ccdc_lsc_config *cfg)
  185. {
  186. struct isp_device *isp = to_isp_device(ccdc);
  187. int reg;
  188. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  189. ISPCCDC_LSC_TABLE_OFFSET);
  190. reg = 0;
  191. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  192. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  193. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  194. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  195. reg = 0;
  196. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  197. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  198. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  199. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  200. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  201. ISPCCDC_LSC_INITIAL);
  202. }
  203. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  204. {
  205. struct isp_device *isp = to_isp_device(ccdc);
  206. unsigned int wait;
  207. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  208. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  209. /* timeout 1 ms */
  210. for (wait = 0; wait < 1000; wait++) {
  211. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  212. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  213. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  214. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  215. return 0;
  216. }
  217. rmb();
  218. udelay(1);
  219. }
  220. return -ETIMEDOUT;
  221. }
  222. /*
  223. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  224. * @ccdc: Pointer to ISP CCDC device.
  225. * @enable: 0 Disables LSC, 1 Enables LSC.
  226. */
  227. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  228. {
  229. struct isp_device *isp = to_isp_device(ccdc);
  230. const struct v4l2_mbus_framefmt *format =
  231. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  232. V4L2_SUBDEV_FORMAT_ACTIVE);
  233. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  234. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  235. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  236. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  237. return -EINVAL;
  238. if (enable)
  239. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  240. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  241. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  242. if (enable) {
  243. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  244. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  245. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  246. ccdc->lsc.state = LSC_STATE_STOPPED;
  247. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  248. return -ETIMEDOUT;
  249. }
  250. ccdc->lsc.state = LSC_STATE_RUNNING;
  251. } else {
  252. ccdc->lsc.state = LSC_STATE_STOPPING;
  253. }
  254. return 0;
  255. }
  256. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  257. {
  258. struct isp_device *isp = to_isp_device(ccdc);
  259. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  260. ISPCCDC_LSC_BUSY;
  261. }
  262. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  263. * @ccdc: Pointer to ISP CCDC device
  264. * @req: New configuration request
  265. *
  266. * context: in_interrupt()
  267. */
  268. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  269. struct ispccdc_lsc_config_req *req)
  270. {
  271. if (!req->enable)
  272. return -EINVAL;
  273. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  274. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  275. return -EINVAL;
  276. }
  277. if (ccdc_lsc_busy(ccdc))
  278. return -EBUSY;
  279. ccdc_lsc_setup_regs(ccdc, &req->config);
  280. ccdc_lsc_program_table(ccdc, req->table);
  281. return 0;
  282. }
  283. /*
  284. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  285. * @ccdc: Pointer to ISP CCDC device.
  286. *
  287. * Disables LSC, and defers enablement to shadow registers update time.
  288. */
  289. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  290. {
  291. struct isp_device *isp = to_isp_device(ccdc);
  292. /*
  293. * From OMAP3 TRM: When this event is pending, the module
  294. * goes into transparent mode (output =input). Normal
  295. * operation can be resumed at the start of the next frame
  296. * after:
  297. * 1) Clearing this event
  298. * 2) Disabling the LSC module
  299. * 3) Enabling it
  300. */
  301. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  302. ISPCCDC_LSC_ENABLE);
  303. ccdc->lsc.state = LSC_STATE_STOPPED;
  304. }
  305. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  306. struct ispccdc_lsc_config_req *req)
  307. {
  308. struct isp_device *isp = to_isp_device(ccdc);
  309. if (req == NULL)
  310. return;
  311. if (req->iovm)
  312. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  313. req->iovm->sgt->nents, DMA_TO_DEVICE);
  314. if (req->table)
  315. iommu_vfree(isp->iommu, req->table);
  316. kfree(req);
  317. }
  318. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  319. struct list_head *queue)
  320. {
  321. struct ispccdc_lsc_config_req *req, *n;
  322. unsigned long flags;
  323. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  324. list_for_each_entry_safe(req, n, queue, list) {
  325. list_del(&req->list);
  326. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  327. ccdc_lsc_free_request(ccdc, req);
  328. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  329. }
  330. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  331. }
  332. static void ccdc_lsc_free_table_work(struct work_struct *work)
  333. {
  334. struct isp_ccdc_device *ccdc;
  335. struct ispccdc_lsc *lsc;
  336. lsc = container_of(work, struct ispccdc_lsc, table_work);
  337. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  338. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  339. }
  340. /*
  341. * ccdc_lsc_config - Configure the LSC module from a userspace request
  342. *
  343. * Store the request LSC configuration in the LSC engine request pointer. The
  344. * configuration will be applied to the hardware when the CCDC will be enabled,
  345. * or at the next LSC interrupt if the CCDC is already running.
  346. */
  347. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  348. struct omap3isp_ccdc_update_config *config)
  349. {
  350. struct isp_device *isp = to_isp_device(ccdc);
  351. struct ispccdc_lsc_config_req *req;
  352. unsigned long flags;
  353. void *table;
  354. u16 update;
  355. int ret;
  356. update = config->update &
  357. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  358. if (!update)
  359. return 0;
  360. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  361. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  362. "need to be supplied\n", __func__);
  363. return -EINVAL;
  364. }
  365. req = kzalloc(sizeof(*req), GFP_KERNEL);
  366. if (req == NULL)
  367. return -ENOMEM;
  368. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  369. if (copy_from_user(&req->config, config->lsc_cfg,
  370. sizeof(req->config))) {
  371. ret = -EFAULT;
  372. goto done;
  373. }
  374. req->enable = 1;
  375. req->table = iommu_vmalloc(isp->iommu, 0, req->config.size,
  376. IOMMU_FLAG);
  377. if (IS_ERR_VALUE(req->table)) {
  378. req->table = 0;
  379. ret = -ENOMEM;
  380. goto done;
  381. }
  382. req->iovm = find_iovm_area(isp->iommu, req->table);
  383. if (req->iovm == NULL) {
  384. ret = -ENOMEM;
  385. goto done;
  386. }
  387. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  388. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  389. ret = -ENOMEM;
  390. req->iovm = NULL;
  391. goto done;
  392. }
  393. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  394. req->iovm->sgt->nents, DMA_TO_DEVICE);
  395. table = da_to_va(isp->iommu, req->table);
  396. if (copy_from_user(table, config->lsc, req->config.size)) {
  397. ret = -EFAULT;
  398. goto done;
  399. }
  400. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  401. req->iovm->sgt->nents, DMA_TO_DEVICE);
  402. }
  403. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  404. if (ccdc->lsc.request) {
  405. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  406. schedule_work(&ccdc->lsc.table_work);
  407. }
  408. ccdc->lsc.request = req;
  409. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  410. ret = 0;
  411. done:
  412. if (ret < 0)
  413. ccdc_lsc_free_request(ccdc, req);
  414. return ret;
  415. }
  416. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  417. {
  418. unsigned long flags;
  419. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  420. if (ccdc->lsc.active) {
  421. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  422. return 1;
  423. }
  424. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  425. return 0;
  426. }
  427. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  428. {
  429. struct ispccdc_lsc *lsc = &ccdc->lsc;
  430. if (lsc->state != LSC_STATE_STOPPED)
  431. return -EINVAL;
  432. if (lsc->active) {
  433. list_add_tail(&lsc->active->list, &lsc->free_queue);
  434. lsc->active = NULL;
  435. }
  436. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  437. omap3isp_sbl_disable(to_isp_device(ccdc),
  438. OMAP3_ISP_SBL_CCDC_LSC_READ);
  439. list_add_tail(&lsc->request->list, &lsc->free_queue);
  440. lsc->request = NULL;
  441. goto done;
  442. }
  443. lsc->active = lsc->request;
  444. lsc->request = NULL;
  445. __ccdc_lsc_enable(ccdc, 1);
  446. done:
  447. if (!list_empty(&lsc->free_queue))
  448. schedule_work(&lsc->table_work);
  449. return 0;
  450. }
  451. /* -----------------------------------------------------------------------------
  452. * Parameters configuration
  453. */
  454. /*
  455. * ccdc_configure_clamp - Configure optical-black or digital clamping
  456. * @ccdc: Pointer to ISP CCDC device.
  457. *
  458. * The CCDC performs either optical-black or digital clamp. Configure and enable
  459. * the selected clamp method.
  460. */
  461. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  462. {
  463. struct isp_device *isp = to_isp_device(ccdc);
  464. u32 clamp;
  465. if (ccdc->obclamp) {
  466. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  467. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  468. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  469. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  470. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  471. } else {
  472. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  473. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  474. }
  475. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  476. ISPCCDC_CLAMP_CLAMPEN,
  477. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  478. }
  479. /*
  480. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  481. * @ccdc: Pointer to ISP CCDC device.
  482. */
  483. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  484. {
  485. struct isp_device *isp = to_isp_device(ccdc);
  486. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  487. if (!ccdc->fpc_en)
  488. return;
  489. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  490. ISPCCDC_FPC_ADDR);
  491. /* The FPNUM field must be set before enabling FPC. */
  492. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  493. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  494. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  495. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  496. }
  497. /*
  498. * ccdc_configure_black_comp - Configure Black Level Compensation.
  499. * @ccdc: Pointer to ISP CCDC device.
  500. */
  501. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  502. {
  503. struct isp_device *isp = to_isp_device(ccdc);
  504. u32 blcomp;
  505. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  506. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  507. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  508. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  509. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  510. }
  511. /*
  512. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  513. * @ccdc: Pointer to ISP CCDC device.
  514. */
  515. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  516. {
  517. struct isp_device *isp = to_isp_device(ccdc);
  518. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  519. ISPCCDC_SYN_MODE_LPF,
  520. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  521. }
  522. /*
  523. * ccdc_configure_alaw - Configure A-law compression.
  524. * @ccdc: Pointer to ISP CCDC device.
  525. */
  526. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  527. {
  528. struct isp_device *isp = to_isp_device(ccdc);
  529. u32 alaw = 0;
  530. switch (ccdc->syncif.datsz) {
  531. case 8:
  532. return;
  533. case 10:
  534. alaw = ISPCCDC_ALAW_GWDI_9_0;
  535. break;
  536. case 11:
  537. alaw = ISPCCDC_ALAW_GWDI_10_1;
  538. break;
  539. case 12:
  540. alaw = ISPCCDC_ALAW_GWDI_11_2;
  541. break;
  542. case 13:
  543. alaw = ISPCCDC_ALAW_GWDI_12_3;
  544. break;
  545. }
  546. if (ccdc->alaw)
  547. alaw |= ISPCCDC_ALAW_CCDTBL;
  548. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  549. }
  550. /*
  551. * ccdc_config_imgattr - Configure sensor image specific attributes.
  552. * @ccdc: Pointer to ISP CCDC device.
  553. * @colptn: Color pattern of the sensor.
  554. */
  555. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  556. {
  557. struct isp_device *isp = to_isp_device(ccdc);
  558. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  559. }
  560. /*
  561. * ccdc_config - Set CCDC configuration from userspace
  562. * @ccdc: Pointer to ISP CCDC device.
  563. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  564. *
  565. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  566. * structure is null, or the copy_from_user function fails to copy user space
  567. * memory to kernel space memory.
  568. */
  569. static int ccdc_config(struct isp_ccdc_device *ccdc,
  570. struct omap3isp_ccdc_update_config *ccdc_struct)
  571. {
  572. struct isp_device *isp = to_isp_device(ccdc);
  573. unsigned long flags;
  574. spin_lock_irqsave(&ccdc->lock, flags);
  575. ccdc->shadow_update = 1;
  576. spin_unlock_irqrestore(&ccdc->lock, flags);
  577. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  578. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  579. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  580. }
  581. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  582. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  583. ccdc->update |= OMAP3ISP_CCDC_LPF;
  584. }
  585. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  586. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  587. sizeof(ccdc->clamp))) {
  588. ccdc->shadow_update = 0;
  589. return -EFAULT;
  590. }
  591. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  592. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  593. }
  594. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  595. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  596. sizeof(ccdc->blcomp))) {
  597. ccdc->shadow_update = 0;
  598. return -EFAULT;
  599. }
  600. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  601. }
  602. ccdc->shadow_update = 0;
  603. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  604. u32 table_old = 0;
  605. u32 table_new;
  606. u32 size;
  607. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  608. return -EBUSY;
  609. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  610. if (ccdc->fpc_en) {
  611. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  612. sizeof(ccdc->fpc)))
  613. return -EFAULT;
  614. /*
  615. * table_new must be 64-bytes aligned, but it's
  616. * already done by iommu_vmalloc().
  617. */
  618. size = ccdc->fpc.fpnum * 4;
  619. table_new = iommu_vmalloc(isp->iommu, 0, size,
  620. IOMMU_FLAG);
  621. if (IS_ERR_VALUE(table_new))
  622. return -ENOMEM;
  623. if (copy_from_user(da_to_va(isp->iommu, table_new),
  624. (__force void __user *)
  625. ccdc->fpc.fpcaddr, size)) {
  626. iommu_vfree(isp->iommu, table_new);
  627. return -EFAULT;
  628. }
  629. table_old = ccdc->fpc.fpcaddr;
  630. ccdc->fpc.fpcaddr = table_new;
  631. }
  632. ccdc_configure_fpc(ccdc);
  633. if (table_old != 0)
  634. iommu_vfree(isp->iommu, table_old);
  635. }
  636. return ccdc_lsc_config(ccdc, ccdc_struct);
  637. }
  638. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  639. {
  640. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  641. ccdc_configure_alaw(ccdc);
  642. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  643. }
  644. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  645. ccdc_configure_lpf(ccdc);
  646. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  647. }
  648. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  649. ccdc_configure_clamp(ccdc);
  650. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  651. }
  652. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  653. ccdc_configure_black_comp(ccdc);
  654. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  655. }
  656. }
  657. /*
  658. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  659. * @dev: Pointer to ISP device
  660. */
  661. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  662. {
  663. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  664. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  665. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  666. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  667. ccdc_apply_controls(ccdc);
  668. ccdc_configure_fpc(ccdc);
  669. }
  670. /* -----------------------------------------------------------------------------
  671. * Format- and pipeline-related configuration helpers
  672. */
  673. /*
  674. * ccdc_config_vp - Configure the Video Port.
  675. * @ccdc: Pointer to ISP CCDC device.
  676. */
  677. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  678. {
  679. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  680. struct isp_device *isp = to_isp_device(ccdc);
  681. unsigned long l3_ick = pipe->l3_ick;
  682. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  683. unsigned int div = 0;
  684. u32 fmtcfg_vp;
  685. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  686. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  687. switch (ccdc->syncif.datsz) {
  688. case 8:
  689. case 10:
  690. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  691. break;
  692. case 11:
  693. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  694. break;
  695. case 12:
  696. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  697. break;
  698. case 13:
  699. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  700. break;
  701. };
  702. if (pipe->input)
  703. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  704. else if (ccdc->vpcfg.pixelclk)
  705. div = l3_ick / ccdc->vpcfg.pixelclk;
  706. div = clamp(div, 2U, max_div);
  707. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  708. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  709. }
  710. /*
  711. * ccdc_enable_vp - Enable Video Port.
  712. * @ccdc: Pointer to ISP CCDC device.
  713. * @enable: 0 Disables VP, 1 Enables VP
  714. *
  715. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  716. */
  717. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  718. {
  719. struct isp_device *isp = to_isp_device(ccdc);
  720. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  721. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  722. }
  723. /*
  724. * ccdc_config_outlineoffset - Configure memory saving output line offset
  725. * @ccdc: Pointer to ISP CCDC device.
  726. * @offset: Address offset to start a new line. Must be twice the
  727. * Output width and aligned on 32 byte boundary
  728. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  729. * output.
  730. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  731. *
  732. * - Configures the output line offset when stored in memory
  733. * - Sets the odd/even line pattern to store the output
  734. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  735. * - Configures the number of even and odd line fields in case of rearranging
  736. * the lines.
  737. */
  738. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  739. u32 offset, u8 oddeven, u8 numlines)
  740. {
  741. struct isp_device *isp = to_isp_device(ccdc);
  742. isp_reg_writel(isp, offset & 0xffff,
  743. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  744. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  745. ISPCCDC_SDOFST_FINV);
  746. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  747. ISPCCDC_SDOFST_FOFST_4L);
  748. switch (oddeven) {
  749. case EVENEVEN:
  750. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  751. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  752. break;
  753. case ODDEVEN:
  754. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  755. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  756. break;
  757. case EVENODD:
  758. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  759. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  760. break;
  761. case ODDODD:
  762. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  763. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  764. break;
  765. default:
  766. break;
  767. }
  768. }
  769. /*
  770. * ccdc_set_outaddr - Set memory address to save output image
  771. * @ccdc: Pointer to ISP CCDC device.
  772. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  773. *
  774. * Sets the memory address where the output will be saved.
  775. */
  776. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  777. {
  778. struct isp_device *isp = to_isp_device(ccdc);
  779. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  780. }
  781. /*
  782. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  783. * @ccdc: Pointer to ISP CCDC device.
  784. * @max_rate: Maximum calculated data rate.
  785. *
  786. * Returns in *max_rate less value between calculated and passed
  787. */
  788. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  789. unsigned int *max_rate)
  790. {
  791. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  792. unsigned int rate;
  793. if (pipe == NULL)
  794. return;
  795. /*
  796. * TRM says that for parallel sensors the maximum data rate
  797. * should be 90% form L3/2 clock, otherwise just L3/2.
  798. */
  799. if (ccdc->input == CCDC_INPUT_PARALLEL)
  800. rate = pipe->l3_ick / 2 * 9 / 10;
  801. else
  802. rate = pipe->l3_ick / 2;
  803. *max_rate = min(*max_rate, rate);
  804. }
  805. /*
  806. * ccdc_config_sync_if - Set CCDC sync interface configuration
  807. * @ccdc: Pointer to ISP CCDC device.
  808. * @syncif: Structure containing the sync parameters like field state, CCDC in
  809. * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
  810. * signals.
  811. */
  812. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  813. struct ispccdc_syncif *syncif)
  814. {
  815. struct isp_device *isp = to_isp_device(ccdc);
  816. u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
  817. ISPCCDC_SYN_MODE);
  818. syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
  819. if (syncif->fldstat)
  820. syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
  821. else
  822. syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
  823. syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
  824. switch (syncif->datsz) {
  825. case 8:
  826. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  827. break;
  828. case 10:
  829. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  830. break;
  831. case 11:
  832. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  833. break;
  834. case 12:
  835. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  836. break;
  837. };
  838. if (syncif->fldmode)
  839. syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
  840. else
  841. syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
  842. if (syncif->datapol)
  843. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  844. else
  845. syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
  846. if (syncif->fldpol)
  847. syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
  848. else
  849. syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
  850. if (syncif->hdpol)
  851. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  852. else
  853. syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
  854. if (syncif->vdpol)
  855. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  856. else
  857. syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
  858. if (syncif->ccdc_mastermode) {
  859. syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
  860. isp_reg_writel(isp,
  861. syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
  862. | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
  863. OMAP3_ISP_IOMEM_CCDC,
  864. ISPCCDC_HD_VD_WID);
  865. isp_reg_writel(isp,
  866. syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
  867. | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
  868. OMAP3_ISP_IOMEM_CCDC,
  869. ISPCCDC_PIX_LINES);
  870. } else
  871. syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
  872. ISPCCDC_SYN_MODE_VDHDOUT);
  873. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  874. if (!syncif->bt_r656_en)
  875. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  876. ISPCCDC_REC656IF_R656ON);
  877. }
  878. /* CCDC formats descriptions */
  879. static const u32 ccdc_sgrbg_pattern =
  880. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  881. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  882. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  883. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  884. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  885. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  886. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  887. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  888. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  889. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  890. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  891. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  892. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  893. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  894. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  895. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  896. static const u32 ccdc_srggb_pattern =
  897. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  898. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  899. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  900. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  901. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  902. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  903. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  904. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  905. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  906. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  907. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  908. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  910. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  911. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  912. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  913. static const u32 ccdc_sbggr_pattern =
  914. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  915. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  916. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  917. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  918. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  919. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  920. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  921. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  922. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  923. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  924. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  925. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  926. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  927. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  928. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  929. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  930. static const u32 ccdc_sgbrg_pattern =
  931. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  932. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  933. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  934. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  935. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  936. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  937. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  938. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  939. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  940. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  941. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  942. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  943. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  944. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  945. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  946. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  947. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  948. {
  949. struct isp_device *isp = to_isp_device(ccdc);
  950. struct isp_parallel_platform_data *pdata = NULL;
  951. struct v4l2_subdev *sensor;
  952. struct v4l2_mbus_framefmt *format;
  953. struct media_pad *pad;
  954. unsigned long flags;
  955. u32 syn_mode;
  956. u32 ccdc_pattern;
  957. if (ccdc->input == CCDC_INPUT_PARALLEL) {
  958. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  959. sensor = media_entity_to_v4l2_subdev(pad->entity);
  960. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  961. ->bus.parallel;
  962. }
  963. omap3isp_configure_bridge(isp, ccdc->input, pdata);
  964. ccdc->syncif.datsz = pdata ? pdata->width : 10;
  965. ccdc_config_sync_if(ccdc, &ccdc->syncif);
  966. /* CCDC_PAD_SINK */
  967. format = &ccdc->formats[CCDC_PAD_SINK];
  968. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  969. /* Use the raw, unprocessed data when writing to memory. The H3A and
  970. * histogram modules are still fed with lens shading corrected data.
  971. */
  972. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  973. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  974. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  975. else
  976. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  977. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  978. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  979. else
  980. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  981. /* Use PACK8 mode for 1byte per pixel formats. */
  982. if (omap3isp_video_format_info(format->code)->bpp <= 8)
  983. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  984. else
  985. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  986. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  987. /* Mosaic filter */
  988. switch (format->code) {
  989. case V4L2_MBUS_FMT_SRGGB10_1X10:
  990. case V4L2_MBUS_FMT_SRGGB12_1X12:
  991. ccdc_pattern = ccdc_srggb_pattern;
  992. break;
  993. case V4L2_MBUS_FMT_SBGGR10_1X10:
  994. case V4L2_MBUS_FMT_SBGGR12_1X12:
  995. ccdc_pattern = ccdc_sbggr_pattern;
  996. break;
  997. case V4L2_MBUS_FMT_SGBRG10_1X10:
  998. case V4L2_MBUS_FMT_SGBRG12_1X12:
  999. ccdc_pattern = ccdc_sgbrg_pattern;
  1000. break;
  1001. default:
  1002. /* Use GRBG */
  1003. ccdc_pattern = ccdc_sgrbg_pattern;
  1004. break;
  1005. }
  1006. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1007. /* Generate VD0 on the last line of the image and VD1 on the
  1008. * 2/3 height line.
  1009. */
  1010. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1011. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1012. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1013. /* CCDC_PAD_SOURCE_OF */
  1014. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1015. isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1016. ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1017. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1018. isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
  1019. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1020. isp_reg_writel(isp, (format->height - 1)
  1021. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1022. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1023. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1024. /* CCDC_PAD_SOURCE_VP */
  1025. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1026. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1027. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1028. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1029. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1030. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1031. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1032. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1033. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1034. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1035. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1036. if (ccdc->lsc.request == NULL)
  1037. goto unlock;
  1038. WARN_ON(ccdc->lsc.active);
  1039. /* Get last good LSC configuration. If it is not supported for
  1040. * the current active resolution discard it.
  1041. */
  1042. if (ccdc->lsc.active == NULL &&
  1043. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1044. ccdc->lsc.active = ccdc->lsc.request;
  1045. } else {
  1046. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1047. schedule_work(&ccdc->lsc.table_work);
  1048. }
  1049. ccdc->lsc.request = NULL;
  1050. unlock:
  1051. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1052. ccdc_apply_controls(ccdc);
  1053. }
  1054. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1055. {
  1056. struct isp_device *isp = to_isp_device(ccdc);
  1057. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1058. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1059. }
  1060. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1061. {
  1062. unsigned long flags;
  1063. int ret = 0;
  1064. spin_lock_irqsave(&ccdc->lock, flags);
  1065. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1066. ccdc->stopping = CCDC_STOP_REQUEST;
  1067. spin_unlock_irqrestore(&ccdc->lock, flags);
  1068. ret = wait_event_timeout(ccdc->wait,
  1069. ccdc->stopping == CCDC_STOP_FINISHED,
  1070. msecs_to_jiffies(2000));
  1071. if (ret == 0) {
  1072. ret = -ETIMEDOUT;
  1073. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1074. }
  1075. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1076. mutex_lock(&ccdc->ioctl_lock);
  1077. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1078. ccdc->lsc.request = ccdc->lsc.active;
  1079. ccdc->lsc.active = NULL;
  1080. cancel_work_sync(&ccdc->lsc.table_work);
  1081. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1082. mutex_unlock(&ccdc->ioctl_lock);
  1083. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1084. return ret > 0 ? 0 : ret;
  1085. }
  1086. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1087. {
  1088. if (ccdc_lsc_is_configured(ccdc))
  1089. __ccdc_lsc_enable(ccdc, 1);
  1090. __ccdc_enable(ccdc, 1);
  1091. }
  1092. /* -----------------------------------------------------------------------------
  1093. * Interrupt handling
  1094. */
  1095. /*
  1096. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1097. * @ccdc: Pointer to ISP CCDC device.
  1098. *
  1099. * Returns zero if the CCDC is idle and the image has been written to
  1100. * memory, too.
  1101. */
  1102. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1103. {
  1104. struct isp_device *isp = to_isp_device(ccdc);
  1105. return omap3isp_ccdc_busy(ccdc)
  1106. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1107. ISPSBL_CCDC_WR_0_DATA_READY)
  1108. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1109. ISPSBL_CCDC_WR_0_DATA_READY)
  1110. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1111. ISPSBL_CCDC_WR_0_DATA_READY)
  1112. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1113. ISPSBL_CCDC_WR_0_DATA_READY);
  1114. }
  1115. /*
  1116. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1117. * @ccdc: Pointer to ISP CCDC device.
  1118. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1119. */
  1120. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1121. unsigned int max_wait)
  1122. {
  1123. unsigned int wait = 0;
  1124. if (max_wait == 0)
  1125. max_wait = 10000; /* 10 ms */
  1126. for (wait = 0; wait <= max_wait; wait++) {
  1127. if (!ccdc_sbl_busy(ccdc))
  1128. return 0;
  1129. rmb();
  1130. udelay(1);
  1131. }
  1132. return -EBUSY;
  1133. }
  1134. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1135. * @ccdc: Pointer to ISP CCDC device.
  1136. * @event: Pointing which event trigger handler
  1137. *
  1138. * Return 1 when the event and stopping request combination is satisfyied,
  1139. * zero otherwise.
  1140. */
  1141. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1142. {
  1143. int rval = 0;
  1144. switch ((ccdc->stopping & 3) | event) {
  1145. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1146. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1147. __ccdc_lsc_enable(ccdc, 0);
  1148. __ccdc_enable(ccdc, 0);
  1149. ccdc->stopping = CCDC_STOP_EXECUTED;
  1150. return 1;
  1151. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1152. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1153. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1154. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1155. rval = 1;
  1156. break;
  1157. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1158. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1159. rval = 1;
  1160. break;
  1161. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1162. return 1;
  1163. }
  1164. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1165. wake_up(&ccdc->wait);
  1166. rval = 1;
  1167. }
  1168. return rval;
  1169. }
  1170. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1171. {
  1172. struct video_device *vdev = &ccdc->subdev.devnode;
  1173. struct v4l2_event event;
  1174. memset(&event, 0, sizeof(event));
  1175. event.type = V4L2_EVENT_OMAP3ISP_HS_VS;
  1176. v4l2_event_queue(vdev, &event);
  1177. }
  1178. /*
  1179. * ccdc_lsc_isr - Handle LSC events
  1180. * @ccdc: Pointer to ISP CCDC device.
  1181. * @events: LSC events
  1182. */
  1183. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1184. {
  1185. unsigned long flags;
  1186. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1187. ccdc_lsc_error_handler(ccdc);
  1188. ccdc->error = 1;
  1189. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1190. }
  1191. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1192. return;
  1193. /* LSC_DONE interrupt occur, there are two cases
  1194. * 1. stopping for reconfiguration
  1195. * 2. stopping because of STREAM OFF command
  1196. */
  1197. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1198. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1199. ccdc->lsc.state = LSC_STATE_STOPPED;
  1200. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1201. goto done;
  1202. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1203. goto done;
  1204. /* LSC is in STOPPING state, change to the new state */
  1205. ccdc->lsc.state = LSC_STATE_STOPPED;
  1206. /* This is an exception. Start of frame and LSC_DONE interrupt
  1207. * have been received on the same time. Skip this event and wait
  1208. * for better times.
  1209. */
  1210. if (events & IRQ0STATUS_HS_VS_IRQ)
  1211. goto done;
  1212. /* The LSC engine is stopped at this point. Enable it if there's a
  1213. * pending request.
  1214. */
  1215. if (ccdc->lsc.request == NULL)
  1216. goto done;
  1217. ccdc_lsc_enable(ccdc);
  1218. done:
  1219. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1220. }
  1221. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1222. {
  1223. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1224. struct isp_device *isp = to_isp_device(ccdc);
  1225. struct isp_buffer *buffer;
  1226. int restart = 0;
  1227. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1228. * doesn't explicitly state if that's supposed to happen or not, so it
  1229. * can be considered as a hardware bug or as a feature, but we have to
  1230. * deal with it anyway). Disabling the CCDC when no buffer is available
  1231. * would thus not be enough, we need to handle the situation explicitly.
  1232. */
  1233. if (list_empty(&ccdc->video_out.dmaqueue))
  1234. goto done;
  1235. /* We're in continuous mode, and memory writes were disabled due to a
  1236. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1237. * address has been set in ccdc_video_queue.
  1238. */
  1239. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1240. restart = 1;
  1241. ccdc->underrun = 0;
  1242. goto done;
  1243. }
  1244. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1245. dev_info(isp->dev, "CCDC won't become idle!\n");
  1246. goto done;
  1247. }
  1248. buffer = omap3isp_video_buffer_next(&ccdc->video_out, ccdc->error);
  1249. if (buffer != NULL) {
  1250. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1251. restart = 1;
  1252. }
  1253. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1254. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1255. isp_pipeline_ready(pipe))
  1256. omap3isp_pipeline_set_stream(pipe,
  1257. ISP_PIPELINE_STREAM_SINGLESHOT);
  1258. done:
  1259. ccdc->error = 0;
  1260. return restart;
  1261. }
  1262. /*
  1263. * ccdc_vd0_isr - Handle VD0 event
  1264. * @ccdc: Pointer to ISP CCDC device.
  1265. *
  1266. * Executes LSC deferred enablement before next frame starts.
  1267. */
  1268. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1269. {
  1270. unsigned long flags;
  1271. int restart = 0;
  1272. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1273. restart = ccdc_isr_buffer(ccdc);
  1274. spin_lock_irqsave(&ccdc->lock, flags);
  1275. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1276. spin_unlock_irqrestore(&ccdc->lock, flags);
  1277. return;
  1278. }
  1279. if (!ccdc->shadow_update)
  1280. ccdc_apply_controls(ccdc);
  1281. spin_unlock_irqrestore(&ccdc->lock, flags);
  1282. if (restart)
  1283. ccdc_enable(ccdc);
  1284. }
  1285. /*
  1286. * ccdc_vd1_isr - Handle VD1 event
  1287. * @ccdc: Pointer to ISP CCDC device.
  1288. */
  1289. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1290. {
  1291. unsigned long flags;
  1292. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1293. /*
  1294. * Depending on the CCDC pipeline state, CCDC stopping should be
  1295. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1296. * stopping because the CCDC hw works only in continuous mode.
  1297. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1298. * data to memory the CCDC and LSC are stopped immediately but
  1299. * without change the CCDC stopping state machine. The CCDC
  1300. * stopping state machine should be used only when user request
  1301. * for stopping is received (SINGLESHOT is an exeption).
  1302. */
  1303. switch (ccdc->state) {
  1304. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1305. ccdc->stopping = CCDC_STOP_REQUEST;
  1306. break;
  1307. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1308. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1309. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1310. __ccdc_lsc_enable(ccdc, 0);
  1311. __ccdc_enable(ccdc, 0);
  1312. }
  1313. break;
  1314. case ISP_PIPELINE_STREAM_STOPPED:
  1315. break;
  1316. }
  1317. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1318. goto done;
  1319. if (ccdc->lsc.request == NULL)
  1320. goto done;
  1321. /*
  1322. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1323. * do the appropriate changes in registers
  1324. */
  1325. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1326. __ccdc_lsc_enable(ccdc, 0);
  1327. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1328. goto done;
  1329. }
  1330. /* LSC has been in STOPPED state, enable it */
  1331. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1332. ccdc_lsc_enable(ccdc);
  1333. done:
  1334. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1335. }
  1336. /*
  1337. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1338. * @ccdc: Pointer to ISP CCDC device.
  1339. * @events: CCDC events
  1340. */
  1341. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1342. {
  1343. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1344. return 0;
  1345. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1346. ccdc_vd1_isr(ccdc);
  1347. ccdc_lsc_isr(ccdc, events);
  1348. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1349. ccdc_vd0_isr(ccdc);
  1350. if (events & IRQ0STATUS_HS_VS_IRQ)
  1351. ccdc_hs_vs_isr(ccdc);
  1352. return 0;
  1353. }
  1354. /* -----------------------------------------------------------------------------
  1355. * ISP video operations
  1356. */
  1357. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1358. {
  1359. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1360. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1361. return -ENODEV;
  1362. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1363. /* We now have a buffer queued on the output, restart the pipeline in
  1364. * on the next CCDC interrupt if running in continuous mode (or when
  1365. * starting the stream).
  1366. */
  1367. ccdc->underrun = 1;
  1368. return 0;
  1369. }
  1370. static const struct isp_video_operations ccdc_video_ops = {
  1371. .queue = ccdc_video_queue,
  1372. };
  1373. /* -----------------------------------------------------------------------------
  1374. * V4L2 subdev operations
  1375. */
  1376. /*
  1377. * ccdc_ioctl - CCDC module private ioctl's
  1378. * @sd: ISP CCDC V4L2 subdevice
  1379. * @cmd: ioctl command
  1380. * @arg: ioctl argument
  1381. *
  1382. * Return 0 on success or a negative error code otherwise.
  1383. */
  1384. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1385. {
  1386. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1387. int ret;
  1388. switch (cmd) {
  1389. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1390. mutex_lock(&ccdc->ioctl_lock);
  1391. ret = ccdc_config(ccdc, arg);
  1392. mutex_unlock(&ccdc->ioctl_lock);
  1393. break;
  1394. default:
  1395. return -ENOIOCTLCMD;
  1396. }
  1397. return ret;
  1398. }
  1399. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1400. struct v4l2_event_subscription *sub)
  1401. {
  1402. if (sub->type != V4L2_EVENT_OMAP3ISP_HS_VS)
  1403. return -EINVAL;
  1404. return v4l2_event_subscribe(fh, sub);
  1405. }
  1406. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1407. struct v4l2_event_subscription *sub)
  1408. {
  1409. return v4l2_event_unsubscribe(fh, sub);
  1410. }
  1411. /*
  1412. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1413. * @sd: ISP CCDC V4L2 subdevice
  1414. * @enable: Enable/disable stream
  1415. *
  1416. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1417. * buffer to write to. As the s_stream operation is called in response to a
  1418. * STREAMON call without any buffer queued yet, just update the enabled field
  1419. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1420. *
  1421. * When not writing to memory enable the CCDC immediately.
  1422. */
  1423. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1424. {
  1425. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1426. struct isp_device *isp = to_isp_device(ccdc);
  1427. int ret = 0;
  1428. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1429. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1430. return 0;
  1431. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1432. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1433. ISPCCDC_CFG_VDLC);
  1434. ccdc_configure(ccdc);
  1435. /* TODO: Don't configure the video port if all of its output
  1436. * links are inactive.
  1437. */
  1438. ccdc_config_vp(ccdc);
  1439. ccdc_enable_vp(ccdc, 1);
  1440. ccdc->error = 0;
  1441. ccdc_print_status(ccdc);
  1442. }
  1443. switch (enable) {
  1444. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1445. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1446. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1447. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1448. ccdc_enable(ccdc);
  1449. ccdc->underrun = 0;
  1450. break;
  1451. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1452. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1453. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1454. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1455. ccdc_enable(ccdc);
  1456. break;
  1457. case ISP_PIPELINE_STREAM_STOPPED:
  1458. ret = ccdc_disable(ccdc);
  1459. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1460. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1461. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1462. ccdc->underrun = 0;
  1463. break;
  1464. }
  1465. ccdc->state = enable;
  1466. return ret;
  1467. }
  1468. static struct v4l2_mbus_framefmt *
  1469. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1470. unsigned int pad, enum v4l2_subdev_format_whence which)
  1471. {
  1472. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1473. return v4l2_subdev_get_try_format(fh, pad);
  1474. else
  1475. return &ccdc->formats[pad];
  1476. }
  1477. /*
  1478. * ccdc_try_format - Try video format on a pad
  1479. * @ccdc: ISP CCDC device
  1480. * @fh : V4L2 subdev file handle
  1481. * @pad: Pad number
  1482. * @fmt: Format
  1483. */
  1484. static void
  1485. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1486. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1487. enum v4l2_subdev_format_whence which)
  1488. {
  1489. struct v4l2_mbus_framefmt *format;
  1490. const struct isp_format_info *info;
  1491. unsigned int width = fmt->width;
  1492. unsigned int height = fmt->height;
  1493. unsigned int i;
  1494. switch (pad) {
  1495. case CCDC_PAD_SINK:
  1496. /* TODO: If the CCDC output formatter pad is connected directly
  1497. * to the resizer, only YUV formats can be used.
  1498. */
  1499. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1500. if (fmt->code == ccdc_fmts[i])
  1501. break;
  1502. }
  1503. /* If not found, use SGRBG10 as default */
  1504. if (i >= ARRAY_SIZE(ccdc_fmts))
  1505. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1506. /* Clamp the input size. */
  1507. fmt->width = clamp_t(u32, width, 32, 4096);
  1508. fmt->height = clamp_t(u32, height, 32, 4096);
  1509. break;
  1510. case CCDC_PAD_SOURCE_OF:
  1511. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1512. memcpy(fmt, format, sizeof(*fmt));
  1513. /* The data formatter truncates the number of horizontal output
  1514. * pixels to a multiple of 16. To avoid clipping data, allow
  1515. * callers to request an output size bigger than the input size
  1516. * up to the nearest multiple of 16.
  1517. */
  1518. fmt->width = clamp_t(u32, width, 32, (fmt->width + 15) & ~15);
  1519. fmt->width &= ~15;
  1520. fmt->height = clamp_t(u32, height, 32, fmt->height);
  1521. break;
  1522. case CCDC_PAD_SOURCE_VP:
  1523. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1524. memcpy(fmt, format, sizeof(*fmt));
  1525. /* The video port interface truncates the data to 10 bits. */
  1526. info = omap3isp_video_format_info(fmt->code);
  1527. fmt->code = info->truncated;
  1528. /* The number of lines that can be clocked out from the video
  1529. * port output must be at least one line less than the number
  1530. * of input lines.
  1531. */
  1532. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1533. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1534. break;
  1535. }
  1536. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1537. * stored on 2 bytes.
  1538. */
  1539. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1540. fmt->field = V4L2_FIELD_NONE;
  1541. }
  1542. /*
  1543. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1544. * @sd : pointer to v4l2 subdev structure
  1545. * @fh : V4L2 subdev file handle
  1546. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1547. * return -EINVAL or zero on success
  1548. */
  1549. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1550. struct v4l2_subdev_fh *fh,
  1551. struct v4l2_subdev_mbus_code_enum *code)
  1552. {
  1553. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1554. struct v4l2_mbus_framefmt *format;
  1555. switch (code->pad) {
  1556. case CCDC_PAD_SINK:
  1557. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1558. return -EINVAL;
  1559. code->code = ccdc_fmts[code->index];
  1560. break;
  1561. case CCDC_PAD_SOURCE_OF:
  1562. case CCDC_PAD_SOURCE_VP:
  1563. /* No format conversion inside CCDC */
  1564. if (code->index != 0)
  1565. return -EINVAL;
  1566. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
  1567. V4L2_SUBDEV_FORMAT_TRY);
  1568. code->code = format->code;
  1569. break;
  1570. default:
  1571. return -EINVAL;
  1572. }
  1573. return 0;
  1574. }
  1575. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1576. struct v4l2_subdev_fh *fh,
  1577. struct v4l2_subdev_frame_size_enum *fse)
  1578. {
  1579. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1580. struct v4l2_mbus_framefmt format;
  1581. if (fse->index != 0)
  1582. return -EINVAL;
  1583. format.code = fse->code;
  1584. format.width = 1;
  1585. format.height = 1;
  1586. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1587. fse->min_width = format.width;
  1588. fse->min_height = format.height;
  1589. if (format.code != fse->code)
  1590. return -EINVAL;
  1591. format.code = fse->code;
  1592. format.width = -1;
  1593. format.height = -1;
  1594. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1595. fse->max_width = format.width;
  1596. fse->max_height = format.height;
  1597. return 0;
  1598. }
  1599. /*
  1600. * ccdc_get_format - Retrieve the video format on a pad
  1601. * @sd : ISP CCDC V4L2 subdevice
  1602. * @fh : V4L2 subdev file handle
  1603. * @fmt: Format
  1604. *
  1605. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1606. * to the format type.
  1607. */
  1608. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1609. struct v4l2_subdev_format *fmt)
  1610. {
  1611. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1612. struct v4l2_mbus_framefmt *format;
  1613. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1614. if (format == NULL)
  1615. return -EINVAL;
  1616. fmt->format = *format;
  1617. return 0;
  1618. }
  1619. /*
  1620. * ccdc_set_format - Set the video format on a pad
  1621. * @sd : ISP CCDC V4L2 subdevice
  1622. * @fh : V4L2 subdev file handle
  1623. * @fmt: Format
  1624. *
  1625. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1626. * to the format type.
  1627. */
  1628. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1629. struct v4l2_subdev_format *fmt)
  1630. {
  1631. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1632. struct v4l2_mbus_framefmt *format;
  1633. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1634. if (format == NULL)
  1635. return -EINVAL;
  1636. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1637. *format = fmt->format;
  1638. /* Propagate the format from sink to source */
  1639. if (fmt->pad == CCDC_PAD_SINK) {
  1640. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1641. fmt->which);
  1642. *format = fmt->format;
  1643. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1644. fmt->which);
  1645. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1646. fmt->which);
  1647. *format = fmt->format;
  1648. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1649. fmt->which);
  1650. }
  1651. return 0;
  1652. }
  1653. /*
  1654. * ccdc_init_formats - Initialize formats on all pads
  1655. * @sd: ISP CCDC V4L2 subdevice
  1656. * @fh: V4L2 subdev file handle
  1657. *
  1658. * Initialize all pad formats with default values. If fh is not NULL, try
  1659. * formats are initialized on the file handle. Otherwise active formats are
  1660. * initialized on the device.
  1661. */
  1662. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1663. {
  1664. struct v4l2_subdev_format format;
  1665. memset(&format, 0, sizeof(format));
  1666. format.pad = CCDC_PAD_SINK;
  1667. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1668. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1669. format.format.width = 4096;
  1670. format.format.height = 4096;
  1671. ccdc_set_format(sd, fh, &format);
  1672. return 0;
  1673. }
  1674. /* V4L2 subdev core operations */
  1675. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1676. .ioctl = ccdc_ioctl,
  1677. .subscribe_event = ccdc_subscribe_event,
  1678. .unsubscribe_event = ccdc_unsubscribe_event,
  1679. };
  1680. /* V4L2 subdev video operations */
  1681. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1682. .s_stream = ccdc_set_stream,
  1683. };
  1684. /* V4L2 subdev pad operations */
  1685. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1686. .enum_mbus_code = ccdc_enum_mbus_code,
  1687. .enum_frame_size = ccdc_enum_frame_size,
  1688. .get_fmt = ccdc_get_format,
  1689. .set_fmt = ccdc_set_format,
  1690. };
  1691. /* V4L2 subdev operations */
  1692. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1693. .core = &ccdc_v4l2_core_ops,
  1694. .video = &ccdc_v4l2_video_ops,
  1695. .pad = &ccdc_v4l2_pad_ops,
  1696. };
  1697. /* V4L2 subdev internal operations */
  1698. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1699. .open = ccdc_init_formats,
  1700. };
  1701. /* -----------------------------------------------------------------------------
  1702. * Media entity operations
  1703. */
  1704. /*
  1705. * ccdc_link_setup - Setup CCDC connections
  1706. * @entity: CCDC media entity
  1707. * @local: Pad at the local end of the link
  1708. * @remote: Pad at the remote end of the link
  1709. * @flags: Link flags
  1710. *
  1711. * return -EINVAL or zero on success
  1712. */
  1713. static int ccdc_link_setup(struct media_entity *entity,
  1714. const struct media_pad *local,
  1715. const struct media_pad *remote, u32 flags)
  1716. {
  1717. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1718. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1719. struct isp_device *isp = to_isp_device(ccdc);
  1720. switch (local->index | media_entity_type(remote->entity)) {
  1721. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1722. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1723. * CSI2c.
  1724. */
  1725. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1726. ccdc->input = CCDC_INPUT_NONE;
  1727. break;
  1728. }
  1729. if (ccdc->input != CCDC_INPUT_NONE)
  1730. return -EBUSY;
  1731. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1732. ccdc->input = CCDC_INPUT_CCP2B;
  1733. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1734. ccdc->input = CCDC_INPUT_CSI2A;
  1735. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  1736. ccdc->input = CCDC_INPUT_CSI2C;
  1737. else
  1738. ccdc->input = CCDC_INPUT_PARALLEL;
  1739. break;
  1740. /*
  1741. * The ISP core doesn't support pipelines with multiple video outputs.
  1742. * Revisit this when it will be implemented, and return -EBUSY for now.
  1743. */
  1744. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  1745. /* Write to preview engine, histogram and H3A. When none of
  1746. * those links are active, the video port can be disabled.
  1747. */
  1748. if (flags & MEDIA_LNK_FL_ENABLED) {
  1749. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  1750. return -EBUSY;
  1751. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  1752. } else {
  1753. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  1754. }
  1755. break;
  1756. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  1757. /* Write to memory */
  1758. if (flags & MEDIA_LNK_FL_ENABLED) {
  1759. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  1760. return -EBUSY;
  1761. ccdc->output |= CCDC_OUTPUT_MEMORY;
  1762. } else {
  1763. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  1764. }
  1765. break;
  1766. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  1767. /* Write to resizer */
  1768. if (flags & MEDIA_LNK_FL_ENABLED) {
  1769. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  1770. return -EBUSY;
  1771. ccdc->output |= CCDC_OUTPUT_RESIZER;
  1772. } else {
  1773. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  1774. }
  1775. break;
  1776. default:
  1777. return -EINVAL;
  1778. }
  1779. return 0;
  1780. }
  1781. /* media operations */
  1782. static const struct media_entity_operations ccdc_media_ops = {
  1783. .link_setup = ccdc_link_setup,
  1784. };
  1785. /*
  1786. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  1787. * @ccdc: ISP CCDC module
  1788. *
  1789. * Return 0 on success and a negative error code on failure.
  1790. */
  1791. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  1792. {
  1793. struct v4l2_subdev *sd = &ccdc->subdev;
  1794. struct media_pad *pads = ccdc->pads;
  1795. struct media_entity *me = &sd->entity;
  1796. int ret;
  1797. ccdc->input = CCDC_INPUT_NONE;
  1798. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  1799. sd->internal_ops = &ccdc_v4l2_internal_ops;
  1800. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  1801. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  1802. v4l2_set_subdevdata(sd, ccdc);
  1803. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  1804. sd->nevents = OMAP3ISP_CCDC_NEVENTS;
  1805. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1806. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  1807. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  1808. me->ops = &ccdc_media_ops;
  1809. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  1810. if (ret < 0)
  1811. return ret;
  1812. ccdc_init_formats(sd, NULL);
  1813. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1814. ccdc->video_out.ops = &ccdc_video_ops;
  1815. ccdc->video_out.isp = to_isp_device(ccdc);
  1816. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  1817. ccdc->video_out.bpl_alignment = 32;
  1818. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  1819. if (ret < 0)
  1820. return ret;
  1821. /* Connect the CCDC subdev to the video node. */
  1822. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  1823. &ccdc->video_out.video.entity, 0, 0);
  1824. if (ret < 0)
  1825. return ret;
  1826. return 0;
  1827. }
  1828. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  1829. {
  1830. media_entity_cleanup(&ccdc->subdev.entity);
  1831. v4l2_device_unregister_subdev(&ccdc->subdev);
  1832. omap3isp_video_unregister(&ccdc->video_out);
  1833. }
  1834. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  1835. struct v4l2_device *vdev)
  1836. {
  1837. int ret;
  1838. /* Register the subdev and video node. */
  1839. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  1840. if (ret < 0)
  1841. goto error;
  1842. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  1843. if (ret < 0)
  1844. goto error;
  1845. return 0;
  1846. error:
  1847. omap3isp_ccdc_unregister_entities(ccdc);
  1848. return ret;
  1849. }
  1850. /* -----------------------------------------------------------------------------
  1851. * ISP CCDC initialisation and cleanup
  1852. */
  1853. /*
  1854. * omap3isp_ccdc_init - CCDC module initialization.
  1855. * @dev: Device pointer specific to the OMAP3 ISP.
  1856. *
  1857. * TODO: Get the initialisation values from platform data.
  1858. *
  1859. * Return 0 on success or a negative error code otherwise.
  1860. */
  1861. int omap3isp_ccdc_init(struct isp_device *isp)
  1862. {
  1863. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1864. spin_lock_init(&ccdc->lock);
  1865. init_waitqueue_head(&ccdc->wait);
  1866. mutex_init(&ccdc->ioctl_lock);
  1867. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1868. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  1869. ccdc->lsc.state = LSC_STATE_STOPPED;
  1870. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  1871. spin_lock_init(&ccdc->lsc.req_lock);
  1872. ccdc->syncif.ccdc_mastermode = 0;
  1873. ccdc->syncif.datapol = 0;
  1874. ccdc->syncif.datsz = 0;
  1875. ccdc->syncif.fldmode = 0;
  1876. ccdc->syncif.fldout = 0;
  1877. ccdc->syncif.fldpol = 0;
  1878. ccdc->syncif.fldstat = 0;
  1879. ccdc->syncif.hdpol = 0;
  1880. ccdc->syncif.vdpol = 0;
  1881. ccdc->clamp.oblen = 0;
  1882. ccdc->clamp.dcsubval = 0;
  1883. ccdc->vpcfg.pixelclk = 0;
  1884. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  1885. ccdc_apply_controls(ccdc);
  1886. return ccdc_init_entities(ccdc);
  1887. }
  1888. /*
  1889. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  1890. * @dev: Device pointer specific to the OMAP3 ISP.
  1891. */
  1892. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  1893. {
  1894. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1895. /* Free LSC requests. As the CCDC is stopped there's no active request,
  1896. * so only the pending request and the free queue need to be handled.
  1897. */
  1898. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1899. cancel_work_sync(&ccdc->lsc.table_work);
  1900. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1901. if (ccdc->fpc.fpcaddr != 0)
  1902. iommu_vfree(isp->iommu, ccdc->fpc.fpcaddr);
  1903. }