setup.c 4.1 KB

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  1. /*
  2. * linux/arch/m32r/platforms/mappi/setup.c
  3. *
  4. * Setup routines for Renesas MAPPI Board
  5. *
  6. * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
  7. * Hitoshi Yamamoto
  8. */
  9. #include <linux/irq.h>
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/system.h>
  14. #include <asm/m32r.h>
  15. #include <asm/io.h>
  16. #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
  17. icu_data_t icu_data[NR_IRQS];
  18. static void disable_mappi_irq(unsigned int irq)
  19. {
  20. unsigned long port, data;
  21. port = irq2port(irq);
  22. data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
  23. outl(data, port);
  24. }
  25. static void enable_mappi_irq(unsigned int irq)
  26. {
  27. unsigned long port, data;
  28. port = irq2port(irq);
  29. data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
  30. outl(data, port);
  31. }
  32. static void mask_mappi(struct irq_data *data)
  33. {
  34. disable_mappi_irq(data->irq);
  35. }
  36. static void unmask_mappi(struct irq_data *data)
  37. {
  38. enable_mappi_irq(data->irq);
  39. }
  40. static void shutdown_mappi(struct irq_data *data)
  41. {
  42. unsigned long port;
  43. port = irq2port(data->irq);
  44. outl(M32R_ICUCR_ILEVEL7, port);
  45. }
  46. static struct irq_chip mappi_irq_type =
  47. {
  48. .name = "MAPPI-IRQ",
  49. .irq_shutdown = shutdown_mappi,
  50. .irq_mask = mask_mappi,
  51. .irq_unmask = unmask_mappi,
  52. };
  53. void __init init_IRQ(void)
  54. {
  55. static int once = 0;
  56. if (once)
  57. return;
  58. else
  59. once++;
  60. #ifdef CONFIG_NE2000
  61. /* INT0 : LAN controller (RTL8019AS) */
  62. irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi_irq_type,
  63. handle_level_irq);
  64. icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11;
  65. disable_mappi_irq(M32R_IRQ_INT0);
  66. #endif /* CONFIG_M32R_NE2000 */
  67. /* MFT2 : system timer */
  68. irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi_irq_type,
  69. handle_level_irq);
  70. icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
  71. disable_mappi_irq(M32R_IRQ_MFT2);
  72. #ifdef CONFIG_SERIAL_M32R_SIO
  73. /* SIO0_R : uart receive data */
  74. irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi_irq_type,
  75. handle_level_irq);
  76. icu_data[M32R_IRQ_SIO0_R].icucr = 0;
  77. disable_mappi_irq(M32R_IRQ_SIO0_R);
  78. /* SIO0_S : uart send data */
  79. irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi_irq_type,
  80. handle_level_irq);
  81. icu_data[M32R_IRQ_SIO0_S].icucr = 0;
  82. disable_mappi_irq(M32R_IRQ_SIO0_S);
  83. /* SIO1_R : uart receive data */
  84. irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi_irq_type,
  85. handle_level_irq);
  86. icu_data[M32R_IRQ_SIO1_R].icucr = 0;
  87. disable_mappi_irq(M32R_IRQ_SIO1_R);
  88. /* SIO1_S : uart send data */
  89. irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi_irq_type,
  90. handle_level_irq);
  91. icu_data[M32R_IRQ_SIO1_S].icucr = 0;
  92. disable_mappi_irq(M32R_IRQ_SIO1_S);
  93. #endif /* CONFIG_SERIAL_M32R_SIO */
  94. #if defined(CONFIG_M32R_PCC)
  95. /* INT1 : pccard0 interrupt */
  96. irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi_irq_type,
  97. handle_level_irq);
  98. icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
  99. disable_mappi_irq(M32R_IRQ_INT1);
  100. /* INT2 : pccard1 interrupt */
  101. irq_set_chip_and_handler(M32R_IRQ_INT2, &mappi_irq_type,
  102. handle_level_irq);
  103. icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
  104. disable_mappi_irq(M32R_IRQ_INT2);
  105. #endif /* CONFIG_M32RPCC */
  106. }
  107. #if defined(CONFIG_FB_S1D13XXX)
  108. #include <video/s1d13xxxfb.h>
  109. #include <asm/s1d13806.h>
  110. static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
  111. .initregs = s1d13xxxfb_initregs,
  112. .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
  113. .platform_init_video = NULL,
  114. #ifdef CONFIG_PM
  115. .platform_suspend_video = NULL,
  116. .platform_resume_video = NULL,
  117. #endif
  118. };
  119. static struct resource s1d13xxxfb_resources[] = {
  120. [0] = {
  121. .start = 0x10200000UL,
  122. .end = 0x1033FFFFUL,
  123. .flags = IORESOURCE_MEM,
  124. },
  125. [1] = {
  126. .start = 0x10000000UL,
  127. .end = 0x100001FFUL,
  128. .flags = IORESOURCE_MEM,
  129. }
  130. };
  131. static struct platform_device s1d13xxxfb_device = {
  132. .name = S1D_DEVICENAME,
  133. .id = 0,
  134. .dev = {
  135. .platform_data = &s1d13xxxfb_data,
  136. },
  137. .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
  138. .resource = s1d13xxxfb_resources,
  139. };
  140. static int __init platform_init(void)
  141. {
  142. platform_device_register(&s1d13xxxfb_device);
  143. return 0;
  144. }
  145. arch_initcall(platform_init);
  146. #endif