pmc551.c 25 KB

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  1. /*
  2. * PMC551 PCI Mezzanine Ram Device
  3. *
  4. * Author:
  5. * Mark Ferrell <mferrell@mvista.com>
  6. * Copyright 1999,2000 Nortel Networks
  7. *
  8. * License:
  9. * As part of this driver was derived from the slram.c driver it
  10. * falls under the same license, which is GNU General Public
  11. * License v2
  12. *
  13. * Description:
  14. * This driver is intended to support the PMC551 PCI Ram device
  15. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  16. * cPCI embedded systems. The device contains a single SROM
  17. * that initially programs the V370PDC chipset onboard the
  18. * device, and various banks of DRAM/SDRAM onboard. This driver
  19. * implements this PCI Ram device as an MTD (Memory Technology
  20. * Device) so that it can be used to hold a file system, or for
  21. * added swap space in embedded systems. Since the memory on
  22. * this board isn't as fast as main memory we do not try to hook
  23. * it into main memory as that would simply reduce performance
  24. * on the system. Using it as a block device allows us to use
  25. * it as high speed swap or for a high speed disk device of some
  26. * sort. Which becomes very useful on diskless systems in the
  27. * embedded market I might add.
  28. *
  29. * Notes:
  30. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  31. * have available claims that all 4 of its DRAM banks have 64MiB
  32. * of ram configured (making a grand total of 256MiB onboard).
  33. * This is slightly annoying since the BAR0 size reflects the
  34. * aperture size, not the dram size, and the V370PDC supplies no
  35. * other method for memory size discovery. This problem is
  36. * mostly only relevant when compiled as a module, as the
  37. * unloading of the module with an aperture size smaller than
  38. * the ram will cause the driver to detect the onboard memory
  39. * size to be equal to the aperture size when the module is
  40. * reloaded. Soooo, to help, the module supports an msize
  41. * option to allow the specification of the onboard memory, and
  42. * an asize option, to allow the specification of the aperture
  43. * size. The aperture must be equal to or less then the memory
  44. * size, the driver will correct this if you screw it up. This
  45. * problem is not relevant for compiled in drivers as compiled
  46. * in drivers only init once.
  47. *
  48. * Credits:
  49. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  50. * initial example code of how to initialize this device and for
  51. * help with questions I had concerning operation of the device.
  52. *
  53. * Most of the MTD code for this driver was originally written
  54. * for the slram.o module in the MTD drivers package which
  55. * allows the mapping of system memory into an MTD device.
  56. * Since the PMC551 memory module is accessed in the same
  57. * fashion as system memory, the slram.c code became a very nice
  58. * fit to the needs of this driver. All we added was PCI
  59. * detection/initialization to the driver and automatically figure
  60. * out the size via the PCI detection.o, later changes by Corey
  61. * Minyard set up the card to utilize a 1M sliding apature.
  62. *
  63. * Corey Minyard <minyard@nortelnetworks.com>
  64. * * Modified driver to utilize a sliding aperture instead of
  65. * mapping all memory into kernel space which turned out to
  66. * be very wasteful.
  67. * * Located a bug in the SROM's initialization sequence that
  68. * made the memory unusable, added a fix to code to touch up
  69. * the DRAM some.
  70. *
  71. * Bugs/FIXMEs:
  72. * * MUST fix the init function to not spin on a register
  73. * waiting for it to set .. this does not safely handle busted
  74. * devices that never reset the register correctly which will
  75. * cause the system to hang w/ a reboot being the only chance at
  76. * recover. [sort of fixed, could be better]
  77. * * Add I2C handling of the SROM so we can read the SROM's information
  78. * about the aperture size. This should always accurately reflect the
  79. * onboard memory size.
  80. * * Comb the init routine. It's still a bit cludgy on a few things.
  81. */
  82. #include <linux/kernel.h>
  83. #include <linux/module.h>
  84. #include <asm/uaccess.h>
  85. #include <linux/types.h>
  86. #include <linux/init.h>
  87. #include <linux/ptrace.h>
  88. #include <linux/slab.h>
  89. #include <linux/string.h>
  90. #include <linux/timer.h>
  91. #include <linux/major.h>
  92. #include <linux/fs.h>
  93. #include <linux/ioctl.h>
  94. #include <asm/io.h>
  95. #include <asm/system.h>
  96. #include <linux/pci.h>
  97. #include <linux/mtd/mtd.h>
  98. #define PMC551_VERSION \
  99. "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
  100. #define PCI_VENDOR_ID_V3_SEMI 0x11b0
  101. #define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
  102. #define PMC551_PCI_MEM_MAP0 0x50
  103. #define PMC551_PCI_MEM_MAP1 0x54
  104. #define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
  105. #define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
  106. #define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
  107. #define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
  108. #define PMC551_SDRAM_MA 0x60
  109. #define PMC551_SDRAM_CMD 0x62
  110. #define PMC551_DRAM_CFG 0x64
  111. #define PMC551_SYS_CTRL_REG 0x78
  112. #define PMC551_DRAM_BLK0 0x68
  113. #define PMC551_DRAM_BLK1 0x6c
  114. #define PMC551_DRAM_BLK2 0x70
  115. #define PMC551_DRAM_BLK3 0x74
  116. #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
  117. #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
  118. #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
  119. struct mypriv {
  120. struct pci_dev *dev;
  121. u_char *start;
  122. u32 base_map0;
  123. u32 curr_map0;
  124. u32 asize;
  125. struct mtd_info *nextpmc551;
  126. };
  127. static struct mtd_info *pmc551list;
  128. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  129. size_t *retlen, void **virt, resource_size_t *phys);
  130. static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
  131. {
  132. struct mypriv *priv = mtd->priv;
  133. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  134. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  135. unsigned long end;
  136. u_char *ptr;
  137. size_t retlen;
  138. #ifdef CONFIG_MTD_PMC551_DEBUG
  139. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
  140. (long)instr->len);
  141. #endif
  142. end = instr->addr + instr->len - 1;
  143. eoff_hi = end & ~(priv->asize - 1);
  144. soff_hi = instr->addr & ~(priv->asize - 1);
  145. eoff_lo = end & (priv->asize - 1);
  146. soff_lo = instr->addr & (priv->asize - 1);
  147. pmc551_point(mtd, instr->addr, instr->len, &retlen,
  148. (void **)&ptr, NULL);
  149. if (soff_hi == eoff_hi || mtd->size == priv->asize) {
  150. /* The whole thing fits within one access, so just one shot
  151. will do it. */
  152. memset(ptr, 0xff, instr->len);
  153. } else {
  154. /* We have to do multiple writes to get all the data
  155. written. */
  156. while (soff_hi != eoff_hi) {
  157. #ifdef CONFIG_MTD_PMC551_DEBUG
  158. printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
  159. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  160. #endif
  161. memset(ptr, 0xff, priv->asize);
  162. if (soff_hi + priv->asize >= mtd->size) {
  163. goto out;
  164. }
  165. soff_hi += priv->asize;
  166. pmc551_point(mtd, (priv->base_map0 | soff_hi),
  167. priv->asize, &retlen,
  168. (void **)&ptr, NULL);
  169. }
  170. memset(ptr, 0xff, eoff_lo);
  171. }
  172. out:
  173. instr->state = MTD_ERASE_DONE;
  174. #ifdef CONFIG_MTD_PMC551_DEBUG
  175. printk(KERN_DEBUG "pmc551_erase() done\n");
  176. #endif
  177. mtd_erase_callback(instr);
  178. return 0;
  179. }
  180. static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
  181. size_t *retlen, void **virt, resource_size_t *phys)
  182. {
  183. struct mypriv *priv = mtd->priv;
  184. u32 soff_hi;
  185. u32 soff_lo;
  186. #ifdef CONFIG_MTD_PMC551_DEBUG
  187. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  188. #endif
  189. soff_hi = from & ~(priv->asize - 1);
  190. soff_lo = from & (priv->asize - 1);
  191. /* Cheap hack optimization */
  192. if (priv->curr_map0 != from) {
  193. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  194. (priv->base_map0 | soff_hi));
  195. priv->curr_map0 = soff_hi;
  196. }
  197. *virt = priv->start + soff_lo;
  198. *retlen = len;
  199. return 0;
  200. }
  201. static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
  202. {
  203. #ifdef CONFIG_MTD_PMC551_DEBUG
  204. printk(KERN_DEBUG "pmc551_unpoint()\n");
  205. #endif
  206. return 0;
  207. }
  208. static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
  209. size_t * retlen, u_char * buf)
  210. {
  211. struct mypriv *priv = mtd->priv;
  212. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  213. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  214. unsigned long end;
  215. u_char *ptr;
  216. u_char *copyto = buf;
  217. #ifdef CONFIG_MTD_PMC551_DEBUG
  218. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
  219. (long)from, (long)len, (long)priv->asize);
  220. #endif
  221. end = from + len - 1;
  222. soff_hi = from & ~(priv->asize - 1);
  223. eoff_hi = end & ~(priv->asize - 1);
  224. soff_lo = from & (priv->asize - 1);
  225. eoff_lo = end & (priv->asize - 1);
  226. pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
  227. if (soff_hi == eoff_hi) {
  228. /* The whole thing fits within one access, so just one shot
  229. will do it. */
  230. memcpy(copyto, ptr, len);
  231. copyto += len;
  232. } else {
  233. /* We have to do multiple writes to get all the data
  234. written. */
  235. while (soff_hi != eoff_hi) {
  236. #ifdef CONFIG_MTD_PMC551_DEBUG
  237. printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
  238. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  239. #endif
  240. memcpy(copyto, ptr, priv->asize);
  241. copyto += priv->asize;
  242. if (soff_hi + priv->asize >= mtd->size) {
  243. goto out;
  244. }
  245. soff_hi += priv->asize;
  246. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  247. (void **)&ptr, NULL);
  248. }
  249. memcpy(copyto, ptr, eoff_lo);
  250. copyto += eoff_lo;
  251. }
  252. out:
  253. #ifdef CONFIG_MTD_PMC551_DEBUG
  254. printk(KERN_DEBUG "pmc551_read() done\n");
  255. #endif
  256. *retlen = copyto - buf;
  257. return 0;
  258. }
  259. static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
  260. size_t * retlen, const u_char * buf)
  261. {
  262. struct mypriv *priv = mtd->priv;
  263. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  264. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  265. unsigned long end;
  266. u_char *ptr;
  267. const u_char *copyfrom = buf;
  268. #ifdef CONFIG_MTD_PMC551_DEBUG
  269. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
  270. (long)to, (long)len, (long)priv->asize);
  271. #endif
  272. end = to + len - 1;
  273. soff_hi = to & ~(priv->asize - 1);
  274. eoff_hi = end & ~(priv->asize - 1);
  275. soff_lo = to & (priv->asize - 1);
  276. eoff_lo = end & (priv->asize - 1);
  277. pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
  278. if (soff_hi == eoff_hi) {
  279. /* The whole thing fits within one access, so just one shot
  280. will do it. */
  281. memcpy(ptr, copyfrom, len);
  282. copyfrom += len;
  283. } else {
  284. /* We have to do multiple writes to get all the data
  285. written. */
  286. while (soff_hi != eoff_hi) {
  287. #ifdef CONFIG_MTD_PMC551_DEBUG
  288. printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
  289. "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  290. #endif
  291. memcpy(ptr, copyfrom, priv->asize);
  292. copyfrom += priv->asize;
  293. if (soff_hi >= mtd->size) {
  294. goto out;
  295. }
  296. soff_hi += priv->asize;
  297. pmc551_point(mtd, soff_hi, priv->asize, retlen,
  298. (void **)&ptr, NULL);
  299. }
  300. memcpy(ptr, copyfrom, eoff_lo);
  301. copyfrom += eoff_lo;
  302. }
  303. out:
  304. #ifdef CONFIG_MTD_PMC551_DEBUG
  305. printk(KERN_DEBUG "pmc551_write() done\n");
  306. #endif
  307. *retlen = copyfrom - buf;
  308. return 0;
  309. }
  310. /*
  311. * Fixup routines for the V370PDC
  312. * PCI device ID 0x020011b0
  313. *
  314. * This function basically kick starts the DRAM oboard the card and gets it
  315. * ready to be used. Before this is done the device reads VERY erratic, so
  316. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  317. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  318. * register. FIXME: stop spinning on registers .. must implement a timeout
  319. * mechanism
  320. * returns the size of the memory region found.
  321. */
  322. static int fixup_pmc551(struct pci_dev *dev)
  323. {
  324. #ifdef CONFIG_MTD_PMC551_BUGFIX
  325. u32 dram_data;
  326. #endif
  327. u32 size, dcmd, cfg, dtmp;
  328. u16 cmd, tmp, i;
  329. u8 bcmd, counter;
  330. /* Sanity Check */
  331. if (!dev) {
  332. return -ENODEV;
  333. }
  334. /*
  335. * Attempt to reset the card
  336. * FIXME: Stop Spinning registers
  337. */
  338. counter = 0;
  339. /* unlock registers */
  340. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
  341. /* read in old data */
  342. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  343. /* bang the reset line up and down for a few */
  344. for (i = 0; i < 10; i++) {
  345. counter = 0;
  346. bcmd &= ~0x80;
  347. while (counter++ < 100) {
  348. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  349. }
  350. counter = 0;
  351. bcmd |= 0x80;
  352. while (counter++ < 100) {
  353. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  354. }
  355. }
  356. bcmd |= (0x40 | 0x20);
  357. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  358. /*
  359. * Take care and turn off the memory on the device while we
  360. * tweak the configurations
  361. */
  362. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  363. tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
  364. pci_write_config_word(dev, PCI_COMMAND, tmp);
  365. /*
  366. * Disable existing aperture before probing memory size
  367. */
  368. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  369. dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
  370. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  371. /*
  372. * Grab old BAR0 config so that we can figure out memory size
  373. * This is another bit of kludge going on. The reason for the
  374. * redundancy is I am hoping to retain the original configuration
  375. * previously assigned to the card by the BIOS or some previous
  376. * fixup routine in the kernel. So we read the old config into cfg,
  377. * then write all 1's to the memory space, read back the result into
  378. * "size", and then write back all the old config.
  379. */
  380. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
  381. #ifndef CONFIG_MTD_PMC551_BUGFIX
  382. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
  383. pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
  384. size = (size & PCI_BASE_ADDRESS_MEM_MASK);
  385. size &= ~(size - 1);
  386. pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
  387. #else
  388. /*
  389. * Get the size of the memory by reading all the DRAM size values
  390. * and adding them up.
  391. *
  392. * KLUDGE ALERT: the boards we are using have invalid column and
  393. * row mux values. We fix them here, but this will break other
  394. * memory configurations.
  395. */
  396. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  397. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  398. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  399. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  400. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  401. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  402. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  403. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  404. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  405. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  406. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  407. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  408. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  409. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  410. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  411. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  412. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  413. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  414. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  415. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  416. /*
  417. * Oops .. something went wrong
  418. */
  419. if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  420. return -ENODEV;
  421. }
  422. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  423. if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  424. return -ENODEV;
  425. }
  426. /*
  427. * Precharge Dram
  428. */
  429. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
  430. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
  431. /*
  432. * Wait until command has gone through
  433. * FIXME: register spinning issue
  434. */
  435. do {
  436. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  437. if (counter++ > 100)
  438. break;
  439. } while ((PCI_COMMAND_IO) & cmd);
  440. /*
  441. * Turn on auto refresh
  442. * The loop is taken directly from Ramix's example code. I assume that
  443. * this must be held high for some duration of time, but I can find no
  444. * documentation refrencing the reasons why.
  445. */
  446. for (i = 1; i <= 8; i++) {
  447. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
  448. /*
  449. * Make certain command has gone through
  450. * FIXME: register spinning issue
  451. */
  452. counter = 0;
  453. do {
  454. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  455. if (counter++ > 100)
  456. break;
  457. } while ((PCI_COMMAND_IO) & cmd);
  458. }
  459. pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
  460. pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
  461. /*
  462. * Wait until command completes
  463. * FIXME: register spinning issue
  464. */
  465. counter = 0;
  466. do {
  467. pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  468. if (counter++ > 100)
  469. break;
  470. } while ((PCI_COMMAND_IO) & cmd);
  471. pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
  472. dcmd |= 0x02000000;
  473. pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
  474. /*
  475. * Check to make certain fast back-to-back, if not
  476. * then set it so
  477. */
  478. pci_read_config_word(dev, PCI_STATUS, &cmd);
  479. if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
  480. cmd |= PCI_COMMAND_FAST_BACK;
  481. pci_write_config_word(dev, PCI_STATUS, cmd);
  482. }
  483. /*
  484. * Check to make certain the DEVSEL is set correctly, this device
  485. * has a tendency to assert DEVSEL and TRDY when a write is performed
  486. * to the memory when memory is read-only
  487. */
  488. if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
  489. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  490. pci_write_config_word(dev, PCI_STATUS, cmd);
  491. }
  492. /*
  493. * Set to be prefetchable and put everything back based on old cfg.
  494. * it's possible that the reset of the V370PDC nuked the original
  495. * setup
  496. */
  497. /*
  498. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  499. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  500. */
  501. /*
  502. * Turn PCI memory and I/O bus access back on
  503. */
  504. pci_write_config_word(dev, PCI_COMMAND,
  505. PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
  506. #ifdef CONFIG_MTD_PMC551_DEBUG
  507. /*
  508. * Some screen fun
  509. */
  510. printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
  511. "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
  512. size >> 10 : size >> 20,
  513. (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
  514. ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
  515. (unsigned long long)pci_resource_start(dev, 0));
  516. /*
  517. * Check to see the state of the memory
  518. */
  519. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
  520. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  521. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  522. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  523. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  524. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  525. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  526. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  527. ((dcmd >> 9) & 0xF));
  528. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
  529. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  530. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  531. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  532. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  533. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  534. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  535. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  536. ((dcmd >> 9) & 0xF));
  537. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
  538. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  539. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  540. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  541. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  542. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  543. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  544. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  545. ((dcmd >> 9) & 0xF));
  546. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
  547. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  548. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  549. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  550. (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
  551. (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
  552. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  553. ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
  554. ((dcmd >> 9) & 0xF));
  555. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  556. printk(KERN_DEBUG "pmc551: Memory Access %s\n",
  557. (((0x1 << 1) & cmd) == 0) ? "off" : "on");
  558. printk(KERN_DEBUG "pmc551: I/O Access %s\n",
  559. (((0x1 << 0) & cmd) == 0) ? "off" : "on");
  560. pci_read_config_word(dev, PCI_STATUS, &cmd);
  561. printk(KERN_DEBUG "pmc551: Devsel %s\n",
  562. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
  563. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
  564. ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
  565. printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  566. ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
  567. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
  568. printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  569. "pmc551: System Control Register is %slocked to PCI access\n"
  570. "pmc551: System Control Register is %slocked to EEPROM access\n",
  571. (bcmd & 0x1) ? "software" : "hardware",
  572. (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
  573. #endif
  574. return size;
  575. }
  576. /*
  577. * Kernel version specific module stuffages
  578. */
  579. MODULE_LICENSE("GPL");
  580. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  581. MODULE_DESCRIPTION(PMC551_VERSION);
  582. /*
  583. * Stuff these outside the ifdef so as to not bust compiled in driver support
  584. */
  585. static int msize = 0;
  586. static int asize = 0;
  587. module_param(msize, int, 0);
  588. MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
  589. module_param(asize, int, 0);
  590. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  591. /*
  592. * PMC551 Card Initialization
  593. */
  594. static int __init init_pmc551(void)
  595. {
  596. struct pci_dev *PCI_Device = NULL;
  597. struct mypriv *priv;
  598. int found = 0;
  599. struct mtd_info *mtd;
  600. int length = 0;
  601. if (msize) {
  602. msize = (1 << (ffs(msize) - 1)) << 20;
  603. if (msize > (1 << 30)) {
  604. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
  605. msize);
  606. return -EINVAL;
  607. }
  608. }
  609. if (asize) {
  610. asize = (1 << (ffs(asize) - 1)) << 20;
  611. if (asize > (1 << 30)) {
  612. printk(KERN_NOTICE "pmc551: Invalid aperture size "
  613. "[%d]\n", asize);
  614. return -EINVAL;
  615. }
  616. }
  617. printk(KERN_INFO PMC551_VERSION);
  618. /*
  619. * PCU-bus chipset probe.
  620. */
  621. for (;;) {
  622. if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
  623. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  624. PCI_Device)) == NULL) {
  625. break;
  626. }
  627. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
  628. (unsigned long long)pci_resource_start(PCI_Device, 0));
  629. /*
  630. * The PMC551 device acts VERY weird if you don't init it
  631. * first. i.e. it will not correctly report devsel. If for
  632. * some reason the sdram is in a wrote-protected state the
  633. * device will DEVSEL when it is written to causing problems
  634. * with the oldproc.c driver in
  635. * some kernels (2.2.*)
  636. */
  637. if ((length = fixup_pmc551(PCI_Device)) <= 0) {
  638. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  639. break;
  640. }
  641. /*
  642. * This is needed until the driver is capable of reading the
  643. * onboard I2C SROM to discover the "real" memory size.
  644. */
  645. if (msize) {
  646. length = msize;
  647. printk(KERN_NOTICE "pmc551: Using specified memory "
  648. "size 0x%x\n", length);
  649. } else {
  650. msize = length;
  651. }
  652. mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
  653. if (!mtd) {
  654. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  655. "device.\n");
  656. break;
  657. }
  658. priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
  659. if (!priv) {
  660. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
  661. "device.\n");
  662. kfree(mtd);
  663. break;
  664. }
  665. mtd->priv = priv;
  666. priv->dev = PCI_Device;
  667. if (asize > length) {
  668. printk(KERN_NOTICE "pmc551: reducing aperture size to "
  669. "fit %dM\n", length >> 20);
  670. priv->asize = asize = length;
  671. } else if (asize == 0 || asize == length) {
  672. printk(KERN_NOTICE "pmc551: Using existing aperture "
  673. "size %dM\n", length >> 20);
  674. priv->asize = asize = length;
  675. } else {
  676. printk(KERN_NOTICE "pmc551: Using specified aperture "
  677. "size %dM\n", asize >> 20);
  678. priv->asize = asize;
  679. }
  680. priv->start = pci_iomap(PCI_Device, 0, priv->asize);
  681. if (!priv->start) {
  682. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  683. kfree(mtd->priv);
  684. kfree(mtd);
  685. break;
  686. }
  687. #ifdef CONFIG_MTD_PMC551_DEBUG
  688. printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
  689. ffs(priv->asize >> 20) - 1);
  690. #endif
  691. priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
  692. | PMC551_PCI_MEM_MAP_ENABLE
  693. | (ffs(priv->asize >> 20) - 1) << 4);
  694. priv->curr_map0 = priv->base_map0;
  695. pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
  696. priv->curr_map0);
  697. #ifdef CONFIG_MTD_PMC551_DEBUG
  698. printk(KERN_DEBUG "pmc551: aperture set to %d\n",
  699. (priv->base_map0 & 0xF0) >> 4);
  700. #endif
  701. mtd->size = msize;
  702. mtd->flags = MTD_CAP_RAM;
  703. mtd->_erase = pmc551_erase;
  704. mtd->_read = pmc551_read;
  705. mtd->_write = pmc551_write;
  706. mtd->_point = pmc551_point;
  707. mtd->_unpoint = pmc551_unpoint;
  708. mtd->type = MTD_RAM;
  709. mtd->name = "PMC551 RAM board";
  710. mtd->erasesize = 0x10000;
  711. mtd->writesize = 1;
  712. mtd->owner = THIS_MODULE;
  713. if (mtd_device_register(mtd, NULL, 0)) {
  714. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  715. pci_iounmap(PCI_Device, priv->start);
  716. kfree(mtd->priv);
  717. kfree(mtd);
  718. break;
  719. }
  720. /* Keep a reference as the mtd_device_register worked */
  721. pci_dev_get(PCI_Device);
  722. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  723. printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
  724. priv->asize >> 20,
  725. priv->start, priv->start + priv->asize);
  726. printk(KERN_NOTICE "Total memory is %d%sB\n",
  727. (length < 1024) ? length :
  728. (length < 1048576) ? length >> 10 : length >> 20,
  729. (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
  730. priv->nextpmc551 = pmc551list;
  731. pmc551list = mtd;
  732. found++;
  733. }
  734. /* Exited early, reference left over */
  735. if (PCI_Device)
  736. pci_dev_put(PCI_Device);
  737. if (!pmc551list) {
  738. printk(KERN_NOTICE "pmc551: not detected\n");
  739. return -ENODEV;
  740. } else {
  741. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  742. return 0;
  743. }
  744. }
  745. /*
  746. * PMC551 Card Cleanup
  747. */
  748. static void __exit cleanup_pmc551(void)
  749. {
  750. int found = 0;
  751. struct mtd_info *mtd;
  752. struct mypriv *priv;
  753. while ((mtd = pmc551list)) {
  754. priv = mtd->priv;
  755. pmc551list = priv->nextpmc551;
  756. if (priv->start) {
  757. printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
  758. "0x%p\n", priv->asize >> 20, priv->start);
  759. pci_iounmap(priv->dev, priv->start);
  760. }
  761. pci_dev_put(priv->dev);
  762. kfree(mtd->priv);
  763. mtd_device_unregister(mtd);
  764. kfree(mtd);
  765. found++;
  766. }
  767. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  768. }
  769. module_init(init_pmc551);
  770. module_exit(cleanup_pmc551);