ks8842.c 18 KB

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  1. /*
  2. * ks8842_main.c timberdale KS8842 ethernet driver
  3. * Copyright (c) 2009 Intel Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* Supports:
  19. * The Micrel KS8842 behind the timberdale FPGA
  20. */
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <linux/ethtool.h>
  28. #define DRV_NAME "ks8842"
  29. /* Timberdale specific Registers */
  30. #define REG_TIMB_RST 0x1c
  31. /* KS8842 registers */
  32. #define REG_SELECT_BANK 0x0e
  33. /* bank 0 registers */
  34. #define REG_QRFCR 0x04
  35. /* bank 2 registers */
  36. #define REG_MARL 0x00
  37. #define REG_MARM 0x02
  38. #define REG_MARH 0x04
  39. /* bank 3 registers */
  40. #define REG_GRR 0x06
  41. /* bank 16 registers */
  42. #define REG_TXCR 0x00
  43. #define REG_TXSR 0x02
  44. #define REG_RXCR 0x04
  45. #define REG_TXMIR 0x08
  46. #define REG_RXMIR 0x0A
  47. /* bank 17 registers */
  48. #define REG_TXQCR 0x00
  49. #define REG_RXQCR 0x02
  50. #define REG_TXFDPR 0x04
  51. #define REG_RXFDPR 0x06
  52. #define REG_QMU_DATA_LO 0x08
  53. #define REG_QMU_DATA_HI 0x0A
  54. /* bank 18 registers */
  55. #define REG_IER 0x00
  56. #define IRQ_LINK_CHANGE 0x8000
  57. #define IRQ_TX 0x4000
  58. #define IRQ_RX 0x2000
  59. #define IRQ_RX_OVERRUN 0x0800
  60. #define IRQ_TX_STOPPED 0x0200
  61. #define IRQ_RX_STOPPED 0x0100
  62. #define IRQ_RX_ERROR 0x0080
  63. #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \
  64. IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR)
  65. #define REG_ISR 0x02
  66. #define REG_RXSR 0x04
  67. #define RXSR_VALID 0x8000
  68. #define RXSR_BROADCAST 0x80
  69. #define RXSR_MULTICAST 0x40
  70. #define RXSR_UNICAST 0x20
  71. #define RXSR_FRAMETYPE 0x08
  72. #define RXSR_TOO_LONG 0x04
  73. #define RXSR_RUNT 0x02
  74. #define RXSR_CRC_ERROR 0x01
  75. #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR)
  76. /* bank 32 registers */
  77. #define REG_SW_ID_AND_ENABLE 0x00
  78. #define REG_SGCR1 0x02
  79. #define REG_SGCR2 0x04
  80. #define REG_SGCR3 0x06
  81. /* bank 39 registers */
  82. #define REG_MACAR1 0x00
  83. #define REG_MACAR2 0x02
  84. #define REG_MACAR3 0x04
  85. /* bank 45 registers */
  86. #define REG_P1MBCR 0x00
  87. #define REG_P1MBSR 0x02
  88. /* bank 46 registers */
  89. #define REG_P2MBCR 0x00
  90. #define REG_P2MBSR 0x02
  91. /* bank 48 registers */
  92. #define REG_P1CR2 0x02
  93. /* bank 49 registers */
  94. #define REG_P1CR4 0x02
  95. #define REG_P1SR 0x04
  96. struct ks8842_adapter {
  97. void __iomem *hw_addr;
  98. int irq;
  99. struct tasklet_struct tasklet;
  100. spinlock_t lock; /* spinlock to be interrupt safe */
  101. struct platform_device *pdev;
  102. };
  103. static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank)
  104. {
  105. iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK);
  106. }
  107. static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank,
  108. u8 value, int offset)
  109. {
  110. ks8842_select_bank(adapter, bank);
  111. iowrite8(value, adapter->hw_addr + offset);
  112. }
  113. static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank,
  114. u16 value, int offset)
  115. {
  116. ks8842_select_bank(adapter, bank);
  117. iowrite16(value, adapter->hw_addr + offset);
  118. }
  119. static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank,
  120. u16 bits, int offset)
  121. {
  122. u16 reg;
  123. ks8842_select_bank(adapter, bank);
  124. reg = ioread16(adapter->hw_addr + offset);
  125. reg |= bits;
  126. iowrite16(reg, adapter->hw_addr + offset);
  127. }
  128. static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank,
  129. u16 bits, int offset)
  130. {
  131. u16 reg;
  132. ks8842_select_bank(adapter, bank);
  133. reg = ioread16(adapter->hw_addr + offset);
  134. reg &= ~bits;
  135. iowrite16(reg, adapter->hw_addr + offset);
  136. }
  137. static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank,
  138. u32 value, int offset)
  139. {
  140. ks8842_select_bank(adapter, bank);
  141. iowrite32(value, adapter->hw_addr + offset);
  142. }
  143. static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank,
  144. int offset)
  145. {
  146. ks8842_select_bank(adapter, bank);
  147. return ioread8(adapter->hw_addr + offset);
  148. }
  149. static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank,
  150. int offset)
  151. {
  152. ks8842_select_bank(adapter, bank);
  153. return ioread16(adapter->hw_addr + offset);
  154. }
  155. static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank,
  156. int offset)
  157. {
  158. ks8842_select_bank(adapter, bank);
  159. return ioread32(adapter->hw_addr + offset);
  160. }
  161. static void ks8842_reset(struct ks8842_adapter *adapter)
  162. {
  163. /* The KS8842 goes haywire when doing softare reset
  164. * a work around in the timberdale IP is implemented to
  165. * do a hardware reset instead
  166. ks8842_write16(adapter, 3, 1, REG_GRR);
  167. msleep(10);
  168. iowrite16(0, adapter->hw_addr + REG_GRR);
  169. */
  170. iowrite16(32, adapter->hw_addr + REG_SELECT_BANK);
  171. iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
  172. msleep(20);
  173. }
  174. static void ks8842_update_link_status(struct net_device *netdev,
  175. struct ks8842_adapter *adapter)
  176. {
  177. /* check the status of the link */
  178. if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) {
  179. netif_carrier_on(netdev);
  180. netif_wake_queue(netdev);
  181. } else {
  182. netif_stop_queue(netdev);
  183. netif_carrier_off(netdev);
  184. }
  185. }
  186. static void ks8842_enable_tx(struct ks8842_adapter *adapter)
  187. {
  188. ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR);
  189. }
  190. static void ks8842_disable_tx(struct ks8842_adapter *adapter)
  191. {
  192. ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR);
  193. }
  194. static void ks8842_enable_rx(struct ks8842_adapter *adapter)
  195. {
  196. ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR);
  197. }
  198. static void ks8842_disable_rx(struct ks8842_adapter *adapter)
  199. {
  200. ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR);
  201. }
  202. static void ks8842_reset_hw(struct ks8842_adapter *adapter)
  203. {
  204. /* reset the HW */
  205. ks8842_reset(adapter);
  206. /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */
  207. ks8842_write16(adapter, 16, 0x000E, REG_TXCR);
  208. /* enable the receiver, uni + multi + broadcast + flow ctrl
  209. + crc strip */
  210. ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400,
  211. REG_RXCR);
  212. /* TX frame pointer autoincrement */
  213. ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR);
  214. /* RX frame pointer autoincrement */
  215. ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR);
  216. /* RX 2 kb high watermark */
  217. ks8842_write16(adapter, 0, 0x1000, REG_QRFCR);
  218. /* aggresive back off in half duplex */
  219. ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1);
  220. /* enable no excessive collison drop */
  221. ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2);
  222. /* Enable port 1 force flow control / back pressure / transmit / recv */
  223. ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2);
  224. /* restart port auto-negotiation */
  225. ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4);
  226. /* only advertise 10Mbps */
  227. ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4);
  228. /* Enable the transmitter */
  229. ks8842_enable_tx(adapter);
  230. /* Enable the receiver */
  231. ks8842_enable_rx(adapter);
  232. /* clear all interrupts */
  233. ks8842_write16(adapter, 18, 0xffff, REG_ISR);
  234. /* enable interrupts */
  235. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  236. /* enable the switch */
  237. ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE);
  238. }
  239. static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest)
  240. {
  241. int i;
  242. u16 mac;
  243. for (i = 0; i < ETH_ALEN; i++)
  244. dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i);
  245. /* make sure the switch port uses the same MAC as the QMU */
  246. mac = ks8842_read16(adapter, 2, REG_MARL);
  247. ks8842_write16(adapter, 39, mac, REG_MACAR1);
  248. mac = ks8842_read16(adapter, 2, REG_MARM);
  249. ks8842_write16(adapter, 39, mac, REG_MACAR2);
  250. mac = ks8842_read16(adapter, 2, REG_MARH);
  251. ks8842_write16(adapter, 39, mac, REG_MACAR3);
  252. }
  253. static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter)
  254. {
  255. return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff;
  256. }
  257. static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev)
  258. {
  259. struct ks8842_adapter *adapter = netdev_priv(netdev);
  260. int len = skb->len;
  261. u32 *ptr = (u32 *)skb->data;
  262. u32 ctrl;
  263. dev_dbg(&adapter->pdev->dev,
  264. "%s: len %u head %p data %p tail %p end %p\n",
  265. __func__, skb->len, skb->head, skb->data,
  266. skb_tail_pointer(skb), skb_end_pointer(skb));
  267. /* check FIFO buffer space, we need space for CRC and command bits */
  268. if (ks8842_tx_fifo_space(adapter) < len + 8)
  269. return NETDEV_TX_BUSY;
  270. /* the control word, enable IRQ, port 1 and the length */
  271. ctrl = 0x8000 | 0x100 | (len << 16);
  272. ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO);
  273. netdev->stats.tx_bytes += len;
  274. /* copy buffer */
  275. while (len > 0) {
  276. iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
  277. len -= sizeof(u32);
  278. ptr++;
  279. }
  280. /* enqueue packet */
  281. ks8842_write16(adapter, 17, 1, REG_TXQCR);
  282. dev_kfree_skb(skb);
  283. return NETDEV_TX_OK;
  284. }
  285. static void ks8842_rx_frame(struct net_device *netdev,
  286. struct ks8842_adapter *adapter)
  287. {
  288. u32 status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO);
  289. int len = (status >> 16) & 0x7ff;
  290. status &= 0xffff;
  291. dev_dbg(&adapter->pdev->dev, "%s - rx_data: status: %x\n",
  292. __func__, status);
  293. /* check the status */
  294. if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) {
  295. struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len);
  296. dev_dbg(&adapter->pdev->dev, "%s, got package, len: %d\n",
  297. __func__, len);
  298. if (skb) {
  299. u32 *data;
  300. netdev->stats.rx_packets++;
  301. netdev->stats.rx_bytes += len;
  302. if (status & RXSR_MULTICAST)
  303. netdev->stats.multicast++;
  304. data = (u32 *)skb_put(skb, len);
  305. ks8842_select_bank(adapter, 17);
  306. while (len > 0) {
  307. *data++ = ioread32(adapter->hw_addr +
  308. REG_QMU_DATA_LO);
  309. len -= sizeof(u32);
  310. }
  311. skb->protocol = eth_type_trans(skb, netdev);
  312. netif_rx(skb);
  313. } else
  314. netdev->stats.rx_dropped++;
  315. } else {
  316. dev_dbg(&adapter->pdev->dev, "RX error, status: %x\n", status);
  317. netdev->stats.rx_errors++;
  318. if (status & RXSR_TOO_LONG)
  319. netdev->stats.rx_length_errors++;
  320. if (status & RXSR_CRC_ERROR)
  321. netdev->stats.rx_crc_errors++;
  322. if (status & RXSR_RUNT)
  323. netdev->stats.rx_frame_errors++;
  324. }
  325. /* set high watermark to 3K */
  326. ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR);
  327. /* release the frame */
  328. ks8842_write16(adapter, 17, 0x01, REG_RXQCR);
  329. /* set high watermark to 2K */
  330. ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR);
  331. }
  332. void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter)
  333. {
  334. u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  335. dev_dbg(&adapter->pdev->dev, "%s Entry - rx_data: %d\n",
  336. __func__, rx_data);
  337. while (rx_data) {
  338. ks8842_rx_frame(netdev, adapter);
  339. rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff;
  340. }
  341. }
  342. void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter)
  343. {
  344. u16 sr = ks8842_read16(adapter, 16, REG_TXSR);
  345. dev_dbg(&adapter->pdev->dev, "%s - entry, sr: %x\n", __func__, sr);
  346. netdev->stats.tx_packets++;
  347. if (netif_queue_stopped(netdev))
  348. netif_wake_queue(netdev);
  349. }
  350. void ks8842_handle_rx_overrun(struct net_device *netdev,
  351. struct ks8842_adapter *adapter)
  352. {
  353. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  354. netdev->stats.rx_errors++;
  355. netdev->stats.rx_fifo_errors++;
  356. }
  357. void ks8842_tasklet(unsigned long arg)
  358. {
  359. struct net_device *netdev = (struct net_device *)arg;
  360. struct ks8842_adapter *adapter = netdev_priv(netdev);
  361. u16 isr;
  362. unsigned long flags;
  363. u16 entry_bank;
  364. /* read current bank to be able to set it back */
  365. spin_lock_irqsave(&adapter->lock, flags);
  366. entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  367. spin_unlock_irqrestore(&adapter->lock, flags);
  368. isr = ks8842_read16(adapter, 18, REG_ISR);
  369. dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
  370. /* Ack */
  371. ks8842_write16(adapter, 18, isr, REG_ISR);
  372. if (!netif_running(netdev))
  373. return;
  374. if (isr & IRQ_LINK_CHANGE)
  375. ks8842_update_link_status(netdev, adapter);
  376. if (isr & (IRQ_RX | IRQ_RX_ERROR))
  377. ks8842_handle_rx(netdev, adapter);
  378. if (isr & IRQ_TX)
  379. ks8842_handle_tx(netdev, adapter);
  380. if (isr & IRQ_RX_OVERRUN)
  381. ks8842_handle_rx_overrun(netdev, adapter);
  382. if (isr & IRQ_TX_STOPPED) {
  383. ks8842_disable_tx(adapter);
  384. ks8842_enable_tx(adapter);
  385. }
  386. if (isr & IRQ_RX_STOPPED) {
  387. ks8842_disable_rx(adapter);
  388. ks8842_enable_rx(adapter);
  389. }
  390. /* re-enable interrupts, put back the bank selection register */
  391. spin_lock_irqsave(&adapter->lock, flags);
  392. ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER);
  393. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  394. spin_unlock_irqrestore(&adapter->lock, flags);
  395. }
  396. static irqreturn_t ks8842_irq(int irq, void *devid)
  397. {
  398. struct ks8842_adapter *adapter = devid;
  399. u16 isr;
  400. u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK);
  401. irqreturn_t ret = IRQ_NONE;
  402. isr = ks8842_read16(adapter, 18, REG_ISR);
  403. dev_dbg(&adapter->pdev->dev, "%s - ISR: 0x%x\n", __func__, isr);
  404. if (isr) {
  405. /* disable IRQ */
  406. ks8842_write16(adapter, 18, 0x00, REG_IER);
  407. /* schedule tasklet */
  408. tasklet_schedule(&adapter->tasklet);
  409. ret = IRQ_HANDLED;
  410. }
  411. iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK);
  412. return ret;
  413. }
  414. /* Netdevice operations */
  415. static int ks8842_open(struct net_device *netdev)
  416. {
  417. struct ks8842_adapter *adapter = netdev_priv(netdev);
  418. int err;
  419. dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
  420. /* reset the HW */
  421. ks8842_reset_hw(adapter);
  422. ks8842_update_link_status(netdev, adapter);
  423. err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME,
  424. adapter);
  425. if (err) {
  426. pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err);
  427. return err;
  428. }
  429. return 0;
  430. }
  431. static int ks8842_close(struct net_device *netdev)
  432. {
  433. struct ks8842_adapter *adapter = netdev_priv(netdev);
  434. dev_dbg(&adapter->pdev->dev, "%s - entry\n", __func__);
  435. /* free the irq */
  436. free_irq(adapter->irq, adapter);
  437. /* disable the switch */
  438. ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE);
  439. return 0;
  440. }
  441. static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb,
  442. struct net_device *netdev)
  443. {
  444. int ret;
  445. struct ks8842_adapter *adapter = netdev_priv(netdev);
  446. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  447. ret = ks8842_tx_frame(skb, netdev);
  448. if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8)
  449. netif_stop_queue(netdev);
  450. return ret;
  451. }
  452. static int ks8842_set_mac(struct net_device *netdev, void *p)
  453. {
  454. struct ks8842_adapter *adapter = netdev_priv(netdev);
  455. unsigned long flags;
  456. struct sockaddr *addr = p;
  457. char *mac = (u8 *)addr->sa_data;
  458. int i;
  459. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  460. if (!is_valid_ether_addr(addr->sa_data))
  461. return -EADDRNOTAVAIL;
  462. memcpy(netdev->dev_addr, mac, netdev->addr_len);
  463. spin_lock_irqsave(&adapter->lock, flags);
  464. for (i = 0; i < ETH_ALEN; i++) {
  465. ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i);
  466. ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1],
  467. REG_MACAR1 + i);
  468. }
  469. spin_unlock_irqrestore(&adapter->lock, flags);
  470. return 0;
  471. }
  472. static void ks8842_tx_timeout(struct net_device *netdev)
  473. {
  474. struct ks8842_adapter *adapter = netdev_priv(netdev);
  475. unsigned long flags;
  476. dev_dbg(&adapter->pdev->dev, "%s: entry\n", __func__);
  477. spin_lock_irqsave(&adapter->lock, flags);
  478. /* disable interrupts */
  479. ks8842_write16(adapter, 18, 0, REG_IER);
  480. ks8842_write16(adapter, 18, 0xFFFF, REG_ISR);
  481. spin_unlock_irqrestore(&adapter->lock, flags);
  482. ks8842_reset_hw(adapter);
  483. ks8842_update_link_status(netdev, adapter);
  484. }
  485. static const struct net_device_ops ks8842_netdev_ops = {
  486. .ndo_open = ks8842_open,
  487. .ndo_stop = ks8842_close,
  488. .ndo_start_xmit = ks8842_xmit_frame,
  489. .ndo_set_mac_address = ks8842_set_mac,
  490. .ndo_tx_timeout = ks8842_tx_timeout,
  491. .ndo_validate_addr = eth_validate_addr
  492. };
  493. static const struct ethtool_ops ks8842_ethtool_ops = {
  494. .get_link = ethtool_op_get_link,
  495. };
  496. static int __devinit ks8842_probe(struct platform_device *pdev)
  497. {
  498. int err = -ENOMEM;
  499. struct resource *iomem;
  500. struct net_device *netdev;
  501. struct ks8842_adapter *adapter;
  502. u16 id;
  503. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  504. if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME))
  505. goto err_mem_region;
  506. netdev = alloc_etherdev(sizeof(struct ks8842_adapter));
  507. if (!netdev)
  508. goto err_alloc_etherdev;
  509. SET_NETDEV_DEV(netdev, &pdev->dev);
  510. adapter = netdev_priv(netdev);
  511. adapter->hw_addr = ioremap(iomem->start, resource_size(iomem));
  512. if (!adapter->hw_addr)
  513. goto err_ioremap;
  514. adapter->irq = platform_get_irq(pdev, 0);
  515. if (adapter->irq < 0) {
  516. err = adapter->irq;
  517. goto err_get_irq;
  518. }
  519. adapter->pdev = pdev;
  520. tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev);
  521. spin_lock_init(&adapter->lock);
  522. netdev->netdev_ops = &ks8842_netdev_ops;
  523. netdev->ethtool_ops = &ks8842_ethtool_ops;
  524. ks8842_read_mac_addr(adapter, netdev->dev_addr);
  525. id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE);
  526. strcpy(netdev->name, "eth%d");
  527. err = register_netdev(netdev);
  528. if (err)
  529. goto err_register;
  530. platform_set_drvdata(pdev, netdev);
  531. pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n",
  532. (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7);
  533. return 0;
  534. err_register:
  535. err_get_irq:
  536. iounmap(adapter->hw_addr);
  537. err_ioremap:
  538. free_netdev(netdev);
  539. err_alloc_etherdev:
  540. release_mem_region(iomem->start, resource_size(iomem));
  541. err_mem_region:
  542. return err;
  543. }
  544. static int __devexit ks8842_remove(struct platform_device *pdev)
  545. {
  546. struct net_device *netdev = platform_get_drvdata(pdev);
  547. struct ks8842_adapter *adapter = netdev_priv(netdev);
  548. struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  549. unregister_netdev(netdev);
  550. tasklet_kill(&adapter->tasklet);
  551. iounmap(adapter->hw_addr);
  552. free_netdev(netdev);
  553. release_mem_region(iomem->start, resource_size(iomem));
  554. platform_set_drvdata(pdev, NULL);
  555. return 0;
  556. }
  557. static struct platform_driver ks8842_platform_driver = {
  558. .driver = {
  559. .name = DRV_NAME,
  560. .owner = THIS_MODULE,
  561. },
  562. .probe = ks8842_probe,
  563. .remove = ks8842_remove,
  564. };
  565. static int __init ks8842_init(void)
  566. {
  567. return platform_driver_register(&ks8842_platform_driver);
  568. }
  569. static void __exit ks8842_exit(void)
  570. {
  571. platform_driver_unregister(&ks8842_platform_driver);
  572. }
  573. module_init(ks8842_init);
  574. module_exit(ks8842_exit);
  575. MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver");
  576. MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
  577. MODULE_LICENSE("GPL v2");
  578. MODULE_ALIAS("platform:ks8842");