pm.c 8.5 KB

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  1. /* linux/arch/arm/plat-s3c/pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2004-2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C common power management (suspend to ram) support.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/suspend.h>
  16. #include <linux/errno.h>
  17. #include <linux/delay.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/io.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/suspend.h>
  22. #include <mach/hardware.h>
  23. #include <mach/map.h>
  24. #include <plat/regs-serial.h>
  25. #include <mach/regs-clock.h>
  26. #include <mach/regs-irq.h>
  27. #include <mach/irqs.h>
  28. #include <asm/irq.h>
  29. #include <plat/pm.h>
  30. #include <mach/pm-core.h>
  31. /* for external use */
  32. unsigned long s3c_pm_flags;
  33. /* Debug code:
  34. *
  35. * This code supports debug output to the low level UARTs for use on
  36. * resume before the console layer is available.
  37. */
  38. #ifdef CONFIG_SAMSUNG_PM_DEBUG
  39. extern void printascii(const char *);
  40. void s3c_pm_dbg(const char *fmt, ...)
  41. {
  42. va_list va;
  43. char buff[256];
  44. va_start(va, fmt);
  45. vsnprintf(buff, sizeof(buff), fmt, va);
  46. va_end(va);
  47. printascii(buff);
  48. }
  49. static inline void s3c_pm_debug_init(void)
  50. {
  51. /* restart uart clocks so we can use them to output */
  52. s3c_pm_debug_init_uart();
  53. }
  54. #else
  55. #define s3c_pm_debug_init() do { } while(0)
  56. #endif /* CONFIG_SAMSUNG_PM_DEBUG */
  57. /* Save the UART configurations if we are configured for debug. */
  58. unsigned char pm_uart_udivslot;
  59. #ifdef CONFIG_SAMSUNG_PM_DEBUG
  60. static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
  61. static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
  62. {
  63. void __iomem *regs = S3C_VA_UARTx(uart);
  64. save->ulcon = __raw_readl(regs + S3C2410_ULCON);
  65. save->ucon = __raw_readl(regs + S3C2410_UCON);
  66. save->ufcon = __raw_readl(regs + S3C2410_UFCON);
  67. save->umcon = __raw_readl(regs + S3C2410_UMCON);
  68. save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
  69. if (pm_uart_udivslot)
  70. save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
  71. S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
  72. uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
  73. }
  74. static void s3c_pm_save_uarts(void)
  75. {
  76. struct pm_uart_save *save = uart_save;
  77. unsigned int uart;
  78. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  79. s3c_pm_save_uart(uart, save);
  80. }
  81. static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
  82. {
  83. void __iomem *regs = S3C_VA_UARTx(uart);
  84. s3c_pm_arch_update_uart(regs, save);
  85. __raw_writel(save->ulcon, regs + S3C2410_ULCON);
  86. __raw_writel(save->ucon, regs + S3C2410_UCON);
  87. __raw_writel(save->ufcon, regs + S3C2410_UFCON);
  88. __raw_writel(save->umcon, regs + S3C2410_UMCON);
  89. __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
  90. if (pm_uart_udivslot)
  91. __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
  92. }
  93. static void s3c_pm_restore_uarts(void)
  94. {
  95. struct pm_uart_save *save = uart_save;
  96. unsigned int uart;
  97. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  98. s3c_pm_restore_uart(uart, save);
  99. }
  100. #else
  101. static void s3c_pm_save_uarts(void) { }
  102. static void s3c_pm_restore_uarts(void) { }
  103. #endif
  104. /* The IRQ ext-int code goes here, it is too small to currently bother
  105. * with its own file. */
  106. unsigned long s3c_irqwake_intmask = 0xffffffffL;
  107. unsigned long s3c_irqwake_eintmask = 0xffffffffL;
  108. int s3c_irqext_wake(struct irq_data *data, unsigned int state)
  109. {
  110. unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
  111. if (!(s3c_irqwake_eintallow & bit))
  112. return -ENOENT;
  113. printk(KERN_INFO "wake %s for irq %d\n",
  114. state ? "enabled" : "disabled", data->irq);
  115. if (!state)
  116. s3c_irqwake_eintmask |= bit;
  117. else
  118. s3c_irqwake_eintmask &= ~bit;
  119. return 0;
  120. }
  121. /* helper functions to save and restore register state */
  122. /**
  123. * s3c_pm_do_save() - save a set of registers for restoration on resume.
  124. * @ptr: Pointer to an array of registers.
  125. * @count: Size of the ptr array.
  126. *
  127. * Run through the list of registers given, saving their contents in the
  128. * array for later restoration when we wakeup.
  129. */
  130. void s3c_pm_do_save(struct sleep_save *ptr, int count)
  131. {
  132. for (; count > 0; count--, ptr++) {
  133. ptr->val = __raw_readl(ptr->reg);
  134. S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
  135. }
  136. }
  137. /**
  138. * s3c_pm_do_restore() - restore register values from the save list.
  139. * @ptr: Pointer to an array of registers.
  140. * @count: Size of the ptr array.
  141. *
  142. * Restore the register values saved from s3c_pm_do_save().
  143. *
  144. * Note, we do not use S3C_PMDBG() in here, as the system may not have
  145. * restore the UARTs state yet
  146. */
  147. void s3c_pm_do_restore(struct sleep_save *ptr, int count)
  148. {
  149. for (; count > 0; count--, ptr++) {
  150. printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
  151. ptr->reg, ptr->val, __raw_readl(ptr->reg));
  152. __raw_writel(ptr->val, ptr->reg);
  153. }
  154. }
  155. /**
  156. * s3c_pm_do_restore_core() - early restore register values from save list.
  157. *
  158. * This is similar to s3c_pm_do_restore() except we try and minimise the
  159. * side effects of the function in case registers that hardware might need
  160. * to work has been restored.
  161. *
  162. * WARNING: Do not put any debug in here that may effect memory or use
  163. * peripherals, as things may be changing!
  164. */
  165. void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
  166. {
  167. for (; count > 0; count--, ptr++)
  168. __raw_writel(ptr->val, ptr->reg);
  169. }
  170. /* s3c2410_pm_show_resume_irqs
  171. *
  172. * print any IRQs asserted at resume time (ie, we woke from)
  173. */
  174. static void __maybe_unused s3c_pm_show_resume_irqs(int start,
  175. unsigned long which,
  176. unsigned long mask)
  177. {
  178. int i;
  179. which &= ~mask;
  180. for (i = 0; i <= 31; i++) {
  181. if (which & (1L<<i)) {
  182. S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  183. }
  184. }
  185. }
  186. void (*pm_cpu_prep)(void);
  187. int (*pm_cpu_sleep)(unsigned long);
  188. #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
  189. /* s3c_pm_enter
  190. *
  191. * central control for sleep/resume process
  192. */
  193. static int s3c_pm_enter(suspend_state_t state)
  194. {
  195. int ret;
  196. /* ensure the debug is initialised (if enabled) */
  197. s3c_pm_debug_init();
  198. S3C_PMDBG("%s(%d)\n", __func__, state);
  199. if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
  200. printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
  201. return -EINVAL;
  202. }
  203. /* check if we have anything to wake-up with... bad things seem
  204. * to happen if you suspend with no wakeup (system will often
  205. * require a full power-cycle)
  206. */
  207. if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
  208. !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
  209. printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
  210. printk(KERN_ERR "%s: Aborting sleep\n", __func__);
  211. return -EINVAL;
  212. }
  213. /* save all necessary core registers not covered by the drivers */
  214. samsung_pm_save_gpios();
  215. samsung_pm_saved_gpios();
  216. s3c_pm_save_uarts();
  217. s3c_pm_save_core();
  218. /* set the irq configuration for wake */
  219. s3c_pm_configure_extint();
  220. S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
  221. s3c_irqwake_intmask, s3c_irqwake_eintmask);
  222. s3c_pm_arch_prepare_irqs();
  223. /* call cpu specific preparation */
  224. pm_cpu_prep();
  225. /* flush cache back to ram */
  226. flush_cache_all();
  227. s3c_pm_check_store();
  228. /* send the cpu to sleep... */
  229. s3c_pm_arch_stop_clocks();
  230. /* this will also act as our return point from when
  231. * we resume as it saves its own register state and restores it
  232. * during the resume. */
  233. ret = cpu_suspend(0, pm_cpu_sleep);
  234. if (ret)
  235. return ret;
  236. /* restore the system state */
  237. s3c_pm_restore_core();
  238. s3c_pm_restore_uarts();
  239. samsung_pm_restore_gpios();
  240. s3c_pm_restored_gpios();
  241. s3c_pm_debug_init();
  242. /* check what irq (if any) restored the system */
  243. s3c_pm_arch_show_resume_irqs();
  244. S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
  245. /* LEDs should now be 1110 */
  246. s3c_pm_debug_smdkled(1 << 1, 0);
  247. s3c_pm_check_restore();
  248. /* ok, let's return from sleep */
  249. S3C_PMDBG("S3C PM Resume (post-restore)\n");
  250. return 0;
  251. }
  252. static int s3c_pm_prepare(void)
  253. {
  254. /* prepare check area if configured */
  255. s3c_pm_check_prepare();
  256. return 0;
  257. }
  258. static void s3c_pm_finish(void)
  259. {
  260. s3c_pm_check_cleanup();
  261. }
  262. static const struct platform_suspend_ops s3c_pm_ops = {
  263. .enter = s3c_pm_enter,
  264. .prepare = s3c_pm_prepare,
  265. .finish = s3c_pm_finish,
  266. .valid = suspend_valid_only_mem,
  267. };
  268. /* s3c_pm_init
  269. *
  270. * Attach the power management functions. This should be called
  271. * from the board specific initialisation if the board supports
  272. * it.
  273. */
  274. int __init s3c_pm_init(void)
  275. {
  276. printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
  277. suspend_set_ops(&s3c_pm_ops);
  278. return 0;
  279. }