omap_crtc.c 18 KB

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  1. /*
  2. * drivers/gpu/drm/omapdrm/omap_crtc.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. * Author: Rob Clark <rob@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "omap_drv.h"
  20. #include <drm/drm_mode.h>
  21. #include "drm_crtc.h"
  22. #include "drm_crtc_helper.h"
  23. #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  24. struct omap_crtc {
  25. struct drm_crtc base;
  26. struct drm_plane *plane;
  27. const char *name;
  28. int pipe;
  29. enum omap_channel channel;
  30. struct omap_overlay_manager_info info;
  31. /*
  32. * Temporary: eventually this will go away, but it is needed
  33. * for now to keep the output's happy. (They only need
  34. * mgr->id.) Eventually this will be replaced w/ something
  35. * more common-panel-framework-y
  36. */
  37. struct omap_overlay_manager mgr;
  38. struct omap_video_timings timings;
  39. bool enabled;
  40. bool full_update;
  41. struct omap_drm_apply apply;
  42. struct omap_drm_irq apply_irq;
  43. struct omap_drm_irq error_irq;
  44. /* list of in-progress apply's: */
  45. struct list_head pending_applies;
  46. /* list of queued apply's: */
  47. struct list_head queued_applies;
  48. /* for handling queued and in-progress applies: */
  49. struct work_struct apply_work;
  50. /* if there is a pending flip, these will be non-null: */
  51. struct drm_pending_vblank_event *event;
  52. struct drm_framebuffer *old_fb;
  53. /* for handling page flips without caring about what
  54. * the callback is called from. Possibly we should just
  55. * make omap_gem always call the cb from the worker so
  56. * we don't have to care about this..
  57. *
  58. * XXX maybe fold into apply_work??
  59. */
  60. struct work_struct page_flip_work;
  61. };
  62. uint32_t pipe2vbl(struct drm_crtc *crtc)
  63. {
  64. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  65. return dispc_mgr_get_vsync_irq(omap_crtc->channel);
  66. }
  67. /*
  68. * Manager-ops, callbacks from output when they need to configure
  69. * the upstream part of the video pipe.
  70. *
  71. * Most of these we can ignore until we add support for command-mode
  72. * panels.. for video-mode the crtc-helpers already do an adequate
  73. * job of sequencing the setup of the video pipe in the proper order
  74. */
  75. /* we can probably ignore these until we support command-mode panels: */
  76. static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
  77. {
  78. }
  79. static int omap_crtc_enable(struct omap_overlay_manager *mgr)
  80. {
  81. return 0;
  82. }
  83. static void omap_crtc_disable(struct omap_overlay_manager *mgr)
  84. {
  85. }
  86. static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
  87. const struct omap_video_timings *timings)
  88. {
  89. struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
  90. DBG("%s", omap_crtc->name);
  91. omap_crtc->timings = *timings;
  92. omap_crtc->full_update = true;
  93. }
  94. static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
  95. const struct dss_lcd_mgr_config *config)
  96. {
  97. struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
  98. DBG("%s", omap_crtc->name);
  99. dispc_mgr_set_lcd_config(omap_crtc->channel, config);
  100. }
  101. static int omap_crtc_register_framedone_handler(
  102. struct omap_overlay_manager *mgr,
  103. void (*handler)(void *), void *data)
  104. {
  105. return 0;
  106. }
  107. static void omap_crtc_unregister_framedone_handler(
  108. struct omap_overlay_manager *mgr,
  109. void (*handler)(void *), void *data)
  110. {
  111. }
  112. static const struct dss_mgr_ops mgr_ops = {
  113. .start_update = omap_crtc_start_update,
  114. .enable = omap_crtc_enable,
  115. .disable = omap_crtc_disable,
  116. .set_timings = omap_crtc_set_timings,
  117. .set_lcd_config = omap_crtc_set_lcd_config,
  118. .register_framedone_handler = omap_crtc_register_framedone_handler,
  119. .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
  120. };
  121. /*
  122. * CRTC funcs:
  123. */
  124. static void omap_crtc_destroy(struct drm_crtc *crtc)
  125. {
  126. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  127. DBG("%s", omap_crtc->name);
  128. WARN_ON(omap_crtc->apply_irq.registered);
  129. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  130. omap_crtc->plane->funcs->destroy(omap_crtc->plane);
  131. drm_crtc_cleanup(crtc);
  132. kfree(omap_crtc);
  133. }
  134. static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
  135. {
  136. struct omap_drm_private *priv = crtc->dev->dev_private;
  137. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  138. bool enabled = (mode == DRM_MODE_DPMS_ON);
  139. int i;
  140. DBG("%s: %d", omap_crtc->name, mode);
  141. if (enabled != omap_crtc->enabled) {
  142. omap_crtc->enabled = enabled;
  143. omap_crtc->full_update = true;
  144. omap_crtc_apply(crtc, &omap_crtc->apply);
  145. /* also enable our private plane: */
  146. WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
  147. /* and any attached overlay planes: */
  148. for (i = 0; i < priv->num_planes; i++) {
  149. struct drm_plane *plane = priv->planes[i];
  150. if (plane->crtc == crtc)
  151. WARN_ON(omap_plane_dpms(plane, mode));
  152. }
  153. }
  154. }
  155. static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
  156. const struct drm_display_mode *mode,
  157. struct drm_display_mode *adjusted_mode)
  158. {
  159. return true;
  160. }
  161. static int omap_crtc_mode_set(struct drm_crtc *crtc,
  162. struct drm_display_mode *mode,
  163. struct drm_display_mode *adjusted_mode,
  164. int x, int y,
  165. struct drm_framebuffer *old_fb)
  166. {
  167. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  168. mode = adjusted_mode;
  169. DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
  170. omap_crtc->name, mode->base.id, mode->name,
  171. mode->vrefresh, mode->clock,
  172. mode->hdisplay, mode->hsync_start,
  173. mode->hsync_end, mode->htotal,
  174. mode->vdisplay, mode->vsync_start,
  175. mode->vsync_end, mode->vtotal,
  176. mode->type, mode->flags);
  177. copy_timings_drm_to_omap(&omap_crtc->timings, mode);
  178. omap_crtc->full_update = true;
  179. return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  180. 0, 0, mode->hdisplay, mode->vdisplay,
  181. x << 16, y << 16,
  182. mode->hdisplay << 16, mode->vdisplay << 16,
  183. NULL, NULL);
  184. }
  185. static void omap_crtc_prepare(struct drm_crtc *crtc)
  186. {
  187. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  188. DBG("%s", omap_crtc->name);
  189. omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  190. }
  191. static void omap_crtc_commit(struct drm_crtc *crtc)
  192. {
  193. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  194. DBG("%s", omap_crtc->name);
  195. omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  196. }
  197. static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  198. struct drm_framebuffer *old_fb)
  199. {
  200. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  201. struct drm_plane *plane = omap_crtc->plane;
  202. struct drm_display_mode *mode = &crtc->mode;
  203. return omap_plane_mode_set(plane, crtc, crtc->fb,
  204. 0, 0, mode->hdisplay, mode->vdisplay,
  205. x << 16, y << 16,
  206. mode->hdisplay << 16, mode->vdisplay << 16,
  207. NULL, NULL);
  208. }
  209. static void omap_crtc_load_lut(struct drm_crtc *crtc)
  210. {
  211. }
  212. static void vblank_cb(void *arg)
  213. {
  214. struct drm_crtc *crtc = arg;
  215. struct drm_device *dev = crtc->dev;
  216. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  217. unsigned long flags;
  218. spin_lock_irqsave(&dev->event_lock, flags);
  219. /* wakeup userspace */
  220. if (omap_crtc->event)
  221. drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
  222. omap_crtc->event = NULL;
  223. omap_crtc->old_fb = NULL;
  224. spin_unlock_irqrestore(&dev->event_lock, flags);
  225. }
  226. static void page_flip_worker(struct work_struct *work)
  227. {
  228. struct omap_crtc *omap_crtc =
  229. container_of(work, struct omap_crtc, page_flip_work);
  230. struct drm_crtc *crtc = &omap_crtc->base;
  231. struct drm_display_mode *mode = &crtc->mode;
  232. struct drm_gem_object *bo;
  233. mutex_lock(&crtc->mutex);
  234. omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  235. 0, 0, mode->hdisplay, mode->vdisplay,
  236. crtc->x << 16, crtc->y << 16,
  237. mode->hdisplay << 16, mode->vdisplay << 16,
  238. vblank_cb, crtc);
  239. mutex_unlock(&crtc->mutex);
  240. bo = omap_framebuffer_bo(crtc->fb, 0);
  241. drm_gem_object_unreference_unlocked(bo);
  242. }
  243. static void page_flip_cb(void *arg)
  244. {
  245. struct drm_crtc *crtc = arg;
  246. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  247. struct omap_drm_private *priv = crtc->dev->dev_private;
  248. /* avoid assumptions about what ctxt we are called from: */
  249. queue_work(priv->wq, &omap_crtc->page_flip_work);
  250. }
  251. static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
  252. struct drm_framebuffer *fb,
  253. struct drm_pending_vblank_event *event)
  254. {
  255. struct drm_device *dev = crtc->dev;
  256. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  257. struct drm_gem_object *bo;
  258. DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
  259. fb->base.id, event);
  260. if (omap_crtc->old_fb) {
  261. dev_err(dev->dev, "already a pending flip\n");
  262. return -EINVAL;
  263. }
  264. omap_crtc->event = event;
  265. crtc->fb = fb;
  266. /*
  267. * Hold a reference temporarily until the crtc is updated
  268. * and takes the reference to the bo. This avoids it
  269. * getting freed from under us:
  270. */
  271. bo = omap_framebuffer_bo(fb, 0);
  272. drm_gem_object_reference(bo);
  273. omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
  274. return 0;
  275. }
  276. static int omap_crtc_set_property(struct drm_crtc *crtc,
  277. struct drm_property *property, uint64_t val)
  278. {
  279. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  280. struct omap_drm_private *priv = crtc->dev->dev_private;
  281. if (property == priv->rotation_prop) {
  282. crtc->invert_dimensions =
  283. !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
  284. }
  285. return omap_plane_set_property(omap_crtc->plane, property, val);
  286. }
  287. static const struct drm_crtc_funcs omap_crtc_funcs = {
  288. .set_config = drm_crtc_helper_set_config,
  289. .destroy = omap_crtc_destroy,
  290. .page_flip = omap_crtc_page_flip_locked,
  291. .set_property = omap_crtc_set_property,
  292. };
  293. static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
  294. .dpms = omap_crtc_dpms,
  295. .mode_fixup = omap_crtc_mode_fixup,
  296. .mode_set = omap_crtc_mode_set,
  297. .prepare = omap_crtc_prepare,
  298. .commit = omap_crtc_commit,
  299. .mode_set_base = omap_crtc_mode_set_base,
  300. .load_lut = omap_crtc_load_lut,
  301. };
  302. const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
  303. {
  304. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  305. return &omap_crtc->timings;
  306. }
  307. enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
  308. {
  309. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  310. return omap_crtc->channel;
  311. }
  312. static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  313. {
  314. struct omap_crtc *omap_crtc =
  315. container_of(irq, struct omap_crtc, error_irq);
  316. struct drm_crtc *crtc = &omap_crtc->base;
  317. DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
  318. /* avoid getting in a flood, unregister the irq until next vblank */
  319. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  320. }
  321. static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  322. {
  323. struct omap_crtc *omap_crtc =
  324. container_of(irq, struct omap_crtc, apply_irq);
  325. struct drm_crtc *crtc = &omap_crtc->base;
  326. if (!omap_crtc->error_irq.registered)
  327. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  328. if (!dispc_mgr_go_busy(omap_crtc->channel)) {
  329. struct omap_drm_private *priv =
  330. crtc->dev->dev_private;
  331. DBG("%s: apply done", omap_crtc->name);
  332. omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
  333. queue_work(priv->wq, &omap_crtc->apply_work);
  334. }
  335. }
  336. static void apply_worker(struct work_struct *work)
  337. {
  338. struct omap_crtc *omap_crtc =
  339. container_of(work, struct omap_crtc, apply_work);
  340. struct drm_crtc *crtc = &omap_crtc->base;
  341. struct drm_device *dev = crtc->dev;
  342. struct omap_drm_apply *apply, *n;
  343. bool need_apply;
  344. /*
  345. * Synchronize everything on mode_config.mutex, to keep
  346. * the callbacks and list modification all serialized
  347. * with respect to modesetting ioctls from userspace.
  348. */
  349. mutex_lock(&crtc->mutex);
  350. dispc_runtime_get();
  351. /*
  352. * If we are still pending a previous update, wait.. when the
  353. * pending update completes, we get kicked again.
  354. */
  355. if (omap_crtc->apply_irq.registered)
  356. goto out;
  357. /* finish up previous apply's: */
  358. list_for_each_entry_safe(apply, n,
  359. &omap_crtc->pending_applies, pending_node) {
  360. apply->post_apply(apply);
  361. list_del(&apply->pending_node);
  362. }
  363. need_apply = !list_empty(&omap_crtc->queued_applies);
  364. /* then handle the next round of of queued apply's: */
  365. list_for_each_entry_safe(apply, n,
  366. &omap_crtc->queued_applies, queued_node) {
  367. apply->pre_apply(apply);
  368. list_del(&apply->queued_node);
  369. apply->queued = false;
  370. list_add_tail(&apply->pending_node,
  371. &omap_crtc->pending_applies);
  372. }
  373. if (need_apply) {
  374. enum omap_channel channel = omap_crtc->channel;
  375. DBG("%s: GO", omap_crtc->name);
  376. if (dispc_mgr_is_enabled(channel)) {
  377. omap_irq_register(dev, &omap_crtc->apply_irq);
  378. dispc_mgr_go(channel);
  379. } else {
  380. struct omap_drm_private *priv = dev->dev_private;
  381. queue_work(priv->wq, &omap_crtc->apply_work);
  382. }
  383. }
  384. out:
  385. dispc_runtime_put();
  386. mutex_unlock(&crtc->mutex);
  387. }
  388. int omap_crtc_apply(struct drm_crtc *crtc,
  389. struct omap_drm_apply *apply)
  390. {
  391. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  392. WARN_ON(!mutex_is_locked(&crtc->mutex));
  393. /* no need to queue it again if it is already queued: */
  394. if (apply->queued)
  395. return 0;
  396. apply->queued = true;
  397. list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
  398. /*
  399. * If there are no currently pending updates, then go ahead and
  400. * kick the worker immediately, otherwise it will run again when
  401. * the current update finishes.
  402. */
  403. if (list_empty(&omap_crtc->pending_applies)) {
  404. struct omap_drm_private *priv = crtc->dev->dev_private;
  405. queue_work(priv->wq, &omap_crtc->apply_work);
  406. }
  407. return 0;
  408. }
  409. /* called only from apply */
  410. static void set_enabled(struct drm_crtc *crtc, bool enable)
  411. {
  412. struct drm_device *dev = crtc->dev;
  413. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  414. enum omap_channel channel = omap_crtc->channel;
  415. struct omap_irq_wait *wait = NULL;
  416. if (dispc_mgr_is_enabled(channel) == enable)
  417. return;
  418. /* ignore sync-lost irqs during enable/disable */
  419. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  420. if (dispc_mgr_get_framedone_irq(channel)) {
  421. if (!enable) {
  422. wait = omap_irq_wait_init(dev,
  423. dispc_mgr_get_framedone_irq(channel), 1);
  424. }
  425. } else {
  426. /*
  427. * When we disable digit output, we need to wait until fields
  428. * are done. Otherwise the DSS is still working, and turning
  429. * off the clocks prevents DSS from going to OFF mode. And when
  430. * enabling, we need to wait for the extra sync losts
  431. */
  432. wait = omap_irq_wait_init(dev,
  433. dispc_mgr_get_vsync_irq(channel), 2);
  434. }
  435. dispc_mgr_enable(channel, enable);
  436. if (wait) {
  437. int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
  438. if (ret) {
  439. dev_err(dev->dev, "%s: timeout waiting for %s\n",
  440. omap_crtc->name, enable ? "enable" : "disable");
  441. }
  442. }
  443. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  444. }
  445. static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
  446. {
  447. struct omap_crtc *omap_crtc =
  448. container_of(apply, struct omap_crtc, apply);
  449. struct drm_crtc *crtc = &omap_crtc->base;
  450. struct drm_encoder *encoder = NULL;
  451. DBG("%s: enabled=%d, full=%d", omap_crtc->name,
  452. omap_crtc->enabled, omap_crtc->full_update);
  453. if (omap_crtc->full_update) {
  454. struct omap_drm_private *priv = crtc->dev->dev_private;
  455. int i;
  456. for (i = 0; i < priv->num_encoders; i++) {
  457. if (priv->encoders[i]->crtc == crtc) {
  458. encoder = priv->encoders[i];
  459. break;
  460. }
  461. }
  462. }
  463. if (!omap_crtc->enabled) {
  464. set_enabled(&omap_crtc->base, false);
  465. if (encoder)
  466. omap_encoder_set_enabled(encoder, false);
  467. } else {
  468. if (encoder) {
  469. omap_encoder_set_enabled(encoder, false);
  470. omap_encoder_update(encoder, &omap_crtc->mgr,
  471. &omap_crtc->timings);
  472. omap_encoder_set_enabled(encoder, true);
  473. omap_crtc->full_update = false;
  474. }
  475. dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
  476. dispc_mgr_set_timings(omap_crtc->channel,
  477. &omap_crtc->timings);
  478. set_enabled(&omap_crtc->base, true);
  479. }
  480. omap_crtc->full_update = false;
  481. }
  482. static void omap_crtc_post_apply(struct omap_drm_apply *apply)
  483. {
  484. /* nothing needed for post-apply */
  485. }
  486. static const char *channel_names[] = {
  487. [OMAP_DSS_CHANNEL_LCD] = "lcd",
  488. [OMAP_DSS_CHANNEL_DIGIT] = "tv",
  489. [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
  490. };
  491. /* initialize crtc */
  492. struct drm_crtc *omap_crtc_init(struct drm_device *dev,
  493. struct drm_plane *plane, enum omap_channel channel, int id)
  494. {
  495. struct drm_crtc *crtc = NULL;
  496. struct omap_crtc *omap_crtc;
  497. struct omap_overlay_manager_info *info;
  498. DBG("%s", channel_names[channel]);
  499. omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
  500. if (!omap_crtc)
  501. goto fail;
  502. crtc = &omap_crtc->base;
  503. INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
  504. INIT_WORK(&omap_crtc->apply_work, apply_worker);
  505. INIT_LIST_HEAD(&omap_crtc->pending_applies);
  506. INIT_LIST_HEAD(&omap_crtc->queued_applies);
  507. omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
  508. omap_crtc->apply.post_apply = omap_crtc_post_apply;
  509. omap_crtc->channel = channel;
  510. omap_crtc->plane = plane;
  511. omap_crtc->plane->crtc = crtc;
  512. omap_crtc->name = channel_names[channel];
  513. omap_crtc->pipe = id;
  514. omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
  515. omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
  516. omap_crtc->error_irq.irqmask =
  517. dispc_mgr_get_sync_lost_irq(channel);
  518. omap_crtc->error_irq.irq = omap_crtc_error_irq;
  519. omap_irq_register(dev, &omap_crtc->error_irq);
  520. /* temporary: */
  521. omap_crtc->mgr.id = channel;
  522. dss_install_mgr_ops(&mgr_ops);
  523. /* TODO: fix hard-coded setup.. add properties! */
  524. info = &omap_crtc->info;
  525. info->default_color = 0x00000000;
  526. info->trans_key = 0x00000000;
  527. info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
  528. info->trans_enabled = false;
  529. drm_crtc_init(dev, crtc, &omap_crtc_funcs);
  530. drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
  531. omap_plane_install_properties(omap_crtc->plane, &crtc->base);
  532. return crtc;
  533. fail:
  534. if (crtc)
  535. omap_crtc_destroy(crtc);
  536. return NULL;
  537. }