am335x-evm.dts 12 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. vbat: fixedregulator@0 {
  23. compatible = "regulator-fixed";
  24. regulator-name = "vbat";
  25. regulator-min-microvolt = <5000000>;
  26. regulator-max-microvolt = <5000000>;
  27. regulator-boot-on;
  28. };
  29. lis3_reg: fixedregulator@1 {
  30. compatible = "regulator-fixed";
  31. regulator-name = "lis3_reg";
  32. regulator-boot-on;
  33. };
  34. matrix_keypad: matrix_keypad@0 {
  35. compatible = "gpio-matrix-keypad";
  36. debounce-delay-ms = <5>;
  37. col-scan-delay-us = <2>;
  38. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  39. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  40. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  41. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  42. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  43. linux,keymap = <0x0000008b /* MENU */
  44. 0x0100009e /* BACK */
  45. 0x02000069 /* LEFT */
  46. 0x0001006a /* RIGHT */
  47. 0x0101001c /* ENTER */
  48. 0x0201006c>; /* DOWN */
  49. };
  50. gpio_keys: volume_keys@0 {
  51. compatible = "gpio-keys";
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. autorepeat;
  55. switch@9 {
  56. label = "volume-up";
  57. linux,code = <115>;
  58. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  59. gpio-key,wakeup;
  60. };
  61. switch@10 {
  62. label = "volume-down";
  63. linux,code = <114>;
  64. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  65. gpio-key,wakeup;
  66. };
  67. };
  68. backlight {
  69. compatible = "pwm-backlight";
  70. pwms = <&ecap0 0 50000 0>;
  71. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  72. default-brightness-level = <8>;
  73. };
  74. };
  75. &am33xx_pinmux {
  76. pinctrl-names = "default";
  77. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  78. matrix_keypad_s0: matrix_keypad_s0 {
  79. pinctrl-single,pins = <
  80. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  81. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  82. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  83. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  84. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  85. >;
  86. };
  87. volume_keys_s0: volume_keys_s0 {
  88. pinctrl-single,pins = <
  89. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  90. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  91. >;
  92. };
  93. i2c0_pins: pinmux_i2c0_pins {
  94. pinctrl-single,pins = <
  95. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  96. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  97. >;
  98. };
  99. i2c1_pins: pinmux_i2c1_pins {
  100. pinctrl-single,pins = <
  101. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  102. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  103. >;
  104. };
  105. uart0_pins: pinmux_uart0_pins {
  106. pinctrl-single,pins = <
  107. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  108. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  109. >;
  110. };
  111. clkout2_pin: pinmux_clkout2_pin {
  112. pinctrl-single,pins = <
  113. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  114. >;
  115. };
  116. nandflash_pins_s0: nandflash_pins_s0 {
  117. pinctrl-single,pins = <
  118. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  119. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  120. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  121. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  122. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  123. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  124. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  125. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  126. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  127. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  128. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  129. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  130. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  131. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  132. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  133. >;
  134. };
  135. ecap0_pins: backlight_pins {
  136. pinctrl-single,pins = <
  137. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  138. >;
  139. };
  140. cpsw_default: cpsw_default {
  141. pinctrl-single,pins = <
  142. /* Slave 1 */
  143. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  144. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  145. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
  146. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
  147. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  148. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  149. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  150. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
  151. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
  152. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
  153. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  154. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  155. >;
  156. };
  157. cpsw_sleep: cpsw_sleep {
  158. pinctrl-single,pins = <
  159. /* Slave 1 reset value */
  160. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  161. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  162. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  163. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  164. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  165. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  166. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  167. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  168. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  169. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  170. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  171. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  172. >;
  173. };
  174. davinci_mdio_default: davinci_mdio_default {
  175. pinctrl-single,pins = <
  176. /* MDIO */
  177. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  178. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  179. >;
  180. };
  181. davinci_mdio_sleep: davinci_mdio_sleep {
  182. pinctrl-single,pins = <
  183. /* MDIO reset value */
  184. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  185. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  186. >;
  187. };
  188. };
  189. &uart0 {
  190. pinctrl-names = "default";
  191. pinctrl-0 = <&uart0_pins>;
  192. status = "okay";
  193. };
  194. &i2c0 {
  195. pinctrl-names = "default";
  196. pinctrl-0 = <&i2c0_pins>;
  197. status = "okay";
  198. clock-frequency = <400000>;
  199. tps: tps@2d {
  200. reg = <0x2d>;
  201. };
  202. };
  203. &usb {
  204. status = "okay";
  205. control@44e10000 {
  206. status = "okay";
  207. };
  208. usb-phy@47401300 {
  209. status = "okay";
  210. };
  211. usb-phy@47401b00 {
  212. status = "okay";
  213. };
  214. usb@47401000 {
  215. status = "okay";
  216. };
  217. usb@47401800 {
  218. status = "okay";
  219. dr_mode = "host";
  220. };
  221. dma-controller@07402000 {
  222. status = "okay";
  223. };
  224. };
  225. &i2c1 {
  226. pinctrl-names = "default";
  227. pinctrl-0 = <&i2c1_pins>;
  228. status = "okay";
  229. clock-frequency = <100000>;
  230. lis331dlh: lis331dlh@18 {
  231. compatible = "st,lis331dlh", "st,lis3lv02d";
  232. reg = <0x18>;
  233. Vdd-supply = <&lis3_reg>;
  234. Vdd_IO-supply = <&lis3_reg>;
  235. st,click-single-x;
  236. st,click-single-y;
  237. st,click-single-z;
  238. st,click-thresh-x = <10>;
  239. st,click-thresh-y = <10>;
  240. st,click-thresh-z = <10>;
  241. st,irq1-click;
  242. st,irq2-click;
  243. st,wakeup-x-lo;
  244. st,wakeup-x-hi;
  245. st,wakeup-y-lo;
  246. st,wakeup-y-hi;
  247. st,wakeup-z-lo;
  248. st,wakeup-z-hi;
  249. st,min-limit-x = <120>;
  250. st,min-limit-y = <120>;
  251. st,min-limit-z = <140>;
  252. st,max-limit-x = <550>;
  253. st,max-limit-y = <550>;
  254. st,max-limit-z = <750>;
  255. };
  256. tsl2550: tsl2550@39 {
  257. compatible = "taos,tsl2550";
  258. reg = <0x39>;
  259. };
  260. tmp275: tmp275@48 {
  261. compatible = "ti,tmp275";
  262. reg = <0x48>;
  263. };
  264. };
  265. &elm {
  266. status = "okay";
  267. };
  268. &epwmss0 {
  269. status = "okay";
  270. ecap0: ecap@48300100 {
  271. status = "okay";
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&ecap0_pins>;
  274. };
  275. };
  276. &gpmc {
  277. status = "okay";
  278. pinctrl-names = "default";
  279. pinctrl-0 = <&nandflash_pins_s0>;
  280. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  281. nand@0,0 {
  282. reg = <0 0 0>; /* CS0, offset 0 */
  283. nand-bus-width = <8>;
  284. ti,nand-ecc-opt = "bch8";
  285. gpmc,device-nand = "true";
  286. gpmc,device-width = <1>;
  287. gpmc,sync-clk-ps = <0>;
  288. gpmc,cs-on-ns = <0>;
  289. gpmc,cs-rd-off-ns = <44>;
  290. gpmc,cs-wr-off-ns = <44>;
  291. gpmc,adv-on-ns = <6>;
  292. gpmc,adv-rd-off-ns = <34>;
  293. gpmc,adv-wr-off-ns = <44>;
  294. gpmc,we-on-ns = <0>;
  295. gpmc,we-off-ns = <40>;
  296. gpmc,oe-on-ns = <0>;
  297. gpmc,oe-off-ns = <54>;
  298. gpmc,access-ns = <64>;
  299. gpmc,rd-cycle-ns = <82>;
  300. gpmc,wr-cycle-ns = <82>;
  301. gpmc,wait-on-read = "true";
  302. gpmc,wait-on-write = "true";
  303. gpmc,bus-turnaround-ns = <0>;
  304. gpmc,cycle2cycle-delay-ns = <0>;
  305. gpmc,clk-activation-ns = <0>;
  306. gpmc,wait-monitoring-ns = <0>;
  307. gpmc,wr-access-ns = <40>;
  308. gpmc,wr-data-mux-bus-ns = <0>;
  309. #address-cells = <1>;
  310. #size-cells = <1>;
  311. elm_id = <&elm>;
  312. /* MTD partition table */
  313. partition@0 {
  314. label = "SPL1";
  315. reg = <0x00000000 0x000020000>;
  316. };
  317. partition@1 {
  318. label = "SPL2";
  319. reg = <0x00020000 0x00020000>;
  320. };
  321. partition@2 {
  322. label = "SPL3";
  323. reg = <0x00040000 0x00020000>;
  324. };
  325. partition@3 {
  326. label = "SPL4";
  327. reg = <0x00060000 0x00020000>;
  328. };
  329. partition@4 {
  330. label = "U-boot";
  331. reg = <0x00080000 0x001e0000>;
  332. };
  333. partition@5 {
  334. label = "environment";
  335. reg = <0x00260000 0x00020000>;
  336. };
  337. partition@6 {
  338. label = "Kernel";
  339. reg = <0x00280000 0x00500000>;
  340. };
  341. partition@7 {
  342. label = "File-System";
  343. reg = <0x00780000 0x0F880000>;
  344. };
  345. };
  346. };
  347. #include "tps65910.dtsi"
  348. &tps {
  349. vcc1-supply = <&vbat>;
  350. vcc2-supply = <&vbat>;
  351. vcc3-supply = <&vbat>;
  352. vcc4-supply = <&vbat>;
  353. vcc5-supply = <&vbat>;
  354. vcc6-supply = <&vbat>;
  355. vcc7-supply = <&vbat>;
  356. vccio-supply = <&vbat>;
  357. regulators {
  358. vrtc_reg: regulator@0 {
  359. regulator-always-on;
  360. };
  361. vio_reg: regulator@1 {
  362. regulator-always-on;
  363. };
  364. vdd1_reg: regulator@2 {
  365. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  366. regulator-name = "vdd_mpu";
  367. regulator-min-microvolt = <912500>;
  368. regulator-max-microvolt = <1312500>;
  369. regulator-boot-on;
  370. regulator-always-on;
  371. };
  372. vdd2_reg: regulator@3 {
  373. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  374. regulator-name = "vdd_core";
  375. regulator-min-microvolt = <912500>;
  376. regulator-max-microvolt = <1150000>;
  377. regulator-boot-on;
  378. regulator-always-on;
  379. };
  380. vdd3_reg: regulator@4 {
  381. regulator-always-on;
  382. };
  383. vdig1_reg: regulator@5 {
  384. regulator-always-on;
  385. };
  386. vdig2_reg: regulator@6 {
  387. regulator-always-on;
  388. };
  389. vpll_reg: regulator@7 {
  390. regulator-always-on;
  391. };
  392. vdac_reg: regulator@8 {
  393. regulator-always-on;
  394. };
  395. vaux1_reg: regulator@9 {
  396. regulator-always-on;
  397. };
  398. vaux2_reg: regulator@10 {
  399. regulator-always-on;
  400. };
  401. vaux33_reg: regulator@11 {
  402. regulator-always-on;
  403. };
  404. vmmc_reg: regulator@12 {
  405. regulator-min-microvolt = <1800000>;
  406. regulator-max-microvolt = <3300000>;
  407. regulator-always-on;
  408. };
  409. };
  410. };
  411. &mac {
  412. pinctrl-names = "default", "sleep";
  413. pinctrl-0 = <&cpsw_default>;
  414. pinctrl-1 = <&cpsw_sleep>;
  415. };
  416. &davinci_mdio {
  417. pinctrl-names = "default", "sleep";
  418. pinctrl-0 = <&davinci_mdio_default>;
  419. pinctrl-1 = <&davinci_mdio_sleep>;
  420. };
  421. &cpsw_emac0 {
  422. phy_id = <&davinci_mdio>, <0>;
  423. phy-mode = "rgmii-txid";
  424. };
  425. &cpsw_emac1 {
  426. phy_id = <&davinci_mdio>, <1>;
  427. phy-mode = "rgmii-txid";
  428. };
  429. &tscadc {
  430. status = "okay";
  431. tsc {
  432. ti,wires = <4>;
  433. ti,x-plate-resistance = <200>;
  434. ti,coordiante-readouts = <5>;
  435. ti,wire-config = <0x00 0x11 0x22 0x33>;
  436. };
  437. adc {
  438. ti,adc-channels = <4 5 6 7>;
  439. };
  440. };
  441. &mmc1 {
  442. status = "okay";
  443. vmmc-supply = <&vmmc_reg>;
  444. bus-width = <4>;
  445. };