generic.c 6.1 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * Code common to all PXA machines.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Since this file should be linked before any other machine specific file,
  15. * the __initcall() here will be executed first. This serves as default
  16. * initialization stuff for PXA machines which can be overridden later if
  17. * need be.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/ioport.h>
  24. #include <linux/pm.h>
  25. #include <linux/string.h>
  26. #include <linux/sysdev.h>
  27. #include <asm/hardware.h>
  28. #include <asm/irq.h>
  29. #include <asm/system.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/mach/map.h>
  32. #include <asm/arch/pxa-regs.h>
  33. #include <asm/arch/gpio.h>
  34. #include "generic.h"
  35. /*
  36. * Get the clock frequency as reflected by CCCR and the turbo flag.
  37. * We assume these values have been applied via a fcs.
  38. * If info is not 0 we also display the current settings.
  39. */
  40. unsigned int get_clk_frequency_khz(int info)
  41. {
  42. if (cpu_is_pxa21x() || cpu_is_pxa25x())
  43. return pxa25x_get_clk_frequency_khz(info);
  44. else if (cpu_is_pxa27x())
  45. return pxa27x_get_clk_frequency_khz(info);
  46. else
  47. return pxa3xx_get_clk_frequency_khz(info);
  48. }
  49. EXPORT_SYMBOL(get_clk_frequency_khz);
  50. /*
  51. * Return the current memory clock frequency in units of 10kHz
  52. */
  53. unsigned int get_memclk_frequency_10khz(void)
  54. {
  55. if (cpu_is_pxa21x() || cpu_is_pxa25x())
  56. return pxa25x_get_memclk_frequency_10khz();
  57. else if (cpu_is_pxa27x())
  58. return pxa27x_get_memclk_frequency_10khz();
  59. else
  60. return pxa3xx_get_memclk_frequency_10khz();
  61. }
  62. EXPORT_SYMBOL(get_memclk_frequency_10khz);
  63. /*
  64. * Handy function to set GPIO alternate functions
  65. */
  66. int pxa_last_gpio;
  67. int pxa_gpio_mode(int gpio_mode)
  68. {
  69. unsigned long flags;
  70. int gpio = gpio_mode & GPIO_MD_MASK_NR;
  71. int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
  72. int gafr;
  73. if (gpio > pxa_last_gpio)
  74. return -EINVAL;
  75. local_irq_save(flags);
  76. if (gpio_mode & GPIO_DFLT_LOW)
  77. GPCR(gpio) = GPIO_bit(gpio);
  78. else if (gpio_mode & GPIO_DFLT_HIGH)
  79. GPSR(gpio) = GPIO_bit(gpio);
  80. if (gpio_mode & GPIO_MD_MASK_DIR)
  81. GPDR(gpio) |= GPIO_bit(gpio);
  82. else
  83. GPDR(gpio) &= ~GPIO_bit(gpio);
  84. gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
  85. GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
  86. local_irq_restore(flags);
  87. return 0;
  88. }
  89. EXPORT_SYMBOL(pxa_gpio_mode);
  90. int gpio_direction_input(unsigned gpio)
  91. {
  92. unsigned long flags;
  93. u32 mask;
  94. if (gpio > pxa_last_gpio)
  95. return -EINVAL;
  96. mask = GPIO_bit(gpio);
  97. local_irq_save(flags);
  98. GPDR(gpio) &= ~mask;
  99. local_irq_restore(flags);
  100. return 0;
  101. }
  102. EXPORT_SYMBOL(gpio_direction_input);
  103. int gpio_direction_output(unsigned gpio, int value)
  104. {
  105. unsigned long flags;
  106. u32 mask;
  107. if (gpio > pxa_last_gpio)
  108. return -EINVAL;
  109. mask = GPIO_bit(gpio);
  110. local_irq_save(flags);
  111. if (value)
  112. GPSR(gpio) = mask;
  113. else
  114. GPCR(gpio) = mask;
  115. GPDR(gpio) |= mask;
  116. local_irq_restore(flags);
  117. return 0;
  118. }
  119. EXPORT_SYMBOL(gpio_direction_output);
  120. /*
  121. * Return GPIO level
  122. */
  123. int pxa_gpio_get_value(unsigned gpio)
  124. {
  125. return __gpio_get_value(gpio);
  126. }
  127. EXPORT_SYMBOL(pxa_gpio_get_value);
  128. /*
  129. * Set output GPIO level
  130. */
  131. void pxa_gpio_set_value(unsigned gpio, int value)
  132. {
  133. __gpio_set_value(gpio, value);
  134. }
  135. EXPORT_SYMBOL(pxa_gpio_set_value);
  136. /*
  137. * Routine to safely enable or disable a clock in the CKEN
  138. */
  139. void __pxa_set_cken(int clock, int enable)
  140. {
  141. unsigned long flags;
  142. local_irq_save(flags);
  143. if (enable)
  144. CKEN |= (1 << clock);
  145. else
  146. CKEN &= ~(1 << clock);
  147. local_irq_restore(flags);
  148. }
  149. EXPORT_SYMBOL(__pxa_set_cken);
  150. /*
  151. * Intel PXA2xx internal register mapping.
  152. *
  153. * Note 1: not all PXA2xx variants implement all those addresses.
  154. *
  155. * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
  156. * and cache flush area.
  157. */
  158. static struct map_desc standard_io_desc[] __initdata = {
  159. { /* Devs */
  160. .virtual = 0xf2000000,
  161. .pfn = __phys_to_pfn(0x40000000),
  162. .length = 0x02000000,
  163. .type = MT_DEVICE
  164. }, { /* LCD */
  165. .virtual = 0xf4000000,
  166. .pfn = __phys_to_pfn(0x44000000),
  167. .length = 0x00100000,
  168. .type = MT_DEVICE
  169. }, { /* Mem Ctl */
  170. .virtual = 0xf6000000,
  171. .pfn = __phys_to_pfn(0x48000000),
  172. .length = 0x00200000,
  173. .type = MT_DEVICE
  174. }, { /* USB host */
  175. .virtual = 0xf8000000,
  176. .pfn = __phys_to_pfn(0x4c000000),
  177. .length = 0x00100000,
  178. .type = MT_DEVICE
  179. }, { /* Camera */
  180. .virtual = 0xfa000000,
  181. .pfn = __phys_to_pfn(0x50000000),
  182. .length = 0x00100000,
  183. .type = MT_DEVICE
  184. }, { /* IMem ctl */
  185. .virtual = 0xfe000000,
  186. .pfn = __phys_to_pfn(0x58000000),
  187. .length = 0x00100000,
  188. .type = MT_DEVICE
  189. }, { /* UNCACHED_PHYS_0 */
  190. .virtual = 0xff000000,
  191. .pfn = __phys_to_pfn(0x00000000),
  192. .length = 0x00100000,
  193. .type = MT_DEVICE
  194. }
  195. };
  196. void __init pxa_map_io(void)
  197. {
  198. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  199. get_clk_frequency_khz(1);
  200. }
  201. #ifdef CONFIG_PM
  202. static unsigned long saved_gplr[4];
  203. static unsigned long saved_gpdr[4];
  204. static unsigned long saved_grer[4];
  205. static unsigned long saved_gfer[4];
  206. static int pxa_gpio_suspend(struct sys_device *dev, pm_message_t state)
  207. {
  208. int i, gpio;
  209. for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) {
  210. saved_gplr[i] = GPLR(gpio);
  211. saved_gpdr[i] = GPDR(gpio);
  212. saved_grer[i] = GRER(gpio);
  213. saved_gfer[i] = GFER(gpio);
  214. /* Clear GPIO transition detect bits */
  215. GEDR(gpio) = GEDR(gpio);
  216. }
  217. return 0;
  218. }
  219. static int pxa_gpio_resume(struct sys_device *dev)
  220. {
  221. int i, gpio;
  222. for (gpio = 0, i = 0; gpio < pxa_last_gpio; gpio += 32, i++) {
  223. /* restore level with set/clear */
  224. GPSR(gpio) = saved_gplr[i];
  225. GPCR(gpio) = ~saved_gplr[i];
  226. GRER(gpio) = saved_grer[i];
  227. GFER(gpio) = saved_gfer[i];
  228. GPDR(gpio) = saved_gpdr[i];
  229. }
  230. return 0;
  231. }
  232. #else
  233. #define pxa_gpio_suspend NULL
  234. #define pxa_gpio_resume NULL
  235. #endif
  236. struct sysdev_class pxa_gpio_sysclass = {
  237. .name = "gpio",
  238. .suspend = pxa_gpio_suspend,
  239. .resume = pxa_gpio_resume,
  240. };
  241. static int __init pxa_gpio_init(void)
  242. {
  243. return sysdev_class_register(&pxa_gpio_sysclass);
  244. }
  245. core_initcall(pxa_gpio_init);