core.c 21 KB

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  1. /*
  2. * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
  3. * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13. * NON INFRINGEMENT. See the GNU General Public License for more
  14. * details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/start_kernel.h>
  22. #include <linux/string.h>
  23. #include <linux/console.h>
  24. #include <linux/screen_info.h>
  25. #include <linux/irq.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/clocksource.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/cpu.h>
  30. #include <linux/lguest.h>
  31. #include <linux/lguest_launcher.h>
  32. #include <asm/paravirt.h>
  33. #include <asm/param.h>
  34. #include <asm/page.h>
  35. #include <asm/pgtable.h>
  36. #include <asm/desc.h>
  37. #include <asm/setup.h>
  38. #include <asm/lguest.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/i387.h>
  41. #include "../lg.h"
  42. static int cpu_had_pge;
  43. static struct {
  44. unsigned long offset;
  45. unsigned short segment;
  46. } lguest_entry;
  47. /* Offset from where switcher.S was compiled to where we've copied it */
  48. static unsigned long switcher_offset(void)
  49. {
  50. return SWITCHER_ADDR - (unsigned long)start_switcher_text;
  51. }
  52. /* This cpu's struct lguest_pages. */
  53. static struct lguest_pages *lguest_pages(unsigned int cpu)
  54. {
  55. return &(((struct lguest_pages *)
  56. (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
  57. }
  58. static DEFINE_PER_CPU(struct lguest *, last_guest);
  59. /*S:010
  60. * We are getting close to the Switcher.
  61. *
  62. * Remember that each CPU has two pages which are visible to the Guest when it
  63. * runs on that CPU. This has to contain the state for that Guest: we copy the
  64. * state in just before we run the Guest.
  65. *
  66. * Each Guest has "changed" flags which indicate what has changed in the Guest
  67. * since it last ran. We saw this set in interrupts_and_traps.c and
  68. * segments.c.
  69. */
  70. static void copy_in_guest_info(struct lguest *lg, struct lguest_pages *pages)
  71. {
  72. /* Copying all this data can be quite expensive. We usually run the
  73. * same Guest we ran last time (and that Guest hasn't run anywhere else
  74. * meanwhile). If that's not the case, we pretend everything in the
  75. * Guest has changed. */
  76. if (__get_cpu_var(last_guest) != lg || lg->last_pages != pages) {
  77. __get_cpu_var(last_guest) = lg;
  78. lg->last_pages = pages;
  79. lg->changed = CHANGED_ALL;
  80. }
  81. /* These copies are pretty cheap, so we do them unconditionally: */
  82. /* Save the current Host top-level page directory. */
  83. pages->state.host_cr3 = __pa(current->mm->pgd);
  84. /* Set up the Guest's page tables to see this CPU's pages (and no
  85. * other CPU's pages). */
  86. map_switcher_in_guest(lg, pages);
  87. /* Set up the two "TSS" members which tell the CPU what stack to use
  88. * for traps which do directly into the Guest (ie. traps at privilege
  89. * level 1). */
  90. pages->state.guest_tss.esp1 = lg->esp1;
  91. pages->state.guest_tss.ss1 = lg->ss1;
  92. /* Copy direct-to-Guest trap entries. */
  93. if (lg->changed & CHANGED_IDT)
  94. copy_traps(lg, pages->state.guest_idt, default_idt_entries);
  95. /* Copy all GDT entries which the Guest can change. */
  96. if (lg->changed & CHANGED_GDT)
  97. copy_gdt(lg, pages->state.guest_gdt);
  98. /* If only the TLS entries have changed, copy them. */
  99. else if (lg->changed & CHANGED_GDT_TLS)
  100. copy_gdt_tls(lg, pages->state.guest_gdt);
  101. /* Mark the Guest as unchanged for next time. */
  102. lg->changed = 0;
  103. }
  104. /* Finally: the code to actually call into the Switcher to run the Guest. */
  105. static void run_guest_once(struct lguest *lg, struct lguest_pages *pages)
  106. {
  107. /* This is a dummy value we need for GCC's sake. */
  108. unsigned int clobber;
  109. /* Copy the guest-specific information into this CPU's "struct
  110. * lguest_pages". */
  111. copy_in_guest_info(lg, pages);
  112. /* Set the trap number to 256 (impossible value). If we fault while
  113. * switching to the Guest (bad segment registers or bug), this will
  114. * cause us to abort the Guest. */
  115. lg->regs->trapnum = 256;
  116. /* Now: we push the "eflags" register on the stack, then do an "lcall".
  117. * This is how we change from using the kernel code segment to using
  118. * the dedicated lguest code segment, as well as jumping into the
  119. * Switcher.
  120. *
  121. * The lcall also pushes the old code segment (KERNEL_CS) onto the
  122. * stack, then the address of this call. This stack layout happens to
  123. * exactly match the stack of an interrupt... */
  124. asm volatile("pushf; lcall *lguest_entry"
  125. /* This is how we tell GCC that %eax ("a") and %ebx ("b")
  126. * are changed by this routine. The "=" means output. */
  127. : "=a"(clobber), "=b"(clobber)
  128. /* %eax contains the pages pointer. ("0" refers to the
  129. * 0-th argument above, ie "a"). %ebx contains the
  130. * physical address of the Guest's top-level page
  131. * directory. */
  132. : "0"(pages), "1"(__pa(lg->pgdirs[lg->pgdidx].pgdir))
  133. /* We tell gcc that all these registers could change,
  134. * which means we don't have to save and restore them in
  135. * the Switcher. */
  136. : "memory", "%edx", "%ecx", "%edi", "%esi");
  137. }
  138. /*:*/
  139. /*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
  140. * are disabled: we own the CPU. */
  141. void lguest_arch_run_guest(struct lguest *lg)
  142. {
  143. /* Remember the awfully-named TS bit? If the Guest has asked
  144. * to set it we set it now, so we can trap and pass that trap
  145. * to the Guest if it uses the FPU. */
  146. if (lg->ts)
  147. lguest_set_ts();
  148. /* SYSENTER is an optimized way of doing system calls. We
  149. * can't allow it because it always jumps to privilege level 0.
  150. * A normal Guest won't try it because we don't advertise it in
  151. * CPUID, but a malicious Guest (or malicious Guest userspace
  152. * program) could, so we tell the CPU to disable it before
  153. * running the Guest. */
  154. if (boot_cpu_has(X86_FEATURE_SEP))
  155. wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
  156. /* Now we actually run the Guest. It will pop back out when
  157. * something interesting happens, and we can examine its
  158. * registers to see what it was doing. */
  159. run_guest_once(lg, lguest_pages(raw_smp_processor_id()));
  160. /* The "regs" pointer contains two extra entries which are not
  161. * really registers: a trap number which says what interrupt or
  162. * trap made the switcher code come back, and an error code
  163. * which some traps set. */
  164. /* If the Guest page faulted, then the cr2 register will tell
  165. * us the bad virtual address. We have to grab this now,
  166. * because once we re-enable interrupts an interrupt could
  167. * fault and thus overwrite cr2, or we could even move off to a
  168. * different CPU. */
  169. if (lg->regs->trapnum == 14)
  170. lg->arch.last_pagefault = read_cr2();
  171. /* Similarly, if we took a trap because the Guest used the FPU,
  172. * we have to restore the FPU it expects to see. */
  173. else if (lg->regs->trapnum == 7)
  174. math_state_restore();
  175. /* Restore SYSENTER if it's supposed to be on. */
  176. if (boot_cpu_has(X86_FEATURE_SEP))
  177. wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
  178. }
  179. /*H:130 Our Guest is usually so well behaved; it never tries to do things it
  180. * isn't allowed to. Unfortunately, Linux's paravirtual infrastructure isn't
  181. * quite complete, because it doesn't contain replacements for the Intel I/O
  182. * instructions. As a result, the Guest sometimes fumbles across one during
  183. * the boot process as it probes for various things which are usually attached
  184. * to a PC.
  185. *
  186. * When the Guest uses one of these instructions, we get trap #13 (General
  187. * Protection Fault) and come here. We see if it's one of those troublesome
  188. * instructions and skip over it. We return true if we did. */
  189. static int emulate_insn(struct lguest *lg)
  190. {
  191. u8 insn;
  192. unsigned int insnlen = 0, in = 0, shift = 0;
  193. /* The eip contains the *virtual* address of the Guest's instruction:
  194. * guest_pa just subtracts the Guest's page_offset. */
  195. unsigned long physaddr = guest_pa(lg, lg->regs->eip);
  196. /* This must be the Guest kernel trying to do something, not userspace!
  197. * The bottom two bits of the CS segment register are the privilege
  198. * level. */
  199. if ((lg->regs->cs & 3) != GUEST_PL)
  200. return 0;
  201. /* Decoding x86 instructions is icky. */
  202. insn = lgread(lg, physaddr, u8);
  203. /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
  204. of the eax register. */
  205. if (insn == 0x66) {
  206. shift = 16;
  207. /* The instruction is 1 byte so far, read the next byte. */
  208. insnlen = 1;
  209. insn = lgread(lg, physaddr + insnlen, u8);
  210. }
  211. /* We can ignore the lower bit for the moment and decode the 4 opcodes
  212. * we need to emulate. */
  213. switch (insn & 0xFE) {
  214. case 0xE4: /* in <next byte>,%al */
  215. insnlen += 2;
  216. in = 1;
  217. break;
  218. case 0xEC: /* in (%dx),%al */
  219. insnlen += 1;
  220. in = 1;
  221. break;
  222. case 0xE6: /* out %al,<next byte> */
  223. insnlen += 2;
  224. break;
  225. case 0xEE: /* out %al,(%dx) */
  226. insnlen += 1;
  227. break;
  228. default:
  229. /* OK, we don't know what this is, can't emulate. */
  230. return 0;
  231. }
  232. /* If it was an "IN" instruction, they expect the result to be read
  233. * into %eax, so we change %eax. We always return all-ones, which
  234. * traditionally means "there's nothing there". */
  235. if (in) {
  236. /* Lower bit tells is whether it's a 16 or 32 bit access */
  237. if (insn & 0x1)
  238. lg->regs->eax = 0xFFFFFFFF;
  239. else
  240. lg->regs->eax |= (0xFFFF << shift);
  241. }
  242. /* Finally, we've "done" the instruction, so move past it. */
  243. lg->regs->eip += insnlen;
  244. /* Success! */
  245. return 1;
  246. }
  247. /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
  248. void lguest_arch_handle_trap(struct lguest *lg)
  249. {
  250. switch (lg->regs->trapnum) {
  251. case 13: /* We've intercepted a GPF. */
  252. /* Check if this was one of those annoying IN or OUT
  253. * instructions which we need to emulate. If so, we
  254. * just go back into the Guest after we've done it. */
  255. if (lg->regs->errcode == 0) {
  256. if (emulate_insn(lg))
  257. return;
  258. }
  259. break;
  260. case 14: /* We've intercepted a page fault. */
  261. /* The Guest accessed a virtual address that wasn't
  262. * mapped. This happens a lot: we don't actually set
  263. * up most of the page tables for the Guest at all when
  264. * we start: as it runs it asks for more and more, and
  265. * we set them up as required. In this case, we don't
  266. * even tell the Guest that the fault happened.
  267. *
  268. * The errcode tells whether this was a read or a
  269. * write, and whether kernel or userspace code. */
  270. if (demand_page(lg, lg->arch.last_pagefault, lg->regs->errcode))
  271. return;
  272. /* OK, it's really not there (or not OK): the Guest
  273. * needs to know. We write out the cr2 value so it
  274. * knows where the fault occurred.
  275. *
  276. * Note that if the Guest were really messed up, this
  277. * could happen before it's done the INITIALIZE
  278. * hypercall, so lg->lguest_data will be NULL */
  279. if (lg->lguest_data &&
  280. put_user(lg->arch.last_pagefault, &lg->lguest_data->cr2))
  281. kill_guest(lg, "Writing cr2");
  282. break;
  283. case 7: /* We've intercepted a Device Not Available fault. */
  284. /* If the Guest doesn't want to know, we already
  285. * restored the Floating Point Unit, so we just
  286. * continue without telling it. */
  287. if (!lg->ts)
  288. return;
  289. break;
  290. case 32 ... 255:
  291. /* These values mean a real interrupt occurred, in which case
  292. * the Host handler has already been run. We just do a
  293. * friendly check if another process should now be run, then
  294. * return to run the Guest again */
  295. cond_resched();
  296. return;
  297. case LGUEST_TRAP_ENTRY:
  298. /* Our 'struct hcall_args' maps directly over our regs: we set
  299. * up the pointer now to indicate a hypercall is pending. */
  300. lg->hcall = (struct hcall_args *)lg->regs;
  301. return;
  302. }
  303. /* We didn't handle the trap, so it needs to go to the Guest. */
  304. if (!deliver_trap(lg, lg->regs->trapnum))
  305. /* If the Guest doesn't have a handler (either it hasn't
  306. * registered any yet, or it's one of the faults we don't let
  307. * it handle), it dies with a cryptic error message. */
  308. kill_guest(lg, "unhandled trap %li at %#lx (%#lx)",
  309. lg->regs->trapnum, lg->regs->eip,
  310. lg->regs->trapnum == 14 ? lg->arch.last_pagefault
  311. : lg->regs->errcode);
  312. }
  313. /* Now we can look at each of the routines this calls, in increasing order of
  314. * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
  315. * deliver_trap() and demand_page(). After all those, we'll be ready to
  316. * examine the Switcher, and our philosophical understanding of the Host/Guest
  317. * duality will be complete. :*/
  318. static void adjust_pge(void *on)
  319. {
  320. if (on)
  321. write_cr4(read_cr4() | X86_CR4_PGE);
  322. else
  323. write_cr4(read_cr4() & ~X86_CR4_PGE);
  324. }
  325. /*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
  326. * some more i386-specific initialization. */
  327. void __init lguest_arch_host_init(void)
  328. {
  329. int i;
  330. /* Most of the i386/switcher.S doesn't care that it's been moved; on
  331. * Intel, jumps are relative, and it doesn't access any references to
  332. * external code or data.
  333. *
  334. * The only exception is the interrupt handlers in switcher.S: their
  335. * addresses are placed in a table (default_idt_entries), so we need to
  336. * update the table with the new addresses. switcher_offset() is a
  337. * convenience function which returns the distance between the builtin
  338. * switcher code and the high-mapped copy we just made. */
  339. for (i = 0; i < IDT_ENTRIES; i++)
  340. default_idt_entries[i] += switcher_offset();
  341. /*
  342. * Set up the Switcher's per-cpu areas.
  343. *
  344. * Each CPU gets two pages of its own within the high-mapped region
  345. * (aka. "struct lguest_pages"). Much of this can be initialized now,
  346. * but some depends on what Guest we are running (which is set up in
  347. * copy_in_guest_info()).
  348. */
  349. for_each_possible_cpu(i) {
  350. /* lguest_pages() returns this CPU's two pages. */
  351. struct lguest_pages *pages = lguest_pages(i);
  352. /* This is a convenience pointer to make the code fit one
  353. * statement to a line. */
  354. struct lguest_ro_state *state = &pages->state;
  355. /* The Global Descriptor Table: the Host has a different one
  356. * for each CPU. We keep a descriptor for the GDT which says
  357. * where it is and how big it is (the size is actually the last
  358. * byte, not the size, hence the "-1"). */
  359. state->host_gdt_desc.size = GDT_SIZE-1;
  360. state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
  361. /* All CPUs on the Host use the same Interrupt Descriptor
  362. * Table, so we just use store_idt(), which gets this CPU's IDT
  363. * descriptor. */
  364. store_idt(&state->host_idt_desc);
  365. /* The descriptors for the Guest's GDT and IDT can be filled
  366. * out now, too. We copy the GDT & IDT into ->guest_gdt and
  367. * ->guest_idt before actually running the Guest. */
  368. state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
  369. state->guest_idt_desc.address = (long)&state->guest_idt;
  370. state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
  371. state->guest_gdt_desc.address = (long)&state->guest_gdt;
  372. /* We know where we want the stack to be when the Guest enters
  373. * the switcher: in pages->regs. The stack grows upwards, so
  374. * we start it at the end of that structure. */
  375. state->guest_tss.esp0 = (long)(&pages->regs + 1);
  376. /* And this is the GDT entry to use for the stack: we keep a
  377. * couple of special LGUEST entries. */
  378. state->guest_tss.ss0 = LGUEST_DS;
  379. /* x86 can have a finegrained bitmap which indicates what I/O
  380. * ports the process can use. We set it to the end of our
  381. * structure, meaning "none". */
  382. state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
  383. /* Some GDT entries are the same across all Guests, so we can
  384. * set them up now. */
  385. setup_default_gdt_entries(state);
  386. /* Most IDT entries are the same for all Guests, too.*/
  387. setup_default_idt_entries(state, default_idt_entries);
  388. /* The Host needs to be able to use the LGUEST segments on this
  389. * CPU, too, so put them in the Host GDT. */
  390. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
  391. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
  392. }
  393. /* In the Switcher, we want the %cs segment register to use the
  394. * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
  395. * it will be undisturbed when we switch. To change %cs and jump we
  396. * need this structure to feed to Intel's "lcall" instruction. */
  397. lguest_entry.offset = (long)switch_to_guest + switcher_offset();
  398. lguest_entry.segment = LGUEST_CS;
  399. /* Finally, we need to turn off "Page Global Enable". PGE is an
  400. * optimization where page table entries are specially marked to show
  401. * they never change. The Host kernel marks all the kernel pages this
  402. * way because it's always present, even when userspace is running.
  403. *
  404. * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
  405. * switch to the Guest kernel. If you don't disable this on all CPUs,
  406. * you'll get really weird bugs that you'll chase for two days.
  407. *
  408. * I used to turn PGE off every time we switched to the Guest and back
  409. * on when we return, but that slowed the Switcher down noticibly. */
  410. /* We don't need the complexity of CPUs coming and going while we're
  411. * doing this. */
  412. lock_cpu_hotplug();
  413. if (cpu_has_pge) { /* We have a broader idea of "global". */
  414. /* Remember that this was originally set (for cleanup). */
  415. cpu_had_pge = 1;
  416. /* adjust_pge is a helper function which sets or unsets the PGE
  417. * bit on its CPU, depending on the argument (0 == unset). */
  418. on_each_cpu(adjust_pge, (void *)0, 0, 1);
  419. /* Turn off the feature in the global feature set. */
  420. clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  421. }
  422. unlock_cpu_hotplug();
  423. };
  424. /*:*/
  425. void __exit lguest_arch_host_fini(void)
  426. {
  427. /* If we had PGE before we started, turn it back on now. */
  428. lock_cpu_hotplug();
  429. if (cpu_had_pge) {
  430. set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  431. /* adjust_pge's argument "1" means set PGE. */
  432. on_each_cpu(adjust_pge, (void *)1, 0, 1);
  433. }
  434. unlock_cpu_hotplug();
  435. }
  436. /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
  437. int lguest_arch_do_hcall(struct lguest *lg, struct hcall_args *args)
  438. {
  439. switch (args->arg0) {
  440. case LHCALL_LOAD_GDT:
  441. load_guest_gdt(lg, args->arg1, args->arg2);
  442. break;
  443. case LHCALL_LOAD_IDT_ENTRY:
  444. load_guest_idt_entry(lg, args->arg1, args->arg2, args->arg3);
  445. break;
  446. case LHCALL_LOAD_TLS:
  447. guest_load_tls(lg, args->arg1);
  448. break;
  449. default:
  450. /* Bad Guest. Bad! */
  451. return -EIO;
  452. }
  453. return 0;
  454. }
  455. /*H:126 i386-specific hypercall initialization: */
  456. int lguest_arch_init_hypercalls(struct lguest *lg)
  457. {
  458. u32 tsc_speed;
  459. /* The pointer to the Guest's "struct lguest_data" is the only
  460. * argument. We check that address now. */
  461. if (!lguest_address_ok(lg, lg->hcall->arg1, sizeof(*lg->lguest_data)))
  462. return -EFAULT;
  463. /* Having checked it, we simply set lg->lguest_data to point straight
  464. * into the Launcher's memory at the right place and then use
  465. * copy_to_user/from_user from now on, instead of lgread/write. I put
  466. * this in to show that I'm not immune to writing stupid
  467. * optimizations. */
  468. lg->lguest_data = lg->mem_base + lg->hcall->arg1;
  469. /* We insist that the Time Stamp Counter exist and doesn't change with
  470. * cpu frequency. Some devious chip manufacturers decided that TSC
  471. * changes could be handled in software. I decided that time going
  472. * backwards might be good for benchmarks, but it's bad for users.
  473. *
  474. * We also insist that the TSC be stable: the kernel detects unreliable
  475. * TSCs for its own purposes, and we use that here. */
  476. if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
  477. tsc_speed = tsc_khz;
  478. else
  479. tsc_speed = 0;
  480. if (put_user(tsc_speed, &lg->lguest_data->tsc_khz))
  481. return -EFAULT;
  482. /* The interrupt code might not like the system call vector. */
  483. if (!check_syscall_vector(lg))
  484. kill_guest(lg, "bad syscall vector");
  485. return 0;
  486. }
  487. /* Now we've examined the hypercall code; our Guest can make requests. There
  488. * is one other way we can do things for the Guest, as we see in
  489. * emulate_insn(). :*/
  490. /*L:030 lguest_arch_setup_regs()
  491. *
  492. * Most of the Guest's registers are left alone: we used get_zeroed_page() to
  493. * allocate the structure, so they will be 0. */
  494. void lguest_arch_setup_regs(struct lguest *lg, unsigned long start)
  495. {
  496. struct lguest_regs *regs = lg->regs;
  497. /* There are four "segment" registers which the Guest needs to boot:
  498. * The "code segment" register (cs) refers to the kernel code segment
  499. * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
  500. * refer to the kernel data segment __KERNEL_DS.
  501. *
  502. * The privilege level is packed into the lower bits. The Guest runs
  503. * at privilege level 1 (GUEST_PL).*/
  504. regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
  505. regs->cs = __KERNEL_CS|GUEST_PL;
  506. /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
  507. * is supposed to always be "1". Bit 9 (0x200) controls whether
  508. * interrupts are enabled. We always leave interrupts enabled while
  509. * running the Guest. */
  510. regs->eflags = 0x202;
  511. /* The "Extended Instruction Pointer" register says where the Guest is
  512. * running. */
  513. regs->eip = start;
  514. /* %esi points to our boot information, at physical address 0, so don't
  515. * touch it. */
  516. /* There are a couple of GDT entries the Guest expects when first
  517. * booting. */
  518. setup_guest_gdt(lg);
  519. }