config.c 6.2 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/523x/config.c
  4. *
  5. * Sub-architcture dependent initialization code for the Freescale
  6. * 523x CPUs.
  7. *
  8. * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com)
  9. * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  10. */
  11. /***************************************************************************/
  12. #include <linux/kernel.h>
  13. #include <linux/param.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/gpio.h>
  18. #include <asm/machdep.h>
  19. #include <asm/coldfire.h>
  20. #include <asm/mcfsim.h>
  21. #include <asm/mcfuart.h>
  22. #include <asm/mcfqspi.h>
  23. /***************************************************************************/
  24. static struct resource m523x_fec_resources[] = {
  25. {
  26. .start = MCFFEC_BASE,
  27. .end = MCFFEC_BASE + MCFFEC_SIZE - 1,
  28. .flags = IORESOURCE_MEM,
  29. },
  30. {
  31. .start = 64 + 23,
  32. .end = 64 + 23,
  33. .flags = IORESOURCE_IRQ,
  34. },
  35. {
  36. .start = 64 + 27,
  37. .end = 64 + 27,
  38. .flags = IORESOURCE_IRQ,
  39. },
  40. {
  41. .start = 64 + 29,
  42. .end = 64 + 29,
  43. .flags = IORESOURCE_IRQ,
  44. },
  45. };
  46. static struct platform_device m523x_fec = {
  47. .name = "fec",
  48. .id = 0,
  49. .num_resources = ARRAY_SIZE(m523x_fec_resources),
  50. .resource = m523x_fec_resources,
  51. };
  52. #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
  53. static struct resource m523x_qspi_resources[] = {
  54. {
  55. .start = MCFQSPI_IOBASE,
  56. .end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. {
  60. .start = MCFINT_VECBASE + MCFINT_QSPI,
  61. .end = MCFINT_VECBASE + MCFINT_QSPI,
  62. .flags = IORESOURCE_IRQ,
  63. },
  64. };
  65. #define MCFQSPI_CS0 91
  66. #define MCFQSPI_CS1 92
  67. #define MCFQSPI_CS2 103
  68. #define MCFQSPI_CS3 99
  69. static int m523x_cs_setup(struct mcfqspi_cs_control *cs_control)
  70. {
  71. int status;
  72. status = gpio_request(MCFQSPI_CS0, "MCFQSPI_CS0");
  73. if (status) {
  74. pr_debug("gpio_request for MCFQSPI_CS0 failed\n");
  75. goto fail0;
  76. }
  77. status = gpio_direction_output(MCFQSPI_CS0, 1);
  78. if (status) {
  79. pr_debug("gpio_direction_output for MCFQSPI_CS0 failed\n");
  80. goto fail1;
  81. }
  82. status = gpio_request(MCFQSPI_CS1, "MCFQSPI_CS1");
  83. if (status) {
  84. pr_debug("gpio_request for MCFQSPI_CS1 failed\n");
  85. goto fail1;
  86. }
  87. status = gpio_direction_output(MCFQSPI_CS1, 1);
  88. if (status) {
  89. pr_debug("gpio_direction_output for MCFQSPI_CS1 failed\n");
  90. goto fail2;
  91. }
  92. status = gpio_request(MCFQSPI_CS2, "MCFQSPI_CS2");
  93. if (status) {
  94. pr_debug("gpio_request for MCFQSPI_CS2 failed\n");
  95. goto fail2;
  96. }
  97. status = gpio_direction_output(MCFQSPI_CS2, 1);
  98. if (status) {
  99. pr_debug("gpio_direction_output for MCFQSPI_CS2 failed\n");
  100. goto fail3;
  101. }
  102. status = gpio_request(MCFQSPI_CS3, "MCFQSPI_CS3");
  103. if (status) {
  104. pr_debug("gpio_request for MCFQSPI_CS3 failed\n");
  105. goto fail3;
  106. }
  107. status = gpio_direction_output(MCFQSPI_CS3, 1);
  108. if (status) {
  109. pr_debug("gpio_direction_output for MCFQSPI_CS3 failed\n");
  110. goto fail4;
  111. }
  112. return 0;
  113. fail4:
  114. gpio_free(MCFQSPI_CS3);
  115. fail3:
  116. gpio_free(MCFQSPI_CS2);
  117. fail2:
  118. gpio_free(MCFQSPI_CS1);
  119. fail1:
  120. gpio_free(MCFQSPI_CS0);
  121. fail0:
  122. return status;
  123. }
  124. static void m523x_cs_teardown(struct mcfqspi_cs_control *cs_control)
  125. {
  126. gpio_free(MCFQSPI_CS3);
  127. gpio_free(MCFQSPI_CS2);
  128. gpio_free(MCFQSPI_CS1);
  129. gpio_free(MCFQSPI_CS0);
  130. }
  131. static void m523x_cs_select(struct mcfqspi_cs_control *cs_control,
  132. u8 chip_select, bool cs_high)
  133. {
  134. switch (chip_select) {
  135. case 0:
  136. gpio_set_value(MCFQSPI_CS0, cs_high);
  137. break;
  138. case 1:
  139. gpio_set_value(MCFQSPI_CS1, cs_high);
  140. break;
  141. case 2:
  142. gpio_set_value(MCFQSPI_CS2, cs_high);
  143. break;
  144. case 3:
  145. gpio_set_value(MCFQSPI_CS3, cs_high);
  146. break;
  147. }
  148. }
  149. static void m523x_cs_deselect(struct mcfqspi_cs_control *cs_control,
  150. u8 chip_select, bool cs_high)
  151. {
  152. switch (chip_select) {
  153. case 0:
  154. gpio_set_value(MCFQSPI_CS0, !cs_high);
  155. break;
  156. case 1:
  157. gpio_set_value(MCFQSPI_CS1, !cs_high);
  158. break;
  159. case 2:
  160. gpio_set_value(MCFQSPI_CS2, !cs_high);
  161. break;
  162. case 3:
  163. gpio_set_value(MCFQSPI_CS3, !cs_high);
  164. break;
  165. }
  166. }
  167. static struct mcfqspi_cs_control m523x_cs_control = {
  168. .setup = m523x_cs_setup,
  169. .teardown = m523x_cs_teardown,
  170. .select = m523x_cs_select,
  171. .deselect = m523x_cs_deselect,
  172. };
  173. static struct mcfqspi_platform_data m523x_qspi_data = {
  174. .bus_num = 0,
  175. .num_chipselect = 4,
  176. .cs_control = &m523x_cs_control,
  177. };
  178. static struct platform_device m523x_qspi = {
  179. .name = "mcfqspi",
  180. .id = 0,
  181. .num_resources = ARRAY_SIZE(m523x_qspi_resources),
  182. .resource = m523x_qspi_resources,
  183. .dev.platform_data = &m523x_qspi_data,
  184. };
  185. static void __init m523x_qspi_init(void)
  186. {
  187. u16 par;
  188. /* setup QSPS pins for QSPI with gpio CS control */
  189. writeb(0x1f, MCFGPIO_PAR_QSPI);
  190. /* and CS2 & CS3 as gpio */
  191. par = readw(MCFGPIO_PAR_TIMER);
  192. par &= 0x3f3f;
  193. writew(par, MCFGPIO_PAR_TIMER);
  194. }
  195. #endif /* defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE) */
  196. static struct platform_device *m523x_devices[] __initdata = {
  197. &m523x_fec,
  198. #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
  199. &m523x_qspi,
  200. #endif
  201. };
  202. /***************************************************************************/
  203. static void __init m523x_fec_init(void)
  204. {
  205. u16 par;
  206. u8 v;
  207. /* Set multi-function pins to ethernet use */
  208. par = readw(MCF_IPSBAR + 0x100082);
  209. writew(par | 0xf00, MCF_IPSBAR + 0x100082);
  210. v = readb(MCF_IPSBAR + 0x100078);
  211. writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
  212. }
  213. /***************************************************************************/
  214. static void m523x_cpu_reset(void)
  215. {
  216. local_irq_disable();
  217. __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
  218. }
  219. /***************************************************************************/
  220. void __init config_BSP(char *commandp, int size)
  221. {
  222. mach_reset = m523x_cpu_reset;
  223. mach_sched_init = hw_timer_init;
  224. }
  225. /***************************************************************************/
  226. static int __init init_BSP(void)
  227. {
  228. m523x_fec_init();
  229. #if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
  230. m523x_qspi_init();
  231. #endif
  232. platform_add_devices(m523x_devices, ARRAY_SIZE(m523x_devices));
  233. return 0;
  234. }
  235. arch_initcall(init_BSP);
  236. /***************************************************************************/