aesni-intel_glue.c 38 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <asm/i387.h>
  30. #include <asm/aes.h>
  31. #include <crypto/scatterwalk.h>
  32. #include <crypto/internal/aead.h>
  33. #include <linux/workqueue.h>
  34. #include <linux/spinlock.h>
  35. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  36. #define HAS_CTR
  37. #endif
  38. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  39. #define HAS_LRW
  40. #endif
  41. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  42. #define HAS_PCBC
  43. #endif
  44. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  45. #define HAS_XTS
  46. #endif
  47. struct async_aes_ctx {
  48. struct cryptd_ablkcipher *cryptd_tfm;
  49. };
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16];
  56. struct crypto_aes_ctx aes_key_expanded;
  57. u8 nonce[4];
  58. struct cryptd_aead *cryptd_tfm;
  59. };
  60. struct aesni_gcm_set_hash_subkey_result {
  61. int err;
  62. struct completion completion;
  63. };
  64. struct aesni_hash_subkey_req_data {
  65. u8 iv[16];
  66. struct aesni_gcm_set_hash_subkey_result result;
  67. struct scatterlist sg;
  68. };
  69. #define AESNI_ALIGN (16)
  70. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  71. #define RFC4106_HASH_SUBKEY_SIZE 16
  72. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  73. unsigned int key_len);
  74. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in);
  76. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. #ifdef CONFIG_X86_64
  87. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. #endif
  90. /* asmlinkage void aesni_gcm_enc()
  91. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  92. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  93. * const u8 *in, Plaintext input
  94. * unsigned long plaintext_len, Length of data in bytes for encryption.
  95. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  96. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  97. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  98. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  99. * const u8 *aad, Additional Authentication Data (AAD)
  100. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  101. * is going to be 8 or 12 bytes
  102. * u8 *auth_tag, Authenticated Tag output.
  103. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  104. * Valid values are 16 (most likely), 12 or 8.
  105. */
  106. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  107. const u8 *in, unsigned long plaintext_len, u8 *iv,
  108. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  109. u8 *auth_tag, unsigned long auth_tag_len);
  110. /* asmlinkage void aesni_gcm_dec()
  111. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  112. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  113. * const u8 *in, Ciphertext input
  114. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  115. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  116. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  117. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  118. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  119. * const u8 *aad, Additional Authentication Data (AAD)
  120. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  121. * to be 8 or 12 bytes
  122. * u8 *auth_tag, Authenticated Tag output.
  123. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  124. * Valid values are 16 (most likely), 12 or 8.
  125. */
  126. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  127. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  128. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  129. u8 *auth_tag, unsigned long auth_tag_len);
  130. static inline struct
  131. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  132. {
  133. return
  134. (struct aesni_rfc4106_gcm_ctx *)
  135. PTR_ALIGN((u8 *)
  136. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  137. }
  138. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  139. {
  140. unsigned long addr = (unsigned long)raw_ctx;
  141. unsigned long align = AESNI_ALIGN;
  142. if (align <= crypto_tfm_ctx_alignment())
  143. align = 1;
  144. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  145. }
  146. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  147. const u8 *in_key, unsigned int key_len)
  148. {
  149. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  150. u32 *flags = &tfm->crt_flags;
  151. int err;
  152. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  153. key_len != AES_KEYSIZE_256) {
  154. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  155. return -EINVAL;
  156. }
  157. if (!irq_fpu_usable())
  158. err = crypto_aes_expand_key(ctx, in_key, key_len);
  159. else {
  160. kernel_fpu_begin();
  161. err = aesni_set_key(ctx, in_key, key_len);
  162. kernel_fpu_end();
  163. }
  164. return err;
  165. }
  166. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  167. unsigned int key_len)
  168. {
  169. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  170. }
  171. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  172. {
  173. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  174. if (!irq_fpu_usable())
  175. crypto_aes_encrypt_x86(ctx, dst, src);
  176. else {
  177. kernel_fpu_begin();
  178. aesni_enc(ctx, dst, src);
  179. kernel_fpu_end();
  180. }
  181. }
  182. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  183. {
  184. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  185. if (!irq_fpu_usable())
  186. crypto_aes_decrypt_x86(ctx, dst, src);
  187. else {
  188. kernel_fpu_begin();
  189. aesni_dec(ctx, dst, src);
  190. kernel_fpu_end();
  191. }
  192. }
  193. static struct crypto_alg aesni_alg = {
  194. .cra_name = "aes",
  195. .cra_driver_name = "aes-aesni",
  196. .cra_priority = 300,
  197. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  198. .cra_blocksize = AES_BLOCK_SIZE,
  199. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  200. .cra_alignmask = 0,
  201. .cra_module = THIS_MODULE,
  202. .cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
  203. .cra_u = {
  204. .cipher = {
  205. .cia_min_keysize = AES_MIN_KEY_SIZE,
  206. .cia_max_keysize = AES_MAX_KEY_SIZE,
  207. .cia_setkey = aes_set_key,
  208. .cia_encrypt = aes_encrypt,
  209. .cia_decrypt = aes_decrypt
  210. }
  211. }
  212. };
  213. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  214. {
  215. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  216. aesni_enc(ctx, dst, src);
  217. }
  218. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  219. {
  220. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  221. aesni_dec(ctx, dst, src);
  222. }
  223. static struct crypto_alg __aesni_alg = {
  224. .cra_name = "__aes-aesni",
  225. .cra_driver_name = "__driver-aes-aesni",
  226. .cra_priority = 0,
  227. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  228. .cra_blocksize = AES_BLOCK_SIZE,
  229. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  230. .cra_alignmask = 0,
  231. .cra_module = THIS_MODULE,
  232. .cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
  233. .cra_u = {
  234. .cipher = {
  235. .cia_min_keysize = AES_MIN_KEY_SIZE,
  236. .cia_max_keysize = AES_MAX_KEY_SIZE,
  237. .cia_setkey = aes_set_key,
  238. .cia_encrypt = __aes_encrypt,
  239. .cia_decrypt = __aes_decrypt
  240. }
  241. }
  242. };
  243. static int ecb_encrypt(struct blkcipher_desc *desc,
  244. struct scatterlist *dst, struct scatterlist *src,
  245. unsigned int nbytes)
  246. {
  247. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  248. struct blkcipher_walk walk;
  249. int err;
  250. blkcipher_walk_init(&walk, dst, src, nbytes);
  251. err = blkcipher_walk_virt(desc, &walk);
  252. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  253. kernel_fpu_begin();
  254. while ((nbytes = walk.nbytes)) {
  255. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  256. nbytes & AES_BLOCK_MASK);
  257. nbytes &= AES_BLOCK_SIZE - 1;
  258. err = blkcipher_walk_done(desc, &walk, nbytes);
  259. }
  260. kernel_fpu_end();
  261. return err;
  262. }
  263. static int ecb_decrypt(struct blkcipher_desc *desc,
  264. struct scatterlist *dst, struct scatterlist *src,
  265. unsigned int nbytes)
  266. {
  267. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  268. struct blkcipher_walk walk;
  269. int err;
  270. blkcipher_walk_init(&walk, dst, src, nbytes);
  271. err = blkcipher_walk_virt(desc, &walk);
  272. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  273. kernel_fpu_begin();
  274. while ((nbytes = walk.nbytes)) {
  275. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  276. nbytes & AES_BLOCK_MASK);
  277. nbytes &= AES_BLOCK_SIZE - 1;
  278. err = blkcipher_walk_done(desc, &walk, nbytes);
  279. }
  280. kernel_fpu_end();
  281. return err;
  282. }
  283. static struct crypto_alg blk_ecb_alg = {
  284. .cra_name = "__ecb-aes-aesni",
  285. .cra_driver_name = "__driver-ecb-aes-aesni",
  286. .cra_priority = 0,
  287. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  288. .cra_blocksize = AES_BLOCK_SIZE,
  289. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  290. .cra_alignmask = 0,
  291. .cra_type = &crypto_blkcipher_type,
  292. .cra_module = THIS_MODULE,
  293. .cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
  294. .cra_u = {
  295. .blkcipher = {
  296. .min_keysize = AES_MIN_KEY_SIZE,
  297. .max_keysize = AES_MAX_KEY_SIZE,
  298. .setkey = aes_set_key,
  299. .encrypt = ecb_encrypt,
  300. .decrypt = ecb_decrypt,
  301. },
  302. },
  303. };
  304. static int cbc_encrypt(struct blkcipher_desc *desc,
  305. struct scatterlist *dst, struct scatterlist *src,
  306. unsigned int nbytes)
  307. {
  308. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  309. struct blkcipher_walk walk;
  310. int err;
  311. blkcipher_walk_init(&walk, dst, src, nbytes);
  312. err = blkcipher_walk_virt(desc, &walk);
  313. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  314. kernel_fpu_begin();
  315. while ((nbytes = walk.nbytes)) {
  316. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  317. nbytes & AES_BLOCK_MASK, walk.iv);
  318. nbytes &= AES_BLOCK_SIZE - 1;
  319. err = blkcipher_walk_done(desc, &walk, nbytes);
  320. }
  321. kernel_fpu_end();
  322. return err;
  323. }
  324. static int cbc_decrypt(struct blkcipher_desc *desc,
  325. struct scatterlist *dst, struct scatterlist *src,
  326. unsigned int nbytes)
  327. {
  328. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  329. struct blkcipher_walk walk;
  330. int err;
  331. blkcipher_walk_init(&walk, dst, src, nbytes);
  332. err = blkcipher_walk_virt(desc, &walk);
  333. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  334. kernel_fpu_begin();
  335. while ((nbytes = walk.nbytes)) {
  336. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  337. nbytes & AES_BLOCK_MASK, walk.iv);
  338. nbytes &= AES_BLOCK_SIZE - 1;
  339. err = blkcipher_walk_done(desc, &walk, nbytes);
  340. }
  341. kernel_fpu_end();
  342. return err;
  343. }
  344. static struct crypto_alg blk_cbc_alg = {
  345. .cra_name = "__cbc-aes-aesni",
  346. .cra_driver_name = "__driver-cbc-aes-aesni",
  347. .cra_priority = 0,
  348. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  349. .cra_blocksize = AES_BLOCK_SIZE,
  350. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  351. .cra_alignmask = 0,
  352. .cra_type = &crypto_blkcipher_type,
  353. .cra_module = THIS_MODULE,
  354. .cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
  355. .cra_u = {
  356. .blkcipher = {
  357. .min_keysize = AES_MIN_KEY_SIZE,
  358. .max_keysize = AES_MAX_KEY_SIZE,
  359. .setkey = aes_set_key,
  360. .encrypt = cbc_encrypt,
  361. .decrypt = cbc_decrypt,
  362. },
  363. },
  364. };
  365. #ifdef CONFIG_X86_64
  366. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  367. struct blkcipher_walk *walk)
  368. {
  369. u8 *ctrblk = walk->iv;
  370. u8 keystream[AES_BLOCK_SIZE];
  371. u8 *src = walk->src.virt.addr;
  372. u8 *dst = walk->dst.virt.addr;
  373. unsigned int nbytes = walk->nbytes;
  374. aesni_enc(ctx, keystream, ctrblk);
  375. crypto_xor(keystream, src, nbytes);
  376. memcpy(dst, keystream, nbytes);
  377. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  378. }
  379. static int ctr_crypt(struct blkcipher_desc *desc,
  380. struct scatterlist *dst, struct scatterlist *src,
  381. unsigned int nbytes)
  382. {
  383. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  384. struct blkcipher_walk walk;
  385. int err;
  386. blkcipher_walk_init(&walk, dst, src, nbytes);
  387. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  388. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  389. kernel_fpu_begin();
  390. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  391. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  392. nbytes & AES_BLOCK_MASK, walk.iv);
  393. nbytes &= AES_BLOCK_SIZE - 1;
  394. err = blkcipher_walk_done(desc, &walk, nbytes);
  395. }
  396. if (walk.nbytes) {
  397. ctr_crypt_final(ctx, &walk);
  398. err = blkcipher_walk_done(desc, &walk, 0);
  399. }
  400. kernel_fpu_end();
  401. return err;
  402. }
  403. static struct crypto_alg blk_ctr_alg = {
  404. .cra_name = "__ctr-aes-aesni",
  405. .cra_driver_name = "__driver-ctr-aes-aesni",
  406. .cra_priority = 0,
  407. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  408. .cra_blocksize = 1,
  409. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  410. .cra_alignmask = 0,
  411. .cra_type = &crypto_blkcipher_type,
  412. .cra_module = THIS_MODULE,
  413. .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
  414. .cra_u = {
  415. .blkcipher = {
  416. .min_keysize = AES_MIN_KEY_SIZE,
  417. .max_keysize = AES_MAX_KEY_SIZE,
  418. .ivsize = AES_BLOCK_SIZE,
  419. .setkey = aes_set_key,
  420. .encrypt = ctr_crypt,
  421. .decrypt = ctr_crypt,
  422. },
  423. },
  424. };
  425. #endif
  426. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  427. unsigned int key_len)
  428. {
  429. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  430. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  431. int err;
  432. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  433. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  434. & CRYPTO_TFM_REQ_MASK);
  435. err = crypto_ablkcipher_setkey(child, key, key_len);
  436. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  437. & CRYPTO_TFM_RES_MASK);
  438. return err;
  439. }
  440. static int ablk_encrypt(struct ablkcipher_request *req)
  441. {
  442. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  443. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  444. if (!irq_fpu_usable()) {
  445. struct ablkcipher_request *cryptd_req =
  446. ablkcipher_request_ctx(req);
  447. memcpy(cryptd_req, req, sizeof(*req));
  448. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  449. return crypto_ablkcipher_encrypt(cryptd_req);
  450. } else {
  451. struct blkcipher_desc desc;
  452. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  453. desc.info = req->info;
  454. desc.flags = 0;
  455. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  456. &desc, req->dst, req->src, req->nbytes);
  457. }
  458. }
  459. static int ablk_decrypt(struct ablkcipher_request *req)
  460. {
  461. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  462. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  463. if (!irq_fpu_usable()) {
  464. struct ablkcipher_request *cryptd_req =
  465. ablkcipher_request_ctx(req);
  466. memcpy(cryptd_req, req, sizeof(*req));
  467. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  468. return crypto_ablkcipher_decrypt(cryptd_req);
  469. } else {
  470. struct blkcipher_desc desc;
  471. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  472. desc.info = req->info;
  473. desc.flags = 0;
  474. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  475. &desc, req->dst, req->src, req->nbytes);
  476. }
  477. }
  478. static void ablk_exit(struct crypto_tfm *tfm)
  479. {
  480. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  481. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  482. }
  483. static void ablk_init_common(struct crypto_tfm *tfm,
  484. struct cryptd_ablkcipher *cryptd_tfm)
  485. {
  486. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  487. ctx->cryptd_tfm = cryptd_tfm;
  488. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  489. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  490. }
  491. static int ablk_ecb_init(struct crypto_tfm *tfm)
  492. {
  493. struct cryptd_ablkcipher *cryptd_tfm;
  494. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
  495. if (IS_ERR(cryptd_tfm))
  496. return PTR_ERR(cryptd_tfm);
  497. ablk_init_common(tfm, cryptd_tfm);
  498. return 0;
  499. }
  500. static struct crypto_alg ablk_ecb_alg = {
  501. .cra_name = "ecb(aes)",
  502. .cra_driver_name = "ecb-aes-aesni",
  503. .cra_priority = 400,
  504. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  505. .cra_blocksize = AES_BLOCK_SIZE,
  506. .cra_ctxsize = sizeof(struct async_aes_ctx),
  507. .cra_alignmask = 0,
  508. .cra_type = &crypto_ablkcipher_type,
  509. .cra_module = THIS_MODULE,
  510. .cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
  511. .cra_init = ablk_ecb_init,
  512. .cra_exit = ablk_exit,
  513. .cra_u = {
  514. .ablkcipher = {
  515. .min_keysize = AES_MIN_KEY_SIZE,
  516. .max_keysize = AES_MAX_KEY_SIZE,
  517. .setkey = ablk_set_key,
  518. .encrypt = ablk_encrypt,
  519. .decrypt = ablk_decrypt,
  520. },
  521. },
  522. };
  523. static int ablk_cbc_init(struct crypto_tfm *tfm)
  524. {
  525. struct cryptd_ablkcipher *cryptd_tfm;
  526. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
  527. if (IS_ERR(cryptd_tfm))
  528. return PTR_ERR(cryptd_tfm);
  529. ablk_init_common(tfm, cryptd_tfm);
  530. return 0;
  531. }
  532. static struct crypto_alg ablk_cbc_alg = {
  533. .cra_name = "cbc(aes)",
  534. .cra_driver_name = "cbc-aes-aesni",
  535. .cra_priority = 400,
  536. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  537. .cra_blocksize = AES_BLOCK_SIZE,
  538. .cra_ctxsize = sizeof(struct async_aes_ctx),
  539. .cra_alignmask = 0,
  540. .cra_type = &crypto_ablkcipher_type,
  541. .cra_module = THIS_MODULE,
  542. .cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
  543. .cra_init = ablk_cbc_init,
  544. .cra_exit = ablk_exit,
  545. .cra_u = {
  546. .ablkcipher = {
  547. .min_keysize = AES_MIN_KEY_SIZE,
  548. .max_keysize = AES_MAX_KEY_SIZE,
  549. .ivsize = AES_BLOCK_SIZE,
  550. .setkey = ablk_set_key,
  551. .encrypt = ablk_encrypt,
  552. .decrypt = ablk_decrypt,
  553. },
  554. },
  555. };
  556. #ifdef CONFIG_X86_64
  557. static int ablk_ctr_init(struct crypto_tfm *tfm)
  558. {
  559. struct cryptd_ablkcipher *cryptd_tfm;
  560. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
  561. if (IS_ERR(cryptd_tfm))
  562. return PTR_ERR(cryptd_tfm);
  563. ablk_init_common(tfm, cryptd_tfm);
  564. return 0;
  565. }
  566. static struct crypto_alg ablk_ctr_alg = {
  567. .cra_name = "ctr(aes)",
  568. .cra_driver_name = "ctr-aes-aesni",
  569. .cra_priority = 400,
  570. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  571. .cra_blocksize = 1,
  572. .cra_ctxsize = sizeof(struct async_aes_ctx),
  573. .cra_alignmask = 0,
  574. .cra_type = &crypto_ablkcipher_type,
  575. .cra_module = THIS_MODULE,
  576. .cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
  577. .cra_init = ablk_ctr_init,
  578. .cra_exit = ablk_exit,
  579. .cra_u = {
  580. .ablkcipher = {
  581. .min_keysize = AES_MIN_KEY_SIZE,
  582. .max_keysize = AES_MAX_KEY_SIZE,
  583. .ivsize = AES_BLOCK_SIZE,
  584. .setkey = ablk_set_key,
  585. .encrypt = ablk_encrypt,
  586. .decrypt = ablk_encrypt,
  587. .geniv = "chainiv",
  588. },
  589. },
  590. };
  591. #ifdef HAS_CTR
  592. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  593. {
  594. struct cryptd_ablkcipher *cryptd_tfm;
  595. cryptd_tfm = cryptd_alloc_ablkcipher(
  596. "rfc3686(__driver-ctr-aes-aesni)", 0, 0);
  597. if (IS_ERR(cryptd_tfm))
  598. return PTR_ERR(cryptd_tfm);
  599. ablk_init_common(tfm, cryptd_tfm);
  600. return 0;
  601. }
  602. static struct crypto_alg ablk_rfc3686_ctr_alg = {
  603. .cra_name = "rfc3686(ctr(aes))",
  604. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  605. .cra_priority = 400,
  606. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  607. .cra_blocksize = 1,
  608. .cra_ctxsize = sizeof(struct async_aes_ctx),
  609. .cra_alignmask = 0,
  610. .cra_type = &crypto_ablkcipher_type,
  611. .cra_module = THIS_MODULE,
  612. .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
  613. .cra_init = ablk_rfc3686_ctr_init,
  614. .cra_exit = ablk_exit,
  615. .cra_u = {
  616. .ablkcipher = {
  617. .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  618. .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  619. .ivsize = CTR_RFC3686_IV_SIZE,
  620. .setkey = ablk_set_key,
  621. .encrypt = ablk_encrypt,
  622. .decrypt = ablk_decrypt,
  623. .geniv = "seqiv",
  624. },
  625. },
  626. };
  627. #endif
  628. #endif
  629. #ifdef HAS_LRW
  630. static int ablk_lrw_init(struct crypto_tfm *tfm)
  631. {
  632. struct cryptd_ablkcipher *cryptd_tfm;
  633. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
  634. 0, 0);
  635. if (IS_ERR(cryptd_tfm))
  636. return PTR_ERR(cryptd_tfm);
  637. ablk_init_common(tfm, cryptd_tfm);
  638. return 0;
  639. }
  640. static struct crypto_alg ablk_lrw_alg = {
  641. .cra_name = "lrw(aes)",
  642. .cra_driver_name = "lrw-aes-aesni",
  643. .cra_priority = 400,
  644. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  645. .cra_blocksize = AES_BLOCK_SIZE,
  646. .cra_ctxsize = sizeof(struct async_aes_ctx),
  647. .cra_alignmask = 0,
  648. .cra_type = &crypto_ablkcipher_type,
  649. .cra_module = THIS_MODULE,
  650. .cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
  651. .cra_init = ablk_lrw_init,
  652. .cra_exit = ablk_exit,
  653. .cra_u = {
  654. .ablkcipher = {
  655. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  656. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  657. .ivsize = AES_BLOCK_SIZE,
  658. .setkey = ablk_set_key,
  659. .encrypt = ablk_encrypt,
  660. .decrypt = ablk_decrypt,
  661. },
  662. },
  663. };
  664. #endif
  665. #ifdef HAS_PCBC
  666. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  667. {
  668. struct cryptd_ablkcipher *cryptd_tfm;
  669. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
  670. 0, 0);
  671. if (IS_ERR(cryptd_tfm))
  672. return PTR_ERR(cryptd_tfm);
  673. ablk_init_common(tfm, cryptd_tfm);
  674. return 0;
  675. }
  676. static struct crypto_alg ablk_pcbc_alg = {
  677. .cra_name = "pcbc(aes)",
  678. .cra_driver_name = "pcbc-aes-aesni",
  679. .cra_priority = 400,
  680. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  681. .cra_blocksize = AES_BLOCK_SIZE,
  682. .cra_ctxsize = sizeof(struct async_aes_ctx),
  683. .cra_alignmask = 0,
  684. .cra_type = &crypto_ablkcipher_type,
  685. .cra_module = THIS_MODULE,
  686. .cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
  687. .cra_init = ablk_pcbc_init,
  688. .cra_exit = ablk_exit,
  689. .cra_u = {
  690. .ablkcipher = {
  691. .min_keysize = AES_MIN_KEY_SIZE,
  692. .max_keysize = AES_MAX_KEY_SIZE,
  693. .ivsize = AES_BLOCK_SIZE,
  694. .setkey = ablk_set_key,
  695. .encrypt = ablk_encrypt,
  696. .decrypt = ablk_decrypt,
  697. },
  698. },
  699. };
  700. #endif
  701. #ifdef HAS_XTS
  702. static int ablk_xts_init(struct crypto_tfm *tfm)
  703. {
  704. struct cryptd_ablkcipher *cryptd_tfm;
  705. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
  706. 0, 0);
  707. if (IS_ERR(cryptd_tfm))
  708. return PTR_ERR(cryptd_tfm);
  709. ablk_init_common(tfm, cryptd_tfm);
  710. return 0;
  711. }
  712. static struct crypto_alg ablk_xts_alg = {
  713. .cra_name = "xts(aes)",
  714. .cra_driver_name = "xts-aes-aesni",
  715. .cra_priority = 400,
  716. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  717. .cra_blocksize = AES_BLOCK_SIZE,
  718. .cra_ctxsize = sizeof(struct async_aes_ctx),
  719. .cra_alignmask = 0,
  720. .cra_type = &crypto_ablkcipher_type,
  721. .cra_module = THIS_MODULE,
  722. .cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
  723. .cra_init = ablk_xts_init,
  724. .cra_exit = ablk_exit,
  725. .cra_u = {
  726. .ablkcipher = {
  727. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  728. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  729. .ivsize = AES_BLOCK_SIZE,
  730. .setkey = ablk_set_key,
  731. .encrypt = ablk_encrypt,
  732. .decrypt = ablk_decrypt,
  733. },
  734. },
  735. };
  736. #endif
  737. static int rfc4106_init(struct crypto_tfm *tfm)
  738. {
  739. struct cryptd_aead *cryptd_tfm;
  740. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  741. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  742. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  743. if (IS_ERR(cryptd_tfm))
  744. return PTR_ERR(cryptd_tfm);
  745. ctx->cryptd_tfm = cryptd_tfm;
  746. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  747. + crypto_aead_reqsize(&cryptd_tfm->base);
  748. return 0;
  749. }
  750. static void rfc4106_exit(struct crypto_tfm *tfm)
  751. {
  752. struct aesni_rfc4106_gcm_ctx *ctx =
  753. (struct aesni_rfc4106_gcm_ctx *)
  754. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  755. if (!IS_ERR(ctx->cryptd_tfm))
  756. cryptd_free_aead(ctx->cryptd_tfm);
  757. return;
  758. }
  759. static void
  760. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  761. {
  762. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  763. if (err == -EINPROGRESS)
  764. return;
  765. result->err = err;
  766. complete(&result->completion);
  767. }
  768. static int
  769. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  770. {
  771. struct crypto_ablkcipher *ctr_tfm;
  772. struct ablkcipher_request *req;
  773. int ret = -EINVAL;
  774. struct aesni_hash_subkey_req_data *req_data;
  775. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  776. if (IS_ERR(ctr_tfm))
  777. return PTR_ERR(ctr_tfm);
  778. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  779. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  780. if (ret) {
  781. crypto_free_ablkcipher(ctr_tfm);
  782. return ret;
  783. }
  784. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  785. if (!req) {
  786. crypto_free_ablkcipher(ctr_tfm);
  787. return -EINVAL;
  788. }
  789. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  790. if (!req_data) {
  791. crypto_free_ablkcipher(ctr_tfm);
  792. return -ENOMEM;
  793. }
  794. memset(req_data->iv, 0, sizeof(req_data->iv));
  795. /* Clear the data in the hash sub key container to zero.*/
  796. /* We want to cipher all zeros to create the hash sub key. */
  797. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  798. init_completion(&req_data->result.completion);
  799. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  800. ablkcipher_request_set_tfm(req, ctr_tfm);
  801. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  802. CRYPTO_TFM_REQ_MAY_BACKLOG,
  803. rfc4106_set_hash_subkey_done,
  804. &req_data->result);
  805. ablkcipher_request_set_crypt(req, &req_data->sg,
  806. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  807. ret = crypto_ablkcipher_encrypt(req);
  808. if (ret == -EINPROGRESS || ret == -EBUSY) {
  809. ret = wait_for_completion_interruptible
  810. (&req_data->result.completion);
  811. if (!ret)
  812. ret = req_data->result.err;
  813. }
  814. ablkcipher_request_free(req);
  815. kfree(req_data);
  816. crypto_free_ablkcipher(ctr_tfm);
  817. return ret;
  818. }
  819. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  820. unsigned int key_len)
  821. {
  822. int ret = 0;
  823. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  824. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  825. u8 *new_key_mem = NULL;
  826. if (key_len < 4) {
  827. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  828. return -EINVAL;
  829. }
  830. /*Account for 4 byte nonce at the end.*/
  831. key_len -= 4;
  832. if (key_len != AES_KEYSIZE_128) {
  833. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  834. return -EINVAL;
  835. }
  836. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  837. /*This must be on a 16 byte boundary!*/
  838. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  839. return -EINVAL;
  840. if ((unsigned long)key % AESNI_ALIGN) {
  841. /*key is not aligned: use an auxuliar aligned pointer*/
  842. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  843. if (!new_key_mem)
  844. return -ENOMEM;
  845. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  846. memcpy(new_key_mem, key, key_len);
  847. key = new_key_mem;
  848. }
  849. if (!irq_fpu_usable())
  850. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  851. key, key_len);
  852. else {
  853. kernel_fpu_begin();
  854. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  855. kernel_fpu_end();
  856. }
  857. /*This must be on a 16 byte boundary!*/
  858. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  859. ret = -EINVAL;
  860. goto exit;
  861. }
  862. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  863. exit:
  864. kfree(new_key_mem);
  865. return ret;
  866. }
  867. /* This is the Integrity Check Value (aka the authentication tag length and can
  868. * be 8, 12 or 16 bytes long. */
  869. static int rfc4106_set_authsize(struct crypto_aead *parent,
  870. unsigned int authsize)
  871. {
  872. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  873. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  874. switch (authsize) {
  875. case 8:
  876. case 12:
  877. case 16:
  878. break;
  879. default:
  880. return -EINVAL;
  881. }
  882. crypto_aead_crt(parent)->authsize = authsize;
  883. crypto_aead_crt(cryptd_child)->authsize = authsize;
  884. return 0;
  885. }
  886. static int rfc4106_encrypt(struct aead_request *req)
  887. {
  888. int ret;
  889. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  890. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  891. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  892. if (!irq_fpu_usable()) {
  893. struct aead_request *cryptd_req =
  894. (struct aead_request *) aead_request_ctx(req);
  895. memcpy(cryptd_req, req, sizeof(*req));
  896. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  897. return crypto_aead_encrypt(cryptd_req);
  898. } else {
  899. kernel_fpu_begin();
  900. ret = cryptd_child->base.crt_aead.encrypt(req);
  901. kernel_fpu_end();
  902. return ret;
  903. }
  904. }
  905. static int rfc4106_decrypt(struct aead_request *req)
  906. {
  907. int ret;
  908. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  909. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  910. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  911. if (!irq_fpu_usable()) {
  912. struct aead_request *cryptd_req =
  913. (struct aead_request *) aead_request_ctx(req);
  914. memcpy(cryptd_req, req, sizeof(*req));
  915. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  916. return crypto_aead_decrypt(cryptd_req);
  917. } else {
  918. kernel_fpu_begin();
  919. ret = cryptd_child->base.crt_aead.decrypt(req);
  920. kernel_fpu_end();
  921. return ret;
  922. }
  923. }
  924. static struct crypto_alg rfc4106_alg = {
  925. .cra_name = "rfc4106(gcm(aes))",
  926. .cra_driver_name = "rfc4106-gcm-aesni",
  927. .cra_priority = 400,
  928. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  929. .cra_blocksize = 1,
  930. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  931. .cra_alignmask = 0,
  932. .cra_type = &crypto_nivaead_type,
  933. .cra_module = THIS_MODULE,
  934. .cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),
  935. .cra_init = rfc4106_init,
  936. .cra_exit = rfc4106_exit,
  937. .cra_u = {
  938. .aead = {
  939. .setkey = rfc4106_set_key,
  940. .setauthsize = rfc4106_set_authsize,
  941. .encrypt = rfc4106_encrypt,
  942. .decrypt = rfc4106_decrypt,
  943. .geniv = "seqiv",
  944. .ivsize = 8,
  945. .maxauthsize = 16,
  946. },
  947. },
  948. };
  949. static int __driver_rfc4106_encrypt(struct aead_request *req)
  950. {
  951. u8 one_entry_in_sg = 0;
  952. u8 *src, *dst, *assoc;
  953. __be32 counter = cpu_to_be32(1);
  954. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  955. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  956. void *aes_ctx = &(ctx->aes_key_expanded);
  957. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  958. u8 iv_tab[16+AESNI_ALIGN];
  959. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  960. struct scatter_walk src_sg_walk;
  961. struct scatter_walk assoc_sg_walk;
  962. struct scatter_walk dst_sg_walk;
  963. unsigned int i;
  964. /* Assuming we are supporting rfc4106 64-bit extended */
  965. /* sequence numbers We need to have the AAD length equal */
  966. /* to 8 or 12 bytes */
  967. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  968. return -EINVAL;
  969. /* IV below built */
  970. for (i = 0; i < 4; i++)
  971. *(iv+i) = ctx->nonce[i];
  972. for (i = 0; i < 8; i++)
  973. *(iv+4+i) = req->iv[i];
  974. *((__be32 *)(iv+12)) = counter;
  975. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  976. one_entry_in_sg = 1;
  977. scatterwalk_start(&src_sg_walk, req->src);
  978. scatterwalk_start(&assoc_sg_walk, req->assoc);
  979. src = scatterwalk_map(&src_sg_walk, 0);
  980. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  981. dst = src;
  982. if (unlikely(req->src != req->dst)) {
  983. scatterwalk_start(&dst_sg_walk, req->dst);
  984. dst = scatterwalk_map(&dst_sg_walk, 0);
  985. }
  986. } else {
  987. /* Allocate memory for src, dst, assoc */
  988. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  989. GFP_ATOMIC);
  990. if (unlikely(!src))
  991. return -ENOMEM;
  992. assoc = (src + req->cryptlen + auth_tag_len);
  993. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  994. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  995. req->assoclen, 0);
  996. dst = src;
  997. }
  998. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  999. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  1000. + ((unsigned long)req->cryptlen), auth_tag_len);
  1001. /* The authTag (aka the Integrity Check Value) needs to be written
  1002. * back to the packet. */
  1003. if (one_entry_in_sg) {
  1004. if (unlikely(req->src != req->dst)) {
  1005. scatterwalk_unmap(dst, 0);
  1006. scatterwalk_done(&dst_sg_walk, 0, 0);
  1007. }
  1008. scatterwalk_unmap(src, 0);
  1009. scatterwalk_unmap(assoc, 0);
  1010. scatterwalk_done(&src_sg_walk, 0, 0);
  1011. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1012. } else {
  1013. scatterwalk_map_and_copy(dst, req->dst, 0,
  1014. req->cryptlen + auth_tag_len, 1);
  1015. kfree(src);
  1016. }
  1017. return 0;
  1018. }
  1019. static int __driver_rfc4106_decrypt(struct aead_request *req)
  1020. {
  1021. u8 one_entry_in_sg = 0;
  1022. u8 *src, *dst, *assoc;
  1023. unsigned long tempCipherLen = 0;
  1024. __be32 counter = cpu_to_be32(1);
  1025. int retval = 0;
  1026. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1027. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  1028. void *aes_ctx = &(ctx->aes_key_expanded);
  1029. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  1030. u8 iv_and_authTag[32+AESNI_ALIGN];
  1031. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  1032. u8 *authTag = iv + 16;
  1033. struct scatter_walk src_sg_walk;
  1034. struct scatter_walk assoc_sg_walk;
  1035. struct scatter_walk dst_sg_walk;
  1036. unsigned int i;
  1037. if (unlikely((req->cryptlen < auth_tag_len) ||
  1038. (req->assoclen != 8 && req->assoclen != 12)))
  1039. return -EINVAL;
  1040. /* Assuming we are supporting rfc4106 64-bit extended */
  1041. /* sequence numbers We need to have the AAD length */
  1042. /* equal to 8 or 12 bytes */
  1043. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  1044. /* IV below built */
  1045. for (i = 0; i < 4; i++)
  1046. *(iv+i) = ctx->nonce[i];
  1047. for (i = 0; i < 8; i++)
  1048. *(iv+4+i) = req->iv[i];
  1049. *((__be32 *)(iv+12)) = counter;
  1050. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  1051. one_entry_in_sg = 1;
  1052. scatterwalk_start(&src_sg_walk, req->src);
  1053. scatterwalk_start(&assoc_sg_walk, req->assoc);
  1054. src = scatterwalk_map(&src_sg_walk, 0);
  1055. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  1056. dst = src;
  1057. if (unlikely(req->src != req->dst)) {
  1058. scatterwalk_start(&dst_sg_walk, req->dst);
  1059. dst = scatterwalk_map(&dst_sg_walk, 0);
  1060. }
  1061. } else {
  1062. /* Allocate memory for src, dst, assoc */
  1063. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  1064. if (!src)
  1065. return -ENOMEM;
  1066. assoc = (src + req->cryptlen + auth_tag_len);
  1067. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1068. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1069. req->assoclen, 0);
  1070. dst = src;
  1071. }
  1072. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  1073. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  1074. authTag, auth_tag_len);
  1075. /* Compare generated tag with passed in tag. */
  1076. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  1077. -EBADMSG : 0;
  1078. if (one_entry_in_sg) {
  1079. if (unlikely(req->src != req->dst)) {
  1080. scatterwalk_unmap(dst, 0);
  1081. scatterwalk_done(&dst_sg_walk, 0, 0);
  1082. }
  1083. scatterwalk_unmap(src, 0);
  1084. scatterwalk_unmap(assoc, 0);
  1085. scatterwalk_done(&src_sg_walk, 0, 0);
  1086. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1087. } else {
  1088. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1089. kfree(src);
  1090. }
  1091. return retval;
  1092. }
  1093. static struct crypto_alg __rfc4106_alg = {
  1094. .cra_name = "__gcm-aes-aesni",
  1095. .cra_driver_name = "__driver-gcm-aes-aesni",
  1096. .cra_priority = 0,
  1097. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1098. .cra_blocksize = 1,
  1099. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  1100. .cra_alignmask = 0,
  1101. .cra_type = &crypto_aead_type,
  1102. .cra_module = THIS_MODULE,
  1103. .cra_list = LIST_HEAD_INIT(__rfc4106_alg.cra_list),
  1104. .cra_u = {
  1105. .aead = {
  1106. .encrypt = __driver_rfc4106_encrypt,
  1107. .decrypt = __driver_rfc4106_decrypt,
  1108. },
  1109. },
  1110. };
  1111. static int __init aesni_init(void)
  1112. {
  1113. int err;
  1114. if (!cpu_has_aes) {
  1115. printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
  1116. return -ENODEV;
  1117. }
  1118. if ((err = crypto_register_alg(&aesni_alg)))
  1119. goto aes_err;
  1120. if ((err = crypto_register_alg(&__aesni_alg)))
  1121. goto __aes_err;
  1122. if ((err = crypto_register_alg(&blk_ecb_alg)))
  1123. goto blk_ecb_err;
  1124. if ((err = crypto_register_alg(&blk_cbc_alg)))
  1125. goto blk_cbc_err;
  1126. if ((err = crypto_register_alg(&ablk_ecb_alg)))
  1127. goto ablk_ecb_err;
  1128. if ((err = crypto_register_alg(&ablk_cbc_alg)))
  1129. goto ablk_cbc_err;
  1130. #ifdef CONFIG_X86_64
  1131. if ((err = crypto_register_alg(&blk_ctr_alg)))
  1132. goto blk_ctr_err;
  1133. if ((err = crypto_register_alg(&ablk_ctr_alg)))
  1134. goto ablk_ctr_err;
  1135. #ifdef HAS_CTR
  1136. if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
  1137. goto ablk_rfc3686_ctr_err;
  1138. #endif
  1139. #endif
  1140. #ifdef HAS_LRW
  1141. if ((err = crypto_register_alg(&ablk_lrw_alg)))
  1142. goto ablk_lrw_err;
  1143. #endif
  1144. #ifdef HAS_PCBC
  1145. if ((err = crypto_register_alg(&ablk_pcbc_alg)))
  1146. goto ablk_pcbc_err;
  1147. #endif
  1148. #ifdef HAS_XTS
  1149. if ((err = crypto_register_alg(&ablk_xts_alg)))
  1150. goto ablk_xts_err;
  1151. #endif
  1152. err = crypto_register_alg(&__rfc4106_alg);
  1153. if (err)
  1154. goto __aead_gcm_err;
  1155. err = crypto_register_alg(&rfc4106_alg);
  1156. if (err)
  1157. goto aead_gcm_err;
  1158. return err;
  1159. aead_gcm_err:
  1160. crypto_unregister_alg(&__rfc4106_alg);
  1161. __aead_gcm_err:
  1162. #ifdef HAS_XTS
  1163. crypto_unregister_alg(&ablk_xts_alg);
  1164. ablk_xts_err:
  1165. #endif
  1166. #ifdef HAS_PCBC
  1167. crypto_unregister_alg(&ablk_pcbc_alg);
  1168. ablk_pcbc_err:
  1169. #endif
  1170. #ifdef HAS_LRW
  1171. crypto_unregister_alg(&ablk_lrw_alg);
  1172. ablk_lrw_err:
  1173. #endif
  1174. #ifdef CONFIG_X86_64
  1175. #ifdef HAS_CTR
  1176. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1177. ablk_rfc3686_ctr_err:
  1178. #endif
  1179. crypto_unregister_alg(&ablk_ctr_alg);
  1180. ablk_ctr_err:
  1181. crypto_unregister_alg(&blk_ctr_alg);
  1182. blk_ctr_err:
  1183. #endif
  1184. crypto_unregister_alg(&ablk_cbc_alg);
  1185. ablk_cbc_err:
  1186. crypto_unregister_alg(&ablk_ecb_alg);
  1187. ablk_ecb_err:
  1188. crypto_unregister_alg(&blk_cbc_alg);
  1189. blk_cbc_err:
  1190. crypto_unregister_alg(&blk_ecb_alg);
  1191. blk_ecb_err:
  1192. crypto_unregister_alg(&__aesni_alg);
  1193. __aes_err:
  1194. crypto_unregister_alg(&aesni_alg);
  1195. aes_err:
  1196. return err;
  1197. }
  1198. static void __exit aesni_exit(void)
  1199. {
  1200. crypto_unregister_alg(&__rfc4106_alg);
  1201. crypto_unregister_alg(&rfc4106_alg);
  1202. #ifdef HAS_XTS
  1203. crypto_unregister_alg(&ablk_xts_alg);
  1204. #endif
  1205. #ifdef HAS_PCBC
  1206. crypto_unregister_alg(&ablk_pcbc_alg);
  1207. #endif
  1208. #ifdef HAS_LRW
  1209. crypto_unregister_alg(&ablk_lrw_alg);
  1210. #endif
  1211. #ifdef CONFIG_X86_64
  1212. #ifdef HAS_CTR
  1213. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1214. #endif
  1215. crypto_unregister_alg(&ablk_ctr_alg);
  1216. crypto_unregister_alg(&blk_ctr_alg);
  1217. #endif
  1218. crypto_unregister_alg(&ablk_cbc_alg);
  1219. crypto_unregister_alg(&ablk_ecb_alg);
  1220. crypto_unregister_alg(&blk_cbc_alg);
  1221. crypto_unregister_alg(&blk_ecb_alg);
  1222. crypto_unregister_alg(&__aesni_alg);
  1223. crypto_unregister_alg(&aesni_alg);
  1224. }
  1225. module_init(aesni_init);
  1226. module_exit(aesni_exit);
  1227. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1228. MODULE_LICENSE("GPL");
  1229. MODULE_ALIAS("aes");