w83792d.c 50 KB

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  1. /*
  2. w83792d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (C) 2004, 2005 Winbond Electronics Corp.
  5. Chunhao Huang <DZShen@Winbond.com.tw>,
  6. Rudolf Marek <r.marek@sh.cvut.cz>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. Note:
  19. 1. This driver is only for 2.6 kernel, 2.4 kernel need a different driver.
  20. 2. This driver is only for Winbond W83792D C version device, there
  21. are also some motherboards with B version W83792D device. The
  22. calculation method to in6-in7(measured value, limits) is a little
  23. different between C and B version. C or B version can be identified
  24. by CR[0x49h].
  25. */
  26. /*
  27. Supports following chips:
  28. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  29. w83792d 9 7 7 3 0x7a 0x5ca3 yes no
  30. */
  31. #include <linux/config.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/slab.h>
  35. #include <linux/i2c.h>
  36. #include <linux/hwmon.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/err.h>
  39. /* Addresses to scan */
  40. static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
  41. /* Insmod parameters */
  42. I2C_CLIENT_INSMOD_1(w83792d);
  43. I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  44. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  45. static int init;
  46. module_param(init, bool, 0);
  47. MODULE_PARM_DESC(init, "Set to one to force chip initialization");
  48. /* The W83792D registers */
  49. static const u8 W83792D_REG_IN[9] = {
  50. 0x20, /* Vcore A in DataSheet */
  51. 0x21, /* Vcore B in DataSheet */
  52. 0x22, /* VIN0 in DataSheet */
  53. 0x23, /* VIN1 in DataSheet */
  54. 0x24, /* VIN2 in DataSheet */
  55. 0x25, /* VIN3 in DataSheet */
  56. 0x26, /* 5VCC in DataSheet */
  57. 0xB0, /* 5VSB in DataSheet */
  58. 0xB1 /* VBAT in DataSheet */
  59. };
  60. #define W83792D_REG_LOW_BITS1 0x3E /* Low Bits I in DataSheet */
  61. #define W83792D_REG_LOW_BITS2 0x3F /* Low Bits II in DataSheet */
  62. static const u8 W83792D_REG_IN_MAX[9] = {
  63. 0x2B, /* Vcore A High Limit in DataSheet */
  64. 0x2D, /* Vcore B High Limit in DataSheet */
  65. 0x2F, /* VIN0 High Limit in DataSheet */
  66. 0x31, /* VIN1 High Limit in DataSheet */
  67. 0x33, /* VIN2 High Limit in DataSheet */
  68. 0x35, /* VIN3 High Limit in DataSheet */
  69. 0x37, /* 5VCC High Limit in DataSheet */
  70. 0xB4, /* 5VSB High Limit in DataSheet */
  71. 0xB6 /* VBAT High Limit in DataSheet */
  72. };
  73. static const u8 W83792D_REG_IN_MIN[9] = {
  74. 0x2C, /* Vcore A Low Limit in DataSheet */
  75. 0x2E, /* Vcore B Low Limit in DataSheet */
  76. 0x30, /* VIN0 Low Limit in DataSheet */
  77. 0x32, /* VIN1 Low Limit in DataSheet */
  78. 0x34, /* VIN2 Low Limit in DataSheet */
  79. 0x36, /* VIN3 Low Limit in DataSheet */
  80. 0x38, /* 5VCC Low Limit in DataSheet */
  81. 0xB5, /* 5VSB Low Limit in DataSheet */
  82. 0xB7 /* VBAT Low Limit in DataSheet */
  83. };
  84. static const u8 W83792D_REG_FAN[7] = {
  85. 0x28, /* FAN 1 Count in DataSheet */
  86. 0x29, /* FAN 2 Count in DataSheet */
  87. 0x2A, /* FAN 3 Count in DataSheet */
  88. 0xB8, /* FAN 4 Count in DataSheet */
  89. 0xB9, /* FAN 5 Count in DataSheet */
  90. 0xBA, /* FAN 6 Count in DataSheet */
  91. 0xBE /* FAN 7 Count in DataSheet */
  92. };
  93. static const u8 W83792D_REG_FAN_MIN[7] = {
  94. 0x3B, /* FAN 1 Count Low Limit in DataSheet */
  95. 0x3C, /* FAN 2 Count Low Limit in DataSheet */
  96. 0x3D, /* FAN 3 Count Low Limit in DataSheet */
  97. 0xBB, /* FAN 4 Count Low Limit in DataSheet */
  98. 0xBC, /* FAN 5 Count Low Limit in DataSheet */
  99. 0xBD, /* FAN 6 Count Low Limit in DataSheet */
  100. 0xBF /* FAN 7 Count Low Limit in DataSheet */
  101. };
  102. #define W83792D_REG_FAN_CFG 0x84 /* FAN Configuration in DataSheet */
  103. static const u8 W83792D_REG_FAN_DIV[4] = {
  104. 0x47, /* contains FAN2 and FAN1 Divisor */
  105. 0x5B, /* contains FAN4 and FAN3 Divisor */
  106. 0x5C, /* contains FAN6 and FAN5 Divisor */
  107. 0x9E /* contains FAN7 Divisor. */
  108. };
  109. static const u8 W83792D_REG_PWM[7] = {
  110. 0x81, /* FAN 1 Duty Cycle, be used to control */
  111. 0x83, /* FAN 2 Duty Cycle, be used to control */
  112. 0x94, /* FAN 3 Duty Cycle, be used to control */
  113. 0xA3, /* FAN 4 Duty Cycle, be used to control */
  114. 0xA4, /* FAN 5 Duty Cycle, be used to control */
  115. 0xA5, /* FAN 6 Duty Cycle, be used to control */
  116. 0xA6 /* FAN 7 Duty Cycle, be used to control */
  117. };
  118. #define W83792D_REG_BANK 0x4E
  119. #define W83792D_REG_TEMP2_CONFIG 0xC2
  120. #define W83792D_REG_TEMP3_CONFIG 0xCA
  121. static const u8 W83792D_REG_TEMP1[3] = {
  122. 0x27, /* TEMP 1 in DataSheet */
  123. 0x39, /* TEMP 1 Over in DataSheet */
  124. 0x3A, /* TEMP 1 Hyst in DataSheet */
  125. };
  126. static const u8 W83792D_REG_TEMP_ADD[2][6] = {
  127. { 0xC0, /* TEMP 2 in DataSheet */
  128. 0xC1, /* TEMP 2(0.5 deg) in DataSheet */
  129. 0xC5, /* TEMP 2 Over High part in DataSheet */
  130. 0xC6, /* TEMP 2 Over Low part in DataSheet */
  131. 0xC3, /* TEMP 2 Thyst High part in DataSheet */
  132. 0xC4 }, /* TEMP 2 Thyst Low part in DataSheet */
  133. { 0xC8, /* TEMP 3 in DataSheet */
  134. 0xC9, /* TEMP 3(0.5 deg) in DataSheet */
  135. 0xCD, /* TEMP 3 Over High part in DataSheet */
  136. 0xCE, /* TEMP 3 Over Low part in DataSheet */
  137. 0xCB, /* TEMP 3 Thyst High part in DataSheet */
  138. 0xCC } /* TEMP 3 Thyst Low part in DataSheet */
  139. };
  140. static const u8 W83792D_REG_THERMAL[3] = {
  141. 0x85, /* SmartFanI: Fan1 target value */
  142. 0x86, /* SmartFanI: Fan2 target value */
  143. 0x96 /* SmartFanI: Fan3 target value */
  144. };
  145. static const u8 W83792D_REG_TOLERANCE[3] = {
  146. 0x87, /* (bit3-0)SmartFan Fan1 tolerance */
  147. 0x87, /* (bit7-4)SmartFan Fan2 tolerance */
  148. 0x97 /* (bit3-0)SmartFan Fan3 tolerance */
  149. };
  150. static const u8 W83792D_REG_POINTS[3][4] = {
  151. { 0x85, /* SmartFanII: Fan1 temp point 1 */
  152. 0xE3, /* SmartFanII: Fan1 temp point 2 */
  153. 0xE4, /* SmartFanII: Fan1 temp point 3 */
  154. 0xE5 }, /* SmartFanII: Fan1 temp point 4 */
  155. { 0x86, /* SmartFanII: Fan2 temp point 1 */
  156. 0xE6, /* SmartFanII: Fan2 temp point 2 */
  157. 0xE7, /* SmartFanII: Fan2 temp point 3 */
  158. 0xE8 }, /* SmartFanII: Fan2 temp point 4 */
  159. { 0x96, /* SmartFanII: Fan3 temp point 1 */
  160. 0xE9, /* SmartFanII: Fan3 temp point 2 */
  161. 0xEA, /* SmartFanII: Fan3 temp point 3 */
  162. 0xEB } /* SmartFanII: Fan3 temp point 4 */
  163. };
  164. static const u8 W83792D_REG_LEVELS[3][4] = {
  165. { 0x88, /* (bit3-0) SmartFanII: Fan1 Non-Stop */
  166. 0x88, /* (bit7-4) SmartFanII: Fan1 Level 1 */
  167. 0xE0, /* (bit7-4) SmartFanII: Fan1 Level 2 */
  168. 0xE0 }, /* (bit3-0) SmartFanII: Fan1 Level 3 */
  169. { 0x89, /* (bit3-0) SmartFanII: Fan2 Non-Stop */
  170. 0x89, /* (bit7-4) SmartFanII: Fan2 Level 1 */
  171. 0xE1, /* (bit7-4) SmartFanII: Fan2 Level 2 */
  172. 0xE1 }, /* (bit3-0) SmartFanII: Fan2 Level 3 */
  173. { 0x98, /* (bit3-0) SmartFanII: Fan3 Non-Stop */
  174. 0x98, /* (bit7-4) SmartFanII: Fan3 Level 1 */
  175. 0xE2, /* (bit7-4) SmartFanII: Fan3 Level 2 */
  176. 0xE2 } /* (bit3-0) SmartFanII: Fan3 Level 3 */
  177. };
  178. #define W83792D_REG_GPIO_EN 0x1A
  179. #define W83792D_REG_CONFIG 0x40
  180. #define W83792D_REG_VID_FANDIV 0x47
  181. #define W83792D_REG_CHIPID 0x49
  182. #define W83792D_REG_WCHIPID 0x58
  183. #define W83792D_REG_CHIPMAN 0x4F
  184. #define W83792D_REG_PIN 0x4B
  185. #define W83792D_REG_I2C_SUBADDR 0x4A
  186. #define W83792D_REG_ALARM1 0xA9 /* realtime status register1 */
  187. #define W83792D_REG_ALARM2 0xAA /* realtime status register2 */
  188. #define W83792D_REG_ALARM3 0xAB /* realtime status register3 */
  189. #define W83792D_REG_CHASSIS 0x42 /* Bit 5: Case Open status bit */
  190. #define W83792D_REG_CHASSIS_CLR 0x44 /* Bit 7: Case Open CLR_CHS/Reset bit */
  191. /* control in0/in1 's limit modifiability */
  192. #define W83792D_REG_VID_IN_B 0x17
  193. #define W83792D_REG_VBAT 0x5D
  194. #define W83792D_REG_I2C_ADDR 0x48
  195. /* Conversions. Rounding and limit checking is only done on the TO_REG
  196. variants. Note that you should be a bit careful with which arguments
  197. these macros are called: arguments may be evaluated more than once.
  198. Fixing this is just not worth it. */
  199. #define IN_FROM_REG(nr,val) (((nr)<=1)?(val*2): \
  200. ((((nr)==6)||((nr)==7))?(val*6):(val*4)))
  201. #define IN_TO_REG(nr,val) (((nr)<=1)?(val/2): \
  202. ((((nr)==6)||((nr)==7))?(val/6):(val/4)))
  203. static inline u8
  204. FAN_TO_REG(long rpm, int div)
  205. {
  206. if (rpm == 0)
  207. return 255;
  208. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  209. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  210. }
  211. #define FAN_FROM_REG(val,div) ((val) == 0 ? -1 : \
  212. ((val) == 255 ? 0 : \
  213. 1350000 / ((val) * (div))))
  214. /* for temp1 */
  215. #define TEMP1_TO_REG(val) (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  216. : (val)) / 1000, 0, 0xff))
  217. #define TEMP1_FROM_REG(val) (((val) & 0x80 ? (val)-0x100 : (val)) * 1000)
  218. /* for temp2 and temp3, because they need addtional resolution */
  219. #define TEMP_ADD_FROM_REG(val1, val2) \
  220. ((((val1) & 0x80 ? (val1)-0x100 \
  221. : (val1)) * 1000) + ((val2 & 0x80) ? 500 : 0))
  222. #define TEMP_ADD_TO_REG_HIGH(val) \
  223. (SENSORS_LIMIT(((val) < 0 ? (val)+0x100*1000 \
  224. : (val)) / 1000, 0, 0xff))
  225. #define TEMP_ADD_TO_REG_LOW(val) ((val%1000) ? 0x80 : 0x00)
  226. #define PWM_FROM_REG(val) (val)
  227. #define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
  228. #define DIV_FROM_REG(val) (1 << (val))
  229. static inline u8
  230. DIV_TO_REG(long val)
  231. {
  232. int i;
  233. val = SENSORS_LIMIT(val, 1, 128) >> 1;
  234. for (i = 0; i < 7; i++) {
  235. if (val == 0)
  236. break;
  237. val >>= 1;
  238. }
  239. return ((u8) i);
  240. }
  241. struct w83792d_data {
  242. struct i2c_client client;
  243. struct class_device *class_dev;
  244. enum chips type;
  245. struct semaphore update_lock;
  246. char valid; /* !=0 if following fields are valid */
  247. unsigned long last_updated; /* In jiffies */
  248. /* array of 2 pointers to subclients */
  249. struct i2c_client *lm75[2];
  250. u8 in[9]; /* Register value */
  251. u8 in_max[9]; /* Register value */
  252. u8 in_min[9]; /* Register value */
  253. u16 low_bits; /* Additional resolution to voltage in6-0 */
  254. u8 fan[7]; /* Register value */
  255. u8 fan_min[7]; /* Register value */
  256. u8 temp1[3]; /* current, over, thyst */
  257. u8 temp_add[2][6]; /* Register value */
  258. u8 fan_div[7]; /* Register encoding, shifted right */
  259. u8 pwm[7]; /* We only consider the first 3 set of pwm,
  260. although 792 chip has 7 set of pwm. */
  261. u8 pwmenable[3];
  262. u8 pwm_mode[7]; /* indicates PWM or DC mode: 1->PWM; 0->DC */
  263. u32 alarms; /* realtime status register encoding,combined */
  264. u8 chassis; /* Chassis status */
  265. u8 chassis_clear; /* CLR_CHS, clear chassis intrusion detection */
  266. u8 thermal_cruise[3]; /* Smart FanI: Fan1,2,3 target value */
  267. u8 tolerance[3]; /* Fan1,2,3 tolerance(Smart Fan I/II) */
  268. u8 sf2_points[3][4]; /* Smart FanII: Fan1,2,3 temperature points */
  269. u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
  270. };
  271. static int w83792d_attach_adapter(struct i2c_adapter *adapter);
  272. static int w83792d_detect(struct i2c_adapter *adapter, int address, int kind);
  273. static int w83792d_detach_client(struct i2c_client *client);
  274. static struct w83792d_data *w83792d_update_device(struct device *dev);
  275. #ifdef DEBUG
  276. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev);
  277. #endif
  278. static void w83792d_init_client(struct i2c_client *client);
  279. static struct i2c_driver w83792d_driver = {
  280. .driver = {
  281. .name = "w83792d",
  282. },
  283. .attach_adapter = w83792d_attach_adapter,
  284. .detach_client = w83792d_detach_client,
  285. };
  286. static inline long in_count_from_reg(int nr, struct w83792d_data *data)
  287. {
  288. /* in7 and in8 do not have low bits, but the formula still works */
  289. return ((data->in[nr] << 2) | ((data->low_bits >> (2 * nr)) & 0x03));
  290. }
  291. /* The SMBus locks itself. The Winbond W83792D chip has a bank register,
  292. but the driver only accesses registers in bank 0, so we don't have
  293. to switch banks and lock access between switches. */
  294. static inline int w83792d_read_value(struct i2c_client *client, u8 reg)
  295. {
  296. return i2c_smbus_read_byte_data(client, reg);
  297. }
  298. static inline int
  299. w83792d_write_value(struct i2c_client *client, u8 reg, u8 value)
  300. {
  301. return i2c_smbus_write_byte_data(client, reg, value);
  302. }
  303. /* following are the sysfs callback functions */
  304. static ssize_t show_in(struct device *dev, struct device_attribute *attr,
  305. char *buf)
  306. {
  307. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  308. int nr = sensor_attr->index;
  309. struct w83792d_data *data = w83792d_update_device(dev);
  310. return sprintf(buf,"%ld\n", IN_FROM_REG(nr,(in_count_from_reg(nr, data))));
  311. }
  312. #define show_in_reg(reg) \
  313. static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
  314. char *buf) \
  315. { \
  316. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  317. int nr = sensor_attr->index; \
  318. struct w83792d_data *data = w83792d_update_device(dev); \
  319. return sprintf(buf,"%ld\n", (long)(IN_FROM_REG(nr, (data->reg[nr])*4))); \
  320. }
  321. show_in_reg(in_min);
  322. show_in_reg(in_max);
  323. #define store_in_reg(REG, reg) \
  324. static ssize_t store_in_##reg (struct device *dev, \
  325. struct device_attribute *attr, \
  326. const char *buf, size_t count) \
  327. { \
  328. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  329. int nr = sensor_attr->index; \
  330. struct i2c_client *client = to_i2c_client(dev); \
  331. struct w83792d_data *data = i2c_get_clientdata(client); \
  332. u32 val; \
  333. \
  334. val = simple_strtoul(buf, NULL, 10); \
  335. data->in_##reg[nr] = SENSORS_LIMIT(IN_TO_REG(nr, val)/4, 0, 255); \
  336. w83792d_write_value(client, W83792D_REG_IN_##REG[nr], data->in_##reg[nr]); \
  337. \
  338. return count; \
  339. }
  340. store_in_reg(MIN, min);
  341. store_in_reg(MAX, max);
  342. #define sysfs_in_reg(offset) \
  343. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, show_in, \
  344. NULL, offset); \
  345. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  346. show_in_min, store_in_min, offset); \
  347. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  348. show_in_max, store_in_max, offset);
  349. sysfs_in_reg(0);
  350. sysfs_in_reg(1);
  351. sysfs_in_reg(2);
  352. sysfs_in_reg(3);
  353. sysfs_in_reg(4);
  354. sysfs_in_reg(5);
  355. sysfs_in_reg(6);
  356. sysfs_in_reg(7);
  357. sysfs_in_reg(8);
  358. #define device_create_file_in(client, offset) \
  359. do { \
  360. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_input.dev_attr); \
  361. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_max.dev_attr); \
  362. device_create_file(&client->dev, &sensor_dev_attr_in##offset##_min.dev_attr); \
  363. } while (0)
  364. #define show_fan_reg(reg) \
  365. static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
  366. char *buf) \
  367. { \
  368. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
  369. int nr = sensor_attr->index - 1; \
  370. struct w83792d_data *data = w83792d_update_device(dev); \
  371. return sprintf(buf,"%d\n", \
  372. FAN_FROM_REG(data->reg[nr], DIV_FROM_REG(data->fan_div[nr]))); \
  373. }
  374. show_fan_reg(fan);
  375. show_fan_reg(fan_min);
  376. static ssize_t
  377. store_fan_min(struct device *dev, struct device_attribute *attr,
  378. const char *buf, size_t count)
  379. {
  380. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  381. int nr = sensor_attr->index - 1;
  382. struct i2c_client *client = to_i2c_client(dev);
  383. struct w83792d_data *data = i2c_get_clientdata(client);
  384. u32 val;
  385. val = simple_strtoul(buf, NULL, 10);
  386. data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  387. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr],
  388. data->fan_min[nr]);
  389. return count;
  390. }
  391. static ssize_t
  392. show_fan_div(struct device *dev, struct device_attribute *attr,
  393. char *buf)
  394. {
  395. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  396. int nr = sensor_attr->index;
  397. struct w83792d_data *data = w83792d_update_device(dev);
  398. return sprintf(buf, "%u\n", DIV_FROM_REG(data->fan_div[nr - 1]));
  399. }
  400. /* Note: we save and restore the fan minimum here, because its value is
  401. determined in part by the fan divisor. This follows the principle of
  402. least suprise; the user doesn't expect the fan minimum to change just
  403. because the divisor changed. */
  404. static ssize_t
  405. store_fan_div(struct device *dev, struct device_attribute *attr,
  406. const char *buf, size_t count)
  407. {
  408. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  409. int nr = sensor_attr->index - 1;
  410. struct i2c_client *client = to_i2c_client(dev);
  411. struct w83792d_data *data = i2c_get_clientdata(client);
  412. unsigned long min;
  413. /*u8 reg;*/
  414. u8 fan_div_reg = 0;
  415. u8 tmp_fan_div;
  416. /* Save fan_min */
  417. min = FAN_FROM_REG(data->fan_min[nr],
  418. DIV_FROM_REG(data->fan_div[nr]));
  419. data->fan_div[nr] = DIV_TO_REG(simple_strtoul(buf, NULL, 10));
  420. fan_div_reg = w83792d_read_value(client, W83792D_REG_FAN_DIV[nr >> 1]);
  421. fan_div_reg &= (nr & 0x01) ? 0x8f : 0xf8;
  422. tmp_fan_div = (nr & 0x01) ? (((data->fan_div[nr]) << 4) & 0x70)
  423. : ((data->fan_div[nr]) & 0x07);
  424. w83792d_write_value(client, W83792D_REG_FAN_DIV[nr >> 1],
  425. fan_div_reg | tmp_fan_div);
  426. /* Restore fan_min */
  427. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  428. w83792d_write_value(client, W83792D_REG_FAN_MIN[nr], data->fan_min[nr]);
  429. return count;
  430. }
  431. #define sysfs_fan(offset) \
  432. static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan, NULL, \
  433. offset); \
  434. static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
  435. show_fan_div, store_fan_div, offset); \
  436. static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
  437. show_fan_min, store_fan_min, offset);
  438. sysfs_fan(1);
  439. sysfs_fan(2);
  440. sysfs_fan(3);
  441. sysfs_fan(4);
  442. sysfs_fan(5);
  443. sysfs_fan(6);
  444. sysfs_fan(7);
  445. #define device_create_file_fan(client, offset) \
  446. do { \
  447. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_input.dev_attr); \
  448. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_div.dev_attr); \
  449. device_create_file(&client->dev, &sensor_dev_attr_fan##offset##_min.dev_attr); \
  450. } while (0)
  451. /* read/write the temperature1, includes measured value and limits */
  452. static ssize_t show_temp1(struct device *dev, struct device_attribute *attr,
  453. char *buf)
  454. {
  455. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  456. int nr = sensor_attr->index;
  457. struct w83792d_data *data = w83792d_update_device(dev);
  458. return sprintf(buf, "%d\n", TEMP1_FROM_REG(data->temp1[nr]));
  459. }
  460. static ssize_t store_temp1(struct device *dev, struct device_attribute *attr,
  461. const char *buf, size_t count)
  462. {
  463. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  464. int nr = sensor_attr->index;
  465. struct i2c_client *client = to_i2c_client(dev);
  466. struct w83792d_data *data = i2c_get_clientdata(client);
  467. s32 val;
  468. val = simple_strtol(buf, NULL, 10);
  469. data->temp1[nr] = TEMP1_TO_REG(val);
  470. w83792d_write_value(client, W83792D_REG_TEMP1[nr],
  471. data->temp1[nr]);
  472. return count;
  473. }
  474. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0);
  475. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1,
  476. store_temp1, 1);
  477. static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1,
  478. store_temp1, 2);
  479. #define device_create_file_temp1(client) \
  480. do { \
  481. device_create_file(&client->dev, &sensor_dev_attr_temp1_input.dev_attr); \
  482. device_create_file(&client->dev, &sensor_dev_attr_temp1_max.dev_attr); \
  483. device_create_file(&client->dev, &sensor_dev_attr_temp1_max_hyst.dev_attr); \
  484. } while (0)
  485. /* read/write the temperature2-3, includes measured value and limits */
  486. static ssize_t show_temp23(struct device *dev, struct device_attribute *attr,
  487. char *buf)
  488. {
  489. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  490. int nr = sensor_attr->nr;
  491. int index = sensor_attr->index;
  492. struct w83792d_data *data = w83792d_update_device(dev);
  493. return sprintf(buf,"%ld\n",
  494. (long)TEMP_ADD_FROM_REG(data->temp_add[nr][index],
  495. data->temp_add[nr][index+1]));
  496. }
  497. static ssize_t store_temp23(struct device *dev, struct device_attribute *attr,
  498. const char *buf, size_t count)
  499. {
  500. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  501. int nr = sensor_attr->nr;
  502. int index = sensor_attr->index;
  503. struct i2c_client *client = to_i2c_client(dev);
  504. struct w83792d_data *data = i2c_get_clientdata(client);
  505. s32 val;
  506. val = simple_strtol(buf, NULL, 10);
  507. data->temp_add[nr][index] = TEMP_ADD_TO_REG_HIGH(val);
  508. data->temp_add[nr][index+1] = TEMP_ADD_TO_REG_LOW(val);
  509. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index],
  510. data->temp_add[nr][index]);
  511. w83792d_write_value(client, W83792D_REG_TEMP_ADD[nr][index+1],
  512. data->temp_add[nr][index+1]);
  513. return count;
  514. }
  515. #define sysfs_temp23(name,idx) \
  516. static SENSOR_DEVICE_ATTR_2(name##_input, S_IRUGO, show_temp23, NULL, \
  517. idx, 0); \
  518. static SENSOR_DEVICE_ATTR_2(name##_max, S_IRUGO | S_IWUSR, \
  519. show_temp23, store_temp23, idx, 2); \
  520. static SENSOR_DEVICE_ATTR_2(name##_max_hyst, S_IRUGO | S_IWUSR, \
  521. show_temp23, store_temp23, idx, 4);
  522. sysfs_temp23(temp2,0)
  523. sysfs_temp23(temp3,1)
  524. #define device_create_file_temp_add(client, offset) \
  525. do { \
  526. device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_input.dev_attr); \
  527. device_create_file(&client->dev, &sensor_dev_attr_temp##offset##_max.dev_attr); \
  528. device_create_file(&client->dev, \
  529. &sensor_dev_attr_temp##offset##_max_hyst.dev_attr); \
  530. } while (0)
  531. /* get reatime status of all sensors items: voltage, temp, fan */
  532. static ssize_t
  533. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  534. {
  535. struct w83792d_data *data = w83792d_update_device(dev);
  536. return sprintf(buf, "%d\n", data->alarms);
  537. }
  538. static
  539. DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  540. #define device_create_file_alarms(client) \
  541. device_create_file(&client->dev, &dev_attr_alarms);
  542. static ssize_t
  543. show_pwm(struct device *dev, struct device_attribute *attr,
  544. char *buf)
  545. {
  546. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  547. int nr = sensor_attr->index;
  548. struct w83792d_data *data = w83792d_update_device(dev);
  549. return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr-1]));
  550. }
  551. static ssize_t
  552. show_pwmenable(struct device *dev, struct device_attribute *attr,
  553. char *buf)
  554. {
  555. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  556. int nr = sensor_attr->index - 1;
  557. struct w83792d_data *data = w83792d_update_device(dev);
  558. long pwm_enable_tmp = 1;
  559. switch (data->pwmenable[nr]) {
  560. case 0:
  561. pwm_enable_tmp = 1; /* manual mode */
  562. break;
  563. case 1:
  564. pwm_enable_tmp = 3; /*thermal cruise/Smart Fan I */
  565. break;
  566. case 2:
  567. pwm_enable_tmp = 2; /* Smart Fan II */
  568. break;
  569. }
  570. return sprintf(buf, "%ld\n", pwm_enable_tmp);
  571. }
  572. static ssize_t
  573. store_pwm(struct device *dev, struct device_attribute *attr,
  574. const char *buf, size_t count)
  575. {
  576. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  577. int nr = sensor_attr->index - 1;
  578. struct i2c_client *client = to_i2c_client(dev);
  579. struct w83792d_data *data = i2c_get_clientdata(client);
  580. u32 val;
  581. val = simple_strtoul(buf, NULL, 10);
  582. data->pwm[nr] = PWM_TO_REG(val);
  583. w83792d_write_value(client, W83792D_REG_PWM[nr], data->pwm[nr]);
  584. return count;
  585. }
  586. static ssize_t
  587. store_pwmenable(struct device *dev, struct device_attribute *attr,
  588. const char *buf, size_t count)
  589. {
  590. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  591. int nr = sensor_attr->index - 1;
  592. struct i2c_client *client = to_i2c_client(dev);
  593. struct w83792d_data *data = i2c_get_clientdata(client);
  594. u32 val;
  595. u8 fan_cfg_tmp, cfg1_tmp, cfg2_tmp, cfg3_tmp, cfg4_tmp;
  596. val = simple_strtoul(buf, NULL, 10);
  597. switch (val) {
  598. case 1:
  599. data->pwmenable[nr] = 0; /* manual mode */
  600. break;
  601. case 2:
  602. data->pwmenable[nr] = 2; /* Smart Fan II */
  603. break;
  604. case 3:
  605. data->pwmenable[nr] = 1; /* thermal cruise/Smart Fan I */
  606. break;
  607. default:
  608. return -EINVAL;
  609. }
  610. cfg1_tmp = data->pwmenable[0];
  611. cfg2_tmp = (data->pwmenable[1]) << 2;
  612. cfg3_tmp = (data->pwmenable[2]) << 4;
  613. cfg4_tmp = w83792d_read_value(client,W83792D_REG_FAN_CFG) & 0xc0;
  614. fan_cfg_tmp = ((cfg4_tmp | cfg3_tmp) | cfg2_tmp) | cfg1_tmp;
  615. w83792d_write_value(client, W83792D_REG_FAN_CFG, fan_cfg_tmp);
  616. return count;
  617. }
  618. #define sysfs_pwm(offset) \
  619. static SENSOR_DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
  620. show_pwm, store_pwm, offset); \
  621. static SENSOR_DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
  622. show_pwmenable, store_pwmenable, offset); \
  623. sysfs_pwm(1);
  624. sysfs_pwm(2);
  625. sysfs_pwm(3);
  626. #define device_create_file_pwm(client, offset) \
  627. do { \
  628. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset.dev_attr); \
  629. } while (0)
  630. #define device_create_file_pwmenable(client, offset) \
  631. do { \
  632. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_enable.dev_attr); \
  633. } while (0)
  634. static ssize_t
  635. show_pwm_mode(struct device *dev, struct device_attribute *attr,
  636. char *buf)
  637. {
  638. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  639. int nr = sensor_attr->index;
  640. struct w83792d_data *data = w83792d_update_device(dev);
  641. return sprintf(buf, "%d\n", data->pwm_mode[nr-1]);
  642. }
  643. static ssize_t
  644. store_pwm_mode(struct device *dev, struct device_attribute *attr,
  645. const char *buf, size_t count)
  646. {
  647. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  648. int nr = sensor_attr->index - 1;
  649. struct i2c_client *client = to_i2c_client(dev);
  650. struct w83792d_data *data = i2c_get_clientdata(client);
  651. u32 val;
  652. u8 pwm_mode_mask = 0;
  653. val = simple_strtoul(buf, NULL, 10);
  654. data->pwm_mode[nr] = SENSORS_LIMIT(val, 0, 1);
  655. pwm_mode_mask = w83792d_read_value(client,
  656. W83792D_REG_PWM[nr]) & 0x7f;
  657. w83792d_write_value(client, W83792D_REG_PWM[nr],
  658. ((data->pwm_mode[nr]) << 7) | pwm_mode_mask);
  659. return count;
  660. }
  661. #define sysfs_pwm_mode(offset) \
  662. static SENSOR_DEVICE_ATTR(pwm##offset##_mode, S_IRUGO | S_IWUSR, \
  663. show_pwm_mode, store_pwm_mode, offset);
  664. sysfs_pwm_mode(1);
  665. sysfs_pwm_mode(2);
  666. sysfs_pwm_mode(3);
  667. #define device_create_file_pwm_mode(client, offset) \
  668. do { \
  669. device_create_file(&client->dev, &sensor_dev_attr_pwm##offset##_mode.dev_attr); \
  670. } while (0)
  671. static ssize_t
  672. show_regs_chassis(struct device *dev, struct device_attribute *attr,
  673. char *buf)
  674. {
  675. struct w83792d_data *data = w83792d_update_device(dev);
  676. return sprintf(buf, "%d\n", data->chassis);
  677. }
  678. static DEVICE_ATTR(chassis, S_IRUGO, show_regs_chassis, NULL);
  679. #define device_create_file_chassis(client) \
  680. do { \
  681. device_create_file(&client->dev, &dev_attr_chassis); \
  682. } while (0)
  683. static ssize_t
  684. show_chassis_clear(struct device *dev, struct device_attribute *attr, char *buf)
  685. {
  686. struct w83792d_data *data = w83792d_update_device(dev);
  687. return sprintf(buf, "%d\n", data->chassis_clear);
  688. }
  689. static ssize_t
  690. store_chassis_clear(struct device *dev, struct device_attribute *attr,
  691. const char *buf, size_t count)
  692. {
  693. struct i2c_client *client = to_i2c_client(dev);
  694. struct w83792d_data *data = i2c_get_clientdata(client);
  695. u32 val;
  696. u8 temp1 = 0, temp2 = 0;
  697. val = simple_strtoul(buf, NULL, 10);
  698. data->chassis_clear = SENSORS_LIMIT(val, 0 ,1);
  699. temp1 = ((data->chassis_clear) << 7) & 0x80;
  700. temp2 = w83792d_read_value(client,
  701. W83792D_REG_CHASSIS_CLR) & 0x7f;
  702. w83792d_write_value(client, W83792D_REG_CHASSIS_CLR, temp1 | temp2);
  703. return count;
  704. }
  705. static DEVICE_ATTR(chassis_clear, S_IRUGO | S_IWUSR,
  706. show_chassis_clear, store_chassis_clear);
  707. #define device_create_file_chassis_clear(client) \
  708. do { \
  709. device_create_file(&client->dev, &dev_attr_chassis_clear); \
  710. } while (0)
  711. /* For Smart Fan I / Thermal Cruise */
  712. static ssize_t
  713. show_thermal_cruise(struct device *dev, struct device_attribute *attr,
  714. char *buf)
  715. {
  716. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  717. int nr = sensor_attr->index;
  718. struct w83792d_data *data = w83792d_update_device(dev);
  719. return sprintf(buf, "%ld\n", (long)data->thermal_cruise[nr-1]);
  720. }
  721. static ssize_t
  722. store_thermal_cruise(struct device *dev, struct device_attribute *attr,
  723. const char *buf, size_t count)
  724. {
  725. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  726. int nr = sensor_attr->index - 1;
  727. struct i2c_client *client = to_i2c_client(dev);
  728. struct w83792d_data *data = i2c_get_clientdata(client);
  729. u32 val;
  730. u8 target_tmp=0, target_mask=0;
  731. val = simple_strtoul(buf, NULL, 10);
  732. target_tmp = val;
  733. target_tmp = target_tmp & 0x7f;
  734. target_mask = w83792d_read_value(client, W83792D_REG_THERMAL[nr]) & 0x80;
  735. data->thermal_cruise[nr] = SENSORS_LIMIT(target_tmp, 0, 255);
  736. w83792d_write_value(client, W83792D_REG_THERMAL[nr],
  737. (data->thermal_cruise[nr]) | target_mask);
  738. return count;
  739. }
  740. #define sysfs_thermal_cruise(offset) \
  741. static SENSOR_DEVICE_ATTR(thermal_cruise##offset, S_IRUGO | S_IWUSR, \
  742. show_thermal_cruise, store_thermal_cruise, offset);
  743. sysfs_thermal_cruise(1);
  744. sysfs_thermal_cruise(2);
  745. sysfs_thermal_cruise(3);
  746. #define device_create_file_thermal_cruise(client, offset) \
  747. do { \
  748. device_create_file(&client->dev, \
  749. &sensor_dev_attr_thermal_cruise##offset.dev_attr); \
  750. } while (0)
  751. /* For Smart Fan I/Thermal Cruise and Smart Fan II */
  752. static ssize_t
  753. show_tolerance(struct device *dev, struct device_attribute *attr,
  754. char *buf)
  755. {
  756. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  757. int nr = sensor_attr->index;
  758. struct w83792d_data *data = w83792d_update_device(dev);
  759. return sprintf(buf, "%ld\n", (long)data->tolerance[nr-1]);
  760. }
  761. static ssize_t
  762. store_tolerance(struct device *dev, struct device_attribute *attr,
  763. const char *buf, size_t count)
  764. {
  765. struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
  766. int nr = sensor_attr->index - 1;
  767. struct i2c_client *client = to_i2c_client(dev);
  768. struct w83792d_data *data = i2c_get_clientdata(client);
  769. u32 val;
  770. u8 tol_tmp, tol_mask;
  771. val = simple_strtoul(buf, NULL, 10);
  772. tol_mask = w83792d_read_value(client,
  773. W83792D_REG_TOLERANCE[nr]) & ((nr == 1) ? 0x0f : 0xf0);
  774. tol_tmp = SENSORS_LIMIT(val, 0, 15);
  775. tol_tmp &= 0x0f;
  776. data->tolerance[nr] = tol_tmp;
  777. if (nr == 1) {
  778. tol_tmp <<= 4;
  779. }
  780. w83792d_write_value(client, W83792D_REG_TOLERANCE[nr],
  781. tol_mask | tol_tmp);
  782. return count;
  783. }
  784. #define sysfs_tolerance(offset) \
  785. static SENSOR_DEVICE_ATTR(tolerance##offset, S_IRUGO | S_IWUSR, \
  786. show_tolerance, store_tolerance, offset);
  787. sysfs_tolerance(1);
  788. sysfs_tolerance(2);
  789. sysfs_tolerance(3);
  790. #define device_create_file_tolerance(client, offset) \
  791. do { \
  792. device_create_file(&client->dev, &sensor_dev_attr_tolerance##offset.dev_attr); \
  793. } while (0)
  794. /* For Smart Fan II */
  795. static ssize_t
  796. show_sf2_point(struct device *dev, struct device_attribute *attr,
  797. char *buf)
  798. {
  799. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  800. int nr = sensor_attr->nr;
  801. int index = sensor_attr->index;
  802. struct w83792d_data *data = w83792d_update_device(dev);
  803. return sprintf(buf, "%ld\n", (long)data->sf2_points[index-1][nr-1]);
  804. }
  805. static ssize_t
  806. store_sf2_point(struct device *dev, struct device_attribute *attr,
  807. const char *buf, size_t count)
  808. {
  809. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  810. int nr = sensor_attr->nr - 1;
  811. int index = sensor_attr->index - 1;
  812. struct i2c_client *client = to_i2c_client(dev);
  813. struct w83792d_data *data = i2c_get_clientdata(client);
  814. u32 val;
  815. u8 mask_tmp = 0;
  816. val = simple_strtoul(buf, NULL, 10);
  817. data->sf2_points[index][nr] = SENSORS_LIMIT(val, 0, 127);
  818. mask_tmp = w83792d_read_value(client,
  819. W83792D_REG_POINTS[index][nr]) & 0x80;
  820. w83792d_write_value(client, W83792D_REG_POINTS[index][nr],
  821. mask_tmp|data->sf2_points[index][nr]);
  822. return count;
  823. }
  824. #define sysfs_sf2_point(offset, index) \
  825. static SENSOR_DEVICE_ATTR_2(sf2_point##offset##_fan##index, S_IRUGO | S_IWUSR, \
  826. show_sf2_point, store_sf2_point, offset, index);
  827. sysfs_sf2_point(1, 1); /* Fan1 */
  828. sysfs_sf2_point(2, 1); /* Fan1 */
  829. sysfs_sf2_point(3, 1); /* Fan1 */
  830. sysfs_sf2_point(4, 1); /* Fan1 */
  831. sysfs_sf2_point(1, 2); /* Fan2 */
  832. sysfs_sf2_point(2, 2); /* Fan2 */
  833. sysfs_sf2_point(3, 2); /* Fan2 */
  834. sysfs_sf2_point(4, 2); /* Fan2 */
  835. sysfs_sf2_point(1, 3); /* Fan3 */
  836. sysfs_sf2_point(2, 3); /* Fan3 */
  837. sysfs_sf2_point(3, 3); /* Fan3 */
  838. sysfs_sf2_point(4, 3); /* Fan3 */
  839. #define device_create_file_sf2_point(client, offset, index) \
  840. do { \
  841. device_create_file(&client->dev, \
  842. &sensor_dev_attr_sf2_point##offset##_fan##index.dev_attr); \
  843. } while (0)
  844. static ssize_t
  845. show_sf2_level(struct device *dev, struct device_attribute *attr,
  846. char *buf)
  847. {
  848. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  849. int nr = sensor_attr->nr;
  850. int index = sensor_attr->index;
  851. struct w83792d_data *data = w83792d_update_device(dev);
  852. return sprintf(buf, "%d\n",
  853. (((data->sf2_levels[index-1][nr]) * 100) / 15));
  854. }
  855. static ssize_t
  856. store_sf2_level(struct device *dev, struct device_attribute *attr,
  857. const char *buf, size_t count)
  858. {
  859. struct sensor_device_attribute_2 *sensor_attr = to_sensor_dev_attr_2(attr);
  860. int nr = sensor_attr->nr;
  861. int index = sensor_attr->index - 1;
  862. struct i2c_client *client = to_i2c_client(dev);
  863. struct w83792d_data *data = i2c_get_clientdata(client);
  864. u32 val;
  865. u8 mask_tmp=0, level_tmp=0;
  866. val = simple_strtoul(buf, NULL, 10);
  867. data->sf2_levels[index][nr] = SENSORS_LIMIT((val * 15) / 100, 0, 15);
  868. mask_tmp = w83792d_read_value(client, W83792D_REG_LEVELS[index][nr])
  869. & ((nr==3) ? 0xf0 : 0x0f);
  870. if (nr==3) {
  871. level_tmp = data->sf2_levels[index][nr];
  872. } else {
  873. level_tmp = data->sf2_levels[index][nr] << 4;
  874. }
  875. w83792d_write_value(client, W83792D_REG_LEVELS[index][nr], level_tmp | mask_tmp);
  876. return count;
  877. }
  878. #define sysfs_sf2_level(offset, index) \
  879. static SENSOR_DEVICE_ATTR_2(sf2_level##offset##_fan##index, S_IRUGO | S_IWUSR, \
  880. show_sf2_level, store_sf2_level, offset, index);
  881. sysfs_sf2_level(1, 1); /* Fan1 */
  882. sysfs_sf2_level(2, 1); /* Fan1 */
  883. sysfs_sf2_level(3, 1); /* Fan1 */
  884. sysfs_sf2_level(1, 2); /* Fan2 */
  885. sysfs_sf2_level(2, 2); /* Fan2 */
  886. sysfs_sf2_level(3, 2); /* Fan2 */
  887. sysfs_sf2_level(1, 3); /* Fan3 */
  888. sysfs_sf2_level(2, 3); /* Fan3 */
  889. sysfs_sf2_level(3, 3); /* Fan3 */
  890. #define device_create_file_sf2_level(client, offset, index) \
  891. do { \
  892. device_create_file(&client->dev, \
  893. &sensor_dev_attr_sf2_level##offset##_fan##index.dev_attr); \
  894. } while (0)
  895. /* This function is called when:
  896. * w83792d_driver is inserted (when this module is loaded), for each
  897. available adapter
  898. * when a new adapter is inserted (and w83792d_driver is still present) */
  899. static int
  900. w83792d_attach_adapter(struct i2c_adapter *adapter)
  901. {
  902. if (!(adapter->class & I2C_CLASS_HWMON))
  903. return 0;
  904. return i2c_probe(adapter, &addr_data, w83792d_detect);
  905. }
  906. static int
  907. w83792d_create_subclient(struct i2c_adapter *adapter,
  908. struct i2c_client *new_client, int addr,
  909. struct i2c_client **sub_cli)
  910. {
  911. int err;
  912. struct i2c_client *sub_client;
  913. (*sub_cli) = sub_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  914. if (!(sub_client)) {
  915. return -ENOMEM;
  916. }
  917. sub_client->addr = 0x48 + addr;
  918. i2c_set_clientdata(sub_client, NULL);
  919. sub_client->adapter = adapter;
  920. sub_client->driver = &w83792d_driver;
  921. sub_client->flags = 0;
  922. strlcpy(sub_client->name, "w83792d subclient", I2C_NAME_SIZE);
  923. if ((err = i2c_attach_client(sub_client))) {
  924. dev_err(&new_client->dev, "subclient registration "
  925. "at address 0x%x failed\n", sub_client->addr);
  926. kfree(sub_client);
  927. return err;
  928. }
  929. return 0;
  930. }
  931. static int
  932. w83792d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
  933. struct i2c_client *new_client)
  934. {
  935. int i, id, err;
  936. u8 val;
  937. struct w83792d_data *data = i2c_get_clientdata(new_client);
  938. id = i2c_adapter_id(adapter);
  939. if (force_subclients[0] == id && force_subclients[1] == address) {
  940. for (i = 2; i <= 3; i++) {
  941. if (force_subclients[i] < 0x48 ||
  942. force_subclients[i] > 0x4f) {
  943. dev_err(&new_client->dev, "invalid subclient "
  944. "address %d; must be 0x48-0x4f\n",
  945. force_subclients[i]);
  946. err = -ENODEV;
  947. goto ERROR_SC_0;
  948. }
  949. }
  950. w83792d_write_value(new_client, W83792D_REG_I2C_SUBADDR,
  951. (force_subclients[2] & 0x07) |
  952. ((force_subclients[3] & 0x07) << 4));
  953. }
  954. val = w83792d_read_value(new_client, W83792D_REG_I2C_SUBADDR);
  955. if (!(val & 0x08)) {
  956. err = w83792d_create_subclient(adapter, new_client, val & 0x7,
  957. &data->lm75[0]);
  958. if (err < 0)
  959. goto ERROR_SC_0;
  960. }
  961. if (!(val & 0x80)) {
  962. if ((data->lm75[0] != NULL) &&
  963. ((val & 0x7) == ((val >> 4) & 0x7))) {
  964. dev_err(&new_client->dev, "duplicate addresses 0x%x, "
  965. "use force_subclient\n", data->lm75[0]->addr);
  966. err = -ENODEV;
  967. goto ERROR_SC_1;
  968. }
  969. err = w83792d_create_subclient(adapter, new_client,
  970. (val >> 4) & 0x7, &data->lm75[1]);
  971. if (err < 0)
  972. goto ERROR_SC_1;
  973. }
  974. return 0;
  975. /* Undo inits in case of errors */
  976. ERROR_SC_1:
  977. if (data->lm75[0] != NULL) {
  978. i2c_detach_client(data->lm75[0]);
  979. kfree(data->lm75[0]);
  980. }
  981. ERROR_SC_0:
  982. return err;
  983. }
  984. static int
  985. w83792d_detect(struct i2c_adapter *adapter, int address, int kind)
  986. {
  987. int i = 0, val1 = 0, val2;
  988. struct i2c_client *new_client;
  989. struct w83792d_data *data;
  990. int err = 0;
  991. const char *client_name = "";
  992. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
  993. goto ERROR0;
  994. }
  995. /* OK. For now, we presume we have a valid client. We now create the
  996. client structure, even though we cannot fill it completely yet.
  997. But it allows us to access w83792d_{read,write}_value. */
  998. if (!(data = kzalloc(sizeof(struct w83792d_data), GFP_KERNEL))) {
  999. err = -ENOMEM;
  1000. goto ERROR0;
  1001. }
  1002. new_client = &data->client;
  1003. i2c_set_clientdata(new_client, data);
  1004. new_client->addr = address;
  1005. new_client->adapter = adapter;
  1006. new_client->driver = &w83792d_driver;
  1007. new_client->flags = 0;
  1008. /* Now, we do the remaining detection. */
  1009. /* The w83792d may be stuck in some other bank than bank 0. This may
  1010. make reading other information impossible. Specify a force=... or
  1011. force_*=... parameter, and the Winbond will be reset to the right
  1012. bank. */
  1013. if (kind < 0) {
  1014. if (w83792d_read_value(new_client, W83792D_REG_CONFIG) & 0x80) {
  1015. dev_warn(&new_client->dev, "Detection failed at step "
  1016. "3\n");
  1017. goto ERROR1;
  1018. }
  1019. val1 = w83792d_read_value(new_client, W83792D_REG_BANK);
  1020. val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
  1021. /* Check for Winbond ID if in bank 0 */
  1022. if (!(val1 & 0x07)) { /* is Bank0 */
  1023. if (((!(val1 & 0x80)) && (val2 != 0xa3)) ||
  1024. ((val1 & 0x80) && (val2 != 0x5c))) {
  1025. goto ERROR1;
  1026. }
  1027. }
  1028. /* If Winbond chip, address of chip and W83792D_REG_I2C_ADDR
  1029. should match */
  1030. if (w83792d_read_value(new_client,
  1031. W83792D_REG_I2C_ADDR) != address) {
  1032. dev_warn(&new_client->dev, "Detection failed "
  1033. "at step 5\n");
  1034. goto ERROR1;
  1035. }
  1036. }
  1037. /* We have either had a force parameter, or we have already detected the
  1038. Winbond. Put it now into bank 0 and Vendor ID High Byte */
  1039. w83792d_write_value(new_client,
  1040. W83792D_REG_BANK,
  1041. (w83792d_read_value(new_client,
  1042. W83792D_REG_BANK) & 0x78) | 0x80);
  1043. /* Determine the chip type. */
  1044. if (kind <= 0) {
  1045. /* get vendor ID */
  1046. val2 = w83792d_read_value(new_client, W83792D_REG_CHIPMAN);
  1047. if (val2 != 0x5c) { /* the vendor is NOT Winbond */
  1048. goto ERROR1;
  1049. }
  1050. val1 = w83792d_read_value(new_client, W83792D_REG_WCHIPID);
  1051. if (val1 == 0x7a) {
  1052. kind = w83792d;
  1053. } else {
  1054. if (kind == 0)
  1055. dev_warn(&new_client->dev,
  1056. "w83792d: Ignoring 'force' parameter for"
  1057. " unknown chip at adapter %d, address"
  1058. " 0x%02x\n", i2c_adapter_id(adapter),
  1059. address);
  1060. goto ERROR1;
  1061. }
  1062. }
  1063. if (kind == w83792d) {
  1064. client_name = "w83792d";
  1065. } else {
  1066. dev_err(&new_client->dev, "w83792d: Internal error: unknown"
  1067. " kind (%d)?!?", kind);
  1068. goto ERROR1;
  1069. }
  1070. /* Fill in the remaining client fields and put into the global list */
  1071. strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
  1072. data->type = kind;
  1073. data->valid = 0;
  1074. init_MUTEX(&data->update_lock);
  1075. /* Tell the I2C layer a new client has arrived */
  1076. if ((err = i2c_attach_client(new_client)))
  1077. goto ERROR1;
  1078. if ((err = w83792d_detect_subclients(adapter, address,
  1079. kind, new_client)))
  1080. goto ERROR2;
  1081. /* Initialize the chip */
  1082. w83792d_init_client(new_client);
  1083. /* A few vars need to be filled upon startup */
  1084. for (i = 0; i < 7; i++) {
  1085. data->fan_min[i] = w83792d_read_value(new_client,
  1086. W83792D_REG_FAN_MIN[i]);
  1087. }
  1088. /* Register sysfs hooks */
  1089. data->class_dev = hwmon_device_register(&new_client->dev);
  1090. if (IS_ERR(data->class_dev)) {
  1091. err = PTR_ERR(data->class_dev);
  1092. goto ERROR3;
  1093. }
  1094. device_create_file_in(new_client, 0);
  1095. device_create_file_in(new_client, 1);
  1096. device_create_file_in(new_client, 2);
  1097. device_create_file_in(new_client, 3);
  1098. device_create_file_in(new_client, 4);
  1099. device_create_file_in(new_client, 5);
  1100. device_create_file_in(new_client, 6);
  1101. device_create_file_in(new_client, 7);
  1102. device_create_file_in(new_client, 8);
  1103. device_create_file_fan(new_client, 1);
  1104. device_create_file_fan(new_client, 2);
  1105. device_create_file_fan(new_client, 3);
  1106. /* Read GPIO enable register to check if pins for fan 4,5 are used as
  1107. GPIO */
  1108. val1 = w83792d_read_value(new_client, W83792D_REG_GPIO_EN);
  1109. if (!(val1 & 0x40))
  1110. device_create_file_fan(new_client, 4);
  1111. if (!(val1 & 0x20))
  1112. device_create_file_fan(new_client, 5);
  1113. val1 = w83792d_read_value(new_client, W83792D_REG_PIN);
  1114. if (val1 & 0x40)
  1115. device_create_file_fan(new_client, 6);
  1116. if (val1 & 0x04)
  1117. device_create_file_fan(new_client, 7);
  1118. device_create_file_temp1(new_client); /* Temp1 */
  1119. device_create_file_temp_add(new_client, 2); /* Temp2 */
  1120. device_create_file_temp_add(new_client, 3); /* Temp3 */
  1121. device_create_file_alarms(new_client);
  1122. device_create_file_pwm(new_client, 1);
  1123. device_create_file_pwm(new_client, 2);
  1124. device_create_file_pwm(new_client, 3);
  1125. device_create_file_pwmenable(new_client, 1);
  1126. device_create_file_pwmenable(new_client, 2);
  1127. device_create_file_pwmenable(new_client, 3);
  1128. device_create_file_pwm_mode(new_client, 1);
  1129. device_create_file_pwm_mode(new_client, 2);
  1130. device_create_file_pwm_mode(new_client, 3);
  1131. device_create_file_chassis(new_client);
  1132. device_create_file_chassis_clear(new_client);
  1133. device_create_file_thermal_cruise(new_client, 1);
  1134. device_create_file_thermal_cruise(new_client, 2);
  1135. device_create_file_thermal_cruise(new_client, 3);
  1136. device_create_file_tolerance(new_client, 1);
  1137. device_create_file_tolerance(new_client, 2);
  1138. device_create_file_tolerance(new_client, 3);
  1139. device_create_file_sf2_point(new_client, 1, 1); /* Fan1 */
  1140. device_create_file_sf2_point(new_client, 2, 1); /* Fan1 */
  1141. device_create_file_sf2_point(new_client, 3, 1); /* Fan1 */
  1142. device_create_file_sf2_point(new_client, 4, 1); /* Fan1 */
  1143. device_create_file_sf2_point(new_client, 1, 2); /* Fan2 */
  1144. device_create_file_sf2_point(new_client, 2, 2); /* Fan2 */
  1145. device_create_file_sf2_point(new_client, 3, 2); /* Fan2 */
  1146. device_create_file_sf2_point(new_client, 4, 2); /* Fan2 */
  1147. device_create_file_sf2_point(new_client, 1, 3); /* Fan3 */
  1148. device_create_file_sf2_point(new_client, 2, 3); /* Fan3 */
  1149. device_create_file_sf2_point(new_client, 3, 3); /* Fan3 */
  1150. device_create_file_sf2_point(new_client, 4, 3); /* Fan3 */
  1151. device_create_file_sf2_level(new_client, 1, 1); /* Fan1 */
  1152. device_create_file_sf2_level(new_client, 2, 1); /* Fan1 */
  1153. device_create_file_sf2_level(new_client, 3, 1); /* Fan1 */
  1154. device_create_file_sf2_level(new_client, 1, 2); /* Fan2 */
  1155. device_create_file_sf2_level(new_client, 2, 2); /* Fan2 */
  1156. device_create_file_sf2_level(new_client, 3, 2); /* Fan2 */
  1157. device_create_file_sf2_level(new_client, 1, 3); /* Fan3 */
  1158. device_create_file_sf2_level(new_client, 2, 3); /* Fan3 */
  1159. device_create_file_sf2_level(new_client, 3, 3); /* Fan3 */
  1160. return 0;
  1161. ERROR3:
  1162. if (data->lm75[0] != NULL) {
  1163. i2c_detach_client(data->lm75[0]);
  1164. kfree(data->lm75[0]);
  1165. }
  1166. if (data->lm75[1] != NULL) {
  1167. i2c_detach_client(data->lm75[1]);
  1168. kfree(data->lm75[1]);
  1169. }
  1170. ERROR2:
  1171. i2c_detach_client(new_client);
  1172. ERROR1:
  1173. kfree(data);
  1174. ERROR0:
  1175. return err;
  1176. }
  1177. static int
  1178. w83792d_detach_client(struct i2c_client *client)
  1179. {
  1180. struct w83792d_data *data = i2c_get_clientdata(client);
  1181. int err;
  1182. /* main client */
  1183. if (data)
  1184. hwmon_device_unregister(data->class_dev);
  1185. if ((err = i2c_detach_client(client)))
  1186. return err;
  1187. /* main client */
  1188. if (data)
  1189. kfree(data);
  1190. /* subclient */
  1191. else
  1192. kfree(client);
  1193. return 0;
  1194. }
  1195. static void
  1196. w83792d_init_client(struct i2c_client *client)
  1197. {
  1198. u8 temp2_cfg, temp3_cfg, vid_in_b;
  1199. if (init) {
  1200. w83792d_write_value(client, W83792D_REG_CONFIG, 0x80);
  1201. }
  1202. /* Clear the bit6 of W83792D_REG_VID_IN_B(set it into 0):
  1203. W83792D_REG_VID_IN_B bit6 = 0: the high/low limit of
  1204. vin0/vin1 can be modified by user;
  1205. W83792D_REG_VID_IN_B bit6 = 1: the high/low limit of
  1206. vin0/vin1 auto-updated, can NOT be modified by user. */
  1207. vid_in_b = w83792d_read_value(client, W83792D_REG_VID_IN_B);
  1208. w83792d_write_value(client, W83792D_REG_VID_IN_B,
  1209. vid_in_b & 0xbf);
  1210. temp2_cfg = w83792d_read_value(client, W83792D_REG_TEMP2_CONFIG);
  1211. temp3_cfg = w83792d_read_value(client, W83792D_REG_TEMP3_CONFIG);
  1212. w83792d_write_value(client, W83792D_REG_TEMP2_CONFIG,
  1213. temp2_cfg & 0xe6);
  1214. w83792d_write_value(client, W83792D_REG_TEMP3_CONFIG,
  1215. temp3_cfg & 0xe6);
  1216. /* Start monitoring */
  1217. w83792d_write_value(client, W83792D_REG_CONFIG,
  1218. (w83792d_read_value(client,
  1219. W83792D_REG_CONFIG) & 0xf7)
  1220. | 0x01);
  1221. }
  1222. static struct w83792d_data *w83792d_update_device(struct device *dev)
  1223. {
  1224. struct i2c_client *client = to_i2c_client(dev);
  1225. struct w83792d_data *data = i2c_get_clientdata(client);
  1226. int i, j;
  1227. u8 reg_array_tmp[4], pwm_array_tmp[7], reg_tmp;
  1228. down(&data->update_lock);
  1229. if (time_after
  1230. (jiffies - data->last_updated, (unsigned long) (HZ * 3))
  1231. || time_before(jiffies, data->last_updated) || !data->valid) {
  1232. dev_dbg(dev, "Starting device update\n");
  1233. /* Update the voltages measured value and limits */
  1234. for (i = 0; i < 9; i++) {
  1235. data->in[i] = w83792d_read_value(client,
  1236. W83792D_REG_IN[i]);
  1237. data->in_max[i] = w83792d_read_value(client,
  1238. W83792D_REG_IN_MAX[i]);
  1239. data->in_min[i] = w83792d_read_value(client,
  1240. W83792D_REG_IN_MIN[i]);
  1241. }
  1242. data->low_bits = w83792d_read_value(client,
  1243. W83792D_REG_LOW_BITS1) +
  1244. (w83792d_read_value(client,
  1245. W83792D_REG_LOW_BITS2) << 8);
  1246. for (i = 0; i < 7; i++) {
  1247. /* Update the Fan measured value and limits */
  1248. data->fan[i] = w83792d_read_value(client,
  1249. W83792D_REG_FAN[i]);
  1250. data->fan_min[i] = w83792d_read_value(client,
  1251. W83792D_REG_FAN_MIN[i]);
  1252. /* Update the PWM/DC Value and PWM/DC flag */
  1253. pwm_array_tmp[i] = w83792d_read_value(client,
  1254. W83792D_REG_PWM[i]);
  1255. data->pwm[i] = pwm_array_tmp[i] & 0x0f;
  1256. data->pwm_mode[i] = pwm_array_tmp[i] >> 7;
  1257. }
  1258. reg_tmp = w83792d_read_value(client, W83792D_REG_FAN_CFG);
  1259. data->pwmenable[0] = reg_tmp & 0x03;
  1260. data->pwmenable[1] = (reg_tmp>>2) & 0x03;
  1261. data->pwmenable[2] = (reg_tmp>>4) & 0x03;
  1262. for (i = 0; i < 3; i++) {
  1263. data->temp1[i] = w83792d_read_value(client,
  1264. W83792D_REG_TEMP1[i]);
  1265. }
  1266. for (i = 0; i < 2; i++) {
  1267. for (j = 0; j < 6; j++) {
  1268. data->temp_add[i][j] = w83792d_read_value(
  1269. client,W83792D_REG_TEMP_ADD[i][j]);
  1270. }
  1271. }
  1272. /* Update the Fan Divisor */
  1273. for (i = 0; i < 4; i++) {
  1274. reg_array_tmp[i] = w83792d_read_value(client,
  1275. W83792D_REG_FAN_DIV[i]);
  1276. }
  1277. data->fan_div[0] = reg_array_tmp[0] & 0x07;
  1278. data->fan_div[1] = (reg_array_tmp[0] >> 4) & 0x07;
  1279. data->fan_div[2] = reg_array_tmp[1] & 0x07;
  1280. data->fan_div[3] = (reg_array_tmp[1] >> 4) & 0x07;
  1281. data->fan_div[4] = reg_array_tmp[2] & 0x07;
  1282. data->fan_div[5] = (reg_array_tmp[2] >> 4) & 0x07;
  1283. data->fan_div[6] = reg_array_tmp[3] & 0x07;
  1284. /* Update the realtime status */
  1285. data->alarms = w83792d_read_value(client, W83792D_REG_ALARM1) +
  1286. (w83792d_read_value(client, W83792D_REG_ALARM2) << 8) +
  1287. (w83792d_read_value(client, W83792D_REG_ALARM3) << 16);
  1288. /* Update CaseOpen status and it's CLR_CHS. */
  1289. data->chassis = (w83792d_read_value(client,
  1290. W83792D_REG_CHASSIS) >> 5) & 0x01;
  1291. data->chassis_clear = (w83792d_read_value(client,
  1292. W83792D_REG_CHASSIS_CLR) >> 7) & 0x01;
  1293. /* Update Thermal Cruise/Smart Fan I target value */
  1294. for (i = 0; i < 3; i++) {
  1295. data->thermal_cruise[i] =
  1296. w83792d_read_value(client,
  1297. W83792D_REG_THERMAL[i]) & 0x7f;
  1298. }
  1299. /* Update Smart Fan I/II tolerance */
  1300. reg_tmp = w83792d_read_value(client, W83792D_REG_TOLERANCE[0]);
  1301. data->tolerance[0] = reg_tmp & 0x0f;
  1302. data->tolerance[1] = (reg_tmp >> 4) & 0x0f;
  1303. data->tolerance[2] = w83792d_read_value(client,
  1304. W83792D_REG_TOLERANCE[2]) & 0x0f;
  1305. /* Update Smart Fan II temperature points */
  1306. for (i = 0; i < 3; i++) {
  1307. for (j = 0; j < 4; j++) {
  1308. data->sf2_points[i][j] = w83792d_read_value(
  1309. client,W83792D_REG_POINTS[i][j]) & 0x7f;
  1310. }
  1311. }
  1312. /* Update Smart Fan II duty cycle levels */
  1313. for (i = 0; i < 3; i++) {
  1314. reg_tmp = w83792d_read_value(client,
  1315. W83792D_REG_LEVELS[i][0]);
  1316. data->sf2_levels[i][0] = reg_tmp & 0x0f;
  1317. data->sf2_levels[i][1] = (reg_tmp >> 4) & 0x0f;
  1318. reg_tmp = w83792d_read_value(client,
  1319. W83792D_REG_LEVELS[i][2]);
  1320. data->sf2_levels[i][2] = (reg_tmp >> 4) & 0x0f;
  1321. data->sf2_levels[i][3] = reg_tmp & 0x0f;
  1322. }
  1323. data->last_updated = jiffies;
  1324. data->valid = 1;
  1325. }
  1326. up(&data->update_lock);
  1327. #ifdef DEBUG
  1328. w83792d_print_debug(data, dev);
  1329. #endif
  1330. return data;
  1331. }
  1332. #ifdef DEBUG
  1333. static void w83792d_print_debug(struct w83792d_data *data, struct device *dev)
  1334. {
  1335. int i=0, j=0;
  1336. dev_dbg(dev, "==========The following is the debug message...========\n");
  1337. dev_dbg(dev, "9 set of Voltages: =====>\n");
  1338. for (i=0; i<9; i++) {
  1339. dev_dbg(dev, "vin[%d] is: 0x%x\n", i, data->in[i]);
  1340. dev_dbg(dev, "vin[%d] max is: 0x%x\n", i, data->in_max[i]);
  1341. dev_dbg(dev, "vin[%d] min is: 0x%x\n", i, data->in_min[i]);
  1342. }
  1343. dev_dbg(dev, "Low Bit1 is: 0x%x\n", data->low_bits & 0xff);
  1344. dev_dbg(dev, "Low Bit2 is: 0x%x\n", data->low_bits >> 8);
  1345. dev_dbg(dev, "7 set of Fan Counts and Duty Cycles: =====>\n");
  1346. for (i=0; i<7; i++) {
  1347. dev_dbg(dev, "fan[%d] is: 0x%x\n", i, data->fan[i]);
  1348. dev_dbg(dev, "fan[%d] min is: 0x%x\n", i, data->fan_min[i]);
  1349. dev_dbg(dev, "pwm[%d] is: 0x%x\n", i, data->pwm[i]);
  1350. dev_dbg(dev, "pwm_mode[%d] is: 0x%x\n", i, data->pwm_mode[i]);
  1351. }
  1352. dev_dbg(dev, "3 set of Temperatures: =====>\n");
  1353. for (i=0; i<3; i++) {
  1354. dev_dbg(dev, "temp1[%d] is: 0x%x\n", i, data->temp1[i]);
  1355. }
  1356. for (i=0; i<2; i++) {
  1357. for (j=0; j<6; j++) {
  1358. dev_dbg(dev, "temp_add[%d][%d] is: 0x%x\n", i, j,
  1359. data->temp_add[i][j]);
  1360. }
  1361. }
  1362. for (i=0; i<7; i++) {
  1363. dev_dbg(dev, "fan_div[%d] is: 0x%x\n", i, data->fan_div[i]);
  1364. }
  1365. dev_dbg(dev, "==========End of the debug message...==================\n");
  1366. dev_dbg(dev, "\n");
  1367. }
  1368. #endif
  1369. static int __init
  1370. sensors_w83792d_init(void)
  1371. {
  1372. return i2c_add_driver(&w83792d_driver);
  1373. }
  1374. static void __exit
  1375. sensors_w83792d_exit(void)
  1376. {
  1377. i2c_del_driver(&w83792d_driver);
  1378. }
  1379. MODULE_AUTHOR("Chunhao Huang @ Winbond <DZShen@Winbond.com.tw>");
  1380. MODULE_DESCRIPTION("W83792AD/D driver for linux-2.6");
  1381. MODULE_LICENSE("GPL");
  1382. module_init(sensors_w83792d_init);
  1383. module_exit(sensors_w83792d_exit);