init.c 42 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. module_param(debug_mask, uint, 0644);
  29. module_param(testmode, uint, 0644);
  30. module_param(suspend_cutpower, bool, 0444);
  31. static const struct ath6kl_hw hw_list[] = {
  32. {
  33. .id = AR6003_HW_2_0_VERSION,
  34. .name = "ar6003 hw 2.0",
  35. .dataset_patch_addr = 0x57e884,
  36. .app_load_addr = 0x543180,
  37. .board_ext_data_addr = 0x57e500,
  38. .reserved_ram_size = 6912,
  39. /* hw2.0 needs override address hardcoded */
  40. .app_start_override_addr = 0x944C00,
  41. },
  42. {
  43. .id = AR6003_HW_2_1_1_VERSION,
  44. .name = "ar6003 hw 2.1.1",
  45. .dataset_patch_addr = 0x57ff74,
  46. .app_load_addr = 0x1234,
  47. .board_ext_data_addr = 0x542330,
  48. .reserved_ram_size = 512,
  49. },
  50. {
  51. .id = AR6004_HW_1_0_VERSION,
  52. .name = "ar6004 hw 1.0",
  53. .dataset_patch_addr = 0x57e884,
  54. .app_load_addr = 0x1234,
  55. .board_ext_data_addr = 0x437000,
  56. .reserved_ram_size = 19456,
  57. .board_addr = 0x433900,
  58. },
  59. {
  60. .id = AR6004_HW_1_1_VERSION,
  61. .name = "ar6004 hw 1.1",
  62. .dataset_patch_addr = 0x57e884,
  63. .app_load_addr = 0x1234,
  64. .board_ext_data_addr = 0x437000,
  65. .reserved_ram_size = 11264,
  66. .board_addr = 0x43d400,
  67. },
  68. };
  69. /*
  70. * Include definitions here that can be used to tune the WLAN module
  71. * behavior. Different customers can tune the behavior as per their needs,
  72. * here.
  73. */
  74. /*
  75. * This configuration item enable/disable keepalive support.
  76. * Keepalive support: In the absence of any data traffic to AP, null
  77. * frames will be sent to the AP at periodic interval, to keep the association
  78. * active. This configuration item defines the periodic interval.
  79. * Use value of zero to disable keepalive support
  80. * Default: 60 seconds
  81. */
  82. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  83. /*
  84. * This configuration item sets the value of disconnect timeout
  85. * Firmware delays sending the disconnec event to the host for this
  86. * timeout after is gets disconnected from the current AP.
  87. * If the firmware successly roams within the disconnect timeout
  88. * it sends a new connect event
  89. */
  90. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  91. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  92. #define ATH6KL_DATA_OFFSET 64
  93. struct sk_buff *ath6kl_buf_alloc(int size)
  94. {
  95. struct sk_buff *skb;
  96. u16 reserved;
  97. /* Add chacheline space at front and back of buffer */
  98. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  99. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  100. skb = dev_alloc_skb(size + reserved);
  101. if (skb)
  102. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  103. return skb;
  104. }
  105. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  106. {
  107. vif->ssid_len = 0;
  108. memset(vif->ssid, 0, sizeof(vif->ssid));
  109. vif->dot11_auth_mode = OPEN_AUTH;
  110. vif->auth_mode = NONE_AUTH;
  111. vif->prwise_crypto = NONE_CRYPT;
  112. vif->prwise_crypto_len = 0;
  113. vif->grp_crypto = NONE_CRYPT;
  114. vif->grp_crypto_len = 0;
  115. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  116. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  117. memset(vif->bssid, 0, sizeof(vif->bssid));
  118. vif->bss_ch = 0;
  119. }
  120. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  121. {
  122. u32 address, data;
  123. struct host_app_area host_app_area;
  124. /* Fetch the address of the host_app_area_s
  125. * instance in the host interest area */
  126. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  127. address = TARG_VTOP(ar->target_type, address);
  128. if (ath6kl_diag_read32(ar, address, &data))
  129. return -EIO;
  130. address = TARG_VTOP(ar->target_type, data);
  131. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  132. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  133. sizeof(struct host_app_area)))
  134. return -EIO;
  135. return 0;
  136. }
  137. static inline void set_ac2_ep_map(struct ath6kl *ar,
  138. u8 ac,
  139. enum htc_endpoint_id ep)
  140. {
  141. ar->ac2ep_map[ac] = ep;
  142. ar->ep2ac_map[ep] = ac;
  143. }
  144. /* connect to a service */
  145. static int ath6kl_connectservice(struct ath6kl *ar,
  146. struct htc_service_connect_req *con_req,
  147. char *desc)
  148. {
  149. int status;
  150. struct htc_service_connect_resp response;
  151. memset(&response, 0, sizeof(response));
  152. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  153. if (status) {
  154. ath6kl_err("failed to connect to %s service status:%d\n",
  155. desc, status);
  156. return status;
  157. }
  158. switch (con_req->svc_id) {
  159. case WMI_CONTROL_SVC:
  160. if (test_bit(WMI_ENABLED, &ar->flag))
  161. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  162. ar->ctrl_ep = response.endpoint;
  163. break;
  164. case WMI_DATA_BE_SVC:
  165. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  166. break;
  167. case WMI_DATA_BK_SVC:
  168. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  169. break;
  170. case WMI_DATA_VI_SVC:
  171. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  172. break;
  173. case WMI_DATA_VO_SVC:
  174. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  175. break;
  176. default:
  177. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  178. return -EINVAL;
  179. }
  180. return 0;
  181. }
  182. static int ath6kl_init_service_ep(struct ath6kl *ar)
  183. {
  184. struct htc_service_connect_req connect;
  185. memset(&connect, 0, sizeof(connect));
  186. /* these fields are the same for all service endpoints */
  187. connect.ep_cb.rx = ath6kl_rx;
  188. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  189. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  190. /*
  191. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  192. * gets called.
  193. */
  194. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  195. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  196. if (!connect.ep_cb.rx_refill_thresh)
  197. connect.ep_cb.rx_refill_thresh++;
  198. /* connect to control service */
  199. connect.svc_id = WMI_CONTROL_SVC;
  200. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  201. return -EIO;
  202. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  203. /*
  204. * Limit the HTC message size on the send path, although e can
  205. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  206. * (802.3) frames on the send path.
  207. */
  208. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  209. /*
  210. * To reduce the amount of committed memory for larger A_MSDU
  211. * frames, use the recv-alloc threshold mechanism for larger
  212. * packets.
  213. */
  214. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  215. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  216. /*
  217. * For the remaining data services set the connection flag to
  218. * reduce dribbling, if configured to do so.
  219. */
  220. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  221. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  222. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  223. connect.svc_id = WMI_DATA_BE_SVC;
  224. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  225. return -EIO;
  226. /* connect to back-ground map this to WMI LOW_PRI */
  227. connect.svc_id = WMI_DATA_BK_SVC;
  228. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  229. return -EIO;
  230. /* connect to Video service, map this to to HI PRI */
  231. connect.svc_id = WMI_DATA_VI_SVC;
  232. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  233. return -EIO;
  234. /*
  235. * Connect to VO service, this is currently not mapped to a WMI
  236. * priority stream due to historical reasons. WMI originally
  237. * defined 3 priorities over 3 mailboxes We can change this when
  238. * WMI is reworked so that priorities are not dependent on
  239. * mailboxes.
  240. */
  241. connect.svc_id = WMI_DATA_VO_SVC;
  242. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  243. return -EIO;
  244. return 0;
  245. }
  246. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  247. {
  248. ath6kl_init_profile_info(vif);
  249. vif->def_txkey_index = 0;
  250. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  251. vif->ch_hint = 0;
  252. }
  253. /*
  254. * Set HTC/Mbox operational parameters, this can only be called when the
  255. * target is in the BMI phase.
  256. */
  257. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  258. u8 htc_ctrl_buf)
  259. {
  260. int status;
  261. u32 blk_size;
  262. blk_size = ar->mbox_info.block_size;
  263. if (htc_ctrl_buf)
  264. blk_size |= ((u32)htc_ctrl_buf) << 16;
  265. /* set the host interest area for the block size */
  266. status = ath6kl_bmi_write(ar,
  267. ath6kl_get_hi_item_addr(ar,
  268. HI_ITEM(hi_mbox_io_block_sz)),
  269. (u8 *)&blk_size,
  270. 4);
  271. if (status) {
  272. ath6kl_err("bmi_write_memory for IO block size failed\n");
  273. goto out;
  274. }
  275. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  276. blk_size,
  277. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  278. if (mbox_isr_yield_val) {
  279. /* set the host interest area for the mbox ISR yield limit */
  280. status = ath6kl_bmi_write(ar,
  281. ath6kl_get_hi_item_addr(ar,
  282. HI_ITEM(hi_mbox_isr_yield_limit)),
  283. (u8 *)&mbox_isr_yield_val,
  284. 4);
  285. if (status) {
  286. ath6kl_err("bmi_write_memory for yield limit failed\n");
  287. goto out;
  288. }
  289. }
  290. out:
  291. return status;
  292. }
  293. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  294. {
  295. int status = 0;
  296. int ret;
  297. /*
  298. * Configure the device for rx dot11 header rules. "0,0" are the
  299. * default values. Required if checksum offload is needed. Set
  300. * RxMetaVersion to 2.
  301. */
  302. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  303. ar->rx_meta_ver, 0, 0)) {
  304. ath6kl_err("unable to set the rx frame format\n");
  305. status = -EIO;
  306. }
  307. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  308. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  309. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  310. ath6kl_err("unable to set power save fail event policy\n");
  311. status = -EIO;
  312. }
  313. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  314. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  315. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  316. ath6kl_err("unable to set barker preamble policy\n");
  317. status = -EIO;
  318. }
  319. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  320. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  321. ath6kl_err("unable to set keep alive interval\n");
  322. status = -EIO;
  323. }
  324. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  325. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  326. ath6kl_err("unable to set disconnect timeout\n");
  327. status = -EIO;
  328. }
  329. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  330. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  331. ath6kl_err("unable to set txop bursting\n");
  332. status = -EIO;
  333. }
  334. /*
  335. * FIXME: Make sure p2p configurations are not applied to
  336. * non-p2p capable interfaces when multivif support is enabled.
  337. */
  338. if (ar->p2p) {
  339. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  340. P2P_FLAG_CAPABILITIES_REQ |
  341. P2P_FLAG_MACADDR_REQ |
  342. P2P_FLAG_HMODEL_REQ);
  343. if (ret) {
  344. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  345. "capabilities (%d) - assuming P2P not "
  346. "supported\n", ret);
  347. ar->p2p = 0;
  348. }
  349. }
  350. /*
  351. * FIXME: Make sure p2p configurations are not applied to
  352. * non-p2p capable interfaces when multivif support is enabled.
  353. */
  354. if (ar->p2p) {
  355. /* Enable Probe Request reporting for P2P */
  356. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  357. if (ret) {
  358. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  359. "Request reporting (%d)\n", ret);
  360. }
  361. }
  362. return status;
  363. }
  364. int ath6kl_configure_target(struct ath6kl *ar)
  365. {
  366. u32 param, ram_reserved_size;
  367. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  368. int i;
  369. /*
  370. * Note: Even though the firmware interface type is
  371. * chosen as BSS_STA for all three interfaces, can
  372. * be configured to IBSS/AP as long as the fw submode
  373. * remains normal mode (0 - AP, STA and IBSS). But
  374. * due to an target assert in firmware only one interface is
  375. * configured for now.
  376. */
  377. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  378. for (i = 0; i < MAX_NUM_VIF; i++)
  379. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  380. /*
  381. * By default, submodes :
  382. * vif[0] - AP/STA/IBSS
  383. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  384. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  385. */
  386. for (i = 0; i < ar->max_norm_iface; i++)
  387. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  388. (i * HI_OPTION_FW_SUBMODE_BITS);
  389. for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
  390. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  391. (i * HI_OPTION_FW_SUBMODE_BITS);
  392. /*
  393. * FIXME: This needs to be removed once the multivif
  394. * support is enabled.
  395. */
  396. if (ar->p2p)
  397. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  398. param = HTC_PROTOCOL_VERSION;
  399. if (ath6kl_bmi_write(ar,
  400. ath6kl_get_hi_item_addr(ar,
  401. HI_ITEM(hi_app_host_interest)),
  402. (u8 *)&param, 4) != 0) {
  403. ath6kl_err("bmi_write_memory for htc version failed\n");
  404. return -EIO;
  405. }
  406. /* set the firmware mode to STA/IBSS/AP */
  407. param = 0;
  408. if (ath6kl_bmi_read(ar,
  409. ath6kl_get_hi_item_addr(ar,
  410. HI_ITEM(hi_option_flag)),
  411. (u8 *)&param, 4) != 0) {
  412. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  413. return -EIO;
  414. }
  415. param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
  416. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  417. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  418. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  419. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  420. if (ath6kl_bmi_write(ar,
  421. ath6kl_get_hi_item_addr(ar,
  422. HI_ITEM(hi_option_flag)),
  423. (u8 *)&param,
  424. 4) != 0) {
  425. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  426. return -EIO;
  427. }
  428. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  429. /*
  430. * Hardcode the address use for the extended board data
  431. * Ideally this should be pre-allocate by the OS at boot time
  432. * But since it is a new feature and board data is loaded
  433. * at init time, we have to workaround this from host.
  434. * It is difficult to patch the firmware boot code,
  435. * but possible in theory.
  436. */
  437. param = ar->hw.board_ext_data_addr;
  438. ram_reserved_size = ar->hw.reserved_ram_size;
  439. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  440. HI_ITEM(hi_board_ext_data)),
  441. (u8 *)&param, 4) != 0) {
  442. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  443. return -EIO;
  444. }
  445. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  446. HI_ITEM(hi_end_ram_reserve_sz)),
  447. (u8 *)&ram_reserved_size, 4) != 0) {
  448. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  449. return -EIO;
  450. }
  451. /* set the block size for the target */
  452. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  453. /* use default number of control buffers */
  454. return -EIO;
  455. return 0;
  456. }
  457. void ath6kl_core_free(struct ath6kl *ar)
  458. {
  459. wiphy_free(ar->wiphy);
  460. }
  461. void ath6kl_core_cleanup(struct ath6kl *ar)
  462. {
  463. ath6kl_hif_power_off(ar);
  464. destroy_workqueue(ar->ath6kl_wq);
  465. if (ar->htc_target)
  466. ath6kl_htc_cleanup(ar->htc_target);
  467. ath6kl_cookie_cleanup(ar);
  468. ath6kl_cleanup_amsdu_rxbufs(ar);
  469. ath6kl_bmi_cleanup(ar);
  470. ath6kl_debug_cleanup(ar);
  471. kfree(ar->fw_board);
  472. kfree(ar->fw_otp);
  473. kfree(ar->fw);
  474. kfree(ar->fw_patch);
  475. ath6kl_deinit_ieee80211_hw(ar);
  476. }
  477. /* firmware upload */
  478. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  479. u8 **fw, size_t *fw_len)
  480. {
  481. const struct firmware *fw_entry;
  482. int ret;
  483. ret = request_firmware(&fw_entry, filename, ar->dev);
  484. if (ret)
  485. return ret;
  486. *fw_len = fw_entry->size;
  487. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  488. if (*fw == NULL)
  489. ret = -ENOMEM;
  490. release_firmware(fw_entry);
  491. return ret;
  492. }
  493. #ifdef CONFIG_OF
  494. static const char *get_target_ver_dir(const struct ath6kl *ar)
  495. {
  496. switch (ar->version.target_ver) {
  497. case AR6003_HW_1_0_VERSION:
  498. return "ath6k/AR6003/hw1.0";
  499. case AR6003_HW_2_0_VERSION:
  500. return "ath6k/AR6003/hw2.0";
  501. case AR6003_HW_2_1_1_VERSION:
  502. return "ath6k/AR6003/hw2.1.1";
  503. }
  504. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  505. ar->version.target_ver);
  506. return NULL;
  507. }
  508. /*
  509. * Check the device tree for a board-id and use it to construct
  510. * the pathname to the firmware file. Used (for now) to find a
  511. * fallback to the "bdata.bin" file--typically a symlink to the
  512. * appropriate board-specific file.
  513. */
  514. static bool check_device_tree(struct ath6kl *ar)
  515. {
  516. static const char *board_id_prop = "atheros,board-id";
  517. struct device_node *node;
  518. char board_filename[64];
  519. const char *board_id;
  520. int ret;
  521. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  522. board_id = of_get_property(node, board_id_prop, NULL);
  523. if (board_id == NULL) {
  524. ath6kl_warn("No \"%s\" property on %s node.\n",
  525. board_id_prop, node->name);
  526. continue;
  527. }
  528. snprintf(board_filename, sizeof(board_filename),
  529. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  530. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  531. &ar->fw_board_len);
  532. if (ret) {
  533. ath6kl_err("Failed to get DT board file %s: %d\n",
  534. board_filename, ret);
  535. continue;
  536. }
  537. return true;
  538. }
  539. return false;
  540. }
  541. #else
  542. static bool check_device_tree(struct ath6kl *ar)
  543. {
  544. return false;
  545. }
  546. #endif /* CONFIG_OF */
  547. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  548. {
  549. const char *filename;
  550. int ret;
  551. if (ar->fw_board != NULL)
  552. return 0;
  553. switch (ar->version.target_ver) {
  554. case AR6003_HW_2_0_VERSION:
  555. filename = AR6003_HW_2_0_BOARD_DATA_FILE;
  556. break;
  557. case AR6004_HW_1_0_VERSION:
  558. filename = AR6004_HW_1_0_BOARD_DATA_FILE;
  559. break;
  560. default:
  561. filename = AR6003_HW_2_1_1_BOARD_DATA_FILE;
  562. break;
  563. }
  564. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  565. &ar->fw_board_len);
  566. if (ret == 0) {
  567. /* managed to get proper board file */
  568. return 0;
  569. }
  570. if (check_device_tree(ar)) {
  571. /* got board file from device tree */
  572. return 0;
  573. }
  574. /* there was no proper board file, try to use default instead */
  575. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  576. filename, ret);
  577. switch (ar->version.target_ver) {
  578. case AR6003_HW_2_0_VERSION:
  579. filename = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE;
  580. break;
  581. case AR6004_HW_1_0_VERSION:
  582. filename = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE;
  583. break;
  584. default:
  585. filename = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE;
  586. break;
  587. }
  588. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  589. &ar->fw_board_len);
  590. if (ret) {
  591. ath6kl_err("Failed to get default board file %s: %d\n",
  592. filename, ret);
  593. return ret;
  594. }
  595. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  596. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  597. return 0;
  598. }
  599. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  600. {
  601. const char *filename;
  602. int ret;
  603. if (ar->fw_otp != NULL)
  604. return 0;
  605. switch (ar->version.target_ver) {
  606. case AR6003_HW_2_0_VERSION:
  607. filename = AR6003_HW_2_0_OTP_FILE;
  608. break;
  609. case AR6004_HW_1_0_VERSION:
  610. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  611. return 0;
  612. break;
  613. default:
  614. filename = AR6003_HW_2_1_1_OTP_FILE;
  615. break;
  616. }
  617. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  618. &ar->fw_otp_len);
  619. if (ret) {
  620. ath6kl_err("Failed to get OTP file %s: %d\n",
  621. filename, ret);
  622. return ret;
  623. }
  624. return 0;
  625. }
  626. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  627. {
  628. const char *filename;
  629. int ret;
  630. if (ar->fw != NULL)
  631. return 0;
  632. if (testmode) {
  633. switch (ar->version.target_ver) {
  634. case AR6003_HW_2_0_VERSION:
  635. filename = AR6003_HW_2_0_TCMD_FIRMWARE_FILE;
  636. break;
  637. case AR6003_HW_2_1_1_VERSION:
  638. filename = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE;
  639. break;
  640. case AR6004_HW_1_0_VERSION:
  641. ath6kl_warn("testmode not supported with ar6004\n");
  642. return -EOPNOTSUPP;
  643. default:
  644. ath6kl_warn("unknown target version: 0x%x\n",
  645. ar->version.target_ver);
  646. return -EINVAL;
  647. }
  648. set_bit(TESTMODE, &ar->flag);
  649. goto get_fw;
  650. }
  651. switch (ar->version.target_ver) {
  652. case AR6003_HW_2_0_VERSION:
  653. filename = AR6003_HW_2_0_FIRMWARE_FILE;
  654. break;
  655. case AR6004_HW_1_0_VERSION:
  656. filename = AR6004_HW_1_0_FIRMWARE_FILE;
  657. break;
  658. default:
  659. filename = AR6003_HW_2_1_1_FIRMWARE_FILE;
  660. break;
  661. }
  662. get_fw:
  663. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  664. if (ret) {
  665. ath6kl_err("Failed to get firmware file %s: %d\n",
  666. filename, ret);
  667. return ret;
  668. }
  669. return 0;
  670. }
  671. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  672. {
  673. const char *filename;
  674. int ret;
  675. switch (ar->version.target_ver) {
  676. case AR6003_HW_2_0_VERSION:
  677. filename = AR6003_HW_2_0_PATCH_FILE;
  678. break;
  679. case AR6004_HW_1_0_VERSION:
  680. /* FIXME: implement for AR6004 */
  681. return 0;
  682. break;
  683. default:
  684. filename = AR6003_HW_2_1_1_PATCH_FILE;
  685. break;
  686. }
  687. if (ar->fw_patch == NULL) {
  688. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  689. &ar->fw_patch_len);
  690. if (ret) {
  691. ath6kl_err("Failed to get patch file %s: %d\n",
  692. filename, ret);
  693. return ret;
  694. }
  695. }
  696. return 0;
  697. }
  698. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  699. {
  700. int ret;
  701. ret = ath6kl_fetch_otp_file(ar);
  702. if (ret)
  703. return ret;
  704. ret = ath6kl_fetch_fw_file(ar);
  705. if (ret)
  706. return ret;
  707. ret = ath6kl_fetch_patch_file(ar);
  708. if (ret)
  709. return ret;
  710. return 0;
  711. }
  712. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  713. {
  714. size_t magic_len, len, ie_len;
  715. const struct firmware *fw;
  716. struct ath6kl_fw_ie *hdr;
  717. const char *filename;
  718. const u8 *data;
  719. int ret, ie_id, i, index, bit;
  720. __le32 *val;
  721. switch (ar->version.target_ver) {
  722. case AR6003_HW_2_0_VERSION:
  723. filename = AR6003_HW_2_0_FIRMWARE_2_FILE;
  724. break;
  725. case AR6003_HW_2_1_1_VERSION:
  726. filename = AR6003_HW_2_1_1_FIRMWARE_2_FILE;
  727. break;
  728. case AR6004_HW_1_0_VERSION:
  729. filename = AR6004_HW_1_0_FIRMWARE_2_FILE;
  730. break;
  731. case AR6004_HW_1_1_VERSION:
  732. filename = AR6004_HW_1_1_FIRMWARE_2_FILE;
  733. break;
  734. default:
  735. return -EOPNOTSUPP;
  736. }
  737. ret = request_firmware(&fw, filename, ar->dev);
  738. if (ret)
  739. return ret;
  740. data = fw->data;
  741. len = fw->size;
  742. /* magic also includes the null byte, check that as well */
  743. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  744. if (len < magic_len) {
  745. ret = -EINVAL;
  746. goto out;
  747. }
  748. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  749. ret = -EINVAL;
  750. goto out;
  751. }
  752. len -= magic_len;
  753. data += magic_len;
  754. /* loop elements */
  755. while (len > sizeof(struct ath6kl_fw_ie)) {
  756. /* hdr is unaligned! */
  757. hdr = (struct ath6kl_fw_ie *) data;
  758. ie_id = le32_to_cpup(&hdr->id);
  759. ie_len = le32_to_cpup(&hdr->len);
  760. len -= sizeof(*hdr);
  761. data += sizeof(*hdr);
  762. if (len < ie_len) {
  763. ret = -EINVAL;
  764. goto out;
  765. }
  766. switch (ie_id) {
  767. case ATH6KL_FW_IE_OTP_IMAGE:
  768. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  769. ie_len);
  770. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  771. if (ar->fw_otp == NULL) {
  772. ret = -ENOMEM;
  773. goto out;
  774. }
  775. ar->fw_otp_len = ie_len;
  776. break;
  777. case ATH6KL_FW_IE_FW_IMAGE:
  778. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  779. ie_len);
  780. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  781. if (ar->fw == NULL) {
  782. ret = -ENOMEM;
  783. goto out;
  784. }
  785. ar->fw_len = ie_len;
  786. break;
  787. case ATH6KL_FW_IE_PATCH_IMAGE:
  788. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  789. ie_len);
  790. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  791. if (ar->fw_patch == NULL) {
  792. ret = -ENOMEM;
  793. goto out;
  794. }
  795. ar->fw_patch_len = ie_len;
  796. break;
  797. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  798. val = (__le32 *) data;
  799. ar->hw.reserved_ram_size = le32_to_cpup(val);
  800. ath6kl_dbg(ATH6KL_DBG_BOOT,
  801. "found reserved ram size ie 0x%d\n",
  802. ar->hw.reserved_ram_size);
  803. break;
  804. case ATH6KL_FW_IE_CAPABILITIES:
  805. ath6kl_dbg(ATH6KL_DBG_BOOT,
  806. "found firmware capabilities ie (%zd B)\n",
  807. ie_len);
  808. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  809. index = ALIGN(i, 8) / 8;
  810. bit = i % 8;
  811. if (data[index] & (1 << bit))
  812. __set_bit(i, ar->fw_capabilities);
  813. }
  814. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  815. ar->fw_capabilities,
  816. sizeof(ar->fw_capabilities));
  817. break;
  818. case ATH6KL_FW_IE_PATCH_ADDR:
  819. if (ie_len != sizeof(*val))
  820. break;
  821. val = (__le32 *) data;
  822. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  823. ath6kl_dbg(ATH6KL_DBG_BOOT,
  824. "found patch address ie 0x%x\n",
  825. ar->hw.dataset_patch_addr);
  826. break;
  827. case ATH6KL_FW_IE_BOARD_ADDR:
  828. if (ie_len != sizeof(*val))
  829. break;
  830. val = (__le32 *) data;
  831. ar->hw.board_addr = le32_to_cpup(val);
  832. ath6kl_dbg(ATH6KL_DBG_BOOT,
  833. "found board address ie 0x%x\n",
  834. ar->hw.board_addr);
  835. break;
  836. default:
  837. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  838. le32_to_cpup(&hdr->id));
  839. break;
  840. }
  841. len -= ie_len;
  842. data += ie_len;
  843. };
  844. ret = 0;
  845. out:
  846. release_firmware(fw);
  847. return ret;
  848. }
  849. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  850. {
  851. int ret;
  852. ret = ath6kl_fetch_board_file(ar);
  853. if (ret)
  854. return ret;
  855. ret = ath6kl_fetch_fw_api2(ar);
  856. if (ret == 0) {
  857. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  858. return 0;
  859. }
  860. ret = ath6kl_fetch_fw_api1(ar);
  861. if (ret)
  862. return ret;
  863. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  864. return 0;
  865. }
  866. static int ath6kl_upload_board_file(struct ath6kl *ar)
  867. {
  868. u32 board_address, board_ext_address, param;
  869. u32 board_data_size, board_ext_data_size;
  870. int ret;
  871. if (WARN_ON(ar->fw_board == NULL))
  872. return -ENOENT;
  873. /*
  874. * Determine where in Target RAM to write Board Data.
  875. * For AR6004, host determine Target RAM address for
  876. * writing board data.
  877. */
  878. if (ar->hw.board_addr != 0) {
  879. board_address = ar->hw.board_addr;
  880. ath6kl_bmi_write(ar,
  881. ath6kl_get_hi_item_addr(ar,
  882. HI_ITEM(hi_board_data)),
  883. (u8 *) &board_address, 4);
  884. } else {
  885. ath6kl_bmi_read(ar,
  886. ath6kl_get_hi_item_addr(ar,
  887. HI_ITEM(hi_board_data)),
  888. (u8 *) &board_address, 4);
  889. }
  890. /* determine where in target ram to write extended board data */
  891. ath6kl_bmi_read(ar,
  892. ath6kl_get_hi_item_addr(ar,
  893. HI_ITEM(hi_board_ext_data)),
  894. (u8 *) &board_ext_address, 4);
  895. if (ar->target_type == TARGET_TYPE_AR6003 &&
  896. board_ext_address == 0) {
  897. ath6kl_err("Failed to get board file target address.\n");
  898. return -EINVAL;
  899. }
  900. switch (ar->target_type) {
  901. case TARGET_TYPE_AR6003:
  902. board_data_size = AR6003_BOARD_DATA_SZ;
  903. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  904. break;
  905. case TARGET_TYPE_AR6004:
  906. board_data_size = AR6004_BOARD_DATA_SZ;
  907. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  908. break;
  909. default:
  910. WARN_ON(1);
  911. return -EINVAL;
  912. break;
  913. }
  914. if (board_ext_address &&
  915. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  916. /* write extended board data */
  917. ath6kl_dbg(ATH6KL_DBG_BOOT,
  918. "writing extended board data to 0x%x (%d B)\n",
  919. board_ext_address, board_ext_data_size);
  920. ret = ath6kl_bmi_write(ar, board_ext_address,
  921. ar->fw_board + board_data_size,
  922. board_ext_data_size);
  923. if (ret) {
  924. ath6kl_err("Failed to write extended board data: %d\n",
  925. ret);
  926. return ret;
  927. }
  928. /* record that extended board data is initialized */
  929. param = (board_ext_data_size << 16) | 1;
  930. ath6kl_bmi_write(ar,
  931. ath6kl_get_hi_item_addr(ar,
  932. HI_ITEM(hi_board_ext_data_config)),
  933. (unsigned char *) &param, 4);
  934. }
  935. if (ar->fw_board_len < board_data_size) {
  936. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  937. ret = -EINVAL;
  938. return ret;
  939. }
  940. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  941. board_address, board_data_size);
  942. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  943. board_data_size);
  944. if (ret) {
  945. ath6kl_err("Board file bmi write failed: %d\n", ret);
  946. return ret;
  947. }
  948. /* record the fact that Board Data IS initialized */
  949. param = 1;
  950. ath6kl_bmi_write(ar,
  951. ath6kl_get_hi_item_addr(ar,
  952. HI_ITEM(hi_board_data_initialized)),
  953. (u8 *)&param, 4);
  954. return ret;
  955. }
  956. static int ath6kl_upload_otp(struct ath6kl *ar)
  957. {
  958. u32 address, param;
  959. bool from_hw = false;
  960. int ret;
  961. if (ar->fw_otp == NULL)
  962. return 0;
  963. address = ar->hw.app_load_addr;
  964. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  965. ar->fw_otp_len);
  966. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  967. ar->fw_otp_len);
  968. if (ret) {
  969. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  970. return ret;
  971. }
  972. /* read firmware start address */
  973. ret = ath6kl_bmi_read(ar,
  974. ath6kl_get_hi_item_addr(ar,
  975. HI_ITEM(hi_app_start)),
  976. (u8 *) &address, sizeof(address));
  977. if (ret) {
  978. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  979. return ret;
  980. }
  981. if (ar->hw.app_start_override_addr == 0) {
  982. ar->hw.app_start_override_addr = address;
  983. from_hw = true;
  984. }
  985. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  986. from_hw ? " (from hw)" : "",
  987. ar->hw.app_start_override_addr);
  988. /* execute the OTP code */
  989. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  990. ar->hw.app_start_override_addr);
  991. param = 0;
  992. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  993. return ret;
  994. }
  995. static int ath6kl_upload_firmware(struct ath6kl *ar)
  996. {
  997. u32 address;
  998. int ret;
  999. if (WARN_ON(ar->fw == NULL))
  1000. return 0;
  1001. address = ar->hw.app_load_addr;
  1002. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  1003. address, ar->fw_len);
  1004. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  1005. if (ret) {
  1006. ath6kl_err("Failed to write firmware: %d\n", ret);
  1007. return ret;
  1008. }
  1009. /*
  1010. * Set starting address for firmware
  1011. * Don't need to setup app_start override addr on AR6004
  1012. */
  1013. if (ar->target_type != TARGET_TYPE_AR6004) {
  1014. address = ar->hw.app_start_override_addr;
  1015. ath6kl_bmi_set_app_start(ar, address);
  1016. }
  1017. return ret;
  1018. }
  1019. static int ath6kl_upload_patch(struct ath6kl *ar)
  1020. {
  1021. u32 address, param;
  1022. int ret;
  1023. if (ar->fw_patch == NULL)
  1024. return 0;
  1025. address = ar->hw.dataset_patch_addr;
  1026. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1027. address, ar->fw_patch_len);
  1028. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1029. if (ret) {
  1030. ath6kl_err("Failed to write patch file: %d\n", ret);
  1031. return ret;
  1032. }
  1033. param = address;
  1034. ath6kl_bmi_write(ar,
  1035. ath6kl_get_hi_item_addr(ar,
  1036. HI_ITEM(hi_dset_list_head)),
  1037. (unsigned char *) &param, 4);
  1038. return 0;
  1039. }
  1040. static int ath6kl_init_upload(struct ath6kl *ar)
  1041. {
  1042. u32 param, options, sleep, address;
  1043. int status = 0;
  1044. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1045. ar->target_type != TARGET_TYPE_AR6004)
  1046. return -EINVAL;
  1047. /* temporarily disable system sleep */
  1048. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1049. status = ath6kl_bmi_reg_read(ar, address, &param);
  1050. if (status)
  1051. return status;
  1052. options = param;
  1053. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1054. status = ath6kl_bmi_reg_write(ar, address, param);
  1055. if (status)
  1056. return status;
  1057. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1058. status = ath6kl_bmi_reg_read(ar, address, &param);
  1059. if (status)
  1060. return status;
  1061. sleep = param;
  1062. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1063. status = ath6kl_bmi_reg_write(ar, address, param);
  1064. if (status)
  1065. return status;
  1066. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1067. options, sleep);
  1068. /* program analog PLL register */
  1069. /* no need to control 40/44MHz clock on AR6004 */
  1070. if (ar->target_type != TARGET_TYPE_AR6004) {
  1071. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1072. 0xF9104001);
  1073. if (status)
  1074. return status;
  1075. /* Run at 80/88MHz by default */
  1076. param = SM(CPU_CLOCK_STANDARD, 1);
  1077. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1078. status = ath6kl_bmi_reg_write(ar, address, param);
  1079. if (status)
  1080. return status;
  1081. }
  1082. param = 0;
  1083. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1084. param = SM(LPO_CAL_ENABLE, 1);
  1085. status = ath6kl_bmi_reg_write(ar, address, param);
  1086. if (status)
  1087. return status;
  1088. /* WAR to avoid SDIO CRC err */
  1089. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1090. ath6kl_err("temporary war to avoid sdio crc error\n");
  1091. param = 0x20;
  1092. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1093. status = ath6kl_bmi_reg_write(ar, address, param);
  1094. if (status)
  1095. return status;
  1096. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1097. status = ath6kl_bmi_reg_write(ar, address, param);
  1098. if (status)
  1099. return status;
  1100. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1101. status = ath6kl_bmi_reg_write(ar, address, param);
  1102. if (status)
  1103. return status;
  1104. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1105. status = ath6kl_bmi_reg_write(ar, address, param);
  1106. if (status)
  1107. return status;
  1108. }
  1109. /* write EEPROM data to Target RAM */
  1110. status = ath6kl_upload_board_file(ar);
  1111. if (status)
  1112. return status;
  1113. /* transfer One time Programmable data */
  1114. status = ath6kl_upload_otp(ar);
  1115. if (status)
  1116. return status;
  1117. /* Download Target firmware */
  1118. status = ath6kl_upload_firmware(ar);
  1119. if (status)
  1120. return status;
  1121. status = ath6kl_upload_patch(ar);
  1122. if (status)
  1123. return status;
  1124. /* Restore system sleep */
  1125. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1126. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1127. if (status)
  1128. return status;
  1129. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1130. param = options | 0x20;
  1131. status = ath6kl_bmi_reg_write(ar, address, param);
  1132. if (status)
  1133. return status;
  1134. /* Configure GPIO AR6003 UART */
  1135. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1136. status = ath6kl_bmi_write(ar,
  1137. ath6kl_get_hi_item_addr(ar,
  1138. HI_ITEM(hi_dbg_uart_txpin)),
  1139. (u8 *)&param, 4);
  1140. return status;
  1141. }
  1142. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1143. {
  1144. const struct ath6kl_hw *hw;
  1145. int i;
  1146. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1147. hw = &hw_list[i];
  1148. if (hw->id == ar->version.target_ver)
  1149. break;
  1150. }
  1151. if (i == ARRAY_SIZE(hw_list)) {
  1152. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1153. ar->version.target_ver);
  1154. return -EINVAL;
  1155. }
  1156. ar->hw = *hw;
  1157. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1158. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1159. ar->version.target_ver, ar->target_type,
  1160. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1161. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1162. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1163. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1164. ar->hw.reserved_ram_size);
  1165. return 0;
  1166. }
  1167. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1168. {
  1169. switch (type) {
  1170. case ATH6KL_HIF_TYPE_SDIO:
  1171. return "sdio";
  1172. case ATH6KL_HIF_TYPE_USB:
  1173. return "usb";
  1174. }
  1175. return NULL;
  1176. }
  1177. int ath6kl_init_hw_start(struct ath6kl *ar)
  1178. {
  1179. long timeleft;
  1180. int ret, i;
  1181. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1182. ret = ath6kl_hif_power_on(ar);
  1183. if (ret)
  1184. return ret;
  1185. ret = ath6kl_configure_target(ar);
  1186. if (ret)
  1187. goto err_power_off;
  1188. ret = ath6kl_init_upload(ar);
  1189. if (ret)
  1190. goto err_power_off;
  1191. /* Do we need to finish the BMI phase */
  1192. /* FIXME: return error from ath6kl_bmi_done() */
  1193. if (ath6kl_bmi_done(ar)) {
  1194. ret = -EIO;
  1195. goto err_power_off;
  1196. }
  1197. /*
  1198. * The reason we have to wait for the target here is that the
  1199. * driver layer has to init BMI in order to set the host block
  1200. * size.
  1201. */
  1202. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1203. ret = -EIO;
  1204. goto err_power_off;
  1205. }
  1206. if (ath6kl_init_service_ep(ar)) {
  1207. ret = -EIO;
  1208. goto err_cleanup_scatter;
  1209. }
  1210. /* setup credit distribution */
  1211. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1212. /* start HTC */
  1213. ret = ath6kl_htc_start(ar->htc_target);
  1214. if (ret) {
  1215. /* FIXME: call this */
  1216. ath6kl_cookie_cleanup(ar);
  1217. goto err_cleanup_scatter;
  1218. }
  1219. /* Wait for Wmi event to be ready */
  1220. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1221. test_bit(WMI_READY,
  1222. &ar->flag),
  1223. WMI_TIMEOUT);
  1224. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1225. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1226. ath6kl_info("%s %s fw %s%s\n",
  1227. ar->hw.name,
  1228. ath6kl_init_get_hif_name(ar->hif_type),
  1229. ar->wiphy->fw_version,
  1230. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1231. }
  1232. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1233. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1234. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1235. ret = -EIO;
  1236. goto err_htc_stop;
  1237. }
  1238. if (!timeleft || signal_pending(current)) {
  1239. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1240. ret = -EIO;
  1241. goto err_htc_stop;
  1242. }
  1243. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1244. /* communicate the wmi protocol verision to the target */
  1245. /* FIXME: return error */
  1246. if ((ath6kl_set_host_app_area(ar)) != 0)
  1247. ath6kl_err("unable to set the host app area\n");
  1248. for (i = 0; i < MAX_NUM_VIF; i++) {
  1249. ret = ath6kl_target_config_wlan_params(ar, i);
  1250. if (ret)
  1251. goto err_htc_stop;
  1252. }
  1253. ar->state = ATH6KL_STATE_ON;
  1254. return 0;
  1255. err_htc_stop:
  1256. ath6kl_htc_stop(ar->htc_target);
  1257. err_cleanup_scatter:
  1258. ath6kl_hif_cleanup_scatter(ar);
  1259. err_power_off:
  1260. ath6kl_hif_power_off(ar);
  1261. return ret;
  1262. }
  1263. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1264. {
  1265. int ret;
  1266. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1267. ath6kl_htc_stop(ar->htc_target);
  1268. ath6kl_hif_stop(ar);
  1269. ath6kl_bmi_reset(ar);
  1270. ret = ath6kl_hif_power_off(ar);
  1271. if (ret)
  1272. ath6kl_warn("failed to power off hif: %d\n", ret);
  1273. ar->state = ATH6KL_STATE_OFF;
  1274. return 0;
  1275. }
  1276. int ath6kl_core_init(struct ath6kl *ar)
  1277. {
  1278. struct ath6kl_bmi_target_info targ_info;
  1279. struct net_device *ndev;
  1280. int ret = 0, i;
  1281. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1282. if (!ar->ath6kl_wq)
  1283. return -ENOMEM;
  1284. ret = ath6kl_bmi_init(ar);
  1285. if (ret)
  1286. goto err_wq;
  1287. /*
  1288. * Turn on power to get hardware (target) version and leave power
  1289. * on delibrately as we will boot the hardware anyway within few
  1290. * seconds.
  1291. */
  1292. ret = ath6kl_hif_power_on(ar);
  1293. if (ret)
  1294. goto err_bmi_cleanup;
  1295. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1296. if (ret)
  1297. goto err_power_off;
  1298. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1299. ar->target_type = le32_to_cpu(targ_info.type);
  1300. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1301. ret = ath6kl_init_hw_params(ar);
  1302. if (ret)
  1303. goto err_power_off;
  1304. ar->htc_target = ath6kl_htc_create(ar);
  1305. if (!ar->htc_target) {
  1306. ret = -ENOMEM;
  1307. goto err_power_off;
  1308. }
  1309. ret = ath6kl_fetch_firmwares(ar);
  1310. if (ret)
  1311. goto err_htc_cleanup;
  1312. /* FIXME: we should free all firmwares in the error cases below */
  1313. /* Indicate that WMI is enabled (although not ready yet) */
  1314. set_bit(WMI_ENABLED, &ar->flag);
  1315. ar->wmi = ath6kl_wmi_init(ar);
  1316. if (!ar->wmi) {
  1317. ath6kl_err("failed to initialize wmi\n");
  1318. ret = -EIO;
  1319. goto err_htc_cleanup;
  1320. }
  1321. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1322. ret = ath6kl_register_ieee80211_hw(ar);
  1323. if (ret)
  1324. goto err_node_cleanup;
  1325. ret = ath6kl_debug_init(ar);
  1326. if (ret) {
  1327. wiphy_unregister(ar->wiphy);
  1328. goto err_node_cleanup;
  1329. }
  1330. for (i = 0; i < MAX_NUM_VIF; i++)
  1331. ar->avail_idx_map |= BIT(i);
  1332. rtnl_lock();
  1333. /* Add an initial station interface */
  1334. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1335. INFRA_NETWORK);
  1336. rtnl_unlock();
  1337. if (!ndev) {
  1338. ath6kl_err("Failed to instantiate a network device\n");
  1339. ret = -ENOMEM;
  1340. wiphy_unregister(ar->wiphy);
  1341. goto err_debug_init;
  1342. }
  1343. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1344. __func__, ndev->name, ndev, ar);
  1345. /* setup access class priority mappings */
  1346. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1347. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1348. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1349. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1350. /* give our connected endpoints some buffers */
  1351. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1352. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1353. /* allocate some buffers that handle larger AMSDU frames */
  1354. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1355. ath6kl_cookie_init(ar);
  1356. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1357. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1358. if (suspend_cutpower)
  1359. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1360. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1361. WIPHY_FLAG_HAVE_AP_SME;
  1362. set_bit(FIRST_BOOT, &ar->flag);
  1363. ret = ath6kl_init_hw_start(ar);
  1364. if (ret) {
  1365. ath6kl_err("Failed to start hardware: %d\n", ret);
  1366. goto err_rxbuf_cleanup;
  1367. }
  1368. /*
  1369. * Set mac address which is received in ready event
  1370. * FIXME: Move to ath6kl_interface_add()
  1371. */
  1372. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1373. return ret;
  1374. err_rxbuf_cleanup:
  1375. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1376. ath6kl_cleanup_amsdu_rxbufs(ar);
  1377. rtnl_lock();
  1378. ath6kl_deinit_if_data(netdev_priv(ndev));
  1379. rtnl_unlock();
  1380. wiphy_unregister(ar->wiphy);
  1381. err_debug_init:
  1382. ath6kl_debug_cleanup(ar);
  1383. err_node_cleanup:
  1384. ath6kl_wmi_shutdown(ar->wmi);
  1385. clear_bit(WMI_ENABLED, &ar->flag);
  1386. ar->wmi = NULL;
  1387. err_htc_cleanup:
  1388. ath6kl_htc_cleanup(ar->htc_target);
  1389. err_power_off:
  1390. ath6kl_hif_power_off(ar);
  1391. err_bmi_cleanup:
  1392. ath6kl_bmi_cleanup(ar);
  1393. err_wq:
  1394. destroy_workqueue(ar->ath6kl_wq);
  1395. return ret;
  1396. }
  1397. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1398. {
  1399. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1400. bool discon_issued;
  1401. netif_stop_queue(vif->ndev);
  1402. clear_bit(WLAN_ENABLED, &vif->flags);
  1403. if (wmi_ready) {
  1404. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1405. test_bit(CONNECT_PEND, &vif->flags);
  1406. ath6kl_disconnect(vif);
  1407. del_timer(&vif->disconnect_timer);
  1408. if (discon_issued)
  1409. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1410. (vif->nw_type & AP_NETWORK) ?
  1411. bcast_mac : vif->bssid,
  1412. 0, NULL, 0);
  1413. }
  1414. if (vif->scan_req) {
  1415. cfg80211_scan_done(vif->scan_req, true);
  1416. vif->scan_req = NULL;
  1417. }
  1418. }
  1419. void ath6kl_stop_txrx(struct ath6kl *ar)
  1420. {
  1421. struct ath6kl_vif *vif, *tmp_vif;
  1422. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1423. if (down_interruptible(&ar->sem)) {
  1424. ath6kl_err("down_interruptible failed\n");
  1425. return;
  1426. }
  1427. spin_lock_bh(&ar->list_lock);
  1428. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1429. list_del(&vif->list);
  1430. spin_unlock_bh(&ar->list_lock);
  1431. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1432. rtnl_lock();
  1433. ath6kl_deinit_if_data(vif);
  1434. rtnl_unlock();
  1435. spin_lock_bh(&ar->list_lock);
  1436. }
  1437. spin_unlock_bh(&ar->list_lock);
  1438. clear_bit(WMI_READY, &ar->flag);
  1439. /*
  1440. * After wmi_shudown all WMI events will be dropped. We
  1441. * need to cleanup the buffers allocated in AP mode and
  1442. * give disconnect notification to stack, which usually
  1443. * happens in the disconnect_event. Simulate the disconnect
  1444. * event by calling the function directly. Sometimes
  1445. * disconnect_event will be received when the debug logs
  1446. * are collected.
  1447. */
  1448. ath6kl_wmi_shutdown(ar->wmi);
  1449. clear_bit(WMI_ENABLED, &ar->flag);
  1450. if (ar->htc_target) {
  1451. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1452. ath6kl_htc_stop(ar->htc_target);
  1453. }
  1454. /*
  1455. * Try to reset the device if we can. The driver may have been
  1456. * configure NOT to reset the target during a debug session.
  1457. */
  1458. ath6kl_dbg(ATH6KL_DBG_TRC,
  1459. "attempting to reset target on instance destroy\n");
  1460. ath6kl_reset_device(ar, ar->target_type, true, true);
  1461. clear_bit(WLAN_ENABLED, &ar->flag);
  1462. }