core.h 18 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef CORE_H
  17. #define CORE_H
  18. #include <linux/etherdevice.h>
  19. #include <linux/rtnetlink.h>
  20. #include <linux/firmware.h>
  21. #include <linux/sched.h>
  22. #include <linux/circ_buf.h>
  23. #include <net/cfg80211.h>
  24. #include "htc.h"
  25. #include "wmi.h"
  26. #include "bmi.h"
  27. #include "target.h"
  28. #define MAX_ATH6KL 1
  29. #define ATH6KL_MAX_RX_BUFFERS 16
  30. #define ATH6KL_BUFFER_SIZE 1664
  31. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  32. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  33. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  34. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  35. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  36. #define USER_SAVEDKEYS_STAT_INIT 0
  37. #define USER_SAVEDKEYS_STAT_RUN 1
  38. #define ATH6KL_TX_TIMEOUT 10
  39. #define ATH6KL_MAX_ENDPOINTS 4
  40. #define MAX_NODE_NUM 15
  41. /* Extra bytes for htc header alignment */
  42. #define ATH6KL_HTC_ALIGN_BYTES 3
  43. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  44. #define MAX_DEF_COOKIE_NUM 180
  45. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  46. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  47. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  48. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  49. #define A_DEFAULT_LISTEN_INTERVAL 100
  50. #define A_MAX_WOW_LISTEN_INTERVAL 1000
  51. /* includes also the null byte */
  52. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  53. enum ath6kl_fw_ie_type {
  54. ATH6KL_FW_IE_FW_VERSION = 0,
  55. ATH6KL_FW_IE_TIMESTAMP = 1,
  56. ATH6KL_FW_IE_OTP_IMAGE = 2,
  57. ATH6KL_FW_IE_FW_IMAGE = 3,
  58. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  59. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  60. ATH6KL_FW_IE_CAPABILITIES = 6,
  61. ATH6KL_FW_IE_PATCH_ADDR = 7,
  62. ATH6KL_FW_IE_BOARD_ADDR = 8,
  63. };
  64. enum ath6kl_fw_capability {
  65. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  66. /* this needs to be last */
  67. ATH6KL_FW_CAPABILITY_MAX,
  68. };
  69. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  70. struct ath6kl_fw_ie {
  71. __le32 id;
  72. __le32 len;
  73. u8 data[0];
  74. };
  75. /* AR6003 1.0 definitions */
  76. #define AR6003_HW_1_0_VERSION 0x300002ba
  77. /* AR6003 2.0 definitions */
  78. #define AR6003_HW_2_0_VERSION 0x30000384
  79. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  80. #define AR6003_HW_2_0_OTP_FILE "ath6k/AR6003/hw2.0/otp.bin.z77"
  81. #define AR6003_HW_2_0_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athwlan.bin.z77"
  82. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "ath6k/AR6003/hw2.0/athtcmd_ram.bin"
  83. #define AR6003_HW_2_0_PATCH_FILE "ath6k/AR6003/hw2.0/data.patch.bin"
  84. #define AR6003_HW_2_0_FIRMWARE_2_FILE "ath6k/AR6003/hw2.0/fw-2.bin"
  85. #define AR6003_HW_2_0_BOARD_DATA_FILE "ath6k/AR6003/hw2.0/bdata.bin"
  86. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  87. "ath6k/AR6003/hw2.0/bdata.SD31.bin"
  88. /* AR6003 3.0 definitions */
  89. #define AR6003_HW_2_1_1_VERSION 0x30000582
  90. #define AR6003_HW_2_1_1_OTP_FILE "ath6k/AR6003/hw2.1.1/otp.bin"
  91. #define AR6003_HW_2_1_1_FIRMWARE_FILE "ath6k/AR6003/hw2.1.1/athwlan.bin"
  92. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE \
  93. "ath6k/AR6003/hw2.1.1/athtcmd_ram.bin"
  94. #define AR6003_HW_2_1_1_PATCH_FILE "ath6k/AR6003/hw2.1.1/data.patch.bin"
  95. #define AR6003_HW_2_1_1_FIRMWARE_2_FILE "ath6k/AR6003/hw2.1.1/fw-2.bin"
  96. #define AR6003_HW_2_1_1_BOARD_DATA_FILE "ath6k/AR6003/hw2.1.1/bdata.bin"
  97. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  98. "ath6k/AR6003/hw2.1.1/bdata.SD31.bin"
  99. /* AR6004 1.0 definitions */
  100. #define AR6004_HW_1_0_VERSION 0x30000623
  101. #define AR6004_HW_1_0_FIRMWARE_2_FILE "ath6k/AR6004/hw1.0/fw-2.bin"
  102. #define AR6004_HW_1_0_FIRMWARE_FILE "ath6k/AR6004/hw1.0/fw.ram.bin"
  103. #define AR6004_HW_1_0_BOARD_DATA_FILE "ath6k/AR6004/hw1.0/bdata.bin"
  104. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  105. "ath6k/AR6004/hw1.0/bdata.DB132.bin"
  106. /* AR6004 1.1 definitions */
  107. #define AR6004_HW_1_1_VERSION 0x30000001
  108. #define AR6004_HW_1_1_FIRMWARE_2_FILE "ath6k/AR6004/hw1.1/fw-2.bin"
  109. #define AR6004_HW_1_1_FIRMWARE_FILE "ath6k/AR6004/hw1.1/fw.ram.bin"
  110. #define AR6004_HW_1_1_BOARD_DATA_FILE "ath6k/AR6004/hw1.1/bdata.bin"
  111. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  112. "ath6k/AR6004/hw1.1/bdata.DB132.bin"
  113. /* Per STA data, used in AP mode */
  114. #define STA_PS_AWAKE BIT(0)
  115. #define STA_PS_SLEEP BIT(1)
  116. #define STA_PS_POLLED BIT(2)
  117. /* HTC TX packet tagging definitions */
  118. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  119. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  120. #define AR6003_CUST_DATA_SIZE 16
  121. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  122. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  123. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  124. #define ATH6KL_MAX_SEQ_NO 0xFFF
  125. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  126. #define NUM_OF_TIDS 8
  127. #define AGGR_SZ_DEFAULT 8
  128. #define AGGR_WIN_SZ_MIN 2
  129. #define AGGR_WIN_SZ_MAX 8
  130. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  131. #define AGGR_NUM_OF_FREE_NETBUFS 16
  132. #define AGGR_RX_TIMEOUT 400 /* in ms */
  133. #define WMI_TIMEOUT (2 * HZ)
  134. #define MBOX_YIELD_LIMIT 99
  135. /* configuration lags */
  136. /*
  137. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  138. * ERP IE of beacon to determine the short premable support when
  139. * sending (Re)Assoc req.
  140. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  141. * module state transition failure events which happen during
  142. * scan, to the host.
  143. */
  144. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  145. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  146. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  147. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  148. #define ATH6KL_CONF_SUSPEND_CUTPOWER BIT(4)
  149. enum wlan_low_pwr_state {
  150. WLAN_POWER_STATE_ON,
  151. WLAN_POWER_STATE_CUT_PWR,
  152. WLAN_POWER_STATE_DEEP_SLEEP,
  153. WLAN_POWER_STATE_WOW
  154. };
  155. enum sme_state {
  156. SME_DISCONNECTED,
  157. SME_CONNECTING,
  158. SME_CONNECTED
  159. };
  160. struct skb_hold_q {
  161. struct sk_buff *skb;
  162. bool is_amsdu;
  163. u16 seq_no;
  164. };
  165. struct rxtid {
  166. bool aggr;
  167. bool progress;
  168. bool timer_mon;
  169. u16 win_sz;
  170. u16 seq_next;
  171. u32 hold_q_sz;
  172. struct skb_hold_q *hold_q;
  173. struct sk_buff_head q;
  174. spinlock_t lock;
  175. };
  176. struct rxtid_stats {
  177. u32 num_into_aggr;
  178. u32 num_dups;
  179. u32 num_oow;
  180. u32 num_mpdu;
  181. u32 num_amsdu;
  182. u32 num_delivered;
  183. u32 num_timeouts;
  184. u32 num_hole;
  185. u32 num_bar;
  186. };
  187. struct aggr_info {
  188. u8 aggr_sz;
  189. u8 timer_scheduled;
  190. struct timer_list timer;
  191. struct net_device *dev;
  192. struct rxtid rx_tid[NUM_OF_TIDS];
  193. struct sk_buff_head free_q;
  194. struct rxtid_stats stat[NUM_OF_TIDS];
  195. };
  196. struct ath6kl_wep_key {
  197. u8 key_index;
  198. u8 key_len;
  199. u8 key[64];
  200. };
  201. #define ATH6KL_KEY_SEQ_LEN 8
  202. struct ath6kl_key {
  203. u8 key[WLAN_MAX_KEY_LEN];
  204. u8 key_len;
  205. u8 seq[ATH6KL_KEY_SEQ_LEN];
  206. u8 seq_len;
  207. u32 cipher;
  208. };
  209. struct ath6kl_node_mapping {
  210. u8 mac_addr[ETH_ALEN];
  211. u8 ep_id;
  212. u8 tx_pend;
  213. };
  214. struct ath6kl_cookie {
  215. struct sk_buff *skb;
  216. u32 map_no;
  217. struct htc_packet htc_pkt;
  218. struct ath6kl_cookie *arc_list_next;
  219. };
  220. struct ath6kl_sta {
  221. u16 sta_flags;
  222. u8 mac[ETH_ALEN];
  223. u8 aid;
  224. u8 keymgmt;
  225. u8 ucipher;
  226. u8 auth;
  227. u8 wpa_ie[ATH6KL_MAX_IE];
  228. struct sk_buff_head psq;
  229. spinlock_t psq_lock;
  230. };
  231. struct ath6kl_version {
  232. u32 target_ver;
  233. u32 wlan_ver;
  234. u32 abi_ver;
  235. };
  236. struct ath6kl_bmi {
  237. u32 cmd_credits;
  238. bool done_sent;
  239. u8 *cmd_buf;
  240. u32 max_data_size;
  241. u32 max_cmd_size;
  242. };
  243. struct target_stats {
  244. u64 tx_pkt;
  245. u64 tx_byte;
  246. u64 tx_ucast_pkt;
  247. u64 tx_ucast_byte;
  248. u64 tx_mcast_pkt;
  249. u64 tx_mcast_byte;
  250. u64 tx_bcast_pkt;
  251. u64 tx_bcast_byte;
  252. u64 tx_rts_success_cnt;
  253. u64 tx_pkt_per_ac[4];
  254. u64 tx_err;
  255. u64 tx_fail_cnt;
  256. u64 tx_retry_cnt;
  257. u64 tx_mult_retry_cnt;
  258. u64 tx_rts_fail_cnt;
  259. u64 rx_pkt;
  260. u64 rx_byte;
  261. u64 rx_ucast_pkt;
  262. u64 rx_ucast_byte;
  263. u64 rx_mcast_pkt;
  264. u64 rx_mcast_byte;
  265. u64 rx_bcast_pkt;
  266. u64 rx_bcast_byte;
  267. u64 rx_frgment_pkt;
  268. u64 rx_err;
  269. u64 rx_crc_err;
  270. u64 rx_key_cache_miss;
  271. u64 rx_decrypt_err;
  272. u64 rx_dupl_frame;
  273. u64 tkip_local_mic_fail;
  274. u64 tkip_cnter_measures_invoked;
  275. u64 tkip_replays;
  276. u64 tkip_fmt_err;
  277. u64 ccmp_fmt_err;
  278. u64 ccmp_replays;
  279. u64 pwr_save_fail_cnt;
  280. u64 cs_bmiss_cnt;
  281. u64 cs_low_rssi_cnt;
  282. u64 cs_connect_cnt;
  283. u64 cs_discon_cnt;
  284. s32 tx_ucast_rate;
  285. s32 rx_ucast_rate;
  286. u32 lq_val;
  287. u32 wow_pkt_dropped;
  288. u16 wow_evt_discarded;
  289. s16 noise_floor_calib;
  290. s16 cs_rssi;
  291. s16 cs_ave_beacon_rssi;
  292. u8 cs_ave_beacon_snr;
  293. u8 cs_last_roam_msec;
  294. u8 cs_snr;
  295. u8 wow_host_pkt_wakeups;
  296. u8 wow_host_evt_wakeups;
  297. u32 arp_received;
  298. u32 arp_matched;
  299. u32 arp_replied;
  300. };
  301. struct ath6kl_mbox_info {
  302. u32 htc_addr;
  303. u32 htc_ext_addr;
  304. u32 htc_ext_sz;
  305. u32 block_size;
  306. u32 gmbox_addr;
  307. u32 gmbox_sz;
  308. };
  309. /*
  310. * 802.11i defines an extended IV for use with non-WEP ciphers.
  311. * When the EXTIV bit is set in the key id byte an additional
  312. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  313. * EXTIV bit is likewise set but the 8 bytes represent the
  314. * CCMP header rather than IV+extended-IV.
  315. */
  316. #define ATH6KL_KEYBUF_SIZE 16
  317. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  318. #define ATH6KL_KEY_XMIT 0x01
  319. #define ATH6KL_KEY_RECV 0x02
  320. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  321. /* Initial group key for AP mode */
  322. struct ath6kl_req_key {
  323. bool valid;
  324. u8 key_index;
  325. int key_type;
  326. u8 key[WLAN_MAX_KEY_LEN];
  327. u8 key_len;
  328. };
  329. enum ath6kl_hif_type {
  330. ATH6KL_HIF_TYPE_SDIO,
  331. ATH6KL_HIF_TYPE_USB,
  332. };
  333. #define MAX_NUM_VIF 1
  334. /* vif flags info */
  335. enum ath6kl_vif_state {
  336. CONNECTED,
  337. CONNECT_PEND,
  338. WMM_ENABLED,
  339. NETQ_STOPPED,
  340. DTIM_EXPIRED,
  341. NETDEV_REGISTERED,
  342. CLEAR_BSSFILTER_ON_BEACON,
  343. DTIM_PERIOD_AVAIL,
  344. WLAN_ENABLED,
  345. STATS_UPDATE_PEND,
  346. };
  347. struct ath6kl_vif {
  348. struct list_head list;
  349. struct wireless_dev wdev;
  350. struct net_device *ndev;
  351. struct ath6kl *ar;
  352. /* Lock to protect vif specific net_stats and flags */
  353. spinlock_t if_lock;
  354. u8 fw_vif_idx;
  355. unsigned long flags;
  356. int ssid_len;
  357. u8 ssid[IEEE80211_MAX_SSID_LEN];
  358. u8 dot11_auth_mode;
  359. u8 auth_mode;
  360. u8 prwise_crypto;
  361. u8 prwise_crypto_len;
  362. u8 grp_crypto;
  363. u8 grp_crypto_len;
  364. u8 def_txkey_index;
  365. u8 next_mode;
  366. u8 nw_type;
  367. u8 bssid[ETH_ALEN];
  368. u8 req_bssid[ETH_ALEN];
  369. u16 ch_hint;
  370. u16 bss_ch;
  371. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  372. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  373. struct aggr_info *aggr_cntxt;
  374. struct timer_list disconnect_timer;
  375. struct cfg80211_scan_request *scan_req;
  376. enum sme_state sme_state;
  377. int reconnect_flag;
  378. u32 last_roc_id;
  379. u32 last_cancel_roc_id;
  380. u32 send_action_id;
  381. bool probe_req_report;
  382. u16 next_chan;
  383. u16 assoc_bss_beacon_int;
  384. u8 assoc_bss_dtim_period;
  385. struct net_device_stats net_stats;
  386. struct target_stats target_stats;
  387. };
  388. #define WOW_LIST_ID 0
  389. #define WOW_HOST_REQ_DELAY 500 /* ms */
  390. /* Flag info */
  391. enum ath6kl_dev_state {
  392. WMI_ENABLED,
  393. WMI_READY,
  394. WMI_CTRL_EP_FULL,
  395. TESTMODE,
  396. DESTROY_IN_PROGRESS,
  397. SKIP_SCAN,
  398. ROAM_TBL_PEND,
  399. FIRST_BOOT,
  400. };
  401. enum ath6kl_state {
  402. ATH6KL_STATE_OFF,
  403. ATH6KL_STATE_ON,
  404. ATH6KL_STATE_DEEPSLEEP,
  405. ATH6KL_STATE_CUTPOWER,
  406. ATH6KL_STATE_WOW,
  407. };
  408. struct ath6kl {
  409. struct device *dev;
  410. struct wiphy *wiphy;
  411. enum ath6kl_state state;
  412. struct ath6kl_bmi bmi;
  413. const struct ath6kl_hif_ops *hif_ops;
  414. struct wmi *wmi;
  415. int tx_pending[ENDPOINT_MAX];
  416. int total_tx_data_pend;
  417. struct htc_target *htc_target;
  418. enum ath6kl_hif_type hif_type;
  419. void *hif_priv;
  420. struct list_head vif_list;
  421. /* Lock to avoid race in vif_list entries among add/del/traverse */
  422. spinlock_t list_lock;
  423. u8 num_vif;
  424. u8 max_norm_iface;
  425. u8 avail_idx_map;
  426. spinlock_t lock;
  427. struct semaphore sem;
  428. u16 listen_intvl_b;
  429. u16 listen_intvl_t;
  430. u8 lrssi_roam_threshold;
  431. struct ath6kl_version version;
  432. u32 target_type;
  433. u8 tx_pwr;
  434. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  435. u8 ibss_ps_enable;
  436. bool ibss_if_active;
  437. u8 node_num;
  438. u8 next_ep_id;
  439. struct ath6kl_cookie *cookie_list;
  440. u32 cookie_count;
  441. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  442. bool ac_stream_active[WMM_NUM_AC];
  443. u8 ac_stream_pri_map[WMM_NUM_AC];
  444. u8 hiac_stream_active_pri;
  445. u8 ep2ac_map[ENDPOINT_MAX];
  446. enum htc_endpoint_id ctrl_ep;
  447. struct ath6kl_htc_credit_info credit_state_info;
  448. u32 connect_ctrl_flags;
  449. u32 user_key_ctrl;
  450. u8 usr_bss_filter;
  451. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  452. u8 sta_list_index;
  453. struct ath6kl_req_key ap_mode_bkey;
  454. struct sk_buff_head mcastpsq;
  455. spinlock_t mcastpsq_lock;
  456. u8 intra_bss;
  457. struct wmi_ap_mode_stat ap_stats;
  458. u8 ap_country_code[3];
  459. struct list_head amsdu_rx_buffer_queue;
  460. u8 rx_meta_ver;
  461. enum wlan_low_pwr_state wlan_pwr_state;
  462. struct wmi_scan_params_cmd sc_params;
  463. u8 mac_addr[ETH_ALEN];
  464. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  465. struct {
  466. void *rx_report;
  467. size_t rx_report_len;
  468. } tm;
  469. struct ath6kl_hw {
  470. u32 id;
  471. const char *name;
  472. u32 dataset_patch_addr;
  473. u32 app_load_addr;
  474. u32 app_start_override_addr;
  475. u32 board_ext_data_addr;
  476. u32 reserved_ram_size;
  477. u32 board_addr;
  478. } hw;
  479. u16 conf_flags;
  480. wait_queue_head_t event_wq;
  481. struct ath6kl_mbox_info mbox_info;
  482. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  483. unsigned long flag;
  484. u8 *fw_board;
  485. size_t fw_board_len;
  486. u8 *fw_otp;
  487. size_t fw_otp_len;
  488. u8 *fw;
  489. size_t fw_len;
  490. u8 *fw_patch;
  491. size_t fw_patch_len;
  492. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  493. struct workqueue_struct *ath6kl_wq;
  494. struct dentry *debugfs_phy;
  495. bool p2p;
  496. #ifdef CONFIG_ATH6KL_DEBUG
  497. struct {
  498. struct circ_buf fwlog_buf;
  499. spinlock_t fwlog_lock;
  500. void *fwlog_tmp;
  501. u32 fwlog_mask;
  502. unsigned int dbgfs_diag_reg;
  503. u32 diag_reg_addr_wr;
  504. u32 diag_reg_val_wr;
  505. struct {
  506. unsigned int invalid_rate;
  507. } war_stats;
  508. u8 *roam_tbl;
  509. unsigned int roam_tbl_len;
  510. u8 keepalive;
  511. u8 disc_timeout;
  512. } debug;
  513. #endif /* CONFIG_ATH6KL_DEBUG */
  514. };
  515. static inline void *ath6kl_priv(struct net_device *dev)
  516. {
  517. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  518. }
  519. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  520. u32 item_offset)
  521. {
  522. u32 addr = 0;
  523. if (ar->target_type == TARGET_TYPE_AR6003)
  524. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  525. else if (ar->target_type == TARGET_TYPE_AR6004)
  526. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  527. return addr;
  528. }
  529. int ath6kl_configure_target(struct ath6kl *ar);
  530. void ath6kl_detect_error(unsigned long ptr);
  531. void disconnect_timer_handler(unsigned long ptr);
  532. void init_netdev(struct net_device *dev);
  533. void ath6kl_cookie_init(struct ath6kl *ar);
  534. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  535. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  536. void ath6kl_tx_complete(void *context, struct list_head *packet_queue);
  537. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  538. struct htc_packet *packet);
  539. void ath6kl_stop_txrx(struct ath6kl *ar);
  540. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  541. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  542. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  543. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  544. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  545. int ath6kl_read_fwlogs(struct ath6kl *ar);
  546. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  547. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  548. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  549. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  550. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  551. struct aggr_info *aggr_init(struct net_device *dev);
  552. void ath6kl_rx_refill(struct htc_target *target,
  553. enum htc_endpoint_id endpoint);
  554. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  555. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  556. enum htc_endpoint_id endpoint,
  557. int len);
  558. void aggr_module_destroy(struct aggr_info *aggr_info);
  559. void aggr_reset_state(struct aggr_info *aggr_info);
  560. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 * node_addr);
  561. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  562. void ath6kl_ready_event(void *devt, u8 * datap, u32 sw_ver, u32 abi_ver);
  563. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  564. enum htc_endpoint_id eid);
  565. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  566. u8 *bssid, u16 listen_int,
  567. u16 beacon_int, enum network_type net_type,
  568. u8 beacon_ie_len, u8 assoc_req_len,
  569. u8 assoc_resp_len, u8 *assoc_info);
  570. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  571. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  572. u8 keymgmt, u8 ucipher, u8 auth,
  573. u8 assoc_req_len, u8 *assoc_info);
  574. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  575. u8 *bssid, u8 assoc_resp_len,
  576. u8 *assoc_info, u16 prot_reason_status);
  577. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  578. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  579. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  580. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  581. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  582. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  583. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  584. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  585. void ath6kl_disconnect(struct ath6kl_vif *vif);
  586. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  587. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  588. u8 win_sz);
  589. void ath6kl_wakeup_event(void *dev);
  590. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  591. bool wait_fot_compltn, bool cold_reset);
  592. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  593. void ath6kl_deinit_if_data(struct ath6kl_vif *vif);
  594. void ath6kl_core_free(struct ath6kl *ar);
  595. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  596. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  597. int ath6kl_init_hw_start(struct ath6kl *ar);
  598. int ath6kl_init_hw_stop(struct ath6kl *ar);
  599. void ath6kl_check_wow_status(struct ath6kl *ar);
  600. #endif /* CORE_H */