common.c 148 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "iwl-eeprom.h"
  42. #include "iwl-dev.h"
  43. #include "iwl-debug.h"
  44. #include "iwl-core.h"
  45. #include "iwl-io.h"
  46. #include "iwl-power.h"
  47. #include "iwl-sta.h"
  48. #include "iwl-helpers.h"
  49. const char *il_get_cmd_string(u8 cmd)
  50. {
  51. switch (cmd) {
  52. IL_CMD(N_ALIVE);
  53. IL_CMD(N_ERROR);
  54. IL_CMD(C_RXON);
  55. IL_CMD(C_RXON_ASSOC);
  56. IL_CMD(C_QOS_PARAM);
  57. IL_CMD(C_RXON_TIMING);
  58. IL_CMD(C_ADD_STA);
  59. IL_CMD(C_REM_STA);
  60. IL_CMD(C_WEPKEY);
  61. IL_CMD(N_3945_RX);
  62. IL_CMD(C_TX);
  63. IL_CMD(C_RATE_SCALE);
  64. IL_CMD(C_LEDS);
  65. IL_CMD(C_TX_LINK_QUALITY_CMD);
  66. IL_CMD(C_CHANNEL_SWITCH);
  67. IL_CMD(N_CHANNEL_SWITCH);
  68. IL_CMD(C_SPECTRUM_MEASUREMENT);
  69. IL_CMD(N_SPECTRUM_MEASUREMENT);
  70. IL_CMD(C_POWER_TBL);
  71. IL_CMD(N_PM_SLEEP);
  72. IL_CMD(N_PM_DEBUG_STATS);
  73. IL_CMD(C_SCAN);
  74. IL_CMD(C_SCAN_ABORT);
  75. IL_CMD(N_SCAN_START);
  76. IL_CMD(N_SCAN_RESULTS);
  77. IL_CMD(N_SCAN_COMPLETE);
  78. IL_CMD(N_BEACON);
  79. IL_CMD(C_TX_BEACON);
  80. IL_CMD(C_TX_PWR_TBL);
  81. IL_CMD(C_BT_CONFIG);
  82. IL_CMD(C_STATS);
  83. IL_CMD(N_STATS);
  84. IL_CMD(N_CARD_STATE);
  85. IL_CMD(N_MISSED_BEACONS);
  86. IL_CMD(C_CT_KILL_CONFIG);
  87. IL_CMD(C_SENSITIVITY);
  88. IL_CMD(C_PHY_CALIBRATION);
  89. IL_CMD(N_RX_PHY);
  90. IL_CMD(N_RX_MPDU);
  91. IL_CMD(N_RX);
  92. IL_CMD(N_COMPRESSED_BA);
  93. default:
  94. return "UNKNOWN";
  95. }
  96. }
  97. EXPORT_SYMBOL(il_get_cmd_string);
  98. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  99. static void il_generic_cmd_callback(struct il_priv *il,
  100. struct il_device_cmd *cmd,
  101. struct il_rx_pkt *pkt)
  102. {
  103. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  104. IL_ERR("Bad return from %s (0x%08X)\n",
  105. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  106. return;
  107. }
  108. #ifdef CONFIG_IWLEGACY_DEBUG
  109. switch (cmd->hdr.cmd) {
  110. case C_TX_LINK_QUALITY_CMD:
  111. case C_SENSITIVITY:
  112. D_HC_DUMP("back from %s (0x%08X)\n",
  113. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  114. break;
  115. default:
  116. D_HC("back from %s (0x%08X)\n",
  117. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  118. }
  119. #endif
  120. }
  121. static int
  122. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  123. {
  124. int ret;
  125. BUG_ON(!(cmd->flags & CMD_ASYNC));
  126. /* An asynchronous command can not expect an SKB to be set. */
  127. BUG_ON(cmd->flags & CMD_WANT_SKB);
  128. /* Assign a generic callback if one is not provided */
  129. if (!cmd->callback)
  130. cmd->callback = il_generic_cmd_callback;
  131. if (test_bit(S_EXIT_PENDING, &il->status))
  132. return -EBUSY;
  133. ret = il_enqueue_hcmd(il, cmd);
  134. if (ret < 0) {
  135. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  136. il_get_cmd_string(cmd->id), ret);
  137. return ret;
  138. }
  139. return 0;
  140. }
  141. int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  142. {
  143. int cmd_idx;
  144. int ret;
  145. lockdep_assert_held(&il->mutex);
  146. BUG_ON(cmd->flags & CMD_ASYNC);
  147. /* A synchronous command can not have a callback set. */
  148. BUG_ON(cmd->callback);
  149. D_INFO("Attempting to send sync command %s\n",
  150. il_get_cmd_string(cmd->id));
  151. set_bit(S_HCMD_ACTIVE, &il->status);
  152. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  153. il_get_cmd_string(cmd->id));
  154. cmd_idx = il_enqueue_hcmd(il, cmd);
  155. if (cmd_idx < 0) {
  156. ret = cmd_idx;
  157. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  158. il_get_cmd_string(cmd->id), ret);
  159. goto out;
  160. }
  161. ret = wait_event_timeout(il->wait_command_queue,
  162. !test_bit(S_HCMD_ACTIVE, &il->status),
  163. HOST_COMPLETE_TIMEOUT);
  164. if (!ret) {
  165. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  166. IL_ERR(
  167. "Error sending %s: time out after %dms.\n",
  168. il_get_cmd_string(cmd->id),
  169. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  170. clear_bit(S_HCMD_ACTIVE, &il->status);
  171. D_INFO(
  172. "Clearing HCMD_ACTIVE for command %s\n",
  173. il_get_cmd_string(cmd->id));
  174. ret = -ETIMEDOUT;
  175. goto cancel;
  176. }
  177. }
  178. if (test_bit(S_RF_KILL_HW, &il->status)) {
  179. IL_ERR("Command %s aborted: RF KILL Switch\n",
  180. il_get_cmd_string(cmd->id));
  181. ret = -ECANCELED;
  182. goto fail;
  183. }
  184. if (test_bit(S_FW_ERROR, &il->status)) {
  185. IL_ERR("Command %s failed: FW Error\n",
  186. il_get_cmd_string(cmd->id));
  187. ret = -EIO;
  188. goto fail;
  189. }
  190. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  191. IL_ERR("Error: Response NULL in '%s'\n",
  192. il_get_cmd_string(cmd->id));
  193. ret = -EIO;
  194. goto cancel;
  195. }
  196. ret = 0;
  197. goto out;
  198. cancel:
  199. if (cmd->flags & CMD_WANT_SKB) {
  200. /*
  201. * Cancel the CMD_WANT_SKB flag for the cmd in the
  202. * TX cmd queue. Otherwise in case the cmd comes
  203. * in later, it will possibly set an invalid
  204. * address (cmd->meta.source).
  205. */
  206. il->txq[il->cmd_queue].meta[cmd_idx].flags &=
  207. ~CMD_WANT_SKB;
  208. }
  209. fail:
  210. if (cmd->reply_page) {
  211. il_free_pages(il, cmd->reply_page);
  212. cmd->reply_page = 0;
  213. }
  214. out:
  215. return ret;
  216. }
  217. EXPORT_SYMBOL(il_send_cmd_sync);
  218. int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  219. {
  220. if (cmd->flags & CMD_ASYNC)
  221. return il_send_cmd_async(il, cmd);
  222. return il_send_cmd_sync(il, cmd);
  223. }
  224. EXPORT_SYMBOL(il_send_cmd);
  225. int
  226. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  227. {
  228. struct il_host_cmd cmd = {
  229. .id = id,
  230. .len = len,
  231. .data = data,
  232. };
  233. return il_send_cmd_sync(il, &cmd);
  234. }
  235. EXPORT_SYMBOL(il_send_cmd_pdu);
  236. int il_send_cmd_pdu_async(struct il_priv *il,
  237. u8 id, u16 len, const void *data,
  238. void (*callback)(struct il_priv *il,
  239. struct il_device_cmd *cmd,
  240. struct il_rx_pkt *pkt))
  241. {
  242. struct il_host_cmd cmd = {
  243. .id = id,
  244. .len = len,
  245. .data = data,
  246. };
  247. cmd.flags |= CMD_ASYNC;
  248. cmd.callback = callback;
  249. return il_send_cmd_async(il, &cmd);
  250. }
  251. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  252. /* default: IL_LED_BLINK(0) using blinking idx table */
  253. static int led_mode;
  254. module_param(led_mode, int, S_IRUGO);
  255. MODULE_PARM_DESC(led_mode, "0=system default, "
  256. "1=On(RF On)/Off(RF Off), 2=blinking");
  257. /* Throughput OFF time(ms) ON time (ms)
  258. * >300 25 25
  259. * >200 to 300 40 40
  260. * >100 to 200 55 55
  261. * >70 to 100 65 65
  262. * >50 to 70 75 75
  263. * >20 to 50 85 85
  264. * >10 to 20 95 95
  265. * >5 to 10 110 110
  266. * >1 to 5 130 130
  267. * >0 to 1 167 167
  268. * <=0 SOLID ON
  269. */
  270. static const struct ieee80211_tpt_blink il_blink[] = {
  271. { .throughput = 0, .blink_time = 334 },
  272. { .throughput = 1 * 1024 - 1, .blink_time = 260 },
  273. { .throughput = 5 * 1024 - 1, .blink_time = 220 },
  274. { .throughput = 10 * 1024 - 1, .blink_time = 190 },
  275. { .throughput = 20 * 1024 - 1, .blink_time = 170 },
  276. { .throughput = 50 * 1024 - 1, .blink_time = 150 },
  277. { .throughput = 70 * 1024 - 1, .blink_time = 130 },
  278. { .throughput = 100 * 1024 - 1, .blink_time = 110 },
  279. { .throughput = 200 * 1024 - 1, .blink_time = 80 },
  280. { .throughput = 300 * 1024 - 1, .blink_time = 50 },
  281. };
  282. /*
  283. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  284. * Led blink rate analysis showed an average deviation of 0% on 3945,
  285. * 5% on 4965 HW.
  286. * Need to compensate on the led on/off time per HW according to the deviation
  287. * to achieve the desired led frequency
  288. * The calculation is: (100-averageDeviation)/100 * blinkTime
  289. * For code efficiency the calculation will be:
  290. * compensation = (100 - averageDeviation) * 64 / 100
  291. * NewBlinkTime = (compensation * BlinkTime) / 64
  292. */
  293. static inline u8 il_blink_compensation(struct il_priv *il,
  294. u8 time, u16 compensation)
  295. {
  296. if (!compensation) {
  297. IL_ERR("undefined blink compensation: "
  298. "use pre-defined blinking time\n");
  299. return time;
  300. }
  301. return (u8)((time * compensation) >> 6);
  302. }
  303. /* Set led pattern command */
  304. static int il_led_cmd(struct il_priv *il,
  305. unsigned long on,
  306. unsigned long off)
  307. {
  308. struct il_led_cmd led_cmd = {
  309. .id = IL_LED_LINK,
  310. .interval = IL_DEF_LED_INTRVL
  311. };
  312. int ret;
  313. if (!test_bit(S_READY, &il->status))
  314. return -EBUSY;
  315. if (il->blink_on == on && il->blink_off == off)
  316. return 0;
  317. if (off == 0) {
  318. /* led is SOLID_ON */
  319. on = IL_LED_SOLID;
  320. }
  321. D_LED("Led blink time compensation=%u\n",
  322. il->cfg->base_params->led_compensation);
  323. led_cmd.on = il_blink_compensation(il, on,
  324. il->cfg->base_params->led_compensation);
  325. led_cmd.off = il_blink_compensation(il, off,
  326. il->cfg->base_params->led_compensation);
  327. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  328. if (!ret) {
  329. il->blink_on = on;
  330. il->blink_off = off;
  331. }
  332. return ret;
  333. }
  334. static void il_led_brightness_set(struct led_classdev *led_cdev,
  335. enum led_brightness brightness)
  336. {
  337. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  338. unsigned long on = 0;
  339. if (brightness > 0)
  340. on = IL_LED_SOLID;
  341. il_led_cmd(il, on, 0);
  342. }
  343. static int il_led_blink_set(struct led_classdev *led_cdev,
  344. unsigned long *delay_on,
  345. unsigned long *delay_off)
  346. {
  347. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  348. return il_led_cmd(il, *delay_on, *delay_off);
  349. }
  350. void il_leds_init(struct il_priv *il)
  351. {
  352. int mode = led_mode;
  353. int ret;
  354. if (mode == IL_LED_DEFAULT)
  355. mode = il->cfg->led_mode;
  356. il->led.name = kasprintf(GFP_KERNEL, "%s-led",
  357. wiphy_name(il->hw->wiphy));
  358. il->led.brightness_set = il_led_brightness_set;
  359. il->led.blink_set = il_led_blink_set;
  360. il->led.max_brightness = 1;
  361. switch (mode) {
  362. case IL_LED_DEFAULT:
  363. WARN_ON(1);
  364. break;
  365. case IL_LED_BLINK:
  366. il->led.default_trigger =
  367. ieee80211_create_tpt_led_trigger(il->hw,
  368. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  369. il_blink, ARRAY_SIZE(il_blink));
  370. break;
  371. case IL_LED_RF_STATE:
  372. il->led.default_trigger =
  373. ieee80211_get_radio_led_name(il->hw);
  374. break;
  375. }
  376. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  377. if (ret) {
  378. kfree(il->led.name);
  379. return;
  380. }
  381. il->led_registered = true;
  382. }
  383. EXPORT_SYMBOL(il_leds_init);
  384. void il_leds_exit(struct il_priv *il)
  385. {
  386. if (!il->led_registered)
  387. return;
  388. led_classdev_unregister(&il->led);
  389. kfree(il->led.name);
  390. }
  391. EXPORT_SYMBOL(il_leds_exit);
  392. /************************** EEPROM BANDS ****************************
  393. *
  394. * The il_eeprom_band definitions below provide the mapping from the
  395. * EEPROM contents to the specific channel number supported for each
  396. * band.
  397. *
  398. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  399. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  400. * The specific geography and calibration information for that channel
  401. * is contained in the eeprom map itself.
  402. *
  403. * During init, we copy the eeprom information and channel map
  404. * information into il->channel_info_24/52 and il->channel_map_24/52
  405. *
  406. * channel_map_24/52 provides the idx in the channel_info array for a
  407. * given channel. We have to have two separate maps as there is channel
  408. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  409. * band_2
  410. *
  411. * A value of 0xff stored in the channel_map indicates that the channel
  412. * is not supported by the hardware at all.
  413. *
  414. * A value of 0xfe in the channel_map indicates that the channel is not
  415. * valid for Tx with the current hardware. This means that
  416. * while the system can tune and receive on a given channel, it may not
  417. * be able to associate or transmit any frames on that
  418. * channel. There is no corresponding channel information for that
  419. * entry.
  420. *
  421. *********************************************************************/
  422. /* 2.4 GHz */
  423. const u8 il_eeprom_band_1[14] = {
  424. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  425. };
  426. /* 5.2 GHz bands */
  427. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  428. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  429. };
  430. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  431. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  432. };
  433. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  434. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  435. };
  436. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  437. 145, 149, 153, 157, 161, 165
  438. };
  439. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  440. 1, 2, 3, 4, 5, 6, 7
  441. };
  442. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  443. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  444. };
  445. /******************************************************************************
  446. *
  447. * EEPROM related functions
  448. *
  449. ******************************************************************************/
  450. static int il_eeprom_verify_signature(struct il_priv *il)
  451. {
  452. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  453. int ret = 0;
  454. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  455. switch (gp) {
  456. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  457. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  458. break;
  459. default:
  460. IL_ERR("bad EEPROM signature,"
  461. "EEPROM_GP=0x%08x\n", gp);
  462. ret = -ENOENT;
  463. break;
  464. }
  465. return ret;
  466. }
  467. const u8
  468. *il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  469. {
  470. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  471. return &il->eeprom[offset];
  472. }
  473. EXPORT_SYMBOL(il_eeprom_query_addr);
  474. u16 il_eeprom_query16(const struct il_priv *il, size_t offset)
  475. {
  476. if (!il->eeprom)
  477. return 0;
  478. return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8);
  479. }
  480. EXPORT_SYMBOL(il_eeprom_query16);
  481. /**
  482. * il_eeprom_init - read EEPROM contents
  483. *
  484. * Load the EEPROM contents from adapter into il->eeprom
  485. *
  486. * NOTE: This routine uses the non-debug IO access functions.
  487. */
  488. int il_eeprom_init(struct il_priv *il)
  489. {
  490. __le16 *e;
  491. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  492. int sz;
  493. int ret;
  494. u16 addr;
  495. /* allocate eeprom */
  496. sz = il->cfg->base_params->eeprom_size;
  497. D_EEPROM("NVM size = %d\n", sz);
  498. il->eeprom = kzalloc(sz, GFP_KERNEL);
  499. if (!il->eeprom) {
  500. ret = -ENOMEM;
  501. goto alloc_err;
  502. }
  503. e = (__le16 *)il->eeprom;
  504. il->cfg->ops->lib->apm_ops.init(il);
  505. ret = il_eeprom_verify_signature(il);
  506. if (ret < 0) {
  507. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  508. ret = -ENOENT;
  509. goto err;
  510. }
  511. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  512. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  513. if (ret < 0) {
  514. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  515. ret = -ENOENT;
  516. goto err;
  517. }
  518. /* eeprom is an array of 16bit values */
  519. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  520. u32 r;
  521. _il_wr(il, CSR_EEPROM_REG,
  522. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  523. ret = _il_poll_bit(il, CSR_EEPROM_REG,
  524. CSR_EEPROM_REG_READ_VALID_MSK,
  525. CSR_EEPROM_REG_READ_VALID_MSK,
  526. IL_EEPROM_ACCESS_TIMEOUT);
  527. if (ret < 0) {
  528. IL_ERR("Time out reading EEPROM[%d]\n",
  529. addr);
  530. goto done;
  531. }
  532. r = _il_rd(il, CSR_EEPROM_REG);
  533. e[addr / 2] = cpu_to_le16(r >> 16);
  534. }
  535. D_EEPROM("NVM Type: %s, version: 0x%x\n",
  536. "EEPROM",
  537. il_eeprom_query16(il, EEPROM_VERSION));
  538. ret = 0;
  539. done:
  540. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  541. err:
  542. if (ret)
  543. il_eeprom_free(il);
  544. /* Reset chip to save power until we load uCode during "up". */
  545. il_apm_stop(il);
  546. alloc_err:
  547. return ret;
  548. }
  549. EXPORT_SYMBOL(il_eeprom_init);
  550. void il_eeprom_free(struct il_priv *il)
  551. {
  552. kfree(il->eeprom);
  553. il->eeprom = NULL;
  554. }
  555. EXPORT_SYMBOL(il_eeprom_free);
  556. static void il_init_band_reference(const struct il_priv *il,
  557. int eep_band, int *eeprom_ch_count,
  558. const struct il_eeprom_channel **eeprom_ch_info,
  559. const u8 **eeprom_ch_idx)
  560. {
  561. u32 offset = il->cfg->ops->lib->
  562. eeprom_ops.regulatory_bands[eep_band - 1];
  563. switch (eep_band) {
  564. case 1: /* 2.4GHz band */
  565. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  566. *eeprom_ch_info = (struct il_eeprom_channel *)
  567. il_eeprom_query_addr(il, offset);
  568. *eeprom_ch_idx = il_eeprom_band_1;
  569. break;
  570. case 2: /* 4.9GHz band */
  571. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  572. *eeprom_ch_info = (struct il_eeprom_channel *)
  573. il_eeprom_query_addr(il, offset);
  574. *eeprom_ch_idx = il_eeprom_band_2;
  575. break;
  576. case 3: /* 5.2GHz band */
  577. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  578. *eeprom_ch_info = (struct il_eeprom_channel *)
  579. il_eeprom_query_addr(il, offset);
  580. *eeprom_ch_idx = il_eeprom_band_3;
  581. break;
  582. case 4: /* 5.5GHz band */
  583. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  584. *eeprom_ch_info = (struct il_eeprom_channel *)
  585. il_eeprom_query_addr(il, offset);
  586. *eeprom_ch_idx = il_eeprom_band_4;
  587. break;
  588. case 5: /* 5.7GHz band */
  589. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  590. *eeprom_ch_info = (struct il_eeprom_channel *)
  591. il_eeprom_query_addr(il, offset);
  592. *eeprom_ch_idx = il_eeprom_band_5;
  593. break;
  594. case 6: /* 2.4GHz ht40 channels */
  595. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  596. *eeprom_ch_info = (struct il_eeprom_channel *)
  597. il_eeprom_query_addr(il, offset);
  598. *eeprom_ch_idx = il_eeprom_band_6;
  599. break;
  600. case 7: /* 5 GHz ht40 channels */
  601. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  602. *eeprom_ch_info = (struct il_eeprom_channel *)
  603. il_eeprom_query_addr(il, offset);
  604. *eeprom_ch_idx = il_eeprom_band_7;
  605. break;
  606. default:
  607. BUG();
  608. }
  609. }
  610. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  611. ? # x " " : "")
  612. /**
  613. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  614. *
  615. * Does not set up a command, or touch hardware.
  616. */
  617. static int il_mod_ht40_chan_info(struct il_priv *il,
  618. enum ieee80211_band band, u16 channel,
  619. const struct il_eeprom_channel *eeprom_ch,
  620. u8 clear_ht40_extension_channel)
  621. {
  622. struct il_channel_info *ch_info;
  623. ch_info = (struct il_channel_info *)
  624. il_get_channel_info(il, band, channel);
  625. if (!il_is_channel_valid(ch_info))
  626. return -1;
  627. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  628. " Ad-Hoc %ssupported\n",
  629. ch_info->channel,
  630. il_is_channel_a_band(ch_info) ?
  631. "5.2" : "2.4",
  632. CHECK_AND_PRINT(IBSS),
  633. CHECK_AND_PRINT(ACTIVE),
  634. CHECK_AND_PRINT(RADAR),
  635. CHECK_AND_PRINT(WIDE),
  636. CHECK_AND_PRINT(DFS),
  637. eeprom_ch->flags,
  638. eeprom_ch->max_power_avg,
  639. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  640. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  641. "" : "not ");
  642. ch_info->ht40_eeprom = *eeprom_ch;
  643. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  644. ch_info->ht40_flags = eeprom_ch->flags;
  645. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  646. ch_info->ht40_extension_channel &=
  647. ~clear_ht40_extension_channel;
  648. return 0;
  649. }
  650. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  651. ? # x " " : "")
  652. /**
  653. * il_init_channel_map - Set up driver's info for all possible channels
  654. */
  655. int il_init_channel_map(struct il_priv *il)
  656. {
  657. int eeprom_ch_count = 0;
  658. const u8 *eeprom_ch_idx = NULL;
  659. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  660. int band, ch;
  661. struct il_channel_info *ch_info;
  662. if (il->channel_count) {
  663. D_EEPROM("Channel map already initialized.\n");
  664. return 0;
  665. }
  666. D_EEPROM("Initializing regulatory info from EEPROM\n");
  667. il->channel_count =
  668. ARRAY_SIZE(il_eeprom_band_1) +
  669. ARRAY_SIZE(il_eeprom_band_2) +
  670. ARRAY_SIZE(il_eeprom_band_3) +
  671. ARRAY_SIZE(il_eeprom_band_4) +
  672. ARRAY_SIZE(il_eeprom_band_5);
  673. D_EEPROM("Parsing data for %d channels.\n",
  674. il->channel_count);
  675. il->channel_info = kzalloc(sizeof(struct il_channel_info) *
  676. il->channel_count, GFP_KERNEL);
  677. if (!il->channel_info) {
  678. IL_ERR("Could not allocate channel_info\n");
  679. il->channel_count = 0;
  680. return -ENOMEM;
  681. }
  682. ch_info = il->channel_info;
  683. /* Loop through the 5 EEPROM bands adding them in order to the
  684. * channel map we maintain (that contains additional information than
  685. * what just in the EEPROM) */
  686. for (band = 1; band <= 5; band++) {
  687. il_init_band_reference(il, band, &eeprom_ch_count,
  688. &eeprom_ch_info, &eeprom_ch_idx);
  689. /* Loop through each band adding each of the channels */
  690. for (ch = 0; ch < eeprom_ch_count; ch++) {
  691. ch_info->channel = eeprom_ch_idx[ch];
  692. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  693. IEEE80211_BAND_5GHZ;
  694. /* permanently store EEPROM's channel regulatory flags
  695. * and max power in channel info database. */
  696. ch_info->eeprom = eeprom_ch_info[ch];
  697. /* Copy the run-time flags so they are there even on
  698. * invalid channels */
  699. ch_info->flags = eeprom_ch_info[ch].flags;
  700. /* First write that ht40 is not enabled, and then enable
  701. * one by one */
  702. ch_info->ht40_extension_channel =
  703. IEEE80211_CHAN_NO_HT40;
  704. if (!(il_is_channel_valid(ch_info))) {
  705. D_EEPROM(
  706. "Ch. %d Flags %x [%sGHz] - "
  707. "No traffic\n",
  708. ch_info->channel,
  709. ch_info->flags,
  710. il_is_channel_a_band(ch_info) ?
  711. "5.2" : "2.4");
  712. ch_info++;
  713. continue;
  714. }
  715. /* Initialize regulatory-based run-time data */
  716. ch_info->max_power_avg = ch_info->curr_txpow =
  717. eeprom_ch_info[ch].max_power_avg;
  718. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  719. ch_info->min_power = 0;
  720. D_EEPROM("Ch. %d [%sGHz] "
  721. "%s%s%s%s%s%s(0x%02x %ddBm):"
  722. " Ad-Hoc %ssupported\n",
  723. ch_info->channel,
  724. il_is_channel_a_band(ch_info) ?
  725. "5.2" : "2.4",
  726. CHECK_AND_PRINT_I(VALID),
  727. CHECK_AND_PRINT_I(IBSS),
  728. CHECK_AND_PRINT_I(ACTIVE),
  729. CHECK_AND_PRINT_I(RADAR),
  730. CHECK_AND_PRINT_I(WIDE),
  731. CHECK_AND_PRINT_I(DFS),
  732. eeprom_ch_info[ch].flags,
  733. eeprom_ch_info[ch].max_power_avg,
  734. ((eeprom_ch_info[ch].
  735. flags & EEPROM_CHANNEL_IBSS)
  736. && !(eeprom_ch_info[ch].
  737. flags & EEPROM_CHANNEL_RADAR))
  738. ? "" : "not ");
  739. ch_info++;
  740. }
  741. }
  742. /* Check if we do have HT40 channels */
  743. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  744. EEPROM_REGULATORY_BAND_NO_HT40 &&
  745. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  746. EEPROM_REGULATORY_BAND_NO_HT40)
  747. return 0;
  748. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  749. for (band = 6; band <= 7; band++) {
  750. enum ieee80211_band ieeeband;
  751. il_init_band_reference(il, band, &eeprom_ch_count,
  752. &eeprom_ch_info, &eeprom_ch_idx);
  753. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  754. ieeeband =
  755. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  756. /* Loop through each band adding each of the channels */
  757. for (ch = 0; ch < eeprom_ch_count; ch++) {
  758. /* Set up driver's info for lower half */
  759. il_mod_ht40_chan_info(il, ieeeband,
  760. eeprom_ch_idx[ch],
  761. &eeprom_ch_info[ch],
  762. IEEE80211_CHAN_NO_HT40PLUS);
  763. /* Set up driver's info for upper half */
  764. il_mod_ht40_chan_info(il, ieeeband,
  765. eeprom_ch_idx[ch] + 4,
  766. &eeprom_ch_info[ch],
  767. IEEE80211_CHAN_NO_HT40MINUS);
  768. }
  769. }
  770. return 0;
  771. }
  772. EXPORT_SYMBOL(il_init_channel_map);
  773. /*
  774. * il_free_channel_map - undo allocations in il_init_channel_map
  775. */
  776. void il_free_channel_map(struct il_priv *il)
  777. {
  778. kfree(il->channel_info);
  779. il->channel_count = 0;
  780. }
  781. EXPORT_SYMBOL(il_free_channel_map);
  782. /**
  783. * il_get_channel_info - Find driver's ilate channel info
  784. *
  785. * Based on band and channel number.
  786. */
  787. const struct
  788. il_channel_info *il_get_channel_info(const struct il_priv *il,
  789. enum ieee80211_band band, u16 channel)
  790. {
  791. int i;
  792. switch (band) {
  793. case IEEE80211_BAND_5GHZ:
  794. for (i = 14; i < il->channel_count; i++) {
  795. if (il->channel_info[i].channel == channel)
  796. return &il->channel_info[i];
  797. }
  798. break;
  799. case IEEE80211_BAND_2GHZ:
  800. if (channel >= 1 && channel <= 14)
  801. return &il->channel_info[channel - 1];
  802. break;
  803. default:
  804. BUG();
  805. }
  806. return NULL;
  807. }
  808. EXPORT_SYMBOL(il_get_channel_info);
  809. /*
  810. * Setting power level allows the card to go to sleep when not busy.
  811. *
  812. * We calculate a sleep command based on the required latency, which
  813. * we get from mac80211. In order to handle thermal throttling, we can
  814. * also use pre-defined power levels.
  815. */
  816. /*
  817. * This defines the old power levels. They are still used by default
  818. * (level 1) and for thermal throttle (levels 3 through 5)
  819. */
  820. struct il_power_vec_entry {
  821. struct il_powertable_cmd cmd;
  822. u8 no_dtim; /* number of skip dtim */
  823. };
  824. static void il_power_sleep_cam_cmd(struct il_priv *il,
  825. struct il_powertable_cmd *cmd)
  826. {
  827. memset(cmd, 0, sizeof(*cmd));
  828. if (il->power_data.pci_pm)
  829. cmd->flags |= IL_POWER_PCI_PM_MSK;
  830. D_POWER("Sleep command for CAM\n");
  831. }
  832. static int
  833. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  834. {
  835. D_POWER("Sending power/sleep command\n");
  836. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  837. D_POWER("Tx timeout = %u\n",
  838. le32_to_cpu(cmd->tx_data_timeout));
  839. D_POWER("Rx timeout = %u\n",
  840. le32_to_cpu(cmd->rx_data_timeout));
  841. D_POWER(
  842. "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  843. le32_to_cpu(cmd->sleep_interval[0]),
  844. le32_to_cpu(cmd->sleep_interval[1]),
  845. le32_to_cpu(cmd->sleep_interval[2]),
  846. le32_to_cpu(cmd->sleep_interval[3]),
  847. le32_to_cpu(cmd->sleep_interval[4]));
  848. return il_send_cmd_pdu(il, C_POWER_TBL,
  849. sizeof(struct il_powertable_cmd), cmd);
  850. }
  851. int
  852. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd,
  853. bool force)
  854. {
  855. int ret;
  856. bool update_chains;
  857. lockdep_assert_held(&il->mutex);
  858. /* Don't update the RX chain when chain noise calibration is running */
  859. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  860. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  861. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  862. return 0;
  863. if (!il_is_ready_rf(il))
  864. return -EIO;
  865. /* scan complete use sleep_power_next, need to be updated */
  866. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  867. if (test_bit(S_SCANNING, &il->status) && !force) {
  868. D_INFO("Defer power set mode while scanning\n");
  869. return 0;
  870. }
  871. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  872. set_bit(S_POWER_PMI, &il->status);
  873. ret = il_set_power(il, cmd);
  874. if (!ret) {
  875. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  876. clear_bit(S_POWER_PMI, &il->status);
  877. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  878. il->cfg->ops->lib->update_chain_flags(il);
  879. else if (il->cfg->ops->lib->update_chain_flags)
  880. D_POWER(
  881. "Cannot update the power, chain noise "
  882. "calibration running: %d\n",
  883. il->chain_noise_data.state);
  884. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  885. } else
  886. IL_ERR("set power fail, ret = %d", ret);
  887. return ret;
  888. }
  889. int il_power_update_mode(struct il_priv *il, bool force)
  890. {
  891. struct il_powertable_cmd cmd;
  892. il_power_sleep_cam_cmd(il, &cmd);
  893. return il_power_set_mode(il, &cmd, force);
  894. }
  895. EXPORT_SYMBOL(il_power_update_mode);
  896. /* initialize to default */
  897. void il_power_initialize(struct il_priv *il)
  898. {
  899. u16 lctl = il_pcie_link_ctl(il);
  900. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  901. il->power_data.debug_sleep_level_override = -1;
  902. memset(&il->power_data.sleep_cmd, 0,
  903. sizeof(il->power_data.sleep_cmd));
  904. }
  905. EXPORT_SYMBOL(il_power_initialize);
  906. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  907. * sending probe req. This should be set long enough to hear probe responses
  908. * from more than one AP. */
  909. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  910. #define IL_ACTIVE_DWELL_TIME_52 (20)
  911. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  912. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  913. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  914. * Must be set longer than active dwell time.
  915. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  916. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  917. #define IL_PASSIVE_DWELL_TIME_52 (10)
  918. #define IL_PASSIVE_DWELL_BASE (100)
  919. #define IL_CHANNEL_TUNE_TIME 5
  920. static int il_send_scan_abort(struct il_priv *il)
  921. {
  922. int ret;
  923. struct il_rx_pkt *pkt;
  924. struct il_host_cmd cmd = {
  925. .id = C_SCAN_ABORT,
  926. .flags = CMD_WANT_SKB,
  927. };
  928. /* Exit instantly with error when device is not ready
  929. * to receive scan abort command or it does not perform
  930. * hardware scan currently */
  931. if (!test_bit(S_READY, &il->status) ||
  932. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  933. !test_bit(S_SCAN_HW, &il->status) ||
  934. test_bit(S_FW_ERROR, &il->status) ||
  935. test_bit(S_EXIT_PENDING, &il->status))
  936. return -EIO;
  937. ret = il_send_cmd_sync(il, &cmd);
  938. if (ret)
  939. return ret;
  940. pkt = (struct il_rx_pkt *)cmd.reply_page;
  941. if (pkt->u.status != CAN_ABORT_STATUS) {
  942. /* The scan abort will return 1 for success or
  943. * 2 for "failure". A failure condition can be
  944. * due to simply not being in an active scan which
  945. * can occur if we send the scan abort before we
  946. * the microcode has notified us that a scan is
  947. * completed. */
  948. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  949. ret = -EIO;
  950. }
  951. il_free_pages(il, cmd.reply_page);
  952. return ret;
  953. }
  954. static void il_complete_scan(struct il_priv *il, bool aborted)
  955. {
  956. /* check if scan was requested from mac80211 */
  957. if (il->scan_request) {
  958. D_SCAN("Complete scan in mac80211\n");
  959. ieee80211_scan_completed(il->hw, aborted);
  960. }
  961. il->scan_vif = NULL;
  962. il->scan_request = NULL;
  963. }
  964. void il_force_scan_end(struct il_priv *il)
  965. {
  966. lockdep_assert_held(&il->mutex);
  967. if (!test_bit(S_SCANNING, &il->status)) {
  968. D_SCAN("Forcing scan end while not scanning\n");
  969. return;
  970. }
  971. D_SCAN("Forcing scan end\n");
  972. clear_bit(S_SCANNING, &il->status);
  973. clear_bit(S_SCAN_HW, &il->status);
  974. clear_bit(S_SCAN_ABORTING, &il->status);
  975. il_complete_scan(il, true);
  976. }
  977. static void il_do_scan_abort(struct il_priv *il)
  978. {
  979. int ret;
  980. lockdep_assert_held(&il->mutex);
  981. if (!test_bit(S_SCANNING, &il->status)) {
  982. D_SCAN("Not performing scan to abort\n");
  983. return;
  984. }
  985. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  986. D_SCAN("Scan abort in progress\n");
  987. return;
  988. }
  989. ret = il_send_scan_abort(il);
  990. if (ret) {
  991. D_SCAN("Send scan abort failed %d\n", ret);
  992. il_force_scan_end(il);
  993. } else
  994. D_SCAN("Successfully send scan abort\n");
  995. }
  996. /**
  997. * il_scan_cancel - Cancel any currently executing HW scan
  998. */
  999. int il_scan_cancel(struct il_priv *il)
  1000. {
  1001. D_SCAN("Queuing abort scan\n");
  1002. queue_work(il->workqueue, &il->abort_scan);
  1003. return 0;
  1004. }
  1005. EXPORT_SYMBOL(il_scan_cancel);
  1006. /**
  1007. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1008. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1009. *
  1010. */
  1011. int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1012. {
  1013. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1014. lockdep_assert_held(&il->mutex);
  1015. D_SCAN("Scan cancel timeout\n");
  1016. il_do_scan_abort(il);
  1017. while (time_before_eq(jiffies, timeout)) {
  1018. if (!test_bit(S_SCAN_HW, &il->status))
  1019. break;
  1020. msleep(20);
  1021. }
  1022. return test_bit(S_SCAN_HW, &il->status);
  1023. }
  1024. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1025. /* Service response to C_SCAN (0x80) */
  1026. static void il_hdl_scan(struct il_priv *il,
  1027. struct il_rx_buf *rxb)
  1028. {
  1029. #ifdef CONFIG_IWLEGACY_DEBUG
  1030. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1031. struct il_scanreq_notification *notif =
  1032. (struct il_scanreq_notification *)pkt->u.raw;
  1033. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1034. #endif
  1035. }
  1036. /* Service N_SCAN_START (0x82) */
  1037. static void il_hdl_scan_start(struct il_priv *il,
  1038. struct il_rx_buf *rxb)
  1039. {
  1040. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1041. struct il_scanstart_notification *notif =
  1042. (struct il_scanstart_notification *)pkt->u.raw;
  1043. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1044. D_SCAN("Scan start: "
  1045. "%d [802.11%s] "
  1046. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1047. notif->channel,
  1048. notif->band ? "bg" : "a",
  1049. le32_to_cpu(notif->tsf_high),
  1050. le32_to_cpu(notif->tsf_low),
  1051. notif->status, notif->beacon_timer);
  1052. }
  1053. /* Service N_SCAN_RESULTS (0x83) */
  1054. static void il_hdl_scan_results(struct il_priv *il,
  1055. struct il_rx_buf *rxb)
  1056. {
  1057. #ifdef CONFIG_IWLEGACY_DEBUG
  1058. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1059. struct il_scanresults_notification *notif =
  1060. (struct il_scanresults_notification *)pkt->u.raw;
  1061. D_SCAN("Scan ch.res: "
  1062. "%d [802.11%s] "
  1063. "(TSF: 0x%08X:%08X) - %d "
  1064. "elapsed=%lu usec\n",
  1065. notif->channel,
  1066. notif->band ? "bg" : "a",
  1067. le32_to_cpu(notif->tsf_high),
  1068. le32_to_cpu(notif->tsf_low),
  1069. le32_to_cpu(notif->stats[0]),
  1070. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1071. #endif
  1072. }
  1073. /* Service N_SCAN_COMPLETE (0x84) */
  1074. static void il_hdl_scan_complete(struct il_priv *il,
  1075. struct il_rx_buf *rxb)
  1076. {
  1077. #ifdef CONFIG_IWLEGACY_DEBUG
  1078. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1079. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1080. #endif
  1081. D_SCAN(
  1082. "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1083. scan_notif->scanned_channels,
  1084. scan_notif->tsf_low,
  1085. scan_notif->tsf_high, scan_notif->status);
  1086. /* The HW is no longer scanning */
  1087. clear_bit(S_SCAN_HW, &il->status);
  1088. D_SCAN("Scan on %sGHz took %dms\n",
  1089. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1090. jiffies_to_msecs(jiffies - il->scan_start));
  1091. queue_work(il->workqueue, &il->scan_completed);
  1092. }
  1093. void il_setup_rx_scan_handlers(struct il_priv *il)
  1094. {
  1095. /* scan handlers */
  1096. il->handlers[C_SCAN] = il_hdl_scan;
  1097. il->handlers[N_SCAN_START] =
  1098. il_hdl_scan_start;
  1099. il->handlers[N_SCAN_RESULTS] =
  1100. il_hdl_scan_results;
  1101. il->handlers[N_SCAN_COMPLETE] =
  1102. il_hdl_scan_complete;
  1103. }
  1104. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1105. inline u16 il_get_active_dwell_time(struct il_priv *il,
  1106. enum ieee80211_band band,
  1107. u8 n_probes)
  1108. {
  1109. if (band == IEEE80211_BAND_5GHZ)
  1110. return IL_ACTIVE_DWELL_TIME_52 +
  1111. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1112. else
  1113. return IL_ACTIVE_DWELL_TIME_24 +
  1114. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1115. }
  1116. EXPORT_SYMBOL(il_get_active_dwell_time);
  1117. u16 il_get_passive_dwell_time(struct il_priv *il,
  1118. enum ieee80211_band band,
  1119. struct ieee80211_vif *vif)
  1120. {
  1121. struct il_rxon_context *ctx = &il->ctx;
  1122. u16 value;
  1123. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  1124. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 :
  1125. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52;
  1126. if (il_is_any_associated(il)) {
  1127. /*
  1128. * If we're associated, we clamp the maximum passive
  1129. * dwell time to be 98% of the smallest beacon interval
  1130. * (minus 2 * channel tune time)
  1131. */
  1132. value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
  1133. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1134. value = IL_PASSIVE_DWELL_BASE;
  1135. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1136. passive = min(value, passive);
  1137. }
  1138. return passive;
  1139. }
  1140. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1141. void il_init_scan_params(struct il_priv *il)
  1142. {
  1143. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1144. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1145. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1146. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1147. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1148. }
  1149. EXPORT_SYMBOL(il_init_scan_params);
  1150. static int il_scan_initiate(struct il_priv *il,
  1151. struct ieee80211_vif *vif)
  1152. {
  1153. int ret;
  1154. lockdep_assert_held(&il->mutex);
  1155. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1156. return -EOPNOTSUPP;
  1157. cancel_delayed_work(&il->scan_check);
  1158. if (!il_is_ready_rf(il)) {
  1159. IL_WARN("Request scan called when driver not ready.\n");
  1160. return -EIO;
  1161. }
  1162. if (test_bit(S_SCAN_HW, &il->status)) {
  1163. D_SCAN(
  1164. "Multiple concurrent scan requests in parallel.\n");
  1165. return -EBUSY;
  1166. }
  1167. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1168. D_SCAN("Scan request while abort pending.\n");
  1169. return -EBUSY;
  1170. }
  1171. D_SCAN("Starting scan...\n");
  1172. set_bit(S_SCANNING, &il->status);
  1173. il->scan_start = jiffies;
  1174. ret = il->cfg->ops->utils->request_scan(il, vif);
  1175. if (ret) {
  1176. clear_bit(S_SCANNING, &il->status);
  1177. return ret;
  1178. }
  1179. queue_delayed_work(il->workqueue, &il->scan_check,
  1180. IL_SCAN_CHECK_WATCHDOG);
  1181. return 0;
  1182. }
  1183. int il_mac_hw_scan(struct ieee80211_hw *hw,
  1184. struct ieee80211_vif *vif,
  1185. struct cfg80211_scan_request *req)
  1186. {
  1187. struct il_priv *il = hw->priv;
  1188. int ret;
  1189. D_MAC80211("enter\n");
  1190. if (req->n_channels == 0)
  1191. return -EINVAL;
  1192. mutex_lock(&il->mutex);
  1193. if (test_bit(S_SCANNING, &il->status)) {
  1194. D_SCAN("Scan already in progress.\n");
  1195. ret = -EAGAIN;
  1196. goto out_unlock;
  1197. }
  1198. /* mac80211 will only ask for one band at a time */
  1199. il->scan_request = req;
  1200. il->scan_vif = vif;
  1201. il->scan_band = req->channels[0]->band;
  1202. ret = il_scan_initiate(il, vif);
  1203. D_MAC80211("leave\n");
  1204. out_unlock:
  1205. mutex_unlock(&il->mutex);
  1206. return ret;
  1207. }
  1208. EXPORT_SYMBOL(il_mac_hw_scan);
  1209. static void il_bg_scan_check(struct work_struct *data)
  1210. {
  1211. struct il_priv *il =
  1212. container_of(data, struct il_priv, scan_check.work);
  1213. D_SCAN("Scan check work\n");
  1214. /* Since we are here firmware does not finish scan and
  1215. * most likely is in bad shape, so we don't bother to
  1216. * send abort command, just force scan complete to mac80211 */
  1217. mutex_lock(&il->mutex);
  1218. il_force_scan_end(il);
  1219. mutex_unlock(&il->mutex);
  1220. }
  1221. /**
  1222. * il_fill_probe_req - fill in all required fields and IE for probe request
  1223. */
  1224. u16
  1225. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1226. const u8 *ta, const u8 *ies, int ie_len, int left)
  1227. {
  1228. int len = 0;
  1229. u8 *pos = NULL;
  1230. /* Make sure there is enough space for the probe request,
  1231. * two mandatory IEs and the data */
  1232. left -= 24;
  1233. if (left < 0)
  1234. return 0;
  1235. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1236. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1237. memcpy(frame->sa, ta, ETH_ALEN);
  1238. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1239. frame->seq_ctrl = 0;
  1240. len += 24;
  1241. /* ...next IE... */
  1242. pos = &frame->u.probe_req.variable[0];
  1243. /* fill in our indirect SSID IE */
  1244. left -= 2;
  1245. if (left < 0)
  1246. return 0;
  1247. *pos++ = WLAN_EID_SSID;
  1248. *pos++ = 0;
  1249. len += 2;
  1250. if (WARN_ON(left < ie_len))
  1251. return len;
  1252. if (ies && ie_len) {
  1253. memcpy(pos, ies, ie_len);
  1254. len += ie_len;
  1255. }
  1256. return (u16)len;
  1257. }
  1258. EXPORT_SYMBOL(il_fill_probe_req);
  1259. static void il_bg_abort_scan(struct work_struct *work)
  1260. {
  1261. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1262. D_SCAN("Abort scan work\n");
  1263. /* We keep scan_check work queued in case when firmware will not
  1264. * report back scan completed notification */
  1265. mutex_lock(&il->mutex);
  1266. il_scan_cancel_timeout(il, 200);
  1267. mutex_unlock(&il->mutex);
  1268. }
  1269. static void il_bg_scan_completed(struct work_struct *work)
  1270. {
  1271. struct il_priv *il =
  1272. container_of(work, struct il_priv, scan_completed);
  1273. bool aborted;
  1274. D_SCAN("Completed scan.\n");
  1275. cancel_delayed_work(&il->scan_check);
  1276. mutex_lock(&il->mutex);
  1277. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1278. if (aborted)
  1279. D_SCAN("Aborted scan completed.\n");
  1280. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1281. D_SCAN("Scan already completed.\n");
  1282. goto out_settings;
  1283. }
  1284. il_complete_scan(il, aborted);
  1285. out_settings:
  1286. /* Can we still talk to firmware ? */
  1287. if (!il_is_ready_rf(il))
  1288. goto out;
  1289. /*
  1290. * We do not commit power settings while scan is pending,
  1291. * do it now if the settings changed.
  1292. */
  1293. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1294. il_set_tx_power(il, il->tx_power_next, false);
  1295. il->cfg->ops->utils->post_scan(il);
  1296. out:
  1297. mutex_unlock(&il->mutex);
  1298. }
  1299. void il_setup_scan_deferred_work(struct il_priv *il)
  1300. {
  1301. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1302. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1303. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1304. }
  1305. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1306. void il_cancel_scan_deferred_work(struct il_priv *il)
  1307. {
  1308. cancel_work_sync(&il->abort_scan);
  1309. cancel_work_sync(&il->scan_completed);
  1310. if (cancel_delayed_work_sync(&il->scan_check)) {
  1311. mutex_lock(&il->mutex);
  1312. il_force_scan_end(il);
  1313. mutex_unlock(&il->mutex);
  1314. }
  1315. }
  1316. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1317. /* il->sta_lock must be held */
  1318. static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1319. {
  1320. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1321. IL_ERR(
  1322. "ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1323. sta_id, il->stations[sta_id].sta.sta.addr);
  1324. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1325. D_ASSOC(
  1326. "STA id %u addr %pM already present"
  1327. " in uCode (according to driver)\n",
  1328. sta_id, il->stations[sta_id].sta.sta.addr);
  1329. } else {
  1330. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1331. D_ASSOC("Added STA id %u addr %pM to uCode\n",
  1332. sta_id, il->stations[sta_id].sta.sta.addr);
  1333. }
  1334. }
  1335. static int il_process_add_sta_resp(struct il_priv *il,
  1336. struct il_addsta_cmd *addsta,
  1337. struct il_rx_pkt *pkt,
  1338. bool sync)
  1339. {
  1340. u8 sta_id = addsta->sta.sta_id;
  1341. unsigned long flags;
  1342. int ret = -EIO;
  1343. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1344. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n",
  1345. pkt->hdr.flags);
  1346. return ret;
  1347. }
  1348. D_INFO("Processing response for adding station %u\n",
  1349. sta_id);
  1350. spin_lock_irqsave(&il->sta_lock, flags);
  1351. switch (pkt->u.add_sta.status) {
  1352. case ADD_STA_SUCCESS_MSK:
  1353. D_INFO("C_ADD_STA PASSED\n");
  1354. il_sta_ucode_activate(il, sta_id);
  1355. ret = 0;
  1356. break;
  1357. case ADD_STA_NO_ROOM_IN_TBL:
  1358. IL_ERR("Adding station %d failed, no room in table.\n",
  1359. sta_id);
  1360. break;
  1361. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1362. IL_ERR(
  1363. "Adding station %d failed, no block ack resource.\n",
  1364. sta_id);
  1365. break;
  1366. case ADD_STA_MODIFY_NON_EXIST_STA:
  1367. IL_ERR("Attempting to modify non-existing station %d\n",
  1368. sta_id);
  1369. break;
  1370. default:
  1371. D_ASSOC("Received C_ADD_STA:(0x%08X)\n",
  1372. pkt->u.add_sta.status);
  1373. break;
  1374. }
  1375. D_INFO("%s station id %u addr %pM\n",
  1376. il->stations[sta_id].sta.mode ==
  1377. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1378. sta_id, il->stations[sta_id].sta.sta.addr);
  1379. /*
  1380. * XXX: The MAC address in the command buffer is often changed from
  1381. * the original sent to the device. That is, the MAC address
  1382. * written to the command buffer often is not the same MAC address
  1383. * read from the command buffer when the command returns. This
  1384. * issue has not yet been resolved and this debugging is left to
  1385. * observe the problem.
  1386. */
  1387. D_INFO("%s station according to cmd buffer %pM\n",
  1388. il->stations[sta_id].sta.mode ==
  1389. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1390. addsta->sta.addr);
  1391. spin_unlock_irqrestore(&il->sta_lock, flags);
  1392. return ret;
  1393. }
  1394. static void il_add_sta_callback(struct il_priv *il,
  1395. struct il_device_cmd *cmd,
  1396. struct il_rx_pkt *pkt)
  1397. {
  1398. struct il_addsta_cmd *addsta =
  1399. (struct il_addsta_cmd *)cmd->cmd.payload;
  1400. il_process_add_sta_resp(il, addsta, pkt, false);
  1401. }
  1402. int il_send_add_sta(struct il_priv *il,
  1403. struct il_addsta_cmd *sta, u8 flags)
  1404. {
  1405. struct il_rx_pkt *pkt = NULL;
  1406. int ret = 0;
  1407. u8 data[sizeof(*sta)];
  1408. struct il_host_cmd cmd = {
  1409. .id = C_ADD_STA,
  1410. .flags = flags,
  1411. .data = data,
  1412. };
  1413. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1414. D_INFO("Adding sta %u (%pM) %ssynchronously\n",
  1415. sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
  1416. if (flags & CMD_ASYNC)
  1417. cmd.callback = il_add_sta_callback;
  1418. else {
  1419. cmd.flags |= CMD_WANT_SKB;
  1420. might_sleep();
  1421. }
  1422. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1423. ret = il_send_cmd(il, &cmd);
  1424. if (ret || (flags & CMD_ASYNC))
  1425. return ret;
  1426. if (ret == 0) {
  1427. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1428. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1429. }
  1430. il_free_pages(il, cmd.reply_page);
  1431. return ret;
  1432. }
  1433. EXPORT_SYMBOL(il_send_add_sta);
  1434. static void il_set_ht_add_station(struct il_priv *il, u8 idx,
  1435. struct ieee80211_sta *sta,
  1436. struct il_rxon_context *ctx)
  1437. {
  1438. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1439. __le32 sta_flags;
  1440. u8 mimo_ps_mode;
  1441. if (!sta || !sta_ht_inf->ht_supported)
  1442. goto done;
  1443. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1444. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1445. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
  1446. "static" :
  1447. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
  1448. "dynamic" : "disabled");
  1449. sta_flags = il->stations[idx].sta.station_flags;
  1450. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1451. switch (mimo_ps_mode) {
  1452. case WLAN_HT_CAP_SM_PS_STATIC:
  1453. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1454. break;
  1455. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1456. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1457. break;
  1458. case WLAN_HT_CAP_SM_PS_DISABLED:
  1459. break;
  1460. default:
  1461. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1462. break;
  1463. }
  1464. sta_flags |= cpu_to_le32(
  1465. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1466. sta_flags |= cpu_to_le32(
  1467. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1468. if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
  1469. sta_flags |= STA_FLG_HT40_EN_MSK;
  1470. else
  1471. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1472. il->stations[idx].sta.station_flags = sta_flags;
  1473. done:
  1474. return;
  1475. }
  1476. /**
  1477. * il_prep_station - Prepare station information for addition
  1478. *
  1479. * should be called with sta_lock held
  1480. */
  1481. u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
  1482. const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
  1483. {
  1484. struct il_station_entry *station;
  1485. int i;
  1486. u8 sta_id = IL_INVALID_STATION;
  1487. u16 rate;
  1488. if (is_ap)
  1489. sta_id = ctx->ap_sta_id;
  1490. else if (is_broadcast_ether_addr(addr))
  1491. sta_id = ctx->bcast_sta_id;
  1492. else
  1493. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1494. if (!compare_ether_addr(il->stations[i].sta.sta.addr,
  1495. addr)) {
  1496. sta_id = i;
  1497. break;
  1498. }
  1499. if (!il->stations[i].used &&
  1500. sta_id == IL_INVALID_STATION)
  1501. sta_id = i;
  1502. }
  1503. /*
  1504. * These two conditions have the same outcome, but keep them
  1505. * separate
  1506. */
  1507. if (unlikely(sta_id == IL_INVALID_STATION))
  1508. return sta_id;
  1509. /*
  1510. * uCode is not able to deal with multiple requests to add a
  1511. * station. Keep track if one is in progress so that we do not send
  1512. * another.
  1513. */
  1514. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1515. D_INFO(
  1516. "STA %d already in process of being added.\n",
  1517. sta_id);
  1518. return sta_id;
  1519. }
  1520. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1521. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1522. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1523. D_ASSOC(
  1524. "STA %d (%pM) already added, not adding again.\n",
  1525. sta_id, addr);
  1526. return sta_id;
  1527. }
  1528. station = &il->stations[sta_id];
  1529. station->used = IL_STA_DRIVER_ACTIVE;
  1530. D_ASSOC("Add STA to driver ID %d: %pM\n",
  1531. sta_id, addr);
  1532. il->num_stations++;
  1533. /* Set up the C_ADD_STA command to send to device */
  1534. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1535. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1536. station->sta.mode = 0;
  1537. station->sta.sta.sta_id = sta_id;
  1538. station->sta.station_flags = ctx->station_flags;
  1539. station->ctxid = ctx->ctxid;
  1540. if (sta) {
  1541. struct il_station_priv_common *sta_priv;
  1542. sta_priv = (void *)sta->drv_priv;
  1543. sta_priv->ctx = ctx;
  1544. }
  1545. /*
  1546. * OK to call unconditionally, since local stations (IBSS BSSID
  1547. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1548. * doesn't allow HT IBSS.
  1549. */
  1550. il_set_ht_add_station(il, sta_id, sta, ctx);
  1551. /* 3945 only */
  1552. rate = (il->band == IEEE80211_BAND_5GHZ) ?
  1553. RATE_6M_PLCP : RATE_1M_PLCP;
  1554. /* Turn on both antennas for the station... */
  1555. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1556. return sta_id;
  1557. }
  1558. EXPORT_SYMBOL_GPL(il_prep_station);
  1559. #define STA_WAIT_TIMEOUT (HZ/2)
  1560. /**
  1561. * il_add_station_common -
  1562. */
  1563. int
  1564. il_add_station_common(struct il_priv *il,
  1565. struct il_rxon_context *ctx,
  1566. const u8 *addr, bool is_ap,
  1567. struct ieee80211_sta *sta, u8 *sta_id_r)
  1568. {
  1569. unsigned long flags_spin;
  1570. int ret = 0;
  1571. u8 sta_id;
  1572. struct il_addsta_cmd sta_cmd;
  1573. *sta_id_r = 0;
  1574. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1575. sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
  1576. if (sta_id == IL_INVALID_STATION) {
  1577. IL_ERR("Unable to prepare station %pM for addition\n",
  1578. addr);
  1579. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1580. return -EINVAL;
  1581. }
  1582. /*
  1583. * uCode is not able to deal with multiple requests to add a
  1584. * station. Keep track if one is in progress so that we do not send
  1585. * another.
  1586. */
  1587. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1588. D_INFO(
  1589. "STA %d already in process of being added.\n",
  1590. sta_id);
  1591. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1592. return -EEXIST;
  1593. }
  1594. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1595. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1596. D_ASSOC(
  1597. "STA %d (%pM) already added, not adding again.\n",
  1598. sta_id, addr);
  1599. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1600. return -EEXIST;
  1601. }
  1602. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1603. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1604. sizeof(struct il_addsta_cmd));
  1605. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1606. /* Add station to device's station table */
  1607. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1608. if (ret) {
  1609. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1610. IL_ERR("Adding station %pM failed.\n",
  1611. il->stations[sta_id].sta.sta.addr);
  1612. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1613. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1614. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1615. }
  1616. *sta_id_r = sta_id;
  1617. return ret;
  1618. }
  1619. EXPORT_SYMBOL(il_add_station_common);
  1620. /**
  1621. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1622. *
  1623. * il->sta_lock must be held
  1624. */
  1625. static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1626. {
  1627. /* Ucode must be active and driver must be non active */
  1628. if ((il->stations[sta_id].used &
  1629. (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1630. IL_STA_UCODE_ACTIVE)
  1631. IL_ERR("removed non active STA %u\n", sta_id);
  1632. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1633. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1634. D_ASSOC("Removed STA %u\n", sta_id);
  1635. }
  1636. static int il_send_remove_station(struct il_priv *il,
  1637. const u8 *addr, int sta_id,
  1638. bool temporary)
  1639. {
  1640. struct il_rx_pkt *pkt;
  1641. int ret;
  1642. unsigned long flags_spin;
  1643. struct il_rem_sta_cmd rm_sta_cmd;
  1644. struct il_host_cmd cmd = {
  1645. .id = C_REM_STA,
  1646. .len = sizeof(struct il_rem_sta_cmd),
  1647. .flags = CMD_SYNC,
  1648. .data = &rm_sta_cmd,
  1649. };
  1650. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1651. rm_sta_cmd.num_sta = 1;
  1652. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1653. cmd.flags |= CMD_WANT_SKB;
  1654. ret = il_send_cmd(il, &cmd);
  1655. if (ret)
  1656. return ret;
  1657. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1658. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1659. IL_ERR("Bad return from C_REM_STA (0x%08X)\n",
  1660. pkt->hdr.flags);
  1661. ret = -EIO;
  1662. }
  1663. if (!ret) {
  1664. switch (pkt->u.rem_sta.status) {
  1665. case REM_STA_SUCCESS_MSK:
  1666. if (!temporary) {
  1667. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1668. il_sta_ucode_deactivate(il, sta_id);
  1669. spin_unlock_irqrestore(&il->sta_lock,
  1670. flags_spin);
  1671. }
  1672. D_ASSOC("C_REM_STA PASSED\n");
  1673. break;
  1674. default:
  1675. ret = -EIO;
  1676. IL_ERR("C_REM_STA failed\n");
  1677. break;
  1678. }
  1679. }
  1680. il_free_pages(il, cmd.reply_page);
  1681. return ret;
  1682. }
  1683. /**
  1684. * il_remove_station - Remove driver's knowledge of station.
  1685. */
  1686. int il_remove_station(struct il_priv *il, const u8 sta_id,
  1687. const u8 *addr)
  1688. {
  1689. unsigned long flags;
  1690. if (!il_is_ready(il)) {
  1691. D_INFO(
  1692. "Unable to remove station %pM, device not ready.\n",
  1693. addr);
  1694. /*
  1695. * It is typical for stations to be removed when we are
  1696. * going down. Return success since device will be down
  1697. * soon anyway
  1698. */
  1699. return 0;
  1700. }
  1701. D_ASSOC("Removing STA from driver:%d %pM\n",
  1702. sta_id, addr);
  1703. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1704. return -EINVAL;
  1705. spin_lock_irqsave(&il->sta_lock, flags);
  1706. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1707. D_INFO("Removing %pM but non DRIVER active\n",
  1708. addr);
  1709. goto out_err;
  1710. }
  1711. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1712. D_INFO("Removing %pM but non UCODE active\n",
  1713. addr);
  1714. goto out_err;
  1715. }
  1716. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1717. kfree(il->stations[sta_id].lq);
  1718. il->stations[sta_id].lq = NULL;
  1719. }
  1720. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1721. il->num_stations--;
  1722. BUG_ON(il->num_stations < 0);
  1723. spin_unlock_irqrestore(&il->sta_lock, flags);
  1724. return il_send_remove_station(il, addr, sta_id, false);
  1725. out_err:
  1726. spin_unlock_irqrestore(&il->sta_lock, flags);
  1727. return -EINVAL;
  1728. }
  1729. EXPORT_SYMBOL_GPL(il_remove_station);
  1730. /**
  1731. * il_clear_ucode_stations - clear ucode station table bits
  1732. *
  1733. * This function clears all the bits in the driver indicating
  1734. * which stations are active in the ucode. Call when something
  1735. * other than explicit station management would cause this in
  1736. * the ucode, e.g. unassociated RXON.
  1737. */
  1738. void il_clear_ucode_stations(struct il_priv *il,
  1739. struct il_rxon_context *ctx)
  1740. {
  1741. int i;
  1742. unsigned long flags_spin;
  1743. bool cleared = false;
  1744. D_INFO("Clearing ucode stations in driver\n");
  1745. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1746. for (i = 0; i < il->hw_params.max_stations; i++) {
  1747. if (ctx && ctx->ctxid != il->stations[i].ctxid)
  1748. continue;
  1749. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1750. D_INFO(
  1751. "Clearing ucode active for station %d\n", i);
  1752. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1753. cleared = true;
  1754. }
  1755. }
  1756. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1757. if (!cleared)
  1758. D_INFO(
  1759. "No active stations found to be cleared\n");
  1760. }
  1761. EXPORT_SYMBOL(il_clear_ucode_stations);
  1762. /**
  1763. * il_restore_stations() - Restore driver known stations to device
  1764. *
  1765. * All stations considered active by driver, but not present in ucode, is
  1766. * restored.
  1767. *
  1768. * Function sleeps.
  1769. */
  1770. void
  1771. il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1772. {
  1773. struct il_addsta_cmd sta_cmd;
  1774. struct il_link_quality_cmd lq;
  1775. unsigned long flags_spin;
  1776. int i;
  1777. bool found = false;
  1778. int ret;
  1779. bool send_lq;
  1780. if (!il_is_ready(il)) {
  1781. D_INFO(
  1782. "Not ready yet, not restoring any stations.\n");
  1783. return;
  1784. }
  1785. D_ASSOC("Restoring all known stations ... start.\n");
  1786. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1787. for (i = 0; i < il->hw_params.max_stations; i++) {
  1788. if (ctx->ctxid != il->stations[i].ctxid)
  1789. continue;
  1790. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1791. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1792. D_ASSOC("Restoring sta %pM\n",
  1793. il->stations[i].sta.sta.addr);
  1794. il->stations[i].sta.mode = 0;
  1795. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1796. found = true;
  1797. }
  1798. }
  1799. for (i = 0; i < il->hw_params.max_stations; i++) {
  1800. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1801. memcpy(&sta_cmd, &il->stations[i].sta,
  1802. sizeof(struct il_addsta_cmd));
  1803. send_lq = false;
  1804. if (il->stations[i].lq) {
  1805. memcpy(&lq, il->stations[i].lq,
  1806. sizeof(struct il_link_quality_cmd));
  1807. send_lq = true;
  1808. }
  1809. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1810. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1811. if (ret) {
  1812. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1813. IL_ERR("Adding station %pM failed.\n",
  1814. il->stations[i].sta.sta.addr);
  1815. il->stations[i].used &=
  1816. ~IL_STA_DRIVER_ACTIVE;
  1817. il->stations[i].used &=
  1818. ~IL_STA_UCODE_INPROGRESS;
  1819. spin_unlock_irqrestore(&il->sta_lock,
  1820. flags_spin);
  1821. }
  1822. /*
  1823. * Rate scaling has already been initialized, send
  1824. * current LQ command
  1825. */
  1826. if (send_lq)
  1827. il_send_lq_cmd(il, ctx, &lq,
  1828. CMD_SYNC, true);
  1829. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1830. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1831. }
  1832. }
  1833. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1834. if (!found)
  1835. D_INFO("Restoring all known stations"
  1836. " .... no stations to be restored.\n");
  1837. else
  1838. D_INFO("Restoring all known stations"
  1839. " .... complete.\n");
  1840. }
  1841. EXPORT_SYMBOL(il_restore_stations);
  1842. int il_get_free_ucode_key_idx(struct il_priv *il)
  1843. {
  1844. int i;
  1845. for (i = 0; i < il->sta_key_max_num; i++)
  1846. if (!test_and_set_bit(i, &il->ucode_key_table))
  1847. return i;
  1848. return WEP_INVALID_OFFSET;
  1849. }
  1850. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1851. void il_dealloc_bcast_stations(struct il_priv *il)
  1852. {
  1853. unsigned long flags;
  1854. int i;
  1855. spin_lock_irqsave(&il->sta_lock, flags);
  1856. for (i = 0; i < il->hw_params.max_stations; i++) {
  1857. if (!(il->stations[i].used & IL_STA_BCAST))
  1858. continue;
  1859. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1860. il->num_stations--;
  1861. BUG_ON(il->num_stations < 0);
  1862. kfree(il->stations[i].lq);
  1863. il->stations[i].lq = NULL;
  1864. }
  1865. spin_unlock_irqrestore(&il->sta_lock, flags);
  1866. }
  1867. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1868. #ifdef CONFIG_IWLEGACY_DEBUG
  1869. static void il_dump_lq_cmd(struct il_priv *il,
  1870. struct il_link_quality_cmd *lq)
  1871. {
  1872. int i;
  1873. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1874. D_RATE("lq ant 0x%X 0x%X\n",
  1875. lq->general_params.single_stream_ant_msk,
  1876. lq->general_params.dual_stream_ant_msk);
  1877. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1878. D_RATE("lq idx %d 0x%X\n",
  1879. i, lq->rs_table[i].rate_n_flags);
  1880. }
  1881. #else
  1882. static inline void il_dump_lq_cmd(struct il_priv *il,
  1883. struct il_link_quality_cmd *lq)
  1884. {
  1885. }
  1886. #endif
  1887. /**
  1888. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1889. *
  1890. * It sometimes happens when a HT rate has been in use and we
  1891. * loose connectivity with AP then mac80211 will first tell us that the
  1892. * current channel is not HT anymore before removing the station. In such a
  1893. * scenario the RXON flags will be updated to indicate we are not
  1894. * communicating HT anymore, but the LQ command may still contain HT rates.
  1895. * Test for this to prevent driver from sending LQ command between the time
  1896. * RXON flags are updated and when LQ command is updated.
  1897. */
  1898. static bool il_is_lq_table_valid(struct il_priv *il,
  1899. struct il_rxon_context *ctx,
  1900. struct il_link_quality_cmd *lq)
  1901. {
  1902. int i;
  1903. if (ctx->ht.enabled)
  1904. return true;
  1905. D_INFO("Channel %u is not an HT channel\n",
  1906. ctx->active.channel);
  1907. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1908. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
  1909. RATE_MCS_HT_MSK) {
  1910. D_INFO(
  1911. "idx %d of LQ expects HT channel\n",
  1912. i);
  1913. return false;
  1914. }
  1915. }
  1916. return true;
  1917. }
  1918. /**
  1919. * il_send_lq_cmd() - Send link quality command
  1920. * @init: This command is sent as part of station initialization right
  1921. * after station has been added.
  1922. *
  1923. * The link quality command is sent as the last step of station creation.
  1924. * This is the special case in which init is set and we call a callback in
  1925. * this case to clear the state indicating that station creation is in
  1926. * progress.
  1927. */
  1928. int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
  1929. struct il_link_quality_cmd *lq, u8 flags, bool init)
  1930. {
  1931. int ret = 0;
  1932. unsigned long flags_spin;
  1933. struct il_host_cmd cmd = {
  1934. .id = C_TX_LINK_QUALITY_CMD,
  1935. .len = sizeof(struct il_link_quality_cmd),
  1936. .flags = flags,
  1937. .data = lq,
  1938. };
  1939. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  1940. return -EINVAL;
  1941. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1942. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1943. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1944. return -EINVAL;
  1945. }
  1946. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1947. il_dump_lq_cmd(il, lq);
  1948. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  1949. if (il_is_lq_table_valid(il, ctx, lq))
  1950. ret = il_send_cmd(il, &cmd);
  1951. else
  1952. ret = -EINVAL;
  1953. if (cmd.flags & CMD_ASYNC)
  1954. return ret;
  1955. if (init) {
  1956. D_INFO("init LQ command complete,"
  1957. " clearing sta addition status for sta %d\n",
  1958. lq->sta_id);
  1959. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1960. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1961. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1962. }
  1963. return ret;
  1964. }
  1965. EXPORT_SYMBOL(il_send_lq_cmd);
  1966. int il_mac_sta_remove(struct ieee80211_hw *hw,
  1967. struct ieee80211_vif *vif,
  1968. struct ieee80211_sta *sta)
  1969. {
  1970. struct il_priv *il = hw->priv;
  1971. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  1972. int ret;
  1973. D_INFO("received request to remove station %pM\n",
  1974. sta->addr);
  1975. mutex_lock(&il->mutex);
  1976. D_INFO("proceeding to remove station %pM\n",
  1977. sta->addr);
  1978. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  1979. if (ret)
  1980. IL_ERR("Error removing station %pM\n",
  1981. sta->addr);
  1982. mutex_unlock(&il->mutex);
  1983. return ret;
  1984. }
  1985. EXPORT_SYMBOL(il_mac_sta_remove);
  1986. /************************** RX-FUNCTIONS ****************************/
  1987. /*
  1988. * Rx theory of operation
  1989. *
  1990. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  1991. * each of which point to Receive Buffers to be filled by the NIC. These get
  1992. * used not only for Rx frames, but for any command response or notification
  1993. * from the NIC. The driver and NIC manage the Rx buffers by means
  1994. * of idxes into the circular buffer.
  1995. *
  1996. * Rx Queue Indexes
  1997. * The host/firmware share two idx registers for managing the Rx buffers.
  1998. *
  1999. * The READ idx maps to the first position that the firmware may be writing
  2000. * to -- the driver can read up to (but not including) this position and get
  2001. * good data.
  2002. * The READ idx is managed by the firmware once the card is enabled.
  2003. *
  2004. * The WRITE idx maps to the last position the driver has read from -- the
  2005. * position preceding WRITE is the last slot the firmware can place a packet.
  2006. *
  2007. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2008. * WRITE = READ.
  2009. *
  2010. * During initialization, the host sets up the READ queue position to the first
  2011. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2012. *
  2013. * When the firmware places a packet in a buffer, it will advance the READ idx
  2014. * and fire the RX interrupt. The driver can then query the READ idx and
  2015. * process as many packets as possible, moving the WRITE idx forward as it
  2016. * resets the Rx queue buffers with new memory.
  2017. *
  2018. * The management in the driver is as follows:
  2019. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2020. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2021. * to replenish the iwl->rxq->rx_free.
  2022. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2023. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2024. * 'processed' and 'read' driver idxes as well)
  2025. * + A received packet is processed and handed to the kernel network stack,
  2026. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2027. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2028. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2029. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2030. * were enough free buffers and RX_STALLED is set it is cleared.
  2031. *
  2032. *
  2033. * Driver sequence:
  2034. *
  2035. * il_rx_queue_alloc() Allocates rx_free
  2036. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2037. * il_rx_queue_restock
  2038. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2039. * queue, updates firmware pointers, and updates
  2040. * the WRITE idx. If insufficient rx_free buffers
  2041. * are available, schedules il_rx_replenish
  2042. *
  2043. * -- enable interrupts --
  2044. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2045. * READ IDX, detaching the SKB from the pool.
  2046. * Moves the packet buffer from queue to rx_used.
  2047. * Calls il_rx_queue_restock to refill any empty
  2048. * slots.
  2049. * ...
  2050. *
  2051. */
  2052. /**
  2053. * il_rx_queue_space - Return number of free slots available in queue.
  2054. */
  2055. int il_rx_queue_space(const struct il_rx_queue *q)
  2056. {
  2057. int s = q->read - q->write;
  2058. if (s <= 0)
  2059. s += RX_QUEUE_SIZE;
  2060. /* keep some buffer to not confuse full and empty queue */
  2061. s -= 2;
  2062. if (s < 0)
  2063. s = 0;
  2064. return s;
  2065. }
  2066. EXPORT_SYMBOL(il_rx_queue_space);
  2067. /**
  2068. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2069. */
  2070. void
  2071. il_rx_queue_update_write_ptr(struct il_priv *il,
  2072. struct il_rx_queue *q)
  2073. {
  2074. unsigned long flags;
  2075. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2076. u32 reg;
  2077. spin_lock_irqsave(&q->lock, flags);
  2078. if (q->need_update == 0)
  2079. goto exit_unlock;
  2080. /* If power-saving is in use, make sure device is awake */
  2081. if (test_bit(S_POWER_PMI, &il->status)) {
  2082. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2083. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2084. D_INFO(
  2085. "Rx queue requesting wakeup,"
  2086. " GP1 = 0x%x\n", reg);
  2087. il_set_bit(il, CSR_GP_CNTRL,
  2088. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2089. goto exit_unlock;
  2090. }
  2091. q->write_actual = (q->write & ~0x7);
  2092. il_wr(il, rx_wrt_ptr_reg,
  2093. q->write_actual);
  2094. /* Else device is assumed to be awake */
  2095. } else {
  2096. /* Device expects a multiple of 8 */
  2097. q->write_actual = (q->write & ~0x7);
  2098. il_wr(il, rx_wrt_ptr_reg,
  2099. q->write_actual);
  2100. }
  2101. q->need_update = 0;
  2102. exit_unlock:
  2103. spin_unlock_irqrestore(&q->lock, flags);
  2104. }
  2105. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2106. int il_rx_queue_alloc(struct il_priv *il)
  2107. {
  2108. struct il_rx_queue *rxq = &il->rxq;
  2109. struct device *dev = &il->pci_dev->dev;
  2110. int i;
  2111. spin_lock_init(&rxq->lock);
  2112. INIT_LIST_HEAD(&rxq->rx_free);
  2113. INIT_LIST_HEAD(&rxq->rx_used);
  2114. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2115. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2116. GFP_KERNEL);
  2117. if (!rxq->bd)
  2118. goto err_bd;
  2119. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2120. &rxq->rb_stts_dma, GFP_KERNEL);
  2121. if (!rxq->rb_stts)
  2122. goto err_rb;
  2123. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2124. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2125. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2126. /* Set us so that we have processed and used all buffers, but have
  2127. * not restocked the Rx queue with fresh buffers */
  2128. rxq->read = rxq->write = 0;
  2129. rxq->write_actual = 0;
  2130. rxq->free_count = 0;
  2131. rxq->need_update = 0;
  2132. return 0;
  2133. err_rb:
  2134. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2135. rxq->bd_dma);
  2136. err_bd:
  2137. return -ENOMEM;
  2138. }
  2139. EXPORT_SYMBOL(il_rx_queue_alloc);
  2140. void il_hdl_spectrum_measurement(struct il_priv *il,
  2141. struct il_rx_buf *rxb)
  2142. {
  2143. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2144. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2145. if (!report->state) {
  2146. D_11H(
  2147. "Spectrum Measure Notification: Start\n");
  2148. return;
  2149. }
  2150. memcpy(&il->measure_report, report, sizeof(*report));
  2151. il->measurement_status |= MEASUREMENT_READY;
  2152. }
  2153. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2154. /*
  2155. * returns non-zero if packet should be dropped
  2156. */
  2157. int il_set_decrypted_flag(struct il_priv *il,
  2158. struct ieee80211_hdr *hdr,
  2159. u32 decrypt_res,
  2160. struct ieee80211_rx_status *stats)
  2161. {
  2162. u16 fc = le16_to_cpu(hdr->frame_control);
  2163. /*
  2164. * All contexts have the same setting here due to it being
  2165. * a module parameter, so OK to check any context.
  2166. */
  2167. if (il->ctx.active.filter_flags &
  2168. RXON_FILTER_DIS_DECRYPT_MSK)
  2169. return 0;
  2170. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2171. return 0;
  2172. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2173. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2174. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2175. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2176. * Decryption will be done in SW. */
  2177. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2178. RX_RES_STATUS_BAD_KEY_TTAK)
  2179. break;
  2180. case RX_RES_STATUS_SEC_TYPE_WEP:
  2181. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2182. RX_RES_STATUS_BAD_ICV_MIC) {
  2183. /* bad ICV, the packet is destroyed since the
  2184. * decryption is inplace, drop it */
  2185. D_RX("Packet destroyed\n");
  2186. return -1;
  2187. }
  2188. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2189. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2190. RX_RES_STATUS_DECRYPT_OK) {
  2191. D_RX("hw decrypt successfully!!!\n");
  2192. stats->flag |= RX_FLAG_DECRYPTED;
  2193. }
  2194. break;
  2195. default:
  2196. break;
  2197. }
  2198. return 0;
  2199. }
  2200. EXPORT_SYMBOL(il_set_decrypted_flag);
  2201. /**
  2202. * il_txq_update_write_ptr - Send new write idx to hardware
  2203. */
  2204. void
  2205. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2206. {
  2207. u32 reg = 0;
  2208. int txq_id = txq->q.id;
  2209. if (txq->need_update == 0)
  2210. return;
  2211. /* if we're trying to save power */
  2212. if (test_bit(S_POWER_PMI, &il->status)) {
  2213. /* wake up nic if it's powered down ...
  2214. * uCode will wake up, and interrupt us again, so next
  2215. * time we'll skip this part. */
  2216. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2217. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2218. D_INFO(
  2219. "Tx queue %d requesting wakeup,"
  2220. " GP1 = 0x%x\n", txq_id, reg);
  2221. il_set_bit(il, CSR_GP_CNTRL,
  2222. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2223. return;
  2224. }
  2225. il_wr(il, HBUS_TARG_WRPTR,
  2226. txq->q.write_ptr | (txq_id << 8));
  2227. /*
  2228. * else not in power-save mode,
  2229. * uCode will never sleep when we're
  2230. * trying to tx (during RFKILL, we're not trying to tx).
  2231. */
  2232. } else
  2233. _il_wr(il, HBUS_TARG_WRPTR,
  2234. txq->q.write_ptr | (txq_id << 8));
  2235. txq->need_update = 0;
  2236. }
  2237. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2238. /**
  2239. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2240. */
  2241. void il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2242. {
  2243. struct il_tx_queue *txq = &il->txq[txq_id];
  2244. struct il_queue *q = &txq->q;
  2245. if (q->n_bd == 0)
  2246. return;
  2247. while (q->write_ptr != q->read_ptr) {
  2248. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2249. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2250. }
  2251. }
  2252. EXPORT_SYMBOL(il_tx_queue_unmap);
  2253. /**
  2254. * il_tx_queue_free - Deallocate DMA queue.
  2255. * @txq: Transmit queue to deallocate.
  2256. *
  2257. * Empty queue by removing and destroying all BD's.
  2258. * Free all buffers.
  2259. * 0-fill, but do not free "txq" descriptor structure.
  2260. */
  2261. void il_tx_queue_free(struct il_priv *il, int txq_id)
  2262. {
  2263. struct il_tx_queue *txq = &il->txq[txq_id];
  2264. struct device *dev = &il->pci_dev->dev;
  2265. int i;
  2266. il_tx_queue_unmap(il, txq_id);
  2267. /* De-alloc array of command/tx buffers */
  2268. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2269. kfree(txq->cmd[i]);
  2270. /* De-alloc circular buffer of TFDs */
  2271. if (txq->q.n_bd)
  2272. dma_free_coherent(dev, il->hw_params.tfd_size *
  2273. txq->q.n_bd, txq->tfds, txq->q.dma_addr);
  2274. /* De-alloc array of per-TFD driver data */
  2275. kfree(txq->txb);
  2276. txq->txb = NULL;
  2277. /* deallocate arrays */
  2278. kfree(txq->cmd);
  2279. kfree(txq->meta);
  2280. txq->cmd = NULL;
  2281. txq->meta = NULL;
  2282. /* 0-fill queue descriptor structure */
  2283. memset(txq, 0, sizeof(*txq));
  2284. }
  2285. EXPORT_SYMBOL(il_tx_queue_free);
  2286. /**
  2287. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2288. */
  2289. void il_cmd_queue_unmap(struct il_priv *il)
  2290. {
  2291. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2292. struct il_queue *q = &txq->q;
  2293. int i;
  2294. if (q->n_bd == 0)
  2295. return;
  2296. while (q->read_ptr != q->write_ptr) {
  2297. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2298. if (txq->meta[i].flags & CMD_MAPPED) {
  2299. pci_unmap_single(il->pci_dev,
  2300. dma_unmap_addr(&txq->meta[i], mapping),
  2301. dma_unmap_len(&txq->meta[i], len),
  2302. PCI_DMA_BIDIRECTIONAL);
  2303. txq->meta[i].flags = 0;
  2304. }
  2305. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2306. }
  2307. i = q->n_win;
  2308. if (txq->meta[i].flags & CMD_MAPPED) {
  2309. pci_unmap_single(il->pci_dev,
  2310. dma_unmap_addr(&txq->meta[i], mapping),
  2311. dma_unmap_len(&txq->meta[i], len),
  2312. PCI_DMA_BIDIRECTIONAL);
  2313. txq->meta[i].flags = 0;
  2314. }
  2315. }
  2316. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2317. /**
  2318. * il_cmd_queue_free - Deallocate DMA queue.
  2319. * @txq: Transmit queue to deallocate.
  2320. *
  2321. * Empty queue by removing and destroying all BD's.
  2322. * Free all buffers.
  2323. * 0-fill, but do not free "txq" descriptor structure.
  2324. */
  2325. void il_cmd_queue_free(struct il_priv *il)
  2326. {
  2327. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2328. struct device *dev = &il->pci_dev->dev;
  2329. int i;
  2330. il_cmd_queue_unmap(il);
  2331. /* De-alloc array of command/tx buffers */
  2332. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2333. kfree(txq->cmd[i]);
  2334. /* De-alloc circular buffer of TFDs */
  2335. if (txq->q.n_bd)
  2336. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2337. txq->tfds, txq->q.dma_addr);
  2338. /* deallocate arrays */
  2339. kfree(txq->cmd);
  2340. kfree(txq->meta);
  2341. txq->cmd = NULL;
  2342. txq->meta = NULL;
  2343. /* 0-fill queue descriptor structure */
  2344. memset(txq, 0, sizeof(*txq));
  2345. }
  2346. EXPORT_SYMBOL(il_cmd_queue_free);
  2347. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2348. * DMA services
  2349. *
  2350. * Theory of operation
  2351. *
  2352. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2353. * of buffer descriptors, each of which points to one or more data buffers for
  2354. * the device to read from or fill. Driver and device exchange status of each
  2355. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2356. * entries in each circular buffer, to protect against confusing empty and full
  2357. * queue states.
  2358. *
  2359. * The device reads or writes the data in the queues via the device's several
  2360. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2361. *
  2362. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2363. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2364. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2365. * Tx queue resumed.
  2366. *
  2367. * See more detailed info in 4965.h.
  2368. ***************************************************/
  2369. int il_queue_space(const struct il_queue *q)
  2370. {
  2371. int s = q->read_ptr - q->write_ptr;
  2372. if (q->read_ptr > q->write_ptr)
  2373. s -= q->n_bd;
  2374. if (s <= 0)
  2375. s += q->n_win;
  2376. /* keep some reserve to not confuse empty and full situations */
  2377. s -= 2;
  2378. if (s < 0)
  2379. s = 0;
  2380. return s;
  2381. }
  2382. EXPORT_SYMBOL(il_queue_space);
  2383. /**
  2384. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2385. */
  2386. static int il_queue_init(struct il_priv *il, struct il_queue *q,
  2387. int count, int slots_num, u32 id)
  2388. {
  2389. q->n_bd = count;
  2390. q->n_win = slots_num;
  2391. q->id = id;
  2392. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2393. * and il_queue_dec_wrap are broken. */
  2394. BUG_ON(!is_power_of_2(count));
  2395. /* slots_num must be power-of-two size, otherwise
  2396. * il_get_cmd_idx is broken. */
  2397. BUG_ON(!is_power_of_2(slots_num));
  2398. q->low_mark = q->n_win / 4;
  2399. if (q->low_mark < 4)
  2400. q->low_mark = 4;
  2401. q->high_mark = q->n_win / 8;
  2402. if (q->high_mark < 2)
  2403. q->high_mark = 2;
  2404. q->write_ptr = q->read_ptr = 0;
  2405. return 0;
  2406. }
  2407. /**
  2408. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2409. */
  2410. static int il_tx_queue_alloc(struct il_priv *il,
  2411. struct il_tx_queue *txq, u32 id)
  2412. {
  2413. struct device *dev = &il->pci_dev->dev;
  2414. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2415. /* Driver ilate data, only for Tx (not command) queues,
  2416. * not shared with device. */
  2417. if (id != il->cmd_queue) {
  2418. txq->txb = kzalloc(sizeof(txq->txb[0]) *
  2419. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  2420. if (!txq->txb) {
  2421. IL_ERR("kmalloc for auxiliary BD "
  2422. "structures failed\n");
  2423. goto error;
  2424. }
  2425. } else {
  2426. txq->txb = NULL;
  2427. }
  2428. /* Circular buffer of transmit frame descriptors (TFDs),
  2429. * shared with device */
  2430. txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
  2431. GFP_KERNEL);
  2432. if (!txq->tfds) {
  2433. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2434. goto error;
  2435. }
  2436. txq->q.id = id;
  2437. return 0;
  2438. error:
  2439. kfree(txq->txb);
  2440. txq->txb = NULL;
  2441. return -ENOMEM;
  2442. }
  2443. /**
  2444. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2445. */
  2446. int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
  2447. int slots_num, u32 txq_id)
  2448. {
  2449. int i, len;
  2450. int ret;
  2451. int actual_slots = slots_num;
  2452. /*
  2453. * Alloc buffer array for commands (Tx or other types of commands).
  2454. * For the command queue (#4/#9), allocate command space + one big
  2455. * command for scan, since scan command is very huge; the system will
  2456. * not have two scans at the same time, so only one is needed.
  2457. * For normal Tx queues (all other queues), no super-size command
  2458. * space is needed.
  2459. */
  2460. if (txq_id == il->cmd_queue)
  2461. actual_slots++;
  2462. txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots,
  2463. GFP_KERNEL);
  2464. txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots,
  2465. GFP_KERNEL);
  2466. if (!txq->meta || !txq->cmd)
  2467. goto out_free_arrays;
  2468. len = sizeof(struct il_device_cmd);
  2469. for (i = 0; i < actual_slots; i++) {
  2470. /* only happens for cmd queue */
  2471. if (i == slots_num)
  2472. len = IL_MAX_CMD_SIZE;
  2473. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2474. if (!txq->cmd[i])
  2475. goto err;
  2476. }
  2477. /* Alloc driver data array and TFD circular buffer */
  2478. ret = il_tx_queue_alloc(il, txq, txq_id);
  2479. if (ret)
  2480. goto err;
  2481. txq->need_update = 0;
  2482. /*
  2483. * For the default queues 0-3, set up the swq_id
  2484. * already -- all others need to get one later
  2485. * (if they need one at all).
  2486. */
  2487. if (txq_id < 4)
  2488. il_set_swq_id(txq, txq_id, txq_id);
  2489. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2490. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2491. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2492. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2493. il_queue_init(il, &txq->q,
  2494. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2495. /* Tell device where to find queue */
  2496. il->cfg->ops->lib->txq_init(il, txq);
  2497. return 0;
  2498. err:
  2499. for (i = 0; i < actual_slots; i++)
  2500. kfree(txq->cmd[i]);
  2501. out_free_arrays:
  2502. kfree(txq->meta);
  2503. kfree(txq->cmd);
  2504. return -ENOMEM;
  2505. }
  2506. EXPORT_SYMBOL(il_tx_queue_init);
  2507. void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
  2508. int slots_num, u32 txq_id)
  2509. {
  2510. int actual_slots = slots_num;
  2511. if (txq_id == il->cmd_queue)
  2512. actual_slots++;
  2513. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2514. txq->need_update = 0;
  2515. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2516. il_queue_init(il, &txq->q,
  2517. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2518. /* Tell device where to find queue */
  2519. il->cfg->ops->lib->txq_init(il, txq);
  2520. }
  2521. EXPORT_SYMBOL(il_tx_queue_reset);
  2522. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2523. /**
  2524. * il_enqueue_hcmd - enqueue a uCode command
  2525. * @il: device ilate data point
  2526. * @cmd: a point to the ucode command structure
  2527. *
  2528. * The function returns < 0 values to indicate the operation is
  2529. * failed. On success, it turns the idx (> 0) of command in the
  2530. * command queue.
  2531. */
  2532. int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2533. {
  2534. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2535. struct il_queue *q = &txq->q;
  2536. struct il_device_cmd *out_cmd;
  2537. struct il_cmd_meta *out_meta;
  2538. dma_addr_t phys_addr;
  2539. unsigned long flags;
  2540. int len;
  2541. u32 idx;
  2542. u16 fix_size;
  2543. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2544. fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  2545. /* If any of the command structures end up being larger than
  2546. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2547. * we will need to increase the size of the TFD entries
  2548. * Also, check to see if command buffer should not exceed the size
  2549. * of device_cmd and max_cmd_size. */
  2550. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2551. !(cmd->flags & CMD_SIZE_HUGE));
  2552. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2553. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2554. IL_WARN("Not sending command - %s KILL\n",
  2555. il_is_rfkill(il) ? "RF" : "CT");
  2556. return -EIO;
  2557. }
  2558. spin_lock_irqsave(&il->hcmd_lock, flags);
  2559. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2560. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2561. IL_ERR("Restarting adapter due to command queue full\n");
  2562. queue_work(il->workqueue, &il->restart);
  2563. return -ENOSPC;
  2564. }
  2565. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2566. out_cmd = txq->cmd[idx];
  2567. out_meta = &txq->meta[idx];
  2568. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2569. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2570. return -ENOSPC;
  2571. }
  2572. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2573. out_meta->flags = cmd->flags | CMD_MAPPED;
  2574. if (cmd->flags & CMD_WANT_SKB)
  2575. out_meta->source = cmd;
  2576. if (cmd->flags & CMD_ASYNC)
  2577. out_meta->callback = cmd->callback;
  2578. out_cmd->hdr.cmd = cmd->id;
  2579. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2580. /* At this point, the out_cmd now has all of the incoming cmd
  2581. * information */
  2582. out_cmd->hdr.flags = 0;
  2583. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) |
  2584. IDX_TO_SEQ(q->write_ptr));
  2585. if (cmd->flags & CMD_SIZE_HUGE)
  2586. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2587. len = sizeof(struct il_device_cmd);
  2588. if (idx == TFD_CMD_SLOTS)
  2589. len = IL_MAX_CMD_SIZE;
  2590. #ifdef CONFIG_IWLEGACY_DEBUG
  2591. switch (out_cmd->hdr.cmd) {
  2592. case C_TX_LINK_QUALITY_CMD:
  2593. case C_SENSITIVITY:
  2594. D_HC_DUMP(
  2595. "Sending command %s (#%x), seq: 0x%04X, "
  2596. "%d bytes at %d[%d]:%d\n",
  2597. il_get_cmd_string(out_cmd->hdr.cmd),
  2598. out_cmd->hdr.cmd,
  2599. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2600. q->write_ptr, idx, il->cmd_queue);
  2601. break;
  2602. default:
  2603. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2604. "%d bytes at %d[%d]:%d\n",
  2605. il_get_cmd_string(out_cmd->hdr.cmd),
  2606. out_cmd->hdr.cmd,
  2607. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2608. q->write_ptr, idx, il->cmd_queue);
  2609. }
  2610. #endif
  2611. txq->need_update = 1;
  2612. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2613. /* Set up entry in queue's byte count circular buffer */
  2614. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2615. phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr,
  2616. fix_size, PCI_DMA_BIDIRECTIONAL);
  2617. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2618. dma_unmap_len_set(out_meta, len, fix_size);
  2619. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  2620. phys_addr, fix_size, 1,
  2621. U32_PAD(cmd->len));
  2622. /* Increment and update queue's write idx */
  2623. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2624. il_txq_update_write_ptr(il, txq);
  2625. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2626. return idx;
  2627. }
  2628. /**
  2629. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2630. *
  2631. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2632. * need to be reclaimed. As result, some free space forms. If there is
  2633. * enough free space (> low mark), wake the stack that feeds us.
  2634. */
  2635. static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
  2636. int idx, int cmd_idx)
  2637. {
  2638. struct il_tx_queue *txq = &il->txq[txq_id];
  2639. struct il_queue *q = &txq->q;
  2640. int nfreed = 0;
  2641. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2642. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2643. "is out of range [0-%d] %d %d.\n", txq_id,
  2644. idx, q->n_bd, q->write_ptr, q->read_ptr);
  2645. return;
  2646. }
  2647. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2648. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2649. if (nfreed++ > 0) {
  2650. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2651. q->write_ptr, q->read_ptr);
  2652. queue_work(il->workqueue, &il->restart);
  2653. }
  2654. }
  2655. }
  2656. /**
  2657. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2658. * @rxb: Rx buffer to reclaim
  2659. *
  2660. * If an Rx buffer has an async callback associated with it the callback
  2661. * will be executed. The attached skb (if present) will only be freed
  2662. * if the callback returns 1
  2663. */
  2664. void
  2665. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2666. {
  2667. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2668. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2669. int txq_id = SEQ_TO_QUEUE(sequence);
  2670. int idx = SEQ_TO_IDX(sequence);
  2671. int cmd_idx;
  2672. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2673. struct il_device_cmd *cmd;
  2674. struct il_cmd_meta *meta;
  2675. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2676. unsigned long flags;
  2677. /* If a Tx command is being handled and it isn't in the actual
  2678. * command queue then there a command routing bug has been introduced
  2679. * in the queue management code. */
  2680. if (WARN(txq_id != il->cmd_queue,
  2681. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2682. txq_id, il->cmd_queue, sequence,
  2683. il->txq[il->cmd_queue].q.read_ptr,
  2684. il->txq[il->cmd_queue].q.write_ptr)) {
  2685. il_print_hex_error(il, pkt, 32);
  2686. return;
  2687. }
  2688. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2689. cmd = txq->cmd[cmd_idx];
  2690. meta = &txq->meta[cmd_idx];
  2691. txq->time_stamp = jiffies;
  2692. pci_unmap_single(il->pci_dev,
  2693. dma_unmap_addr(meta, mapping),
  2694. dma_unmap_len(meta, len),
  2695. PCI_DMA_BIDIRECTIONAL);
  2696. /* Input error checking is done when commands are added to queue. */
  2697. if (meta->flags & CMD_WANT_SKB) {
  2698. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2699. rxb->page = NULL;
  2700. } else if (meta->callback)
  2701. meta->callback(il, cmd, pkt);
  2702. spin_lock_irqsave(&il->hcmd_lock, flags);
  2703. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2704. if (!(meta->flags & CMD_ASYNC)) {
  2705. clear_bit(S_HCMD_ACTIVE, &il->status);
  2706. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2707. il_get_cmd_string(cmd->hdr.cmd));
  2708. wake_up(&il->wait_command_queue);
  2709. }
  2710. /* Mark as unmapped */
  2711. meta->flags = 0;
  2712. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2713. }
  2714. EXPORT_SYMBOL(il_tx_cmd_complete);
  2715. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2716. MODULE_VERSION(IWLWIFI_VERSION);
  2717. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2718. MODULE_LICENSE("GPL");
  2719. /*
  2720. * set bt_coex_active to true, uCode will do kill/defer
  2721. * every time the priority line is asserted (BT is sending signals on the
  2722. * priority line in the PCIx).
  2723. * set bt_coex_active to false, uCode will ignore the BT activity and
  2724. * perform the normal operation
  2725. *
  2726. * User might experience transmit issue on some platform due to WiFi/BT
  2727. * co-exist problem. The possible behaviors are:
  2728. * Able to scan and finding all the available AP
  2729. * Not able to associate with any AP
  2730. * On those platforms, WiFi communication can be restored by set
  2731. * "bt_coex_active" module parameter to "false"
  2732. *
  2733. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2734. */
  2735. static bool bt_coex_active = true;
  2736. module_param(bt_coex_active, bool, S_IRUGO);
  2737. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2738. u32 il_debug_level;
  2739. EXPORT_SYMBOL(il_debug_level);
  2740. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2741. EXPORT_SYMBOL(il_bcast_addr);
  2742. /* This function both allocates and initializes hw and il. */
  2743. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  2744. {
  2745. struct il_priv *il;
  2746. /* mac80211 allocates memory for this device instance, including
  2747. * space for this driver's ilate structure */
  2748. struct ieee80211_hw *hw;
  2749. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2750. cfg->ops->ieee80211_ops);
  2751. if (hw == NULL) {
  2752. pr_err("%s: Can not allocate network device\n",
  2753. cfg->name);
  2754. goto out;
  2755. }
  2756. il = hw->priv;
  2757. il->hw = hw;
  2758. out:
  2759. return hw;
  2760. }
  2761. EXPORT_SYMBOL(il_alloc_all);
  2762. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2763. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2764. static void il_init_ht_hw_capab(const struct il_priv *il,
  2765. struct ieee80211_sta_ht_cap *ht_info,
  2766. enum ieee80211_band band)
  2767. {
  2768. u16 max_bit_rate = 0;
  2769. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2770. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2771. ht_info->cap = 0;
  2772. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2773. ht_info->ht_supported = true;
  2774. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2775. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2776. if (il->hw_params.ht40_channel & BIT(band)) {
  2777. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2778. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2779. ht_info->mcs.rx_mask[4] = 0x01;
  2780. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2781. }
  2782. if (il->cfg->mod_params->amsdu_size_8K)
  2783. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2784. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2785. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2786. ht_info->mcs.rx_mask[0] = 0xFF;
  2787. if (rx_chains_num >= 2)
  2788. ht_info->mcs.rx_mask[1] = 0xFF;
  2789. if (rx_chains_num >= 3)
  2790. ht_info->mcs.rx_mask[2] = 0xFF;
  2791. /* Highest supported Rx data rate */
  2792. max_bit_rate *= rx_chains_num;
  2793. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2794. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2795. /* Tx MCS capabilities */
  2796. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2797. if (tx_chains_num != rx_chains_num) {
  2798. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2799. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  2800. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2801. }
  2802. }
  2803. /**
  2804. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2805. */
  2806. int il_init_geos(struct il_priv *il)
  2807. {
  2808. struct il_channel_info *ch;
  2809. struct ieee80211_supported_band *sband;
  2810. struct ieee80211_channel *channels;
  2811. struct ieee80211_channel *geo_ch;
  2812. struct ieee80211_rate *rates;
  2813. int i = 0;
  2814. s8 max_tx_power = 0;
  2815. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2816. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2817. D_INFO("Geography modes already initialized.\n");
  2818. set_bit(S_GEO_CONFIGURED, &il->status);
  2819. return 0;
  2820. }
  2821. channels = kzalloc(sizeof(struct ieee80211_channel) *
  2822. il->channel_count, GFP_KERNEL);
  2823. if (!channels)
  2824. return -ENOMEM;
  2825. rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2826. GFP_KERNEL);
  2827. if (!rates) {
  2828. kfree(channels);
  2829. return -ENOMEM;
  2830. }
  2831. /* 5.2GHz channels start after the 2.4GHz channels */
  2832. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2833. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2834. /* just OFDM */
  2835. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2836. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2837. if (il->cfg->sku & IL_SKU_N)
  2838. il_init_ht_hw_capab(il, &sband->ht_cap,
  2839. IEEE80211_BAND_5GHZ);
  2840. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2841. sband->channels = channels;
  2842. /* OFDM & CCK */
  2843. sband->bitrates = rates;
  2844. sband->n_bitrates = RATE_COUNT_LEGACY;
  2845. if (il->cfg->sku & IL_SKU_N)
  2846. il_init_ht_hw_capab(il, &sband->ht_cap,
  2847. IEEE80211_BAND_2GHZ);
  2848. il->ieee_channels = channels;
  2849. il->ieee_rates = rates;
  2850. for (i = 0; i < il->channel_count; i++) {
  2851. ch = &il->channel_info[i];
  2852. if (!il_is_channel_valid(ch))
  2853. continue;
  2854. sband = &il->bands[ch->band];
  2855. geo_ch = &sband->channels[sband->n_channels++];
  2856. geo_ch->center_freq =
  2857. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2858. geo_ch->max_power = ch->max_power_avg;
  2859. geo_ch->max_antenna_gain = 0xff;
  2860. geo_ch->hw_value = ch->channel;
  2861. if (il_is_channel_valid(ch)) {
  2862. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2863. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2864. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2865. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2866. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2867. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2868. geo_ch->flags |= ch->ht40_extension_channel;
  2869. if (ch->max_power_avg > max_tx_power)
  2870. max_tx_power = ch->max_power_avg;
  2871. } else {
  2872. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2873. }
  2874. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  2875. ch->channel, geo_ch->center_freq,
  2876. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2877. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  2878. "restricted" : "valid",
  2879. geo_ch->flags);
  2880. }
  2881. il->tx_power_device_lmt = max_tx_power;
  2882. il->tx_power_user_lmt = max_tx_power;
  2883. il->tx_power_next = max_tx_power;
  2884. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2885. (il->cfg->sku & IL_SKU_A)) {
  2886. IL_INFO("Incorrectly detected BG card as ABG. "
  2887. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2888. il->pci_dev->device,
  2889. il->pci_dev->subsystem_device);
  2890. il->cfg->sku &= ~IL_SKU_A;
  2891. }
  2892. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2893. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2894. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2895. set_bit(S_GEO_CONFIGURED, &il->status);
  2896. return 0;
  2897. }
  2898. EXPORT_SYMBOL(il_init_geos);
  2899. /*
  2900. * il_free_geos - undo allocations in il_init_geos
  2901. */
  2902. void il_free_geos(struct il_priv *il)
  2903. {
  2904. kfree(il->ieee_channels);
  2905. kfree(il->ieee_rates);
  2906. clear_bit(S_GEO_CONFIGURED, &il->status);
  2907. }
  2908. EXPORT_SYMBOL(il_free_geos);
  2909. static bool il_is_channel_extension(struct il_priv *il,
  2910. enum ieee80211_band band,
  2911. u16 channel, u8 extension_chan_offset)
  2912. {
  2913. const struct il_channel_info *ch_info;
  2914. ch_info = il_get_channel_info(il, band, channel);
  2915. if (!il_is_channel_valid(ch_info))
  2916. return false;
  2917. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2918. return !(ch_info->ht40_extension_channel &
  2919. IEEE80211_CHAN_NO_HT40PLUS);
  2920. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2921. return !(ch_info->ht40_extension_channel &
  2922. IEEE80211_CHAN_NO_HT40MINUS);
  2923. return false;
  2924. }
  2925. bool il_is_ht40_tx_allowed(struct il_priv *il,
  2926. struct il_rxon_context *ctx,
  2927. struct ieee80211_sta_ht_cap *ht_cap)
  2928. {
  2929. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  2930. return false;
  2931. /*
  2932. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  2933. * the bit will not set if it is pure 40MHz case
  2934. */
  2935. if (ht_cap && !ht_cap->ht_supported)
  2936. return false;
  2937. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2938. if (il->disable_ht40)
  2939. return false;
  2940. #endif
  2941. return il_is_channel_extension(il, il->band,
  2942. le16_to_cpu(ctx->staging.channel),
  2943. ctx->ht.extension_chan_offset);
  2944. }
  2945. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  2946. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  2947. {
  2948. u16 new_val;
  2949. u16 beacon_factor;
  2950. /*
  2951. * If mac80211 hasn't given us a beacon interval, program
  2952. * the default into the device.
  2953. */
  2954. if (!beacon_val)
  2955. return DEFAULT_BEACON_INTERVAL;
  2956. /*
  2957. * If the beacon interval we obtained from the peer
  2958. * is too large, we'll have to wake up more often
  2959. * (and in IBSS case, we'll beacon too much)
  2960. *
  2961. * For example, if max_beacon_val is 4096, and the
  2962. * requested beacon interval is 7000, we'll have to
  2963. * use 3500 to be able to wake up on the beacons.
  2964. *
  2965. * This could badly influence beacon detection stats.
  2966. */
  2967. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  2968. new_val = beacon_val / beacon_factor;
  2969. if (!new_val)
  2970. new_val = max_beacon_val;
  2971. return new_val;
  2972. }
  2973. int
  2974. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  2975. {
  2976. u64 tsf;
  2977. s32 interval_tm, rem;
  2978. struct ieee80211_conf *conf = NULL;
  2979. u16 beacon_int;
  2980. struct ieee80211_vif *vif = ctx->vif;
  2981. conf = il_ieee80211_get_hw_conf(il->hw);
  2982. lockdep_assert_held(&il->mutex);
  2983. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  2984. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  2985. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  2986. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  2987. /*
  2988. * TODO: For IBSS we need to get atim_win from mac80211,
  2989. * for now just always use 0
  2990. */
  2991. ctx->timing.atim_win = 0;
  2992. beacon_int = il_adjust_beacon_interval(beacon_int,
  2993. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  2994. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  2995. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  2996. interval_tm = beacon_int * TIME_UNIT;
  2997. rem = do_div(tsf, interval_tm);
  2998. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  2999. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  3000. D_ASSOC(
  3001. "beacon interval %d beacon timer %d beacon tim %d\n",
  3002. le16_to_cpu(ctx->timing.beacon_interval),
  3003. le32_to_cpu(ctx->timing.beacon_init_val),
  3004. le16_to_cpu(ctx->timing.atim_win));
  3005. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  3006. sizeof(ctx->timing), &ctx->timing);
  3007. }
  3008. EXPORT_SYMBOL(il_send_rxon_timing);
  3009. void
  3010. il_set_rxon_hwcrypto(struct il_priv *il,
  3011. struct il_rxon_context *ctx,
  3012. int hw_decrypt)
  3013. {
  3014. struct il_rxon_cmd *rxon = &ctx->staging;
  3015. if (hw_decrypt)
  3016. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3017. else
  3018. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3019. }
  3020. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3021. /* validate RXON structure is valid */
  3022. int
  3023. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  3024. {
  3025. struct il_rxon_cmd *rxon = &ctx->staging;
  3026. bool error = false;
  3027. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3028. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3029. IL_WARN("check 2.4G: wrong narrow\n");
  3030. error = true;
  3031. }
  3032. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3033. IL_WARN("check 2.4G: wrong radar\n");
  3034. error = true;
  3035. }
  3036. } else {
  3037. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3038. IL_WARN("check 5.2G: not short slot!\n");
  3039. error = true;
  3040. }
  3041. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3042. IL_WARN("check 5.2G: CCK!\n");
  3043. error = true;
  3044. }
  3045. }
  3046. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3047. IL_WARN("mac/bssid mcast!\n");
  3048. error = true;
  3049. }
  3050. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3051. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3052. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3053. IL_WARN("neither 1 nor 6 are basic\n");
  3054. error = true;
  3055. }
  3056. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3057. IL_WARN("aid > 2007\n");
  3058. error = true;
  3059. }
  3060. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  3061. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3062. IL_WARN("CCK and short slot\n");
  3063. error = true;
  3064. }
  3065. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  3066. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3067. IL_WARN("CCK and auto detect");
  3068. error = true;
  3069. }
  3070. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  3071. RXON_FLG_TGG_PROTECT_MSK)) ==
  3072. RXON_FLG_TGG_PROTECT_MSK) {
  3073. IL_WARN("TGg but no auto-detect\n");
  3074. error = true;
  3075. }
  3076. if (error)
  3077. IL_WARN("Tuning to channel %d\n",
  3078. le16_to_cpu(rxon->channel));
  3079. if (error) {
  3080. IL_ERR("Invalid RXON\n");
  3081. return -EINVAL;
  3082. }
  3083. return 0;
  3084. }
  3085. EXPORT_SYMBOL(il_check_rxon_cmd);
  3086. /**
  3087. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3088. * @il: staging_rxon is compared to active_rxon
  3089. *
  3090. * If the RXON structure is changing enough to require a new tune,
  3091. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3092. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3093. */
  3094. int il_full_rxon_required(struct il_priv *il,
  3095. struct il_rxon_context *ctx)
  3096. {
  3097. const struct il_rxon_cmd *staging = &ctx->staging;
  3098. const struct il_rxon_cmd *active = &ctx->active;
  3099. #define CHK(cond) \
  3100. if ((cond)) { \
  3101. D_INFO("need full RXON - " #cond "\n"); \
  3102. return 1; \
  3103. }
  3104. #define CHK_NEQ(c1, c2) \
  3105. if ((c1) != (c2)) { \
  3106. D_INFO("need full RXON - " \
  3107. #c1 " != " #c2 " - %d != %d\n", \
  3108. (c1), (c2)); \
  3109. return 1; \
  3110. }
  3111. /* These items are only settable from the full RXON command */
  3112. CHK(!il_is_associated_ctx(ctx));
  3113. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3114. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3115. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  3116. active->wlap_bssid_addr));
  3117. CHK_NEQ(staging->dev_type, active->dev_type);
  3118. CHK_NEQ(staging->channel, active->channel);
  3119. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3120. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3121. active->ofdm_ht_single_stream_basic_rates);
  3122. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3123. active->ofdm_ht_dual_stream_basic_rates);
  3124. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3125. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3126. * be updated with the RXON_ASSOC command -- however only some
  3127. * flag transitions are allowed using RXON_ASSOC */
  3128. /* Check if we are not switching bands */
  3129. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3130. active->flags & RXON_FLG_BAND_24G_MSK);
  3131. /* Check if we are switching association toggle */
  3132. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3133. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3134. #undef CHK
  3135. #undef CHK_NEQ
  3136. return 0;
  3137. }
  3138. EXPORT_SYMBOL(il_full_rxon_required);
  3139. u8 il_get_lowest_plcp(struct il_priv *il,
  3140. struct il_rxon_context *ctx)
  3141. {
  3142. /*
  3143. * Assign the lowest rate -- should really get this from
  3144. * the beacon skb from mac80211.
  3145. */
  3146. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  3147. return RATE_1M_PLCP;
  3148. else
  3149. return RATE_6M_PLCP;
  3150. }
  3151. EXPORT_SYMBOL(il_get_lowest_plcp);
  3152. static void _il_set_rxon_ht(struct il_priv *il,
  3153. struct il_ht_config *ht_conf,
  3154. struct il_rxon_context *ctx)
  3155. {
  3156. struct il_rxon_cmd *rxon = &ctx->staging;
  3157. if (!ctx->ht.enabled) {
  3158. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3159. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  3160. RXON_FLG_HT40_PROT_MSK |
  3161. RXON_FLG_HT_PROT_MSK);
  3162. return;
  3163. }
  3164. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  3165. RXON_FLG_HT_OPERATING_MODE_POS);
  3166. /* Set up channel bandwidth:
  3167. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3168. /* clear the HT channel mode before set the mode */
  3169. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3170. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3171. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  3172. /* pure ht40 */
  3173. if (ctx->ht.protection ==
  3174. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3175. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3176. /* Note: control channel is opposite of extension channel */
  3177. switch (ctx->ht.extension_chan_offset) {
  3178. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3179. rxon->flags &=
  3180. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3181. break;
  3182. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3183. rxon->flags |=
  3184. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3185. break;
  3186. }
  3187. } else {
  3188. /* Note: control channel is opposite of extension channel */
  3189. switch (ctx->ht.extension_chan_offset) {
  3190. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3191. rxon->flags &=
  3192. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3193. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3194. break;
  3195. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3196. rxon->flags |=
  3197. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3198. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3199. break;
  3200. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3201. default:
  3202. /* channel location only valid if in Mixed mode */
  3203. IL_ERR(
  3204. "invalid extension channel offset\n");
  3205. break;
  3206. }
  3207. }
  3208. } else {
  3209. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3210. }
  3211. if (il->cfg->ops->hcmd->set_rxon_chain)
  3212. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3213. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3214. "extension channel offset 0x%x\n",
  3215. le32_to_cpu(rxon->flags), ctx->ht.protection,
  3216. ctx->ht.extension_chan_offset);
  3217. }
  3218. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3219. {
  3220. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  3221. }
  3222. EXPORT_SYMBOL(il_set_rxon_ht);
  3223. /* Return valid, unused, channel for a passive scan to reset the RF */
  3224. u8 il_get_single_channel_number(struct il_priv *il,
  3225. enum ieee80211_band band)
  3226. {
  3227. const struct il_channel_info *ch_info;
  3228. int i;
  3229. u8 channel = 0;
  3230. u8 min, max;
  3231. if (band == IEEE80211_BAND_5GHZ) {
  3232. min = 14;
  3233. max = il->channel_count;
  3234. } else {
  3235. min = 0;
  3236. max = 14;
  3237. }
  3238. for (i = min; i < max; i++) {
  3239. channel = il->channel_info[i].channel;
  3240. if (channel == le16_to_cpu(il->ctx.staging.channel))
  3241. continue;
  3242. ch_info = il_get_channel_info(il, band, channel);
  3243. if (il_is_channel_valid(ch_info))
  3244. break;
  3245. }
  3246. return channel;
  3247. }
  3248. EXPORT_SYMBOL(il_get_single_channel_number);
  3249. /**
  3250. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3251. * @ch: requested channel as a pointer to struct ieee80211_channel
  3252. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3253. * in the staging RXON flag structure based on the ch->band
  3254. */
  3255. int
  3256. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  3257. struct il_rxon_context *ctx)
  3258. {
  3259. enum ieee80211_band band = ch->band;
  3260. u16 channel = ch->hw_value;
  3261. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  3262. return 0;
  3263. ctx->staging.channel = cpu_to_le16(channel);
  3264. if (band == IEEE80211_BAND_5GHZ)
  3265. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3266. else
  3267. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3268. il->band = band;
  3269. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3270. return 0;
  3271. }
  3272. EXPORT_SYMBOL(il_set_rxon_channel);
  3273. void il_set_flags_for_band(struct il_priv *il,
  3274. struct il_rxon_context *ctx,
  3275. enum ieee80211_band band,
  3276. struct ieee80211_vif *vif)
  3277. {
  3278. if (band == IEEE80211_BAND_5GHZ) {
  3279. ctx->staging.flags &=
  3280. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  3281. | RXON_FLG_CCK_MSK);
  3282. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3283. } else {
  3284. /* Copied from il_post_associate() */
  3285. if (vif && vif->bss_conf.use_short_slot)
  3286. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3287. else
  3288. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3289. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3290. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3291. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  3292. }
  3293. }
  3294. EXPORT_SYMBOL(il_set_flags_for_band);
  3295. /*
  3296. * initialize rxon structure with default values from eeprom
  3297. */
  3298. void il_connection_init_rx_config(struct il_priv *il,
  3299. struct il_rxon_context *ctx)
  3300. {
  3301. const struct il_channel_info *ch_info;
  3302. memset(&ctx->staging, 0, sizeof(ctx->staging));
  3303. if (!ctx->vif) {
  3304. ctx->staging.dev_type = ctx->unused_devtype;
  3305. } else
  3306. switch (ctx->vif->type) {
  3307. case NL80211_IFTYPE_STATION:
  3308. ctx->staging.dev_type = ctx->station_devtype;
  3309. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3310. break;
  3311. case NL80211_IFTYPE_ADHOC:
  3312. ctx->staging.dev_type = ctx->ibss_devtype;
  3313. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3314. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  3315. RXON_FILTER_ACCEPT_GRP_MSK;
  3316. break;
  3317. default:
  3318. IL_ERR("Unsupported interface type %d\n",
  3319. ctx->vif->type);
  3320. break;
  3321. }
  3322. #if 0
  3323. /* TODO: Figure out when short_preamble would be set and cache from
  3324. * that */
  3325. if (!hw_to_local(il->hw)->short_preamble)
  3326. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3327. else
  3328. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3329. #endif
  3330. ch_info = il_get_channel_info(il, il->band,
  3331. le16_to_cpu(ctx->active.channel));
  3332. if (!ch_info)
  3333. ch_info = &il->channel_info[0];
  3334. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  3335. il->band = ch_info->band;
  3336. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  3337. ctx->staging.ofdm_basic_rates =
  3338. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3339. ctx->staging.cck_basic_rates =
  3340. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3341. /* clear both MIX and PURE40 mode flag */
  3342. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  3343. RXON_FLG_CHANNEL_MODE_PURE_40);
  3344. if (ctx->vif)
  3345. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  3346. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3347. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3348. }
  3349. EXPORT_SYMBOL(il_connection_init_rx_config);
  3350. void il_set_rate(struct il_priv *il)
  3351. {
  3352. const struct ieee80211_supported_band *hw = NULL;
  3353. struct ieee80211_rate *rate;
  3354. int i;
  3355. hw = il_get_hw_mode(il, il->band);
  3356. if (!hw) {
  3357. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3358. return;
  3359. }
  3360. il->active_rate = 0;
  3361. for (i = 0; i < hw->n_bitrates; i++) {
  3362. rate = &(hw->bitrates[i]);
  3363. if (rate->hw_value < RATE_COUNT_LEGACY)
  3364. il->active_rate |= (1 << rate->hw_value);
  3365. }
  3366. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3367. il->ctx.staging.cck_basic_rates =
  3368. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3369. il->ctx.staging.ofdm_basic_rates =
  3370. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3371. }
  3372. EXPORT_SYMBOL(il_set_rate);
  3373. void il_chswitch_done(struct il_priv *il, bool is_success)
  3374. {
  3375. struct il_rxon_context *ctx = &il->ctx;
  3376. if (test_bit(S_EXIT_PENDING, &il->status))
  3377. return;
  3378. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3379. ieee80211_chswitch_done(ctx->vif, is_success);
  3380. }
  3381. EXPORT_SYMBOL(il_chswitch_done);
  3382. void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3383. {
  3384. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3385. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3386. struct il_rxon_context *ctx = &il->ctx;
  3387. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  3388. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3389. return;
  3390. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3391. rxon->channel = csa->channel;
  3392. ctx->staging.channel = csa->channel;
  3393. D_11H("CSA notif: channel %d\n",
  3394. le16_to_cpu(csa->channel));
  3395. il_chswitch_done(il, true);
  3396. } else {
  3397. IL_ERR("CSA notif (fail) : channel %d\n",
  3398. le16_to_cpu(csa->channel));
  3399. il_chswitch_done(il, false);
  3400. }
  3401. }
  3402. EXPORT_SYMBOL(il_hdl_csa);
  3403. #ifdef CONFIG_IWLEGACY_DEBUG
  3404. void il_print_rx_config_cmd(struct il_priv *il,
  3405. struct il_rxon_context *ctx)
  3406. {
  3407. struct il_rxon_cmd *rxon = &ctx->staging;
  3408. D_RADIO("RX CONFIG:\n");
  3409. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3410. D_RADIO("u16 channel: 0x%x\n",
  3411. le16_to_cpu(rxon->channel));
  3412. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3413. D_RADIO("u32 filter_flags: 0x%08x\n",
  3414. le32_to_cpu(rxon->filter_flags));
  3415. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3416. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3417. rxon->ofdm_basic_rates);
  3418. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  3419. rxon->cck_basic_rates);
  3420. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3421. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3422. D_RADIO("u16 assoc_id: 0x%x\n",
  3423. le16_to_cpu(rxon->assoc_id));
  3424. }
  3425. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3426. #endif
  3427. /**
  3428. * il_irq_handle_error - called for HW or SW error interrupt from card
  3429. */
  3430. void il_irq_handle_error(struct il_priv *il)
  3431. {
  3432. /* Set the FW error flag -- cleared on il_down */
  3433. set_bit(S_FW_ERROR, &il->status);
  3434. /* Cancel currently queued command. */
  3435. clear_bit(S_HCMD_ACTIVE, &il->status);
  3436. IL_ERR("Loaded firmware version: %s\n",
  3437. il->hw->wiphy->fw_version);
  3438. il->cfg->ops->lib->dump_nic_error_log(il);
  3439. if (il->cfg->ops->lib->dump_fh)
  3440. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3441. #ifdef CONFIG_IWLEGACY_DEBUG
  3442. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3443. il_print_rx_config_cmd(il,
  3444. &il->ctx);
  3445. #endif
  3446. wake_up(&il->wait_command_queue);
  3447. /* Keep the restart process from trying to send host
  3448. * commands by clearing the INIT status bit */
  3449. clear_bit(S_READY, &il->status);
  3450. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3451. IL_DBG(IL_DL_FW_ERRORS,
  3452. "Restarting adapter due to uCode error.\n");
  3453. if (il->cfg->mod_params->restart_fw)
  3454. queue_work(il->workqueue, &il->restart);
  3455. }
  3456. }
  3457. EXPORT_SYMBOL(il_irq_handle_error);
  3458. static int il_apm_stop_master(struct il_priv *il)
  3459. {
  3460. int ret = 0;
  3461. /* stop device's busmaster DMA activity */
  3462. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3463. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3464. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3465. if (ret)
  3466. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3467. D_INFO("stop master\n");
  3468. return ret;
  3469. }
  3470. void il_apm_stop(struct il_priv *il)
  3471. {
  3472. D_INFO("Stop card, put in low power state\n");
  3473. /* Stop device's DMA activity */
  3474. il_apm_stop_master(il);
  3475. /* Reset the entire device */
  3476. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3477. udelay(10);
  3478. /*
  3479. * Clear "initialization complete" bit to move adapter from
  3480. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3481. */
  3482. il_clear_bit(il, CSR_GP_CNTRL,
  3483. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3484. }
  3485. EXPORT_SYMBOL(il_apm_stop);
  3486. /*
  3487. * Start up NIC's basic functionality after it has been reset
  3488. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3489. * NOTE: This does not load uCode nor start the embedded processor
  3490. */
  3491. int il_apm_init(struct il_priv *il)
  3492. {
  3493. int ret = 0;
  3494. u16 lctl;
  3495. D_INFO("Init card's basic functions\n");
  3496. /*
  3497. * Use "set_bit" below rather than "write", to preserve any hardware
  3498. * bits already set by default after reset.
  3499. */
  3500. /* Disable L0S exit timer (platform NMI Work/Around) */
  3501. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3502. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3503. /*
  3504. * Disable L0s without affecting L1;
  3505. * don't wait for ICH L0s (ICH bug W/A)
  3506. */
  3507. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3508. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3509. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3510. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  3511. CSR_DBG_HPET_MEM_REG_VAL);
  3512. /*
  3513. * Enable HAP INTA (interrupt from management bus) to
  3514. * wake device's PCI Express link L1a -> L0s
  3515. * NOTE: This is no-op for 3945 (non-existent bit)
  3516. */
  3517. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3518. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3519. /*
  3520. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3521. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3522. * If so (likely), disable L0S, so device moves directly L0->L1;
  3523. * costs negligible amount of power savings.
  3524. * If not (unlikely), enable L0S, so there is at least some
  3525. * power savings, even without L1.
  3526. */
  3527. if (il->cfg->base_params->set_l0s) {
  3528. lctl = il_pcie_link_ctl(il);
  3529. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3530. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3531. /* L1-ASPM enabled; disable(!) L0S */
  3532. il_set_bit(il, CSR_GIO_REG,
  3533. CSR_GIO_REG_VAL_L0S_ENABLED);
  3534. D_POWER("L1 Enabled; Disabling L0S\n");
  3535. } else {
  3536. /* L1-ASPM disabled; enable(!) L0S */
  3537. il_clear_bit(il, CSR_GIO_REG,
  3538. CSR_GIO_REG_VAL_L0S_ENABLED);
  3539. D_POWER("L1 Disabled; Enabling L0S\n");
  3540. }
  3541. }
  3542. /* Configure analog phase-lock-loop before activating to D0A */
  3543. if (il->cfg->base_params->pll_cfg_val)
  3544. il_set_bit(il, CSR_ANA_PLL_CFG,
  3545. il->cfg->base_params->pll_cfg_val);
  3546. /*
  3547. * Set "initialization complete" bit to move adapter from
  3548. * D0U* --> D0A* (powered-up active) state.
  3549. */
  3550. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3551. /*
  3552. * Wait for clock stabilization; once stabilized, access to
  3553. * device-internal resources is supported, e.g. il_wr_prph()
  3554. * and accesses to uCode SRAM.
  3555. */
  3556. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  3557. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3558. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3559. if (ret < 0) {
  3560. D_INFO("Failed to init the card\n");
  3561. goto out;
  3562. }
  3563. /*
  3564. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3565. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3566. *
  3567. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3568. * do not disable clocks. This preserves any hardware bits already
  3569. * set by default in "CLK_CTRL_REG" after reset.
  3570. */
  3571. if (il->cfg->base_params->use_bsm)
  3572. il_wr_prph(il, APMG_CLK_EN_REG,
  3573. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3574. else
  3575. il_wr_prph(il, APMG_CLK_EN_REG,
  3576. APMG_CLK_VAL_DMA_CLK_RQT);
  3577. udelay(20);
  3578. /* Disable L1-Active */
  3579. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3580. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3581. out:
  3582. return ret;
  3583. }
  3584. EXPORT_SYMBOL(il_apm_init);
  3585. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3586. {
  3587. int ret;
  3588. s8 prev_tx_power;
  3589. bool defer;
  3590. struct il_rxon_context *ctx = &il->ctx;
  3591. lockdep_assert_held(&il->mutex);
  3592. if (il->tx_power_user_lmt == tx_power && !force)
  3593. return 0;
  3594. if (!il->cfg->ops->lib->send_tx_power)
  3595. return -EOPNOTSUPP;
  3596. /* 0 dBm mean 1 milliwatt */
  3597. if (tx_power < 0) {
  3598. IL_WARN(
  3599. "Requested user TXPOWER %d below 1 mW.\n",
  3600. tx_power);
  3601. return -EINVAL;
  3602. }
  3603. if (tx_power > il->tx_power_device_lmt) {
  3604. IL_WARN(
  3605. "Requested user TXPOWER %d above upper limit %d.\n",
  3606. tx_power, il->tx_power_device_lmt);
  3607. return -EINVAL;
  3608. }
  3609. if (!il_is_ready_rf(il))
  3610. return -EIO;
  3611. /* scan complete and commit_rxon use tx_power_next value,
  3612. * it always need to be updated for newest request */
  3613. il->tx_power_next = tx_power;
  3614. /* do not set tx power when scanning or channel changing */
  3615. defer = test_bit(S_SCANNING, &il->status) ||
  3616. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  3617. if (defer && !force) {
  3618. D_INFO("Deferring tx power set\n");
  3619. return 0;
  3620. }
  3621. prev_tx_power = il->tx_power_user_lmt;
  3622. il->tx_power_user_lmt = tx_power;
  3623. ret = il->cfg->ops->lib->send_tx_power(il);
  3624. /* if fail to set tx_power, restore the orig. tx power */
  3625. if (ret) {
  3626. il->tx_power_user_lmt = prev_tx_power;
  3627. il->tx_power_next = prev_tx_power;
  3628. }
  3629. return ret;
  3630. }
  3631. EXPORT_SYMBOL(il_set_tx_power);
  3632. void il_send_bt_config(struct il_priv *il)
  3633. {
  3634. struct il_bt_cmd bt_cmd = {
  3635. .lead_time = BT_LEAD_TIME_DEF,
  3636. .max_kill = BT_MAX_KILL_DEF,
  3637. .kill_ack_mask = 0,
  3638. .kill_cts_mask = 0,
  3639. };
  3640. if (!bt_coex_active)
  3641. bt_cmd.flags = BT_COEX_DISABLE;
  3642. else
  3643. bt_cmd.flags = BT_COEX_ENABLE;
  3644. D_INFO("BT coex %s\n",
  3645. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3646. if (il_send_cmd_pdu(il, C_BT_CONFIG,
  3647. sizeof(struct il_bt_cmd), &bt_cmd))
  3648. IL_ERR("failed to send BT Coex Config\n");
  3649. }
  3650. EXPORT_SYMBOL(il_send_bt_config);
  3651. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3652. {
  3653. struct il_stats_cmd stats_cmd = {
  3654. .configuration_flags =
  3655. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3656. };
  3657. if (flags & CMD_ASYNC)
  3658. return il_send_cmd_pdu_async(il, C_STATS,
  3659. sizeof(struct il_stats_cmd),
  3660. &stats_cmd, NULL);
  3661. else
  3662. return il_send_cmd_pdu(il, C_STATS,
  3663. sizeof(struct il_stats_cmd),
  3664. &stats_cmd);
  3665. }
  3666. EXPORT_SYMBOL(il_send_stats_request);
  3667. void il_hdl_pm_sleep(struct il_priv *il,
  3668. struct il_rx_buf *rxb)
  3669. {
  3670. #ifdef CONFIG_IWLEGACY_DEBUG
  3671. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3672. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3673. D_RX("sleep mode: %d, src: %d\n",
  3674. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3675. #endif
  3676. }
  3677. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3678. void il_hdl_pm_debug_stats(struct il_priv *il,
  3679. struct il_rx_buf *rxb)
  3680. {
  3681. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3682. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  3683. D_RADIO("Dumping %d bytes of unhandled "
  3684. "notification for %s:\n", len,
  3685. il_get_cmd_string(pkt->hdr.cmd));
  3686. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3687. }
  3688. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3689. void il_hdl_error(struct il_priv *il,
  3690. struct il_rx_buf *rxb)
  3691. {
  3692. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3693. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3694. "seq 0x%04X ser 0x%08X\n",
  3695. le32_to_cpu(pkt->u.err_resp.error_type),
  3696. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3697. pkt->u.err_resp.cmd_id,
  3698. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3699. le32_to_cpu(pkt->u.err_resp.error_info));
  3700. }
  3701. EXPORT_SYMBOL(il_hdl_error);
  3702. void il_clear_isr_stats(struct il_priv *il)
  3703. {
  3704. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3705. }
  3706. int il_mac_conf_tx(struct ieee80211_hw *hw,
  3707. struct ieee80211_vif *vif, u16 queue,
  3708. const struct ieee80211_tx_queue_params *params)
  3709. {
  3710. struct il_priv *il = hw->priv;
  3711. unsigned long flags;
  3712. int q;
  3713. D_MAC80211("enter\n");
  3714. if (!il_is_ready_rf(il)) {
  3715. D_MAC80211("leave - RF not ready\n");
  3716. return -EIO;
  3717. }
  3718. if (queue >= AC_NUM) {
  3719. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3720. return 0;
  3721. }
  3722. q = AC_NUM - 1 - queue;
  3723. spin_lock_irqsave(&il->lock, flags);
  3724. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  3725. cpu_to_le16(params->cw_min);
  3726. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  3727. cpu_to_le16(params->cw_max);
  3728. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3729. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  3730. cpu_to_le16((params->txop * 32));
  3731. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3732. spin_unlock_irqrestore(&il->lock, flags);
  3733. D_MAC80211("leave\n");
  3734. return 0;
  3735. }
  3736. EXPORT_SYMBOL(il_mac_conf_tx);
  3737. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3738. {
  3739. struct il_priv *il = hw->priv;
  3740. return il->ibss_manager == IL_IBSS_MANAGER;
  3741. }
  3742. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3743. static int
  3744. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  3745. {
  3746. il_connection_init_rx_config(il, ctx);
  3747. if (il->cfg->ops->hcmd->set_rxon_chain)
  3748. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3749. return il_commit_rxon(il, ctx);
  3750. }
  3751. static int il_setup_interface(struct il_priv *il,
  3752. struct il_rxon_context *ctx)
  3753. {
  3754. struct ieee80211_vif *vif = ctx->vif;
  3755. int err;
  3756. lockdep_assert_held(&il->mutex);
  3757. /*
  3758. * This variable will be correct only when there's just
  3759. * a single context, but all code using it is for hardware
  3760. * that supports only one context.
  3761. */
  3762. il->iw_mode = vif->type;
  3763. ctx->is_active = true;
  3764. err = il_set_mode(il, ctx);
  3765. if (err) {
  3766. if (!ctx->always_active)
  3767. ctx->is_active = false;
  3768. return err;
  3769. }
  3770. return 0;
  3771. }
  3772. int
  3773. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3774. {
  3775. struct il_priv *il = hw->priv;
  3776. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  3777. int err;
  3778. u32 modes;
  3779. D_MAC80211("enter: type %d, addr %pM\n",
  3780. vif->type, vif->addr);
  3781. mutex_lock(&il->mutex);
  3782. if (!il_is_ready_rf(il)) {
  3783. IL_WARN("Try to add interface when device not ready\n");
  3784. err = -EINVAL;
  3785. goto out;
  3786. }
  3787. /* check if busy context is exclusive */
  3788. if (il->ctx.vif &&
  3789. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  3790. err = -EINVAL;
  3791. goto out;
  3792. }
  3793. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  3794. if (!(modes & BIT(vif->type))) {
  3795. err = -EOPNOTSUPP;
  3796. goto out;
  3797. }
  3798. vif_priv->ctx = &il->ctx;
  3799. il->ctx.vif = vif;
  3800. err = il_setup_interface(il, &il->ctx);
  3801. if (err) {
  3802. il->ctx.vif = NULL;
  3803. il->iw_mode = NL80211_IFTYPE_STATION;
  3804. }
  3805. out:
  3806. mutex_unlock(&il->mutex);
  3807. D_MAC80211("leave\n");
  3808. return err;
  3809. }
  3810. EXPORT_SYMBOL(il_mac_add_interface);
  3811. static void il_teardown_interface(struct il_priv *il,
  3812. struct ieee80211_vif *vif,
  3813. bool mode_change)
  3814. {
  3815. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3816. lockdep_assert_held(&il->mutex);
  3817. if (il->scan_vif == vif) {
  3818. il_scan_cancel_timeout(il, 200);
  3819. il_force_scan_end(il);
  3820. }
  3821. if (!mode_change) {
  3822. il_set_mode(il, ctx);
  3823. if (!ctx->always_active)
  3824. ctx->is_active = false;
  3825. }
  3826. }
  3827. void il_mac_remove_interface(struct ieee80211_hw *hw,
  3828. struct ieee80211_vif *vif)
  3829. {
  3830. struct il_priv *il = hw->priv;
  3831. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3832. D_MAC80211("enter\n");
  3833. mutex_lock(&il->mutex);
  3834. WARN_ON(ctx->vif != vif);
  3835. ctx->vif = NULL;
  3836. il_teardown_interface(il, vif, false);
  3837. memset(il->bssid, 0, ETH_ALEN);
  3838. mutex_unlock(&il->mutex);
  3839. D_MAC80211("leave\n");
  3840. }
  3841. EXPORT_SYMBOL(il_mac_remove_interface);
  3842. int il_alloc_txq_mem(struct il_priv *il)
  3843. {
  3844. if (!il->txq)
  3845. il->txq = kzalloc(
  3846. sizeof(struct il_tx_queue) *
  3847. il->cfg->base_params->num_of_queues,
  3848. GFP_KERNEL);
  3849. if (!il->txq) {
  3850. IL_ERR("Not enough memory for txq\n");
  3851. return -ENOMEM;
  3852. }
  3853. return 0;
  3854. }
  3855. EXPORT_SYMBOL(il_alloc_txq_mem);
  3856. void il_txq_mem(struct il_priv *il)
  3857. {
  3858. kfree(il->txq);
  3859. il->txq = NULL;
  3860. }
  3861. EXPORT_SYMBOL(il_txq_mem);
  3862. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3863. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3864. void il_reset_traffic_log(struct il_priv *il)
  3865. {
  3866. il->tx_traffic_idx = 0;
  3867. il->rx_traffic_idx = 0;
  3868. if (il->tx_traffic)
  3869. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3870. if (il->rx_traffic)
  3871. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3872. }
  3873. int il_alloc_traffic_mem(struct il_priv *il)
  3874. {
  3875. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3876. if (il_debug_level & IL_DL_TX) {
  3877. if (!il->tx_traffic) {
  3878. il->tx_traffic =
  3879. kzalloc(traffic_size, GFP_KERNEL);
  3880. if (!il->tx_traffic)
  3881. return -ENOMEM;
  3882. }
  3883. }
  3884. if (il_debug_level & IL_DL_RX) {
  3885. if (!il->rx_traffic) {
  3886. il->rx_traffic =
  3887. kzalloc(traffic_size, GFP_KERNEL);
  3888. if (!il->rx_traffic)
  3889. return -ENOMEM;
  3890. }
  3891. }
  3892. il_reset_traffic_log(il);
  3893. return 0;
  3894. }
  3895. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3896. void il_free_traffic_mem(struct il_priv *il)
  3897. {
  3898. kfree(il->tx_traffic);
  3899. il->tx_traffic = NULL;
  3900. kfree(il->rx_traffic);
  3901. il->rx_traffic = NULL;
  3902. }
  3903. EXPORT_SYMBOL(il_free_traffic_mem);
  3904. void il_dbg_log_tx_data_frame(struct il_priv *il,
  3905. u16 length, struct ieee80211_hdr *header)
  3906. {
  3907. __le16 fc;
  3908. u16 len;
  3909. if (likely(!(il_debug_level & IL_DL_TX)))
  3910. return;
  3911. if (!il->tx_traffic)
  3912. return;
  3913. fc = header->frame_control;
  3914. if (ieee80211_is_data(fc)) {
  3915. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3916. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3917. memcpy((il->tx_traffic +
  3918. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3919. header, len);
  3920. il->tx_traffic_idx =
  3921. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3922. }
  3923. }
  3924. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3925. void il_dbg_log_rx_data_frame(struct il_priv *il,
  3926. u16 length, struct ieee80211_hdr *header)
  3927. {
  3928. __le16 fc;
  3929. u16 len;
  3930. if (likely(!(il_debug_level & IL_DL_RX)))
  3931. return;
  3932. if (!il->rx_traffic)
  3933. return;
  3934. fc = header->frame_control;
  3935. if (ieee80211_is_data(fc)) {
  3936. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3937. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3938. memcpy((il->rx_traffic +
  3939. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3940. header, len);
  3941. il->rx_traffic_idx =
  3942. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3943. }
  3944. }
  3945. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3946. const char *il_get_mgmt_string(int cmd)
  3947. {
  3948. switch (cmd) {
  3949. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3950. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3951. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3952. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3953. IL_CMD(MANAGEMENT_PROBE_REQ);
  3954. IL_CMD(MANAGEMENT_PROBE_RESP);
  3955. IL_CMD(MANAGEMENT_BEACON);
  3956. IL_CMD(MANAGEMENT_ATIM);
  3957. IL_CMD(MANAGEMENT_DISASSOC);
  3958. IL_CMD(MANAGEMENT_AUTH);
  3959. IL_CMD(MANAGEMENT_DEAUTH);
  3960. IL_CMD(MANAGEMENT_ACTION);
  3961. default:
  3962. return "UNKNOWN";
  3963. }
  3964. }
  3965. const char *il_get_ctrl_string(int cmd)
  3966. {
  3967. switch (cmd) {
  3968. IL_CMD(CONTROL_BACK_REQ);
  3969. IL_CMD(CONTROL_BACK);
  3970. IL_CMD(CONTROL_PSPOLL);
  3971. IL_CMD(CONTROL_RTS);
  3972. IL_CMD(CONTROL_CTS);
  3973. IL_CMD(CONTROL_ACK);
  3974. IL_CMD(CONTROL_CFEND);
  3975. IL_CMD(CONTROL_CFENDACK);
  3976. default:
  3977. return "UNKNOWN";
  3978. }
  3979. }
  3980. void il_clear_traffic_stats(struct il_priv *il)
  3981. {
  3982. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  3983. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  3984. }
  3985. /*
  3986. * if CONFIG_IWLEGACY_DEBUGFS defined,
  3987. * il_update_stats function will
  3988. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  3989. * Use debugFs to display the rx/rx_stats
  3990. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  3991. * information will be recorded, but DATA pkt still will be recorded
  3992. * for the reason of il_led.c need to control the led blinking based on
  3993. * number of tx and rx data.
  3994. *
  3995. */
  3996. void
  3997. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  3998. {
  3999. struct traffic_stats *stats;
  4000. if (is_tx)
  4001. stats = &il->tx_stats;
  4002. else
  4003. stats = &il->rx_stats;
  4004. if (ieee80211_is_mgmt(fc)) {
  4005. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4006. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4007. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  4008. break;
  4009. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  4010. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  4011. break;
  4012. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4013. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  4014. break;
  4015. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  4016. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  4017. break;
  4018. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  4019. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  4020. break;
  4021. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  4022. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  4023. break;
  4024. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  4025. stats->mgmt[MANAGEMENT_BEACON]++;
  4026. break;
  4027. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  4028. stats->mgmt[MANAGEMENT_ATIM]++;
  4029. break;
  4030. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  4031. stats->mgmt[MANAGEMENT_DISASSOC]++;
  4032. break;
  4033. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4034. stats->mgmt[MANAGEMENT_AUTH]++;
  4035. break;
  4036. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4037. stats->mgmt[MANAGEMENT_DEAUTH]++;
  4038. break;
  4039. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  4040. stats->mgmt[MANAGEMENT_ACTION]++;
  4041. break;
  4042. }
  4043. } else if (ieee80211_is_ctl(fc)) {
  4044. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4045. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4046. stats->ctrl[CONTROL_BACK_REQ]++;
  4047. break;
  4048. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4049. stats->ctrl[CONTROL_BACK]++;
  4050. break;
  4051. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4052. stats->ctrl[CONTROL_PSPOLL]++;
  4053. break;
  4054. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4055. stats->ctrl[CONTROL_RTS]++;
  4056. break;
  4057. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4058. stats->ctrl[CONTROL_CTS]++;
  4059. break;
  4060. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4061. stats->ctrl[CONTROL_ACK]++;
  4062. break;
  4063. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4064. stats->ctrl[CONTROL_CFEND]++;
  4065. break;
  4066. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4067. stats->ctrl[CONTROL_CFENDACK]++;
  4068. break;
  4069. }
  4070. } else {
  4071. /* data */
  4072. stats->data_cnt++;
  4073. stats->data_bytes += len;
  4074. }
  4075. }
  4076. EXPORT_SYMBOL(il_update_stats);
  4077. #endif
  4078. int il_force_reset(struct il_priv *il, bool external)
  4079. {
  4080. struct il_force_reset *force_reset;
  4081. if (test_bit(S_EXIT_PENDING, &il->status))
  4082. return -EINVAL;
  4083. force_reset = &il->force_reset;
  4084. force_reset->reset_request_count++;
  4085. if (!external) {
  4086. if (force_reset->last_force_reset_jiffies &&
  4087. time_after(force_reset->last_force_reset_jiffies +
  4088. force_reset->reset_duration, jiffies)) {
  4089. D_INFO("force reset rejected\n");
  4090. force_reset->reset_reject_count++;
  4091. return -EAGAIN;
  4092. }
  4093. }
  4094. force_reset->reset_success_count++;
  4095. force_reset->last_force_reset_jiffies = jiffies;
  4096. /*
  4097. * if the request is from external(ex: debugfs),
  4098. * then always perform the request in regardless the module
  4099. * parameter setting
  4100. * if the request is from internal (uCode error or driver
  4101. * detect failure), then fw_restart module parameter
  4102. * need to be check before performing firmware reload
  4103. */
  4104. if (!external && !il->cfg->mod_params->restart_fw) {
  4105. D_INFO("Cancel firmware reload based on "
  4106. "module parameter setting\n");
  4107. return 0;
  4108. }
  4109. IL_ERR("On demand firmware reload\n");
  4110. /* Set the FW error flag -- cleared on il_down */
  4111. set_bit(S_FW_ERROR, &il->status);
  4112. wake_up(&il->wait_command_queue);
  4113. /*
  4114. * Keep the restart process from trying to send host
  4115. * commands by clearing the INIT status bit
  4116. */
  4117. clear_bit(S_READY, &il->status);
  4118. queue_work(il->workqueue, &il->restart);
  4119. return 0;
  4120. }
  4121. int
  4122. il_mac_change_interface(struct ieee80211_hw *hw,
  4123. struct ieee80211_vif *vif,
  4124. enum nl80211_iftype newtype, bool newp2p)
  4125. {
  4126. struct il_priv *il = hw->priv;
  4127. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4128. u32 modes;
  4129. int err;
  4130. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  4131. mutex_lock(&il->mutex);
  4132. if (!ctx->vif || !il_is_ready_rf(il)) {
  4133. /*
  4134. * Huh? But wait ... this can maybe happen when
  4135. * we're in the middle of a firmware restart!
  4136. */
  4137. err = -EBUSY;
  4138. goto out;
  4139. }
  4140. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  4141. if (!(modes & BIT(newtype))) {
  4142. err = -EOPNOTSUPP;
  4143. goto out;
  4144. }
  4145. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  4146. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  4147. err = -EINVAL;
  4148. goto out;
  4149. }
  4150. /* success */
  4151. il_teardown_interface(il, vif, true);
  4152. vif->type = newtype;
  4153. vif->p2p = newp2p;
  4154. err = il_setup_interface(il, ctx);
  4155. WARN_ON(err);
  4156. /*
  4157. * We've switched internally, but submitting to the
  4158. * device may have failed for some reason. Mask this
  4159. * error, because otherwise mac80211 will not switch
  4160. * (and set the interface type back) and we'll be
  4161. * out of sync with it.
  4162. */
  4163. err = 0;
  4164. out:
  4165. mutex_unlock(&il->mutex);
  4166. return err;
  4167. }
  4168. EXPORT_SYMBOL(il_mac_change_interface);
  4169. /*
  4170. * On every watchdog tick we check (latest) time stamp. If it does not
  4171. * change during timeout period and queue is not empty we reset firmware.
  4172. */
  4173. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  4174. {
  4175. struct il_tx_queue *txq = &il->txq[cnt];
  4176. struct il_queue *q = &txq->q;
  4177. unsigned long timeout;
  4178. int ret;
  4179. if (q->read_ptr == q->write_ptr) {
  4180. txq->time_stamp = jiffies;
  4181. return 0;
  4182. }
  4183. timeout = txq->time_stamp +
  4184. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4185. if (time_after(jiffies, timeout)) {
  4186. IL_ERR("Queue %d stuck for %u ms.\n",
  4187. q->id, il->cfg->base_params->wd_timeout);
  4188. ret = il_force_reset(il, false);
  4189. return (ret == -EAGAIN) ? 0 : 1;
  4190. }
  4191. return 0;
  4192. }
  4193. /*
  4194. * Making watchdog tick be a quarter of timeout assure we will
  4195. * discover the queue hung between timeout and 1.25*timeout
  4196. */
  4197. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4198. /*
  4199. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4200. * we reset the firmware. If everything is fine just rearm the timer.
  4201. */
  4202. void il_bg_watchdog(unsigned long data)
  4203. {
  4204. struct il_priv *il = (struct il_priv *)data;
  4205. int cnt;
  4206. unsigned long timeout;
  4207. if (test_bit(S_EXIT_PENDING, &il->status))
  4208. return;
  4209. timeout = il->cfg->base_params->wd_timeout;
  4210. if (timeout == 0)
  4211. return;
  4212. /* monitor and check for stuck cmd queue */
  4213. if (il_check_stuck_queue(il, il->cmd_queue))
  4214. return;
  4215. /* monitor and check for other stuck queues */
  4216. if (il_is_any_associated(il)) {
  4217. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4218. /* skip as we already checked the command queue */
  4219. if (cnt == il->cmd_queue)
  4220. continue;
  4221. if (il_check_stuck_queue(il, cnt))
  4222. return;
  4223. }
  4224. }
  4225. mod_timer(&il->watchdog, jiffies +
  4226. msecs_to_jiffies(IL_WD_TICK(timeout)));
  4227. }
  4228. EXPORT_SYMBOL(il_bg_watchdog);
  4229. void il_setup_watchdog(struct il_priv *il)
  4230. {
  4231. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4232. if (timeout)
  4233. mod_timer(&il->watchdog,
  4234. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4235. else
  4236. del_timer(&il->watchdog);
  4237. }
  4238. EXPORT_SYMBOL(il_setup_watchdog);
  4239. /*
  4240. * extended beacon time format
  4241. * time in usec will be changed into a 32-bit value in extended:internal format
  4242. * the extended part is the beacon counts
  4243. * the internal part is the time in usec within one beacon interval
  4244. */
  4245. u32
  4246. il_usecs_to_beacons(struct il_priv *il,
  4247. u32 usec, u32 beacon_interval)
  4248. {
  4249. u32 quot;
  4250. u32 rem;
  4251. u32 interval = beacon_interval * TIME_UNIT;
  4252. if (!interval || !usec)
  4253. return 0;
  4254. quot = (usec / interval) &
  4255. (il_beacon_time_mask_high(il,
  4256. il->hw_params.beacon_time_tsf_bits) >>
  4257. il->hw_params.beacon_time_tsf_bits);
  4258. rem = (usec % interval) & il_beacon_time_mask_low(il,
  4259. il->hw_params.beacon_time_tsf_bits);
  4260. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4261. }
  4262. EXPORT_SYMBOL(il_usecs_to_beacons);
  4263. /* base is usually what we get from ucode with each received frame,
  4264. * the same as HW timer counter counting down
  4265. */
  4266. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  4267. u32 addon, u32 beacon_interval)
  4268. {
  4269. u32 base_low = base & il_beacon_time_mask_low(il,
  4270. il->hw_params.beacon_time_tsf_bits);
  4271. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4272. il->hw_params.beacon_time_tsf_bits);
  4273. u32 interval = beacon_interval * TIME_UNIT;
  4274. u32 res = (base & il_beacon_time_mask_high(il,
  4275. il->hw_params.beacon_time_tsf_bits)) +
  4276. (addon & il_beacon_time_mask_high(il,
  4277. il->hw_params.beacon_time_tsf_bits));
  4278. if (base_low > addon_low)
  4279. res += base_low - addon_low;
  4280. else if (base_low < addon_low) {
  4281. res += interval + base_low - addon_low;
  4282. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4283. } else
  4284. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4285. return cpu_to_le32(res);
  4286. }
  4287. EXPORT_SYMBOL(il_add_beacon_time);
  4288. #ifdef CONFIG_PM
  4289. int il_pci_suspend(struct device *device)
  4290. {
  4291. struct pci_dev *pdev = to_pci_dev(device);
  4292. struct il_priv *il = pci_get_drvdata(pdev);
  4293. /*
  4294. * This function is called when system goes into suspend state
  4295. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4296. * first but since il_mac_stop() has no knowledge of who the caller is,
  4297. * it will not call apm_ops.stop() to stop the DMA operation.
  4298. * Calling apm_ops.stop here to make sure we stop the DMA.
  4299. */
  4300. il_apm_stop(il);
  4301. return 0;
  4302. }
  4303. EXPORT_SYMBOL(il_pci_suspend);
  4304. int il_pci_resume(struct device *device)
  4305. {
  4306. struct pci_dev *pdev = to_pci_dev(device);
  4307. struct il_priv *il = pci_get_drvdata(pdev);
  4308. bool hw_rfkill = false;
  4309. /*
  4310. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4311. * PCI Tx retries from interfering with C3 CPU state.
  4312. */
  4313. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4314. il_enable_interrupts(il);
  4315. if (!(_il_rd(il, CSR_GP_CNTRL) &
  4316. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4317. hw_rfkill = true;
  4318. if (hw_rfkill)
  4319. set_bit(S_RF_KILL_HW, &il->status);
  4320. else
  4321. clear_bit(S_RF_KILL_HW, &il->status);
  4322. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4323. return 0;
  4324. }
  4325. EXPORT_SYMBOL(il_pci_resume);
  4326. const struct dev_pm_ops il_pm_ops = {
  4327. .suspend = il_pci_suspend,
  4328. .resume = il_pci_resume,
  4329. .freeze = il_pci_suspend,
  4330. .thaw = il_pci_resume,
  4331. .poweroff = il_pci_suspend,
  4332. .restore = il_pci_resume,
  4333. };
  4334. EXPORT_SYMBOL(il_pm_ops);
  4335. #endif /* CONFIG_PM */
  4336. static void
  4337. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  4338. {
  4339. if (test_bit(S_EXIT_PENDING, &il->status))
  4340. return;
  4341. if (!ctx->is_active)
  4342. return;
  4343. ctx->qos_data.def_qos_parm.qos_flags = 0;
  4344. if (ctx->qos_data.qos_active)
  4345. ctx->qos_data.def_qos_parm.qos_flags |=
  4346. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4347. if (ctx->ht.enabled)
  4348. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4349. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4350. ctx->qos_data.qos_active,
  4351. ctx->qos_data.def_qos_parm.qos_flags);
  4352. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  4353. sizeof(struct il_qosparam_cmd),
  4354. &ctx->qos_data.def_qos_parm, NULL);
  4355. }
  4356. /**
  4357. * il_mac_config - mac80211 config callback
  4358. */
  4359. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4360. {
  4361. struct il_priv *il = hw->priv;
  4362. const struct il_channel_info *ch_info;
  4363. struct ieee80211_conf *conf = &hw->conf;
  4364. struct ieee80211_channel *channel = conf->channel;
  4365. struct il_ht_config *ht_conf = &il->current_ht_config;
  4366. struct il_rxon_context *ctx = &il->ctx;
  4367. unsigned long flags = 0;
  4368. int ret = 0;
  4369. u16 ch;
  4370. int scan_active = 0;
  4371. bool ht_changed = false;
  4372. if (WARN_ON(!il->cfg->ops->legacy))
  4373. return -EOPNOTSUPP;
  4374. mutex_lock(&il->mutex);
  4375. D_MAC80211("enter to channel %d changed 0x%X\n",
  4376. channel->hw_value, changed);
  4377. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4378. scan_active = 1;
  4379. D_MAC80211("scan active\n");
  4380. }
  4381. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  4382. IEEE80211_CONF_CHANGE_CHANNEL)) {
  4383. /* mac80211 uses static for non-HT which is what we want */
  4384. il->current_ht_config.smps = conf->smps_mode;
  4385. /*
  4386. * Recalculate chain counts.
  4387. *
  4388. * If monitor mode is enabled then mac80211 will
  4389. * set up the SM PS mode to OFF if an HT channel is
  4390. * configured.
  4391. */
  4392. if (il->cfg->ops->hcmd->set_rxon_chain)
  4393. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  4394. }
  4395. /* during scanning mac80211 will delay channel setting until
  4396. * scan finish with changed = 0
  4397. */
  4398. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4399. if (scan_active)
  4400. goto set_ch_out;
  4401. ch = channel->hw_value;
  4402. ch_info = il_get_channel_info(il, channel->band, ch);
  4403. if (!il_is_channel_valid(ch_info)) {
  4404. D_MAC80211("leave - invalid channel\n");
  4405. ret = -EINVAL;
  4406. goto set_ch_out;
  4407. }
  4408. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4409. !il_is_channel_ibss(ch_info)) {
  4410. D_MAC80211("leave - not IBSS channel\n");
  4411. ret = -EINVAL;
  4412. goto set_ch_out;
  4413. }
  4414. spin_lock_irqsave(&il->lock, flags);
  4415. /* Configure HT40 channels */
  4416. if (ctx->ht.enabled != conf_is_ht(conf)) {
  4417. ctx->ht.enabled = conf_is_ht(conf);
  4418. ht_changed = true;
  4419. }
  4420. if (ctx->ht.enabled) {
  4421. if (conf_is_ht40_minus(conf)) {
  4422. ctx->ht.extension_chan_offset =
  4423. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4424. ctx->ht.is_40mhz = true;
  4425. } else if (conf_is_ht40_plus(conf)) {
  4426. ctx->ht.extension_chan_offset =
  4427. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4428. ctx->ht.is_40mhz = true;
  4429. } else {
  4430. ctx->ht.extension_chan_offset =
  4431. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4432. ctx->ht.is_40mhz = false;
  4433. }
  4434. } else
  4435. ctx->ht.is_40mhz = false;
  4436. /*
  4437. * Default to no protection. Protection mode will
  4438. * later be set from BSS config in il_ht_conf
  4439. */
  4440. ctx->ht.protection =
  4441. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4442. /* if we are switching from ht to 2.4 clear flags
  4443. * from any ht related info since 2.4 does not
  4444. * support ht */
  4445. if ((le16_to_cpu(ctx->staging.channel) != ch))
  4446. ctx->staging.flags = 0;
  4447. il_set_rxon_channel(il, channel, ctx);
  4448. il_set_rxon_ht(il, ht_conf);
  4449. il_set_flags_for_band(il, ctx, channel->band,
  4450. ctx->vif);
  4451. spin_unlock_irqrestore(&il->lock, flags);
  4452. if (il->cfg->ops->legacy->update_bcast_stations)
  4453. ret =
  4454. il->cfg->ops->legacy->update_bcast_stations(il);
  4455. set_ch_out:
  4456. /* The list of supported rates and rate mask can be different
  4457. * for each band; since the band may have changed, reset
  4458. * the rate mask to what mac80211 lists */
  4459. il_set_rate(il);
  4460. }
  4461. if (changed & (IEEE80211_CONF_CHANGE_PS |
  4462. IEEE80211_CONF_CHANGE_IDLE)) {
  4463. ret = il_power_update_mode(il, false);
  4464. if (ret)
  4465. D_MAC80211("Error setting sleep level\n");
  4466. }
  4467. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4468. D_MAC80211("TX Power old=%d new=%d\n",
  4469. il->tx_power_user_lmt, conf->power_level);
  4470. il_set_tx_power(il, conf->power_level, false);
  4471. }
  4472. if (!il_is_ready(il)) {
  4473. D_MAC80211("leave - not ready\n");
  4474. goto out;
  4475. }
  4476. if (scan_active)
  4477. goto out;
  4478. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  4479. il_commit_rxon(il, ctx);
  4480. else
  4481. D_INFO("Not re-sending same RXON configuration.\n");
  4482. if (ht_changed)
  4483. il_update_qos(il, ctx);
  4484. out:
  4485. D_MAC80211("leave\n");
  4486. mutex_unlock(&il->mutex);
  4487. return ret;
  4488. }
  4489. EXPORT_SYMBOL(il_mac_config);
  4490. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  4491. struct ieee80211_vif *vif)
  4492. {
  4493. struct il_priv *il = hw->priv;
  4494. unsigned long flags;
  4495. struct il_rxon_context *ctx = &il->ctx;
  4496. if (WARN_ON(!il->cfg->ops->legacy))
  4497. return;
  4498. mutex_lock(&il->mutex);
  4499. D_MAC80211("enter\n");
  4500. spin_lock_irqsave(&il->lock, flags);
  4501. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4502. spin_unlock_irqrestore(&il->lock, flags);
  4503. spin_lock_irqsave(&il->lock, flags);
  4504. /* new association get rid of ibss beacon skb */
  4505. if (il->beacon_skb)
  4506. dev_kfree_skb(il->beacon_skb);
  4507. il->beacon_skb = NULL;
  4508. il->timestamp = 0;
  4509. spin_unlock_irqrestore(&il->lock, flags);
  4510. il_scan_cancel_timeout(il, 100);
  4511. if (!il_is_ready_rf(il)) {
  4512. D_MAC80211("leave - not ready\n");
  4513. mutex_unlock(&il->mutex);
  4514. return;
  4515. }
  4516. /* we are restarting association process
  4517. * clear RXON_FILTER_ASSOC_MSK bit
  4518. */
  4519. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4520. il_commit_rxon(il, ctx);
  4521. il_set_rate(il);
  4522. mutex_unlock(&il->mutex);
  4523. D_MAC80211("leave\n");
  4524. }
  4525. EXPORT_SYMBOL(il_mac_reset_tsf);
  4526. static void il_ht_conf(struct il_priv *il,
  4527. struct ieee80211_vif *vif)
  4528. {
  4529. struct il_ht_config *ht_conf = &il->current_ht_config;
  4530. struct ieee80211_sta *sta;
  4531. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4532. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4533. D_ASSOC("enter:\n");
  4534. if (!ctx->ht.enabled)
  4535. return;
  4536. ctx->ht.protection =
  4537. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4538. ctx->ht.non_gf_sta_present =
  4539. !!(bss_conf->ht_operation_mode &
  4540. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4541. ht_conf->single_chain_sufficient = false;
  4542. switch (vif->type) {
  4543. case NL80211_IFTYPE_STATION:
  4544. rcu_read_lock();
  4545. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4546. if (sta) {
  4547. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4548. int maxstreams;
  4549. maxstreams = (ht_cap->mcs.tx_params &
  4550. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4551. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4552. maxstreams += 1;
  4553. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4554. ht_cap->mcs.rx_mask[2] == 0)
  4555. ht_conf->single_chain_sufficient = true;
  4556. if (maxstreams <= 1)
  4557. ht_conf->single_chain_sufficient = true;
  4558. } else {
  4559. /*
  4560. * If at all, this can only happen through a race
  4561. * when the AP disconnects us while we're still
  4562. * setting up the connection, in that case mac80211
  4563. * will soon tell us about that.
  4564. */
  4565. ht_conf->single_chain_sufficient = true;
  4566. }
  4567. rcu_read_unlock();
  4568. break;
  4569. case NL80211_IFTYPE_ADHOC:
  4570. ht_conf->single_chain_sufficient = true;
  4571. break;
  4572. default:
  4573. break;
  4574. }
  4575. D_ASSOC("leave\n");
  4576. }
  4577. static inline void il_set_no_assoc(struct il_priv *il,
  4578. struct ieee80211_vif *vif)
  4579. {
  4580. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4581. /*
  4582. * inform the ucode that there is no longer an
  4583. * association and that no more packets should be
  4584. * sent
  4585. */
  4586. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4587. ctx->staging.assoc_id = 0;
  4588. il_commit_rxon(il, ctx);
  4589. }
  4590. static void il_beacon_update(struct ieee80211_hw *hw,
  4591. struct ieee80211_vif *vif)
  4592. {
  4593. struct il_priv *il = hw->priv;
  4594. unsigned long flags;
  4595. __le64 timestamp;
  4596. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4597. if (!skb)
  4598. return;
  4599. D_MAC80211("enter\n");
  4600. lockdep_assert_held(&il->mutex);
  4601. if (!il->beacon_ctx) {
  4602. IL_ERR("update beacon but no beacon context!\n");
  4603. dev_kfree_skb(skb);
  4604. return;
  4605. }
  4606. spin_lock_irqsave(&il->lock, flags);
  4607. if (il->beacon_skb)
  4608. dev_kfree_skb(il->beacon_skb);
  4609. il->beacon_skb = skb;
  4610. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4611. il->timestamp = le64_to_cpu(timestamp);
  4612. D_MAC80211("leave\n");
  4613. spin_unlock_irqrestore(&il->lock, flags);
  4614. if (!il_is_ready_rf(il)) {
  4615. D_MAC80211("leave - RF not ready\n");
  4616. return;
  4617. }
  4618. il->cfg->ops->legacy->post_associate(il);
  4619. }
  4620. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  4621. struct ieee80211_vif *vif,
  4622. struct ieee80211_bss_conf *bss_conf,
  4623. u32 changes)
  4624. {
  4625. struct il_priv *il = hw->priv;
  4626. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4627. int ret;
  4628. if (WARN_ON(!il->cfg->ops->legacy))
  4629. return;
  4630. D_MAC80211("changes = 0x%X\n", changes);
  4631. mutex_lock(&il->mutex);
  4632. if (!il_is_alive(il)) {
  4633. mutex_unlock(&il->mutex);
  4634. return;
  4635. }
  4636. if (changes & BSS_CHANGED_QOS) {
  4637. unsigned long flags;
  4638. spin_lock_irqsave(&il->lock, flags);
  4639. ctx->qos_data.qos_active = bss_conf->qos;
  4640. il_update_qos(il, ctx);
  4641. spin_unlock_irqrestore(&il->lock, flags);
  4642. }
  4643. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4644. /*
  4645. * the add_interface code must make sure we only ever
  4646. * have a single interface that could be beaconing at
  4647. * any time.
  4648. */
  4649. if (vif->bss_conf.enable_beacon)
  4650. il->beacon_ctx = ctx;
  4651. else
  4652. il->beacon_ctx = NULL;
  4653. }
  4654. if (changes & BSS_CHANGED_BSSID) {
  4655. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4656. /*
  4657. * If there is currently a HW scan going on in the
  4658. * background then we need to cancel it else the RXON
  4659. * below/in post_associate will fail.
  4660. */
  4661. if (il_scan_cancel_timeout(il, 100)) {
  4662. IL_WARN(
  4663. "Aborted scan still in progress after 100ms\n");
  4664. D_MAC80211(
  4665. "leaving - scan abort failed.\n");
  4666. mutex_unlock(&il->mutex);
  4667. return;
  4668. }
  4669. /* mac80211 only sets assoc when in STATION mode */
  4670. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4671. memcpy(ctx->staging.bssid_addr,
  4672. bss_conf->bssid, ETH_ALEN);
  4673. /* currently needed in a few places */
  4674. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4675. } else {
  4676. ctx->staging.filter_flags &=
  4677. ~RXON_FILTER_ASSOC_MSK;
  4678. }
  4679. }
  4680. /*
  4681. * This needs to be after setting the BSSID in case
  4682. * mac80211 decides to do both changes at once because
  4683. * it will invoke post_associate.
  4684. */
  4685. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4686. il_beacon_update(hw, vif);
  4687. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4688. D_MAC80211("ERP_PREAMBLE %d\n",
  4689. bss_conf->use_short_preamble);
  4690. if (bss_conf->use_short_preamble)
  4691. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4692. else
  4693. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4694. }
  4695. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4696. D_MAC80211(
  4697. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  4698. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4699. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4700. else
  4701. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4702. if (bss_conf->use_cts_prot)
  4703. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4704. else
  4705. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4706. }
  4707. if (changes & BSS_CHANGED_BASIC_RATES) {
  4708. /* XXX use this information
  4709. *
  4710. * To do that, remove code from il_set_rate() and put something
  4711. * like this here:
  4712. *
  4713. if (A-band)
  4714. ctx->staging.ofdm_basic_rates =
  4715. bss_conf->basic_rates;
  4716. else
  4717. ctx->staging.ofdm_basic_rates =
  4718. bss_conf->basic_rates >> 4;
  4719. ctx->staging.cck_basic_rates =
  4720. bss_conf->basic_rates & 0xF;
  4721. */
  4722. }
  4723. if (changes & BSS_CHANGED_HT) {
  4724. il_ht_conf(il, vif);
  4725. if (il->cfg->ops->hcmd->set_rxon_chain)
  4726. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  4727. }
  4728. if (changes & BSS_CHANGED_ASSOC) {
  4729. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4730. if (bss_conf->assoc) {
  4731. il->timestamp = bss_conf->timestamp;
  4732. if (!il_is_rfkill(il))
  4733. il->cfg->ops->legacy->post_associate(il);
  4734. } else
  4735. il_set_no_assoc(il, vif);
  4736. }
  4737. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  4738. D_MAC80211("Changes (%#x) while associated\n",
  4739. changes);
  4740. ret = il_send_rxon_assoc(il, ctx);
  4741. if (!ret) {
  4742. /* Sync active_rxon with latest change. */
  4743. memcpy((void *)&ctx->active,
  4744. &ctx->staging,
  4745. sizeof(struct il_rxon_cmd));
  4746. }
  4747. }
  4748. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4749. if (vif->bss_conf.enable_beacon) {
  4750. memcpy(ctx->staging.bssid_addr,
  4751. bss_conf->bssid, ETH_ALEN);
  4752. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4753. il->cfg->ops->legacy->config_ap(il);
  4754. } else
  4755. il_set_no_assoc(il, vif);
  4756. }
  4757. if (changes & BSS_CHANGED_IBSS) {
  4758. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4759. bss_conf->ibss_joined);
  4760. if (ret)
  4761. IL_ERR("failed to %s IBSS station %pM\n",
  4762. bss_conf->ibss_joined ? "add" : "remove",
  4763. bss_conf->bssid);
  4764. }
  4765. mutex_unlock(&il->mutex);
  4766. D_MAC80211("leave\n");
  4767. }
  4768. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4769. irqreturn_t il_isr(int irq, void *data)
  4770. {
  4771. struct il_priv *il = data;
  4772. u32 inta, inta_mask;
  4773. u32 inta_fh;
  4774. unsigned long flags;
  4775. if (!il)
  4776. return IRQ_NONE;
  4777. spin_lock_irqsave(&il->lock, flags);
  4778. /* Disable (but don't clear!) interrupts here to avoid
  4779. * back-to-back ISRs and sporadic interrupts from our NIC.
  4780. * If we have something to service, the tasklet will re-enable ints.
  4781. * If we *don't* have something, we'll re-enable before leaving here. */
  4782. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4783. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4784. /* Discover which interrupts are active/pending */
  4785. inta = _il_rd(il, CSR_INT);
  4786. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4787. /* Ignore interrupt if there's nothing in NIC to service.
  4788. * This may be due to IRQ shared with another device,
  4789. * or due to sporadic interrupts thrown from our NIC. */
  4790. if (!inta && !inta_fh) {
  4791. D_ISR(
  4792. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  4793. goto none;
  4794. }
  4795. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4796. /* Hardware disappeared. It might have already raised
  4797. * an interrupt */
  4798. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4799. goto unplugged;
  4800. }
  4801. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4802. inta, inta_mask, inta_fh);
  4803. inta &= ~CSR_INT_BIT_SCD;
  4804. /* il_irq_tasklet() will service interrupts and re-enable them */
  4805. if (likely(inta || inta_fh))
  4806. tasklet_schedule(&il->irq_tasklet);
  4807. unplugged:
  4808. spin_unlock_irqrestore(&il->lock, flags);
  4809. return IRQ_HANDLED;
  4810. none:
  4811. /* re-enable interrupts here since we don't have anything to service. */
  4812. /* only Re-enable if disabled by irq */
  4813. if (test_bit(S_INT_ENABLED, &il->status))
  4814. il_enable_interrupts(il);
  4815. spin_unlock_irqrestore(&il->lock, flags);
  4816. return IRQ_NONE;
  4817. }
  4818. EXPORT_SYMBOL(il_isr);
  4819. /*
  4820. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4821. * function.
  4822. */
  4823. void il_tx_cmd_protection(struct il_priv *il,
  4824. struct ieee80211_tx_info *info,
  4825. __le16 fc, __le32 *tx_flags)
  4826. {
  4827. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4828. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4829. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4830. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4831. if (!ieee80211_is_mgmt(fc))
  4832. return;
  4833. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4834. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4835. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4836. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4837. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4838. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4839. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4840. break;
  4841. }
  4842. } else if (info->control.rates[0].flags &
  4843. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4844. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4845. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4846. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4847. }
  4848. }
  4849. EXPORT_SYMBOL(il_tx_cmd_protection);