main.c 4.7 KB

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  1. /*
  2. * This file is part of wl18xx
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/platform_device.h>
  23. #include "../wlcore/wlcore.h"
  24. #include "../wlcore/debug.h"
  25. #include "reg.h"
  26. static const struct wlcore_partition_set wl18xx_ptable[PART_TABLE_LEN] = {
  27. [PART_TOP_PRCM_ELP_SOC] = {
  28. .mem = { .start = 0x00A02000, .size = 0x00010000 },
  29. .reg = { .start = 0x00807000, .size = 0x00005000 },
  30. .mem2 = { .start = 0x00800000, .size = 0x0000B000 },
  31. .mem3 = { .start = 0x00000000, .size = 0x00000000 },
  32. },
  33. [PART_DOWN] = {
  34. .mem = { .start = 0x00000000, .size = 0x00014000 },
  35. .reg = { .start = 0x00810000, .size = 0x0000BFFF },
  36. .mem2 = { .start = 0x00000000, .size = 0x00000000 },
  37. .mem3 = { .start = 0x00000000, .size = 0x00000000 },
  38. },
  39. [PART_BOOT] = {
  40. .mem = { .start = 0x00700000, .size = 0x0000030c },
  41. .reg = { .start = 0x00802000, .size = 0x00014578 },
  42. .mem2 = { .start = 0x00B00404, .size = 0x00001000 },
  43. .mem3 = { .start = 0x00C00000, .size = 0x00000400 },
  44. },
  45. [PART_WORK] = {
  46. .mem = { .start = 0x00800000, .size = 0x000050FC },
  47. .reg = { .start = 0x00B00404, .size = 0x00001000 },
  48. .mem2 = { .start = 0x00C00000, .size = 0x00000400 },
  49. .mem3 = { .start = 0x00000000, .size = 0x00000000 },
  50. },
  51. [PART_PHY_INIT] = {
  52. /* TODO: use the phy_conf struct size here */
  53. .mem = { .start = 0x80926000, .size = 252 },
  54. .reg = { .start = 0x00000000, .size = 0x00000000 },
  55. .mem2 = { .start = 0x00000000, .size = 0x00000000 },
  56. .mem3 = { .start = 0x00000000, .size = 0x00000000 },
  57. },
  58. };
  59. static const int wl18xx_rtable[REG_TABLE_LEN] = {
  60. [REG_ECPU_CONTROL] = WL18XX_REG_ECPU_CONTROL,
  61. [REG_INTERRUPT_NO_CLEAR] = WL18XX_REG_INTERRUPT_NO_CLEAR,
  62. [REG_INTERRUPT_ACK] = WL18XX_REG_INTERRUPT_ACK,
  63. [REG_COMMAND_MAILBOX_PTR] = WL18XX_REG_COMMAND_MAILBOX_PTR,
  64. [REG_EVENT_MAILBOX_PTR] = WL18XX_REG_EVENT_MAILBOX_PTR,
  65. [REG_INTERRUPT_TRIG] = WL18XX_REG_INTERRUPT_TRIG_H,
  66. [REG_INTERRUPT_MASK] = WL18XX_REG_INTERRUPT_MASK,
  67. [REG_PC_ON_RECOVERY] = 0, /* TODO: where is the PC? */
  68. [REG_CHIP_ID_B] = WL18XX_REG_CHIP_ID_B,
  69. [REG_CMD_MBOX_ADDRESS] = WL18XX_CMD_MBOX_ADDRESS,
  70. /* data access memory addresses, used with partition translation */
  71. [REG_SLV_MEM_DATA] = WL18XX_SLV_MEM_DATA,
  72. [REG_SLV_REG_DATA] = WL18XX_SLV_REG_DATA,
  73. /* raw data access memory addresses */
  74. [REG_RAW_FW_STATUS_ADDR] = WL18XX_FW_STATUS_ADDR,
  75. };
  76. /* TODO: maybe move to a new header file? */
  77. #define WL18XX_FW_NAME "ti-connectivity/wl18xx-fw.bin"
  78. static int wl18xx_identify_chip(struct wl1271 *wl)
  79. {
  80. int ret = 0;
  81. switch (wl->chip.id) {
  82. case CHIP_ID_185x_PG10:
  83. wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
  84. wl->chip.id);
  85. wl->sr_fw_name = WL18XX_FW_NAME;
  86. wl->quirks |= WLCORE_QUIRK_NO_ELP;
  87. /* TODO: need to blocksize alignment for RX/TX separately? */
  88. break;
  89. default:
  90. wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
  91. ret = -ENODEV;
  92. goto out;
  93. }
  94. out:
  95. return ret;
  96. }
  97. static struct wlcore_ops wl18xx_ops = {
  98. .identify_chip = wl18xx_identify_chip,
  99. };
  100. int __devinit wl18xx_probe(struct platform_device *pdev)
  101. {
  102. struct wl1271 *wl;
  103. struct ieee80211_hw *hw;
  104. hw = wlcore_alloc_hw(0);
  105. if (IS_ERR(hw)) {
  106. wl1271_error("can't allocate hw");
  107. return PTR_ERR(hw);
  108. }
  109. wl = hw->priv;
  110. wl->ops = &wl18xx_ops;
  111. wl->ptable = wl18xx_ptable;
  112. wl->rtable = wl18xx_rtable;
  113. return wlcore_probe(wl, pdev);
  114. }
  115. static const struct platform_device_id wl18xx_id_table[] __devinitconst = {
  116. { "wl18xx", 0 },
  117. { } /* Terminating Entry */
  118. };
  119. MODULE_DEVICE_TABLE(platform, wl18xx_id_table);
  120. static struct platform_driver wl18xx_driver = {
  121. .probe = wl18xx_probe,
  122. .remove = __devexit_p(wlcore_remove),
  123. .id_table = wl18xx_id_table,
  124. .driver = {
  125. .name = "wl18xx_driver",
  126. .owner = THIS_MODULE,
  127. }
  128. };
  129. static int __init wl18xx_init(void)
  130. {
  131. return platform_driver_register(&wl18xx_driver);
  132. }
  133. module_init(wl18xx_init);
  134. static void __exit wl18xx_exit(void)
  135. {
  136. platform_driver_unregister(&wl18xx_driver);
  137. }
  138. module_exit(wl18xx_exit);
  139. MODULE_LICENSE("GPL v2");
  140. MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
  141. MODULE_FIRMWARE(WL18XX_FW_NAME);