ehci-q.c 32 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. /* writes to an active overlay are unsafe */
  79. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  80. qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  81. qh->hw_alt_next = EHCI_LIST_END(ehci);
  82. /* Except for control endpoints, we make hardware maintain data
  83. * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
  84. * and set the pseudo-toggle in udev. Only usb_clear_halt() will
  85. * ever clear it.
  86. */
  87. if (!(qh->hw_info1 & cpu_to_hc32(ehci, 1 << 14))) {
  88. unsigned is_out, epnum;
  89. is_out = !(qtd->hw_token & cpu_to_hc32(ehci, 1 << 8));
  90. epnum = (hc32_to_cpup(ehci, &qh->hw_info1) >> 8) & 0x0f;
  91. if (unlikely (!usb_gettoggle (qh->dev, epnum, is_out))) {
  92. qh->hw_token &= ~cpu_to_hc32(ehci, QTD_TOGGLE);
  93. usb_settoggle (qh->dev, epnum, is_out, 1);
  94. }
  95. }
  96. /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
  97. wmb ();
  98. qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  99. }
  100. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  101. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  102. * recovery (including urb dequeue) would need software changes to a QH...
  103. */
  104. static void
  105. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  106. {
  107. struct ehci_qtd *qtd;
  108. if (list_empty (&qh->qtd_list))
  109. qtd = qh->dummy;
  110. else {
  111. qtd = list_entry (qh->qtd_list.next,
  112. struct ehci_qtd, qtd_list);
  113. /* first qtd may already be partially processed */
  114. if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
  115. qtd = NULL;
  116. }
  117. if (qtd)
  118. qh_update (ehci, qh, qtd);
  119. }
  120. /*-------------------------------------------------------------------------*/
  121. static int qtd_copy_status (
  122. struct ehci_hcd *ehci,
  123. struct urb *urb,
  124. size_t length,
  125. u32 token
  126. )
  127. {
  128. int status = -EINPROGRESS;
  129. /* count IN/OUT bytes, not SETUP (even short packets) */
  130. if (likely (QTD_PID (token) != 2))
  131. urb->actual_length += length - QTD_LENGTH (token);
  132. /* don't modify error codes */
  133. if (unlikely(urb->unlinked))
  134. return status;
  135. /* force cleanup after short read; not always an error */
  136. if (unlikely (IS_SHORT_READ (token)))
  137. status = -EREMOTEIO;
  138. /* serious "can't proceed" faults reported by the hardware */
  139. if (token & QTD_STS_HALT) {
  140. if (token & QTD_STS_BABBLE) {
  141. /* FIXME "must" disable babbling device's port too */
  142. status = -EOVERFLOW;
  143. } else if (token & QTD_STS_MMF) {
  144. /* fs/ls interrupt xfer missed the complete-split */
  145. status = -EPROTO;
  146. } else if (token & QTD_STS_DBE) {
  147. status = (QTD_PID (token) == 1) /* IN ? */
  148. ? -ENOSR /* hc couldn't read data */
  149. : -ECOMM; /* hc couldn't write data */
  150. } else if (token & QTD_STS_XACT) {
  151. /* timeout, bad crc, wrong PID, etc; retried */
  152. if (QTD_CERR (token))
  153. status = -EPIPE;
  154. else {
  155. ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
  156. urb->dev->devpath,
  157. usb_pipeendpoint (urb->pipe),
  158. usb_pipein (urb->pipe) ? "in" : "out");
  159. status = -EPROTO;
  160. }
  161. /* CERR nonzero + no errors + halt --> stall */
  162. } else if (QTD_CERR (token))
  163. status = -EPIPE;
  164. else /* unknown */
  165. status = -EPROTO;
  166. ehci_vdbg (ehci,
  167. "dev%d ep%d%s qtd token %08x --> status %d\n",
  168. usb_pipedevice (urb->pipe),
  169. usb_pipeendpoint (urb->pipe),
  170. usb_pipein (urb->pipe) ? "in" : "out",
  171. token, status);
  172. /* if async CSPLIT failed, try cleaning out the TT buffer */
  173. if (status != -EPIPE
  174. && urb->dev->tt
  175. && !usb_pipeint(urb->pipe)
  176. && ((token & QTD_STS_MMF) != 0
  177. || QTD_CERR(token) == 0)
  178. && (!ehci_is_TDI(ehci)
  179. || urb->dev->tt->hub !=
  180. ehci_to_hcd(ehci)->self.root_hub)) {
  181. #ifdef DEBUG
  182. struct usb_device *tt = urb->dev->tt->hub;
  183. dev_dbg (&tt->dev,
  184. "clear tt buffer port %d, a%d ep%d t%08x\n",
  185. urb->dev->ttport, urb->dev->devnum,
  186. usb_pipeendpoint (urb->pipe), token);
  187. #endif /* DEBUG */
  188. /* REVISIT ARC-derived cores don't clear the root
  189. * hub TT buffer in this way...
  190. */
  191. usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
  192. }
  193. }
  194. return status;
  195. }
  196. static void
  197. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  198. __releases(ehci->lock)
  199. __acquires(ehci->lock)
  200. {
  201. if (likely (urb->hcpriv != NULL)) {
  202. struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
  203. /* S-mask in a QH means it's an interrupt urb */
  204. if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
  205. /* ... update hc-wide periodic stats (for usbfs) */
  206. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  207. }
  208. qh_put (qh);
  209. }
  210. if (unlikely(urb->unlinked)) {
  211. COUNT(ehci->stats.unlink);
  212. } else {
  213. /* report non-error and short read status as zero */
  214. if (status == -EINPROGRESS || status == -EREMOTEIO)
  215. status = 0;
  216. COUNT(ehci->stats.complete);
  217. }
  218. #ifdef EHCI_URB_TRACE
  219. ehci_dbg (ehci,
  220. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  221. __func__, urb->dev->devpath, urb,
  222. usb_pipeendpoint (urb->pipe),
  223. usb_pipein (urb->pipe) ? "in" : "out",
  224. status,
  225. urb->actual_length, urb->transfer_buffer_length);
  226. #endif
  227. /* complete() can reenter this HCD */
  228. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  229. spin_unlock (&ehci->lock);
  230. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  231. spin_lock (&ehci->lock);
  232. }
  233. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  234. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  235. static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  236. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  237. /*
  238. * Process and free completed qtds for a qh, returning URBs to drivers.
  239. * Chases up to qh->hw_current. Returns number of completions called,
  240. * indicating how much "real" work we did.
  241. */
  242. static unsigned
  243. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  244. {
  245. struct ehci_qtd *last = NULL, *end = qh->dummy;
  246. struct list_head *entry, *tmp;
  247. int last_status = -EINPROGRESS;
  248. int stopped;
  249. unsigned count = 0;
  250. u8 state;
  251. __le32 halt = HALT_BIT(ehci);
  252. if (unlikely (list_empty (&qh->qtd_list)))
  253. return count;
  254. /* completions (or tasks on other cpus) must never clobber HALT
  255. * till we've gone through and cleaned everything up, even when
  256. * they add urbs to this qh's queue or mark them for unlinking.
  257. *
  258. * NOTE: unlinking expects to be done in queue order.
  259. */
  260. state = qh->qh_state;
  261. qh->qh_state = QH_STATE_COMPLETING;
  262. stopped = (state == QH_STATE_IDLE);
  263. /* remove de-activated QTDs from front of queue.
  264. * after faults (including short reads), cleanup this urb
  265. * then let the queue advance.
  266. * if queue is stopped, handles unlinks.
  267. */
  268. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  269. struct ehci_qtd *qtd;
  270. struct urb *urb;
  271. u32 token = 0;
  272. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  273. urb = qtd->urb;
  274. /* clean up any state from previous QTD ...*/
  275. if (last) {
  276. if (likely (last->urb != urb)) {
  277. ehci_urb_done(ehci, last->urb, last_status);
  278. count++;
  279. last_status = -EINPROGRESS;
  280. }
  281. ehci_qtd_free (ehci, last);
  282. last = NULL;
  283. }
  284. /* ignore urbs submitted during completions we reported */
  285. if (qtd == end)
  286. break;
  287. /* hardware copies qtd out of qh overlay */
  288. rmb ();
  289. token = hc32_to_cpu(ehci, qtd->hw_token);
  290. /* always clean up qtds the hc de-activated */
  291. if ((token & QTD_STS_ACTIVE) == 0) {
  292. /* on STALL, error, and short reads this urb must
  293. * complete and all its qtds must be recycled.
  294. */
  295. if ((token & QTD_STS_HALT) != 0) {
  296. stopped = 1;
  297. /* magic dummy for some short reads; qh won't advance.
  298. * that silicon quirk can kick in with this dummy too.
  299. *
  300. * other short reads won't stop the queue, including
  301. * control transfers (status stage handles that) or
  302. * most other single-qtd reads ... the queue stops if
  303. * URB_SHORT_NOT_OK was set so the driver submitting
  304. * the urbs could clean it up.
  305. */
  306. } else if (IS_SHORT_READ (token)
  307. && !(qtd->hw_alt_next
  308. & EHCI_LIST_END(ehci))) {
  309. stopped = 1;
  310. goto halt;
  311. }
  312. /* stop scanning when we reach qtds the hc is using */
  313. } else if (likely (!stopped
  314. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
  315. break;
  316. /* scan the whole queue for unlinks whenever it stops */
  317. } else {
  318. stopped = 1;
  319. /* cancel everything if we halt, suspend, etc */
  320. if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
  321. last_status = -ESHUTDOWN;
  322. /* this qtd is active; skip it unless a previous qtd
  323. * for its urb faulted, or its urb was canceled.
  324. */
  325. else if (last_status == -EINPROGRESS && !urb->unlinked)
  326. continue;
  327. /* qh unlinked; token in overlay may be most current */
  328. if (state == QH_STATE_IDLE
  329. && cpu_to_hc32(ehci, qtd->qtd_dma)
  330. == qh->hw_current)
  331. token = hc32_to_cpu(ehci, qh->hw_token);
  332. /* force halt for unlinked or blocked qh, so we'll
  333. * patch the qh later and so that completions can't
  334. * activate it while we "know" it's stopped.
  335. */
  336. if ((halt & qh->hw_token) == 0) {
  337. halt:
  338. qh->hw_token |= halt;
  339. wmb ();
  340. }
  341. }
  342. /* unless we already know the urb's status, collect qtd status
  343. * and update count of bytes transferred. in common short read
  344. * cases with only one data qtd (including control transfers),
  345. * queue processing won't halt. but with two or more qtds (for
  346. * example, with a 32 KB transfer), when the first qtd gets a
  347. * short read the second must be removed by hand.
  348. */
  349. if (last_status == -EINPROGRESS) {
  350. last_status = qtd_copy_status(ehci, urb,
  351. qtd->length, token);
  352. if (last_status == -EREMOTEIO
  353. && (qtd->hw_alt_next
  354. & EHCI_LIST_END(ehci)))
  355. last_status = -EINPROGRESS;
  356. }
  357. /* if we're removing something not at the queue head,
  358. * patch the hardware queue pointer.
  359. */
  360. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  361. last = list_entry (qtd->qtd_list.prev,
  362. struct ehci_qtd, qtd_list);
  363. last->hw_next = qtd->hw_next;
  364. }
  365. /* remove qtd; it's recycled after possible urb completion */
  366. list_del (&qtd->qtd_list);
  367. last = qtd;
  368. }
  369. /* last urb's completion might still need calling */
  370. if (likely (last != NULL)) {
  371. ehci_urb_done(ehci, last->urb, last_status);
  372. count++;
  373. ehci_qtd_free (ehci, last);
  374. }
  375. /* restore original state; caller must unlink or relink */
  376. qh->qh_state = state;
  377. /* be sure the hardware's done with the qh before refreshing
  378. * it after fault cleanup, or recovering from silicon wrongly
  379. * overlaying the dummy qtd (which reduces DMA chatter).
  380. */
  381. if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
  382. switch (state) {
  383. case QH_STATE_IDLE:
  384. qh_refresh(ehci, qh);
  385. break;
  386. case QH_STATE_LINKED:
  387. /* We won't refresh a QH that's linked (after the HC
  388. * stopped the queue). That avoids a race:
  389. * - HC reads first part of QH;
  390. * - CPU updates that first part and the token;
  391. * - HC reads rest of that QH, including token
  392. * Result: HC gets an inconsistent image, and then
  393. * DMAs to/from the wrong memory (corrupting it).
  394. *
  395. * That should be rare for interrupt transfers,
  396. * except maybe high bandwidth ...
  397. */
  398. if ((cpu_to_hc32(ehci, QH_SMASK)
  399. & qh->hw_info2) != 0) {
  400. intr_deschedule (ehci, qh);
  401. (void) qh_schedule (ehci, qh);
  402. } else
  403. unlink_async (ehci, qh);
  404. break;
  405. /* otherwise, unlink already started */
  406. }
  407. }
  408. return count;
  409. }
  410. /*-------------------------------------------------------------------------*/
  411. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  412. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  413. // ... and packet size, for any kind of endpoint descriptor
  414. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  415. /*
  416. * reverse of qh_urb_transaction: free a list of TDs.
  417. * used for cleanup after errors, before HC sees an URB's TDs.
  418. */
  419. static void qtd_list_free (
  420. struct ehci_hcd *ehci,
  421. struct urb *urb,
  422. struct list_head *qtd_list
  423. ) {
  424. struct list_head *entry, *temp;
  425. list_for_each_safe (entry, temp, qtd_list) {
  426. struct ehci_qtd *qtd;
  427. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  428. list_del (&qtd->qtd_list);
  429. ehci_qtd_free (ehci, qtd);
  430. }
  431. }
  432. /*
  433. * create a list of filled qtds for this URB; won't link into qh.
  434. */
  435. static struct list_head *
  436. qh_urb_transaction (
  437. struct ehci_hcd *ehci,
  438. struct urb *urb,
  439. struct list_head *head,
  440. gfp_t flags
  441. ) {
  442. struct ehci_qtd *qtd, *qtd_prev;
  443. dma_addr_t buf;
  444. int len, maxpacket;
  445. int is_input;
  446. u32 token;
  447. /*
  448. * URBs map to sequences of QTDs: one logical transaction
  449. */
  450. qtd = ehci_qtd_alloc (ehci, flags);
  451. if (unlikely (!qtd))
  452. return NULL;
  453. list_add_tail (&qtd->qtd_list, head);
  454. qtd->urb = urb;
  455. token = QTD_STS_ACTIVE;
  456. token |= (EHCI_TUNE_CERR << 10);
  457. /* for split transactions, SplitXState initialized to zero */
  458. len = urb->transfer_buffer_length;
  459. is_input = usb_pipein (urb->pipe);
  460. if (usb_pipecontrol (urb->pipe)) {
  461. /* SETUP pid */
  462. qtd_fill(ehci, qtd, urb->setup_dma,
  463. sizeof (struct usb_ctrlrequest),
  464. token | (2 /* "setup" */ << 8), 8);
  465. /* ... and always at least one more pid */
  466. token ^= QTD_TOGGLE;
  467. qtd_prev = qtd;
  468. qtd = ehci_qtd_alloc (ehci, flags);
  469. if (unlikely (!qtd))
  470. goto cleanup;
  471. qtd->urb = urb;
  472. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  473. list_add_tail (&qtd->qtd_list, head);
  474. /* for zero length DATA stages, STATUS is always IN */
  475. if (len == 0)
  476. token |= (1 /* "in" */ << 8);
  477. }
  478. /*
  479. * data transfer stage: buffer setup
  480. */
  481. buf = urb->transfer_dma;
  482. if (is_input)
  483. token |= (1 /* "in" */ << 8);
  484. /* else it's already initted to "out" pid (0 << 8) */
  485. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  486. /*
  487. * buffer gets wrapped in one or more qtds;
  488. * last one may be "short" (including zero len)
  489. * and may serve as a control status ack
  490. */
  491. for (;;) {
  492. int this_qtd_len;
  493. this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
  494. len -= this_qtd_len;
  495. buf += this_qtd_len;
  496. /*
  497. * short reads advance to a "magic" dummy instead of the next
  498. * qtd ... that forces the queue to stop, for manual cleanup.
  499. * (this will usually be overridden later.)
  500. */
  501. if (is_input)
  502. qtd->hw_alt_next = ehci->async->hw_alt_next;
  503. /* qh makes control packets use qtd toggle; maybe switch it */
  504. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  505. token ^= QTD_TOGGLE;
  506. if (likely (len <= 0))
  507. break;
  508. qtd_prev = qtd;
  509. qtd = ehci_qtd_alloc (ehci, flags);
  510. if (unlikely (!qtd))
  511. goto cleanup;
  512. qtd->urb = urb;
  513. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  514. list_add_tail (&qtd->qtd_list, head);
  515. }
  516. /*
  517. * unless the caller requires manual cleanup after short reads,
  518. * have the alt_next mechanism keep the queue running after the
  519. * last data qtd (the only one, for control and most other cases).
  520. */
  521. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  522. || usb_pipecontrol (urb->pipe)))
  523. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  524. /*
  525. * control requests may need a terminating data "status" ack;
  526. * bulk ones may need a terminating short packet (zero length).
  527. */
  528. if (likely (urb->transfer_buffer_length != 0)) {
  529. int one_more = 0;
  530. if (usb_pipecontrol (urb->pipe)) {
  531. one_more = 1;
  532. token ^= 0x0100; /* "in" <--> "out" */
  533. token |= QTD_TOGGLE; /* force DATA1 */
  534. } else if (usb_pipebulk (urb->pipe)
  535. && (urb->transfer_flags & URB_ZERO_PACKET)
  536. && !(urb->transfer_buffer_length % maxpacket)) {
  537. one_more = 1;
  538. }
  539. if (one_more) {
  540. qtd_prev = qtd;
  541. qtd = ehci_qtd_alloc (ehci, flags);
  542. if (unlikely (!qtd))
  543. goto cleanup;
  544. qtd->urb = urb;
  545. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  546. list_add_tail (&qtd->qtd_list, head);
  547. /* never any data in such packets */
  548. qtd_fill(ehci, qtd, 0, 0, token, 0);
  549. }
  550. }
  551. /* by default, enable interrupt on urb completion */
  552. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  553. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  554. return head;
  555. cleanup:
  556. qtd_list_free (ehci, urb, head);
  557. return NULL;
  558. }
  559. /*-------------------------------------------------------------------------*/
  560. // Would be best to create all qh's from config descriptors,
  561. // when each interface/altsetting is established. Unlink
  562. // any previous qh and cancel its urbs first; endpoints are
  563. // implicitly reset then (data toggle too).
  564. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  565. /*
  566. * Each QH holds a qtd list; a QH is used for everything except iso.
  567. *
  568. * For interrupt urbs, the scheduler must set the microframe scheduling
  569. * mask(s) each time the QH gets scheduled. For highspeed, that's
  570. * just one microframe in the s-mask. For split interrupt transactions
  571. * there are additional complications: c-mask, maybe FSTNs.
  572. */
  573. static struct ehci_qh *
  574. qh_make (
  575. struct ehci_hcd *ehci,
  576. struct urb *urb,
  577. gfp_t flags
  578. ) {
  579. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  580. u32 info1 = 0, info2 = 0;
  581. int is_input, type;
  582. int maxp = 0;
  583. struct usb_tt *tt = urb->dev->tt;
  584. if (!qh)
  585. return qh;
  586. /*
  587. * init endpoint/device data for this QH
  588. */
  589. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  590. info1 |= usb_pipedevice (urb->pipe) << 0;
  591. is_input = usb_pipein (urb->pipe);
  592. type = usb_pipetype (urb->pipe);
  593. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  594. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  595. * acts like up to 3KB, but is built from smaller packets.
  596. */
  597. if (max_packet(maxp) > 1024) {
  598. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  599. goto done;
  600. }
  601. /* Compute interrupt scheduling parameters just once, and save.
  602. * - allowing for high bandwidth, how many nsec/uframe are used?
  603. * - split transactions need a second CSPLIT uframe; same question
  604. * - splits also need a schedule gap (for full/low speed I/O)
  605. * - qh has a polling interval
  606. *
  607. * For control/bulk requests, the HC or TT handles these.
  608. */
  609. if (type == PIPE_INTERRUPT) {
  610. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  611. is_input, 0,
  612. hb_mult(maxp) * max_packet(maxp)));
  613. qh->start = NO_FRAME;
  614. if (urb->dev->speed == USB_SPEED_HIGH) {
  615. qh->c_usecs = 0;
  616. qh->gap_uf = 0;
  617. qh->period = urb->interval >> 3;
  618. if (qh->period == 0 && urb->interval != 1) {
  619. /* NOTE interval 2 or 4 uframes could work.
  620. * But interval 1 scheduling is simpler, and
  621. * includes high bandwidth.
  622. */
  623. dbg ("intr period %d uframes, NYET!",
  624. urb->interval);
  625. goto done;
  626. }
  627. } else {
  628. int think_time;
  629. /* gap is f(FS/LS transfer times) */
  630. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  631. is_input, 0, maxp) / (125 * 1000);
  632. /* FIXME this just approximates SPLIT/CSPLIT times */
  633. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  634. qh->c_usecs = qh->usecs + HS_USECS (0);
  635. qh->usecs = HS_USECS (1);
  636. } else { // SPLIT+DATA, gap, CSPLIT
  637. qh->usecs += HS_USECS (1);
  638. qh->c_usecs = HS_USECS (0);
  639. }
  640. think_time = tt ? tt->think_time : 0;
  641. qh->tt_usecs = NS_TO_US (think_time +
  642. usb_calc_bus_time (urb->dev->speed,
  643. is_input, 0, max_packet (maxp)));
  644. qh->period = urb->interval;
  645. }
  646. }
  647. /* support for tt scheduling, and access to toggles */
  648. qh->dev = urb->dev;
  649. /* using TT? */
  650. switch (urb->dev->speed) {
  651. case USB_SPEED_LOW:
  652. info1 |= (1 << 12); /* EPS "low" */
  653. /* FALL THROUGH */
  654. case USB_SPEED_FULL:
  655. /* EPS 0 means "full" */
  656. if (type != PIPE_INTERRUPT)
  657. info1 |= (EHCI_TUNE_RL_TT << 28);
  658. if (type == PIPE_CONTROL) {
  659. info1 |= (1 << 27); /* for TT */
  660. info1 |= 1 << 14; /* toggle from qtd */
  661. }
  662. info1 |= maxp << 16;
  663. info2 |= (EHCI_TUNE_MULT_TT << 30);
  664. /* Some Freescale processors have an erratum in which the
  665. * port number in the queue head was 0..N-1 instead of 1..N.
  666. */
  667. if (ehci_has_fsl_portno_bug(ehci))
  668. info2 |= (urb->dev->ttport-1) << 23;
  669. else
  670. info2 |= urb->dev->ttport << 23;
  671. /* set the address of the TT; for TDI's integrated
  672. * root hub tt, leave it zeroed.
  673. */
  674. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  675. info2 |= tt->hub->devnum << 16;
  676. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  677. break;
  678. case USB_SPEED_HIGH: /* no TT involved */
  679. info1 |= (2 << 12); /* EPS "high" */
  680. if (type == PIPE_CONTROL) {
  681. info1 |= (EHCI_TUNE_RL_HS << 28);
  682. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  683. info1 |= 1 << 14; /* toggle from qtd */
  684. info2 |= (EHCI_TUNE_MULT_HS << 30);
  685. } else if (type == PIPE_BULK) {
  686. info1 |= (EHCI_TUNE_RL_HS << 28);
  687. /* The USB spec says that high speed bulk endpoints
  688. * always use 512 byte maxpacket. But some device
  689. * vendors decided to ignore that, and MSFT is happy
  690. * to help them do so. So now people expect to use
  691. * such nonconformant devices with Linux too; sigh.
  692. */
  693. info1 |= max_packet(maxp) << 16;
  694. info2 |= (EHCI_TUNE_MULT_HS << 30);
  695. } else { /* PIPE_INTERRUPT */
  696. info1 |= max_packet (maxp) << 16;
  697. info2 |= hb_mult (maxp) << 30;
  698. }
  699. break;
  700. default:
  701. dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
  702. done:
  703. qh_put (qh);
  704. return NULL;
  705. }
  706. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  707. /* init as live, toggle clear, advance to dummy */
  708. qh->qh_state = QH_STATE_IDLE;
  709. qh->hw_info1 = cpu_to_hc32(ehci, info1);
  710. qh->hw_info2 = cpu_to_hc32(ehci, info2);
  711. usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
  712. qh_refresh (ehci, qh);
  713. return qh;
  714. }
  715. /*-------------------------------------------------------------------------*/
  716. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  717. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  718. {
  719. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  720. struct ehci_qh *head;
  721. /* (re)start the async schedule? */
  722. head = ehci->async;
  723. timer_action_done (ehci, TIMER_ASYNC_OFF);
  724. if (!head->qh_next.qh) {
  725. u32 cmd = ehci_readl(ehci, &ehci->regs->command);
  726. if (!(cmd & CMD_ASE)) {
  727. /* in case a clear of CMD_ASE didn't take yet */
  728. (void)handshake(ehci, &ehci->regs->status,
  729. STS_ASS, 0, 150);
  730. cmd |= CMD_ASE | CMD_RUN;
  731. ehci_writel(ehci, cmd, &ehci->regs->command);
  732. ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
  733. /* posted write need not be known to HC yet ... */
  734. }
  735. }
  736. /* clear halt and/or toggle; and maybe recover from silicon quirk */
  737. if (qh->qh_state == QH_STATE_IDLE)
  738. qh_refresh (ehci, qh);
  739. /* splice right after start */
  740. qh->qh_next = head->qh_next;
  741. qh->hw_next = head->hw_next;
  742. wmb ();
  743. head->qh_next.qh = qh;
  744. head->hw_next = dma;
  745. qh->qh_state = QH_STATE_LINKED;
  746. /* qtd completions reported later by interrupt */
  747. }
  748. /*-------------------------------------------------------------------------*/
  749. /*
  750. * For control/bulk/interrupt, return QH with these TDs appended.
  751. * Allocates and initializes the QH if necessary.
  752. * Returns null if it can't allocate a QH it needs to.
  753. * If the QH has TDs (urbs) already, that's great.
  754. */
  755. static struct ehci_qh *qh_append_tds (
  756. struct ehci_hcd *ehci,
  757. struct urb *urb,
  758. struct list_head *qtd_list,
  759. int epnum,
  760. void **ptr
  761. )
  762. {
  763. struct ehci_qh *qh = NULL;
  764. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  765. qh = (struct ehci_qh *) *ptr;
  766. if (unlikely (qh == NULL)) {
  767. /* can't sleep here, we have ehci->lock... */
  768. qh = qh_make (ehci, urb, GFP_ATOMIC);
  769. *ptr = qh;
  770. }
  771. if (likely (qh != NULL)) {
  772. struct ehci_qtd *qtd;
  773. if (unlikely (list_empty (qtd_list)))
  774. qtd = NULL;
  775. else
  776. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  777. qtd_list);
  778. /* control qh may need patching ... */
  779. if (unlikely (epnum == 0)) {
  780. /* usb_reset_device() briefly reverts to address 0 */
  781. if (usb_pipedevice (urb->pipe) == 0)
  782. qh->hw_info1 &= ~qh_addr_mask;
  783. }
  784. /* just one way to queue requests: swap with the dummy qtd.
  785. * only hc or qh_refresh() ever modify the overlay.
  786. */
  787. if (likely (qtd != NULL)) {
  788. struct ehci_qtd *dummy;
  789. dma_addr_t dma;
  790. __hc32 token;
  791. /* to avoid racing the HC, use the dummy td instead of
  792. * the first td of our list (becomes new dummy). both
  793. * tds stay deactivated until we're done, when the
  794. * HC is allowed to fetch the old dummy (4.10.2).
  795. */
  796. token = qtd->hw_token;
  797. qtd->hw_token = HALT_BIT(ehci);
  798. wmb ();
  799. dummy = qh->dummy;
  800. dma = dummy->qtd_dma;
  801. *dummy = *qtd;
  802. dummy->qtd_dma = dma;
  803. list_del (&qtd->qtd_list);
  804. list_add (&dummy->qtd_list, qtd_list);
  805. list_splice_tail(qtd_list, &qh->qtd_list);
  806. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  807. qh->dummy = qtd;
  808. /* hc must see the new dummy at list end */
  809. dma = qtd->qtd_dma;
  810. qtd = list_entry (qh->qtd_list.prev,
  811. struct ehci_qtd, qtd_list);
  812. qtd->hw_next = QTD_NEXT(ehci, dma);
  813. /* let the hc process these next qtds */
  814. wmb ();
  815. dummy->hw_token = token;
  816. urb->hcpriv = qh_get (qh);
  817. }
  818. }
  819. return qh;
  820. }
  821. /*-------------------------------------------------------------------------*/
  822. static int
  823. submit_async (
  824. struct ehci_hcd *ehci,
  825. struct urb *urb,
  826. struct list_head *qtd_list,
  827. gfp_t mem_flags
  828. ) {
  829. struct ehci_qtd *qtd;
  830. int epnum;
  831. unsigned long flags;
  832. struct ehci_qh *qh = NULL;
  833. int rc;
  834. qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
  835. epnum = urb->ep->desc.bEndpointAddress;
  836. #ifdef EHCI_URB_TRACE
  837. ehci_dbg (ehci,
  838. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  839. __func__, urb->dev->devpath, urb,
  840. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  841. urb->transfer_buffer_length,
  842. qtd, urb->ep->hcpriv);
  843. #endif
  844. spin_lock_irqsave (&ehci->lock, flags);
  845. if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
  846. &ehci_to_hcd(ehci)->flags))) {
  847. rc = -ESHUTDOWN;
  848. goto done;
  849. }
  850. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  851. if (unlikely(rc))
  852. goto done;
  853. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  854. if (unlikely(qh == NULL)) {
  855. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  856. rc = -ENOMEM;
  857. goto done;
  858. }
  859. /* Control/bulk operations through TTs don't need scheduling,
  860. * the HC and TT handle it when the TT has a buffer ready.
  861. */
  862. if (likely (qh->qh_state == QH_STATE_IDLE))
  863. qh_link_async (ehci, qh_get (qh));
  864. done:
  865. spin_unlock_irqrestore (&ehci->lock, flags);
  866. if (unlikely (qh == NULL))
  867. qtd_list_free (ehci, urb, qtd_list);
  868. return rc;
  869. }
  870. /*-------------------------------------------------------------------------*/
  871. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  872. static void end_unlink_async (struct ehci_hcd *ehci)
  873. {
  874. struct ehci_qh *qh = ehci->reclaim;
  875. struct ehci_qh *next;
  876. iaa_watchdog_done(ehci);
  877. // qh->hw_next = cpu_to_hc32(qh->qh_dma);
  878. qh->qh_state = QH_STATE_IDLE;
  879. qh->qh_next.qh = NULL;
  880. qh_put (qh); // refcount from reclaim
  881. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  882. next = qh->reclaim;
  883. ehci->reclaim = next;
  884. qh->reclaim = NULL;
  885. qh_completions (ehci, qh);
  886. if (!list_empty (&qh->qtd_list)
  887. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
  888. qh_link_async (ehci, qh);
  889. else {
  890. qh_put (qh); // refcount from async list
  891. /* it's not free to turn the async schedule on/off; leave it
  892. * active but idle for a while once it empties.
  893. */
  894. if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
  895. && ehci->async->qh_next.qh == NULL)
  896. timer_action (ehci, TIMER_ASYNC_OFF);
  897. }
  898. if (next) {
  899. ehci->reclaim = NULL;
  900. start_unlink_async (ehci, next);
  901. }
  902. }
  903. /* makes sure the async qh will become idle */
  904. /* caller must own ehci->lock */
  905. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  906. {
  907. int cmd = ehci_readl(ehci, &ehci->regs->command);
  908. struct ehci_qh *prev;
  909. #ifdef DEBUG
  910. assert_spin_locked(&ehci->lock);
  911. if (ehci->reclaim
  912. || (qh->qh_state != QH_STATE_LINKED
  913. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  914. )
  915. BUG ();
  916. #endif
  917. /* stop async schedule right now? */
  918. if (unlikely (qh == ehci->async)) {
  919. /* can't get here without STS_ASS set */
  920. if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
  921. && !ehci->reclaim) {
  922. /* ... and CMD_IAAD clear */
  923. ehci_writel(ehci, cmd & ~CMD_ASE,
  924. &ehci->regs->command);
  925. wmb ();
  926. // handshake later, if we need to
  927. timer_action_done (ehci, TIMER_ASYNC_OFF);
  928. }
  929. return;
  930. }
  931. qh->qh_state = QH_STATE_UNLINK;
  932. ehci->reclaim = qh = qh_get (qh);
  933. prev = ehci->async;
  934. while (prev->qh_next.qh != qh)
  935. prev = prev->qh_next.qh;
  936. prev->hw_next = qh->hw_next;
  937. prev->qh_next = qh->qh_next;
  938. wmb ();
  939. /* If the controller isn't running, we don't have to wait for it */
  940. if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
  941. /* if (unlikely (qh->reclaim != 0))
  942. * this will recurse, probably not much
  943. */
  944. end_unlink_async (ehci);
  945. return;
  946. }
  947. cmd |= CMD_IAAD;
  948. ehci_writel(ehci, cmd, &ehci->regs->command);
  949. (void)ehci_readl(ehci, &ehci->regs->command);
  950. iaa_watchdog_start(ehci);
  951. }
  952. /*-------------------------------------------------------------------------*/
  953. static void scan_async (struct ehci_hcd *ehci)
  954. {
  955. struct ehci_qh *qh;
  956. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  957. ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
  958. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  959. rescan:
  960. qh = ehci->async->qh_next.qh;
  961. if (likely (qh != NULL)) {
  962. do {
  963. /* clean any finished work for this qh */
  964. if (!list_empty (&qh->qtd_list)
  965. && qh->stamp != ehci->stamp) {
  966. int temp;
  967. /* unlinks could happen here; completion
  968. * reporting drops the lock. rescan using
  969. * the latest schedule, but don't rescan
  970. * qhs we already finished (no looping).
  971. */
  972. qh = qh_get (qh);
  973. qh->stamp = ehci->stamp;
  974. temp = qh_completions (ehci, qh);
  975. qh_put (qh);
  976. if (temp != 0) {
  977. goto rescan;
  978. }
  979. }
  980. /* unlink idle entries, reducing DMA usage as well
  981. * as HCD schedule-scanning costs. delay for any qh
  982. * we just scanned, there's a not-unusual case that it
  983. * doesn't stay idle for long.
  984. * (plus, avoids some kind of re-activation race.)
  985. */
  986. if (list_empty(&qh->qtd_list)
  987. && qh->qh_state == QH_STATE_LINKED) {
  988. if (!ehci->reclaim
  989. && ((ehci->stamp - qh->stamp) & 0x1fff)
  990. >= (EHCI_SHRINK_FRAMES * 8))
  991. start_unlink_async(ehci, qh);
  992. else
  993. action = TIMER_ASYNC_SHRINK;
  994. }
  995. qh = qh->qh_next.qh;
  996. } while (qh);
  997. }
  998. if (action == TIMER_ASYNC_SHRINK)
  999. timer_action (ehci, TIMER_ASYNC_SHRINK);
  1000. }