be_main.c 49 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. MODULE_VERSION(DRV_VER);
  19. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  20. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  21. MODULE_AUTHOR("ServerEngines Corporation");
  22. MODULE_LICENSE("GPL");
  23. static unsigned int rx_frag_size = 2048;
  24. module_param(rx_frag_size, uint, S_IRUGO);
  25. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  26. #define BE_VENDOR_ID 0x19a2
  27. #define BE2_DEVICE_ID_1 0x0211
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
  30. { 0 }
  31. };
  32. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  33. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  34. {
  35. struct be_dma_mem *mem = &q->dma_mem;
  36. if (mem->va)
  37. pci_free_consistent(adapter->pdev, mem->size,
  38. mem->va, mem->dma);
  39. }
  40. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  41. u16 len, u16 entry_size)
  42. {
  43. struct be_dma_mem *mem = &q->dma_mem;
  44. memset(q, 0, sizeof(*q));
  45. q->len = len;
  46. q->entry_size = entry_size;
  47. mem->size = len * entry_size;
  48. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  49. if (!mem->va)
  50. return -1;
  51. memset(mem->va, 0, mem->size);
  52. return 0;
  53. }
  54. static inline void *queue_head_node(struct be_queue_info *q)
  55. {
  56. return q->dma_mem.va + q->head * q->entry_size;
  57. }
  58. static inline void *queue_tail_node(struct be_queue_info *q)
  59. {
  60. return q->dma_mem.va + q->tail * q->entry_size;
  61. }
  62. static inline void queue_head_inc(struct be_queue_info *q)
  63. {
  64. index_inc(&q->head, q->len);
  65. }
  66. static inline void queue_tail_inc(struct be_queue_info *q)
  67. {
  68. index_inc(&q->tail, q->len);
  69. }
  70. static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
  71. {
  72. u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  73. u32 reg = ioread32(addr);
  74. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  75. if (!enabled && enable) {
  76. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  77. } else if (enabled && !enable) {
  78. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  79. } else {
  80. printk(KERN_WARNING DRV_NAME
  81. ": bad value in membar_int_ctrl reg=0x%x\n", reg);
  82. return;
  83. }
  84. iowrite32(reg, addr);
  85. }
  86. static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_RQ_RING_ID_MASK;
  90. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  91. iowrite32(val, ctrl->db + DB_RQ_OFFSET);
  92. }
  93. static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  94. {
  95. u32 val = 0;
  96. val |= qid & DB_TXULP_RING_ID_MASK;
  97. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  98. iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
  99. }
  100. static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
  101. bool arm, bool clear_int, u16 num_popped)
  102. {
  103. u32 val = 0;
  104. val |= qid & DB_EQ_RING_ID_MASK;
  105. if (arm)
  106. val |= 1 << DB_EQ_REARM_SHIFT;
  107. if (clear_int)
  108. val |= 1 << DB_EQ_CLR_SHIFT;
  109. val |= 1 << DB_EQ_EVNT_SHIFT;
  110. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  111. iowrite32(val, ctrl->db + DB_EQ_OFFSET);
  112. }
  113. static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
  114. bool arm, u16 num_popped)
  115. {
  116. u32 val = 0;
  117. val |= qid & DB_CQ_RING_ID_MASK;
  118. if (arm)
  119. val |= 1 << DB_CQ_REARM_SHIFT;
  120. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  121. iowrite32(val, ctrl->db + DB_CQ_OFFSET);
  122. }
  123. static int be_mac_addr_set(struct net_device *netdev, void *p)
  124. {
  125. struct be_adapter *adapter = netdev_priv(netdev);
  126. struct sockaddr *addr = p;
  127. int status = 0;
  128. if (netif_running(netdev)) {
  129. status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
  130. adapter->pmac_id);
  131. if (status)
  132. return status;
  133. status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
  134. adapter->if_handle, &adapter->pmac_id);
  135. }
  136. if (!status)
  137. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  138. return status;
  139. }
  140. static void netdev_stats_update(struct be_adapter *adapter)
  141. {
  142. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  143. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  144. struct be_port_rxf_stats *port_stats =
  145. &rxf_stats->port[adapter->port_num];
  146. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  147. dev_stats->rx_packets = port_stats->rx_total_frames;
  148. dev_stats->tx_packets = port_stats->tx_unicastframes +
  149. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  150. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  151. (u64) port_stats->rx_bytes_lsd;
  152. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  153. (u64) port_stats->tx_bytes_lsd;
  154. /* bad pkts received */
  155. dev_stats->rx_errors = port_stats->rx_crc_errors +
  156. port_stats->rx_alignment_symbol_errors +
  157. port_stats->rx_in_range_errors +
  158. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  159. /* packet transmit problems */
  160. dev_stats->tx_errors = 0;
  161. /* no space in linux buffers */
  162. dev_stats->rx_dropped = 0;
  163. /* no space available in linux */
  164. dev_stats->tx_dropped = 0;
  165. dev_stats->multicast = port_stats->tx_multicastframes;
  166. dev_stats->collisions = 0;
  167. /* detailed rx errors */
  168. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  169. port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
  170. /* receive ring buffer overflow */
  171. dev_stats->rx_over_errors = 0;
  172. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  173. /* frame alignment errors */
  174. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  175. /* receiver fifo overrun */
  176. /* drops_no_pbuf is no per i/f, it's per BE card */
  177. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  178. port_stats->rx_input_fifo_overflow +
  179. rxf_stats->rx_drops_no_pbuf;
  180. /* receiver missed packetd */
  181. dev_stats->rx_missed_errors = 0;
  182. /* detailed tx_errors */
  183. dev_stats->tx_aborted_errors = 0;
  184. dev_stats->tx_carrier_errors = 0;
  185. dev_stats->tx_fifo_errors = 0;
  186. dev_stats->tx_heartbeat_errors = 0;
  187. dev_stats->tx_window_errors = 0;
  188. }
  189. static void be_link_status_update(struct be_adapter *adapter)
  190. {
  191. struct be_link_info *prev = &adapter->link;
  192. struct be_link_info now = { 0 };
  193. struct net_device *netdev = adapter->netdev;
  194. be_cmd_link_status_query(&adapter->ctrl, &now);
  195. /* If link came up or went down */
  196. if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
  197. prev->speed == PHY_LINK_SPEED_ZERO)) {
  198. if (now.speed == PHY_LINK_SPEED_ZERO) {
  199. netif_stop_queue(netdev);
  200. netif_carrier_off(netdev);
  201. printk(KERN_INFO "%s: Link down\n", netdev->name);
  202. } else {
  203. netif_start_queue(netdev);
  204. netif_carrier_on(netdev);
  205. printk(KERN_INFO "%s: Link up\n", netdev->name);
  206. }
  207. }
  208. *prev = now;
  209. }
  210. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  211. static void be_rx_eqd_update(struct be_adapter *adapter)
  212. {
  213. u32 eqd;
  214. struct be_ctrl_info *ctrl = &adapter->ctrl;
  215. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  216. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  217. /* Update once a second */
  218. if (((jiffies - stats->rx_fps_jiffies) < HZ) || rx_eq->enable_aic == 0)
  219. return;
  220. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  221. ((jiffies - stats->rx_fps_jiffies) / HZ);
  222. stats->rx_fps_jiffies = jiffies;
  223. stats->be_prev_rx_frags = stats->be_rx_frags;
  224. eqd = stats->be_rx_fps / 110000;
  225. eqd = eqd << 3;
  226. if (eqd > rx_eq->max_eqd)
  227. eqd = rx_eq->max_eqd;
  228. if (eqd < rx_eq->min_eqd)
  229. eqd = rx_eq->min_eqd;
  230. if (eqd < 10)
  231. eqd = 0;
  232. if (eqd != rx_eq->cur_eqd)
  233. be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
  234. rx_eq->cur_eqd = eqd;
  235. }
  236. static void be_worker(struct work_struct *work)
  237. {
  238. struct be_adapter *adapter =
  239. container_of(work, struct be_adapter, work.work);
  240. int status;
  241. /* Check link */
  242. be_link_status_update(adapter);
  243. /* Get Stats */
  244. status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
  245. if (!status)
  246. netdev_stats_update(adapter);
  247. /* Set EQ delay */
  248. be_rx_eqd_update(adapter);
  249. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  250. }
  251. static struct net_device_stats *be_get_stats(struct net_device *dev)
  252. {
  253. struct be_adapter *adapter = netdev_priv(dev);
  254. return &adapter->stats.net_stats;
  255. }
  256. static void be_tx_stats_update(struct be_adapter *adapter,
  257. u32 wrb_cnt, u32 copied, bool stopped)
  258. {
  259. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  260. stats->be_tx_reqs++;
  261. stats->be_tx_wrbs += wrb_cnt;
  262. stats->be_tx_bytes += copied;
  263. if (stopped)
  264. stats->be_tx_stops++;
  265. /* Update tx rate once in two seconds */
  266. if ((jiffies - stats->be_tx_jiffies) > 2 * HZ) {
  267. u32 r;
  268. r = (stats->be_tx_bytes - stats->be_tx_bytes_prev) /
  269. ((u32) (jiffies - stats->be_tx_jiffies) / HZ);
  270. r = (r / 1000000); /* M bytes/s */
  271. stats->be_tx_rate = (r * 8); /* M bits/s */
  272. stats->be_tx_jiffies = jiffies;
  273. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  274. }
  275. }
  276. /* Determine number of WRB entries needed to xmit data in an skb */
  277. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  278. {
  279. int cnt = 0;
  280. while (skb) {
  281. if (skb->len > skb->data_len)
  282. cnt++;
  283. cnt += skb_shinfo(skb)->nr_frags;
  284. skb = skb_shinfo(skb)->frag_list;
  285. }
  286. /* to account for hdr wrb */
  287. cnt++;
  288. if (cnt & 1) {
  289. /* add a dummy to make it an even num */
  290. cnt++;
  291. *dummy = true;
  292. } else
  293. *dummy = false;
  294. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  295. return cnt;
  296. }
  297. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  298. {
  299. wrb->frag_pa_hi = upper_32_bits(addr);
  300. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  301. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  302. }
  303. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  304. bool vlan, u32 wrb_cnt, u32 len)
  305. {
  306. memset(hdr, 0, sizeof(*hdr));
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  308. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  309. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  311. hdr, skb_shinfo(skb)->gso_size);
  312. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  313. if (is_tcp_pkt(skb))
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  315. else if (is_udp_pkt(skb))
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  317. }
  318. if (vlan && vlan_tx_tag_present(skb)) {
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  321. hdr, vlan_tx_tag_get(skb));
  322. }
  323. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  324. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  325. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  326. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  327. }
  328. static int make_tx_wrbs(struct be_adapter *adapter,
  329. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  330. {
  331. u64 busaddr;
  332. u32 i, copied = 0;
  333. struct pci_dev *pdev = adapter->pdev;
  334. struct sk_buff *first_skb = skb;
  335. struct be_queue_info *txq = &adapter->tx_obj.q;
  336. struct be_eth_wrb *wrb;
  337. struct be_eth_hdr_wrb *hdr;
  338. atomic_add(wrb_cnt, &txq->used);
  339. hdr = queue_head_node(txq);
  340. queue_head_inc(txq);
  341. while (skb) {
  342. if (skb->len > skb->data_len) {
  343. int len = skb->len - skb->data_len;
  344. busaddr = pci_map_single(pdev, skb->data, len,
  345. PCI_DMA_TODEVICE);
  346. wrb = queue_head_node(txq);
  347. wrb_fill(wrb, busaddr, len);
  348. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  349. queue_head_inc(txq);
  350. copied += len;
  351. }
  352. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  353. struct skb_frag_struct *frag =
  354. &skb_shinfo(skb)->frags[i];
  355. busaddr = pci_map_page(pdev, frag->page,
  356. frag->page_offset,
  357. frag->size, PCI_DMA_TODEVICE);
  358. wrb = queue_head_node(txq);
  359. wrb_fill(wrb, busaddr, frag->size);
  360. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  361. queue_head_inc(txq);
  362. copied += frag->size;
  363. }
  364. skb = skb_shinfo(skb)->frag_list;
  365. }
  366. if (dummy_wrb) {
  367. wrb = queue_head_node(txq);
  368. wrb_fill(wrb, 0, 0);
  369. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  370. queue_head_inc(txq);
  371. }
  372. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  373. wrb_cnt, copied);
  374. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  375. return copied;
  376. }
  377. static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
  378. {
  379. struct be_adapter *adapter = netdev_priv(netdev);
  380. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  381. struct be_queue_info *txq = &tx_obj->q;
  382. u32 wrb_cnt = 0, copied = 0;
  383. u32 start = txq->head;
  384. bool dummy_wrb, stopped = false;
  385. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  386. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  387. /* record the sent skb in the sent_skb table */
  388. BUG_ON(tx_obj->sent_skb_list[start]);
  389. tx_obj->sent_skb_list[start] = skb;
  390. /* Ensure that txq has space for the next skb; Else stop the queue
  391. * *BEFORE* ringing the tx doorbell, so that we serialze the
  392. * tx compls of the current transmit which'll wake up the queue
  393. */
  394. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
  395. netif_stop_queue(netdev);
  396. stopped = true;
  397. }
  398. be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
  399. netdev->trans_start = jiffies;
  400. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  401. return NETDEV_TX_OK;
  402. }
  403. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  404. {
  405. struct be_adapter *adapter = netdev_priv(netdev);
  406. if (new_mtu < BE_MIN_MTU ||
  407. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  408. dev_info(&adapter->pdev->dev,
  409. "MTU must be between %d and %d bytes\n",
  410. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  411. return -EINVAL;
  412. }
  413. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  414. netdev->mtu, new_mtu);
  415. netdev->mtu = new_mtu;
  416. return 0;
  417. }
  418. /*
  419. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  420. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  421. * set the BE in promiscuous VLAN mode.
  422. */
  423. static void be_vids_config(struct net_device *netdev)
  424. {
  425. struct be_adapter *adapter = netdev_priv(netdev);
  426. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  427. u16 ntags = 0, i;
  428. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  429. /* Construct VLAN Table to give to HW */
  430. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  431. if (adapter->vlan_tag[i]) {
  432. vtag[ntags] = cpu_to_le16(i);
  433. ntags++;
  434. }
  435. }
  436. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  437. vtag, ntags, 1, 0);
  438. } else {
  439. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  440. NULL, 0, 1, 1);
  441. }
  442. }
  443. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  444. {
  445. struct be_adapter *adapter = netdev_priv(netdev);
  446. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  447. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  448. struct be_ctrl_info *ctrl = &adapter->ctrl;
  449. be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
  450. be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
  451. adapter->vlan_grp = grp;
  452. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  453. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  454. }
  455. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  456. {
  457. struct be_adapter *adapter = netdev_priv(netdev);
  458. adapter->num_vlans++;
  459. adapter->vlan_tag[vid] = 1;
  460. be_vids_config(netdev);
  461. }
  462. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  463. {
  464. struct be_adapter *adapter = netdev_priv(netdev);
  465. adapter->num_vlans--;
  466. adapter->vlan_tag[vid] = 0;
  467. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  468. be_vids_config(netdev);
  469. }
  470. static void be_set_multicast_filter(struct net_device *netdev)
  471. {
  472. struct be_adapter *adapter = netdev_priv(netdev);
  473. struct dev_mc_list *mc_ptr;
  474. u8 mac_addr[32][ETH_ALEN];
  475. int i = 0;
  476. if (netdev->flags & IFF_ALLMULTI) {
  477. /* set BE in Multicast promiscuous */
  478. be_cmd_mcast_mac_set(&adapter->ctrl,
  479. adapter->if_handle, NULL, 0, true);
  480. return;
  481. }
  482. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  483. memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
  484. if (++i >= 32) {
  485. be_cmd_mcast_mac_set(&adapter->ctrl,
  486. adapter->if_handle, &mac_addr[0][0], i, false);
  487. i = 0;
  488. }
  489. }
  490. if (i) {
  491. /* reset the promiscuous mode also. */
  492. be_cmd_mcast_mac_set(&adapter->ctrl,
  493. adapter->if_handle, &mac_addr[0][0], i, false);
  494. }
  495. }
  496. static void be_set_multicast_list(struct net_device *netdev)
  497. {
  498. struct be_adapter *adapter = netdev_priv(netdev);
  499. if (netdev->flags & IFF_PROMISC) {
  500. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
  501. } else {
  502. be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
  503. be_set_multicast_filter(netdev);
  504. }
  505. }
  506. static void be_rx_rate_update(struct be_adapter *adapter, u32 pktsize,
  507. u16 numfrags)
  508. {
  509. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  510. u32 rate;
  511. stats->be_rx_compl++;
  512. stats->be_rx_frags += numfrags;
  513. stats->be_rx_bytes += pktsize;
  514. /* Update the rate once in two seconds */
  515. if ((jiffies - stats->be_rx_jiffies) < 2 * HZ)
  516. return;
  517. rate = (stats->be_rx_bytes - stats->be_rx_bytes_prev) /
  518. ((u32) (jiffies - stats->be_rx_jiffies) / HZ);
  519. rate = (rate / 1000000); /* MB/Sec */
  520. stats->be_rx_rate = (rate * 8); /* Mega Bits/Sec */
  521. stats->be_rx_jiffies = jiffies;
  522. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  523. }
  524. static struct be_rx_page_info *
  525. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  526. {
  527. struct be_rx_page_info *rx_page_info;
  528. struct be_queue_info *rxq = &adapter->rx_obj.q;
  529. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  530. BUG_ON(!rx_page_info->page);
  531. if (rx_page_info->last_page_user)
  532. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  533. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  534. atomic_dec(&rxq->used);
  535. return rx_page_info;
  536. }
  537. /* Throwaway the data in the Rx completion */
  538. static void be_rx_compl_discard(struct be_adapter *adapter,
  539. struct be_eth_rx_compl *rxcp)
  540. {
  541. struct be_queue_info *rxq = &adapter->rx_obj.q;
  542. struct be_rx_page_info *page_info;
  543. u16 rxq_idx, i, num_rcvd;
  544. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  545. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  546. for (i = 0; i < num_rcvd; i++) {
  547. page_info = get_rx_page_info(adapter, rxq_idx);
  548. put_page(page_info->page);
  549. memset(page_info, 0, sizeof(*page_info));
  550. index_inc(&rxq_idx, rxq->len);
  551. }
  552. }
  553. /*
  554. * skb_fill_rx_data forms a complete skb for an ether frame
  555. * indicated by rxcp.
  556. */
  557. static void skb_fill_rx_data(struct be_adapter *adapter,
  558. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  559. {
  560. struct be_queue_info *rxq = &adapter->rx_obj.q;
  561. struct be_rx_page_info *page_info;
  562. u16 rxq_idx, i, num_rcvd;
  563. u32 pktsize, hdr_len, curr_frag_len;
  564. u8 *start;
  565. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  566. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  567. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  568. page_info = get_rx_page_info(adapter, rxq_idx);
  569. start = page_address(page_info->page) + page_info->page_offset;
  570. prefetch(start);
  571. /* Copy data in the first descriptor of this completion */
  572. curr_frag_len = min(pktsize, rx_frag_size);
  573. /* Copy the header portion into skb_data */
  574. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  575. memcpy(skb->data, start, hdr_len);
  576. skb->len = curr_frag_len;
  577. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  578. /* Complete packet has now been moved to data */
  579. put_page(page_info->page);
  580. skb->data_len = 0;
  581. skb->tail += curr_frag_len;
  582. } else {
  583. skb_shinfo(skb)->nr_frags = 1;
  584. skb_shinfo(skb)->frags[0].page = page_info->page;
  585. skb_shinfo(skb)->frags[0].page_offset =
  586. page_info->page_offset + hdr_len;
  587. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  588. skb->data_len = curr_frag_len - hdr_len;
  589. skb->tail += hdr_len;
  590. }
  591. memset(page_info, 0, sizeof(*page_info));
  592. if (pktsize <= rx_frag_size) {
  593. BUG_ON(num_rcvd != 1);
  594. return;
  595. }
  596. /* More frags present for this completion */
  597. pktsize -= curr_frag_len; /* account for above copied frag */
  598. for (i = 1; i < num_rcvd; i++) {
  599. index_inc(&rxq_idx, rxq->len);
  600. page_info = get_rx_page_info(adapter, rxq_idx);
  601. curr_frag_len = min(pktsize, rx_frag_size);
  602. skb_shinfo(skb)->frags[i].page = page_info->page;
  603. skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
  604. skb_shinfo(skb)->frags[i].size = curr_frag_len;
  605. skb->len += curr_frag_len;
  606. skb->data_len += curr_frag_len;
  607. skb_shinfo(skb)->nr_frags++;
  608. pktsize -= curr_frag_len;
  609. memset(page_info, 0, sizeof(*page_info));
  610. }
  611. be_rx_rate_update(adapter, pktsize, num_rcvd);
  612. return;
  613. }
  614. /* Process the RX completion indicated by rxcp when LRO is disabled */
  615. static void be_rx_compl_process(struct be_adapter *adapter,
  616. struct be_eth_rx_compl *rxcp)
  617. {
  618. struct sk_buff *skb;
  619. u32 vtp, vid;
  620. int l4_cksm;
  621. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  622. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  623. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  624. if (!skb) {
  625. if (net_ratelimit())
  626. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  627. be_rx_compl_discard(adapter, rxcp);
  628. return;
  629. }
  630. skb_reserve(skb, NET_IP_ALIGN);
  631. skb_fill_rx_data(adapter, skb, rxcp);
  632. if (l4_cksm && adapter->rx_csum)
  633. skb->ip_summed = CHECKSUM_UNNECESSARY;
  634. else
  635. skb->ip_summed = CHECKSUM_NONE;
  636. skb->truesize = skb->len + sizeof(struct sk_buff);
  637. skb->protocol = eth_type_trans(skb, adapter->netdev);
  638. skb->dev = adapter->netdev;
  639. if (vtp) {
  640. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  641. kfree_skb(skb);
  642. return;
  643. }
  644. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  645. vid = be16_to_cpu(vid);
  646. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  647. } else {
  648. netif_receive_skb(skb);
  649. }
  650. adapter->netdev->last_rx = jiffies;
  651. return;
  652. }
  653. /* Process the RX completion indicated by rxcp when LRO is enabled */
  654. static void be_rx_compl_process_lro(struct be_adapter *adapter,
  655. struct be_eth_rx_compl *rxcp)
  656. {
  657. struct be_rx_page_info *page_info;
  658. struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
  659. struct be_queue_info *rxq = &adapter->rx_obj.q;
  660. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  661. u16 i, rxq_idx = 0, vid;
  662. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  663. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  664. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  665. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  666. remaining = pkt_size;
  667. for (i = 0; i < num_rcvd; i++) {
  668. page_info = get_rx_page_info(adapter, rxq_idx);
  669. curr_frag_len = min(remaining, rx_frag_size);
  670. rx_frags[i].page = page_info->page;
  671. rx_frags[i].page_offset = page_info->page_offset;
  672. rx_frags[i].size = curr_frag_len;
  673. remaining -= curr_frag_len;
  674. index_inc(&rxq_idx, rxq->len);
  675. memset(page_info, 0, sizeof(*page_info));
  676. }
  677. if (likely(!vlanf)) {
  678. lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
  679. pkt_size, NULL, 0);
  680. } else {
  681. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  682. vid = be16_to_cpu(vid);
  683. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  684. return;
  685. lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
  686. rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
  687. vid, NULL, 0);
  688. }
  689. be_rx_rate_update(adapter, pkt_size, num_rcvd);
  690. return;
  691. }
  692. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  693. {
  694. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  695. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  696. return NULL;
  697. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  698. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  699. queue_tail_inc(&adapter->rx_obj.cq);
  700. return rxcp;
  701. }
  702. static inline struct page *be_alloc_pages(u32 size)
  703. {
  704. gfp_t alloc_flags = GFP_ATOMIC;
  705. u32 order = get_order(size);
  706. if (order > 0)
  707. alloc_flags |= __GFP_COMP;
  708. return alloc_pages(alloc_flags, order);
  709. }
  710. /*
  711. * Allocate a page, split it to fragments of size rx_frag_size and post as
  712. * receive buffers to BE
  713. */
  714. static void be_post_rx_frags(struct be_adapter *adapter)
  715. {
  716. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  717. struct be_rx_page_info *page_info = NULL;
  718. struct be_queue_info *rxq = &adapter->rx_obj.q;
  719. struct page *pagep = NULL;
  720. struct be_eth_rx_d *rxd;
  721. u64 page_dmaaddr = 0, frag_dmaaddr;
  722. u32 posted, page_offset = 0;
  723. page_info = &page_info_tbl[rxq->head];
  724. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  725. if (!pagep) {
  726. pagep = be_alloc_pages(adapter->big_page_size);
  727. if (unlikely(!pagep)) {
  728. drvr_stats(adapter)->be_ethrx_post_fail++;
  729. break;
  730. }
  731. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  732. adapter->big_page_size,
  733. PCI_DMA_FROMDEVICE);
  734. page_info->page_offset = 0;
  735. } else {
  736. get_page(pagep);
  737. page_info->page_offset = page_offset + rx_frag_size;
  738. }
  739. page_offset = page_info->page_offset;
  740. page_info->page = pagep;
  741. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  742. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  743. rxd = queue_head_node(rxq);
  744. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  745. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  746. queue_head_inc(rxq);
  747. /* Any space left in the current big page for another frag? */
  748. if ((page_offset + rx_frag_size + rx_frag_size) >
  749. adapter->big_page_size) {
  750. pagep = NULL;
  751. page_info->last_page_user = true;
  752. }
  753. page_info = &page_info_tbl[rxq->head];
  754. }
  755. if (pagep)
  756. page_info->last_page_user = true;
  757. if (posted) {
  758. be_rxq_notify(&adapter->ctrl, rxq->id, posted);
  759. atomic_add(posted, &rxq->used);
  760. }
  761. return;
  762. }
  763. static struct be_eth_tx_compl *
  764. be_tx_compl_get(struct be_adapter *adapter)
  765. {
  766. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  767. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  768. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  769. return NULL;
  770. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  771. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  772. queue_tail_inc(tx_cq);
  773. return txcp;
  774. }
  775. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  776. {
  777. struct be_queue_info *txq = &adapter->tx_obj.q;
  778. struct be_eth_wrb *wrb;
  779. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  780. struct sk_buff *sent_skb;
  781. u64 busaddr;
  782. u16 cur_index, num_wrbs = 0;
  783. cur_index = txq->tail;
  784. sent_skb = sent_skbs[cur_index];
  785. BUG_ON(!sent_skb);
  786. sent_skbs[cur_index] = NULL;
  787. do {
  788. cur_index = txq->tail;
  789. wrb = queue_tail_node(txq);
  790. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  791. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  792. if (busaddr != 0) {
  793. pci_unmap_single(adapter->pdev, busaddr,
  794. wrb->frag_len, PCI_DMA_TODEVICE);
  795. }
  796. num_wrbs++;
  797. queue_tail_inc(txq);
  798. } while (cur_index != last_index);
  799. atomic_sub(num_wrbs, &txq->used);
  800. kfree_skb(sent_skb);
  801. }
  802. static void be_rx_q_clean(struct be_adapter *adapter)
  803. {
  804. struct be_rx_page_info *page_info;
  805. struct be_queue_info *rxq = &adapter->rx_obj.q;
  806. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  807. struct be_eth_rx_compl *rxcp;
  808. u16 tail;
  809. /* First cleanup pending rx completions */
  810. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  811. be_rx_compl_discard(adapter, rxcp);
  812. be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
  813. }
  814. /* Then free posted rx buffer that were not used */
  815. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  816. for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
  817. page_info = get_rx_page_info(adapter, tail);
  818. put_page(page_info->page);
  819. memset(page_info, 0, sizeof(*page_info));
  820. }
  821. BUG_ON(atomic_read(&rxq->used));
  822. }
  823. static void be_tx_q_clean(struct be_adapter *adapter)
  824. {
  825. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  826. struct sk_buff *sent_skb;
  827. struct be_queue_info *txq = &adapter->tx_obj.q;
  828. u16 last_index;
  829. bool dummy_wrb;
  830. while (atomic_read(&txq->used)) {
  831. sent_skb = sent_skbs[txq->tail];
  832. last_index = txq->tail;
  833. index_adv(&last_index,
  834. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  835. be_tx_compl_process(adapter, last_index);
  836. }
  837. }
  838. static void be_tx_queues_destroy(struct be_adapter *adapter)
  839. {
  840. struct be_queue_info *q;
  841. q = &adapter->tx_obj.q;
  842. if (q->created)
  843. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
  844. be_queue_free(adapter, q);
  845. q = &adapter->tx_obj.cq;
  846. if (q->created)
  847. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  848. be_queue_free(adapter, q);
  849. /* No more tx completions can be rcvd now; clean up if there are
  850. * any pending completions or pending tx requests */
  851. be_tx_q_clean(adapter);
  852. q = &adapter->tx_eq.q;
  853. if (q->created)
  854. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  855. be_queue_free(adapter, q);
  856. }
  857. static int be_tx_queues_create(struct be_adapter *adapter)
  858. {
  859. struct be_queue_info *eq, *q, *cq;
  860. adapter->tx_eq.max_eqd = 0;
  861. adapter->tx_eq.min_eqd = 0;
  862. adapter->tx_eq.cur_eqd = 96;
  863. adapter->tx_eq.enable_aic = false;
  864. /* Alloc Tx Event queue */
  865. eq = &adapter->tx_eq.q;
  866. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  867. return -1;
  868. /* Ask BE to create Tx Event queue */
  869. if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
  870. goto tx_eq_free;
  871. /* Alloc TX eth compl queue */
  872. cq = &adapter->tx_obj.cq;
  873. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  874. sizeof(struct be_eth_tx_compl)))
  875. goto tx_eq_destroy;
  876. /* Ask BE to create Tx eth compl queue */
  877. if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
  878. goto tx_cq_free;
  879. /* Alloc TX eth queue */
  880. q = &adapter->tx_obj.q;
  881. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  882. goto tx_cq_destroy;
  883. /* Ask BE to create Tx eth queue */
  884. if (be_cmd_txq_create(&adapter->ctrl, q, cq))
  885. goto tx_q_free;
  886. return 0;
  887. tx_q_free:
  888. be_queue_free(adapter, q);
  889. tx_cq_destroy:
  890. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  891. tx_cq_free:
  892. be_queue_free(adapter, cq);
  893. tx_eq_destroy:
  894. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  895. tx_eq_free:
  896. be_queue_free(adapter, eq);
  897. return -1;
  898. }
  899. static void be_rx_queues_destroy(struct be_adapter *adapter)
  900. {
  901. struct be_queue_info *q;
  902. q = &adapter->rx_obj.q;
  903. if (q->created) {
  904. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
  905. be_rx_q_clean(adapter);
  906. }
  907. be_queue_free(adapter, q);
  908. q = &adapter->rx_obj.cq;
  909. if (q->created)
  910. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  911. be_queue_free(adapter, q);
  912. q = &adapter->rx_eq.q;
  913. if (q->created)
  914. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  915. be_queue_free(adapter, q);
  916. }
  917. static int be_rx_queues_create(struct be_adapter *adapter)
  918. {
  919. struct be_queue_info *eq, *q, *cq;
  920. int rc;
  921. adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
  922. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  923. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  924. adapter->rx_eq.min_eqd = 0;
  925. adapter->rx_eq.cur_eqd = 0;
  926. adapter->rx_eq.enable_aic = true;
  927. /* Alloc Rx Event queue */
  928. eq = &adapter->rx_eq.q;
  929. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  930. sizeof(struct be_eq_entry));
  931. if (rc)
  932. return rc;
  933. /* Ask BE to create Rx Event queue */
  934. rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
  935. if (rc)
  936. goto rx_eq_free;
  937. /* Alloc RX eth compl queue */
  938. cq = &adapter->rx_obj.cq;
  939. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  940. sizeof(struct be_eth_rx_compl));
  941. if (rc)
  942. goto rx_eq_destroy;
  943. /* Ask BE to create Rx eth compl queue */
  944. rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
  945. if (rc)
  946. goto rx_cq_free;
  947. /* Alloc RX eth queue */
  948. q = &adapter->rx_obj.q;
  949. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  950. if (rc)
  951. goto rx_cq_destroy;
  952. /* Ask BE to create Rx eth queue */
  953. rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
  954. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  955. if (rc)
  956. goto rx_q_free;
  957. return 0;
  958. rx_q_free:
  959. be_queue_free(adapter, q);
  960. rx_cq_destroy:
  961. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  962. rx_cq_free:
  963. be_queue_free(adapter, cq);
  964. rx_eq_destroy:
  965. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  966. rx_eq_free:
  967. be_queue_free(adapter, eq);
  968. return rc;
  969. }
  970. static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
  971. {
  972. struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
  973. u32 evt = entry->evt;
  974. if (!evt)
  975. return false;
  976. evt = le32_to_cpu(evt);
  977. *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
  978. entry->evt = 0;
  979. queue_tail_inc(&eq_obj->q);
  980. return true;
  981. }
  982. static int event_handle(struct be_ctrl_info *ctrl,
  983. struct be_eq_obj *eq_obj)
  984. {
  985. u16 rid = 0, num = 0;
  986. while (event_get(eq_obj, &rid))
  987. num++;
  988. /* We can see an interrupt and no event */
  989. be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
  990. if (num)
  991. napi_schedule(&eq_obj->napi);
  992. return num;
  993. }
  994. static irqreturn_t be_intx(int irq, void *dev)
  995. {
  996. struct be_adapter *adapter = dev;
  997. struct be_ctrl_info *ctrl = &adapter->ctrl;
  998. int rx, tx;
  999. tx = event_handle(ctrl, &adapter->tx_eq);
  1000. rx = event_handle(ctrl, &adapter->rx_eq);
  1001. if (rx || tx)
  1002. return IRQ_HANDLED;
  1003. else
  1004. return IRQ_NONE;
  1005. }
  1006. static irqreturn_t be_msix_rx(int irq, void *dev)
  1007. {
  1008. struct be_adapter *adapter = dev;
  1009. event_handle(&adapter->ctrl, &adapter->rx_eq);
  1010. return IRQ_HANDLED;
  1011. }
  1012. static irqreturn_t be_msix_tx(int irq, void *dev)
  1013. {
  1014. struct be_adapter *adapter = dev;
  1015. event_handle(&adapter->ctrl, &adapter->tx_eq);
  1016. return IRQ_HANDLED;
  1017. }
  1018. static inline bool do_lro(struct be_adapter *adapter,
  1019. struct be_eth_rx_compl *rxcp)
  1020. {
  1021. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1022. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1023. if (err)
  1024. drvr_stats(adapter)->be_rxcp_err++;
  1025. return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
  1026. false : true;
  1027. }
  1028. int be_poll_rx(struct napi_struct *napi, int budget)
  1029. {
  1030. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1031. struct be_adapter *adapter =
  1032. container_of(rx_eq, struct be_adapter, rx_eq);
  1033. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1034. struct be_eth_rx_compl *rxcp;
  1035. u32 work_done;
  1036. for (work_done = 0; work_done < budget; work_done++) {
  1037. rxcp = be_rx_compl_get(adapter);
  1038. if (!rxcp)
  1039. break;
  1040. if (do_lro(adapter, rxcp))
  1041. be_rx_compl_process_lro(adapter, rxcp);
  1042. else
  1043. be_rx_compl_process(adapter, rxcp);
  1044. }
  1045. lro_flush_all(&adapter->rx_obj.lro_mgr);
  1046. /* Refill the queue */
  1047. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1048. be_post_rx_frags(adapter);
  1049. /* All consumed */
  1050. if (work_done < budget) {
  1051. napi_complete(napi);
  1052. be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
  1053. } else {
  1054. /* More to be consumed; continue with interrupts disabled */
  1055. be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
  1056. }
  1057. return work_done;
  1058. }
  1059. /* For TX we don't honour budget; consume everything */
  1060. int be_poll_tx(struct napi_struct *napi, int budget)
  1061. {
  1062. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1063. struct be_adapter *adapter =
  1064. container_of(tx_eq, struct be_adapter, tx_eq);
  1065. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  1066. struct be_queue_info *tx_cq = &tx_obj->cq;
  1067. struct be_queue_info *txq = &tx_obj->q;
  1068. struct be_eth_tx_compl *txcp;
  1069. u32 num_cmpl = 0;
  1070. u16 end_idx;
  1071. while ((txcp = be_tx_compl_get(adapter))) {
  1072. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1073. wrb_index, txcp);
  1074. be_tx_compl_process(adapter, end_idx);
  1075. num_cmpl++;
  1076. }
  1077. /* As Tx wrbs have been freed up, wake up netdev queue if
  1078. * it was stopped due to lack of tx wrbs.
  1079. */
  1080. if (netif_queue_stopped(adapter->netdev) &&
  1081. atomic_read(&txq->used) < txq->len / 2) {
  1082. netif_wake_queue(adapter->netdev);
  1083. }
  1084. napi_complete(napi);
  1085. be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
  1086. drvr_stats(adapter)->be_tx_events++;
  1087. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1088. return 1;
  1089. }
  1090. static void be_msix_enable(struct be_adapter *adapter)
  1091. {
  1092. int i, status;
  1093. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1094. adapter->msix_entries[i].entry = i;
  1095. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1096. BE_NUM_MSIX_VECTORS);
  1097. if (status == 0)
  1098. adapter->msix_enabled = true;
  1099. return;
  1100. }
  1101. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1102. {
  1103. return adapter->msix_entries[eq_id -
  1104. 8 * adapter->ctrl.pci_func].vector;
  1105. }
  1106. static int be_msix_register(struct be_adapter *adapter)
  1107. {
  1108. struct net_device *netdev = adapter->netdev;
  1109. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1110. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1111. int status, vec;
  1112. sprintf(tx_eq->desc, "%s-tx", netdev->name);
  1113. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1114. status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
  1115. if (status)
  1116. goto err;
  1117. sprintf(rx_eq->desc, "%s-rx", netdev->name);
  1118. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1119. status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
  1120. if (status) { /* Free TX IRQ */
  1121. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1122. free_irq(vec, adapter);
  1123. goto err;
  1124. }
  1125. return 0;
  1126. err:
  1127. dev_warn(&adapter->pdev->dev,
  1128. "MSIX Request IRQ failed - err %d\n", status);
  1129. pci_disable_msix(adapter->pdev);
  1130. adapter->msix_enabled = false;
  1131. return status;
  1132. }
  1133. static int be_irq_register(struct be_adapter *adapter)
  1134. {
  1135. struct net_device *netdev = adapter->netdev;
  1136. int status;
  1137. if (adapter->msix_enabled) {
  1138. status = be_msix_register(adapter);
  1139. if (status == 0)
  1140. goto done;
  1141. }
  1142. /* INTx */
  1143. netdev->irq = adapter->pdev->irq;
  1144. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1145. adapter);
  1146. if (status) {
  1147. dev_err(&adapter->pdev->dev,
  1148. "INTx request IRQ failed - err %d\n", status);
  1149. return status;
  1150. }
  1151. done:
  1152. adapter->isr_registered = true;
  1153. return 0;
  1154. }
  1155. static void be_irq_unregister(struct be_adapter *adapter)
  1156. {
  1157. struct net_device *netdev = adapter->netdev;
  1158. int vec;
  1159. if (!adapter->isr_registered)
  1160. return;
  1161. /* INTx */
  1162. if (!adapter->msix_enabled) {
  1163. free_irq(netdev->irq, adapter);
  1164. goto done;
  1165. }
  1166. /* MSIx */
  1167. vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
  1168. free_irq(vec, adapter);
  1169. vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
  1170. free_irq(vec, adapter);
  1171. done:
  1172. adapter->isr_registered = false;
  1173. return;
  1174. }
  1175. static int be_open(struct net_device *netdev)
  1176. {
  1177. struct be_adapter *adapter = netdev_priv(netdev);
  1178. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1179. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1180. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1181. u32 if_flags;
  1182. int status;
  1183. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1184. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1185. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1186. status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
  1187. false/* pmac_invalid */, &adapter->if_handle,
  1188. &adapter->pmac_id);
  1189. if (status != 0)
  1190. goto do_none;
  1191. status = be_cmd_set_flow_control(ctrl, true, true);
  1192. if (status != 0)
  1193. goto if_destroy;
  1194. status = be_tx_queues_create(adapter);
  1195. if (status != 0)
  1196. goto if_destroy;
  1197. status = be_rx_queues_create(adapter);
  1198. if (status != 0)
  1199. goto tx_qs_destroy;
  1200. /* First time posting */
  1201. be_post_rx_frags(adapter);
  1202. napi_enable(&rx_eq->napi);
  1203. napi_enable(&tx_eq->napi);
  1204. be_irq_register(adapter);
  1205. be_intr_set(ctrl, true);
  1206. /* The evt queues are created in the unarmed state; arm them */
  1207. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  1208. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  1209. /* The compl queues are created in the unarmed state; arm them */
  1210. be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
  1211. be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
  1212. be_link_status_update(adapter);
  1213. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1214. return 0;
  1215. tx_qs_destroy:
  1216. be_tx_queues_destroy(adapter);
  1217. if_destroy:
  1218. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1219. do_none:
  1220. return status;
  1221. }
  1222. static int be_close(struct net_device *netdev)
  1223. {
  1224. struct be_adapter *adapter = netdev_priv(netdev);
  1225. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1226. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1227. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1228. int vec;
  1229. cancel_delayed_work(&adapter->work);
  1230. netif_stop_queue(netdev);
  1231. netif_carrier_off(netdev);
  1232. adapter->link.speed = PHY_LINK_SPEED_ZERO;
  1233. be_intr_set(ctrl, false);
  1234. if (adapter->msix_enabled) {
  1235. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1236. synchronize_irq(vec);
  1237. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1238. synchronize_irq(vec);
  1239. } else {
  1240. synchronize_irq(netdev->irq);
  1241. }
  1242. be_irq_unregister(adapter);
  1243. napi_disable(&rx_eq->napi);
  1244. napi_disable(&tx_eq->napi);
  1245. be_rx_queues_destroy(adapter);
  1246. be_tx_queues_destroy(adapter);
  1247. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1248. return 0;
  1249. }
  1250. static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
  1251. void **ip_hdr, void **tcpudp_hdr,
  1252. u64 *hdr_flags, void *priv)
  1253. {
  1254. struct ethhdr *eh;
  1255. struct vlan_ethhdr *veh;
  1256. struct iphdr *iph;
  1257. u8 *va = page_address(frag->page) + frag->page_offset;
  1258. unsigned long ll_hlen;
  1259. prefetch(va);
  1260. eh = (struct ethhdr *)va;
  1261. *mac_hdr = eh;
  1262. ll_hlen = ETH_HLEN;
  1263. if (eh->h_proto != htons(ETH_P_IP)) {
  1264. if (eh->h_proto == htons(ETH_P_8021Q)) {
  1265. veh = (struct vlan_ethhdr *)va;
  1266. if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
  1267. return -1;
  1268. ll_hlen += VLAN_HLEN;
  1269. } else {
  1270. return -1;
  1271. }
  1272. }
  1273. *hdr_flags = LRO_IPV4;
  1274. iph = (struct iphdr *)(va + ll_hlen);
  1275. *ip_hdr = iph;
  1276. if (iph->protocol != IPPROTO_TCP)
  1277. return -1;
  1278. *hdr_flags |= LRO_TCP;
  1279. *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
  1280. return 0;
  1281. }
  1282. static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
  1283. {
  1284. struct net_lro_mgr *lro_mgr;
  1285. lro_mgr = &adapter->rx_obj.lro_mgr;
  1286. lro_mgr->dev = netdev;
  1287. lro_mgr->features = LRO_F_NAPI;
  1288. lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
  1289. lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1290. lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
  1291. lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
  1292. lro_mgr->get_frag_header = be_get_frag_header;
  1293. lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
  1294. }
  1295. static struct net_device_ops be_netdev_ops = {
  1296. .ndo_open = be_open,
  1297. .ndo_stop = be_close,
  1298. .ndo_start_xmit = be_xmit,
  1299. .ndo_get_stats = be_get_stats,
  1300. .ndo_set_rx_mode = be_set_multicast_list,
  1301. .ndo_set_mac_address = be_mac_addr_set,
  1302. .ndo_change_mtu = be_change_mtu,
  1303. .ndo_validate_addr = eth_validate_addr,
  1304. .ndo_vlan_rx_register = be_vlan_register,
  1305. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1306. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1307. };
  1308. static void be_netdev_init(struct net_device *netdev)
  1309. {
  1310. struct be_adapter *adapter = netdev_priv(netdev);
  1311. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1312. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1313. NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
  1314. netdev->flags |= IFF_MULTICAST;
  1315. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1316. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1317. be_lro_init(adapter, netdev);
  1318. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1319. BE_NAPI_WEIGHT);
  1320. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
  1321. BE_NAPI_WEIGHT);
  1322. netif_carrier_off(netdev);
  1323. netif_stop_queue(netdev);
  1324. }
  1325. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1326. {
  1327. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1328. if (ctrl->csr)
  1329. iounmap(ctrl->csr);
  1330. if (ctrl->db)
  1331. iounmap(ctrl->db);
  1332. if (ctrl->pcicfg)
  1333. iounmap(ctrl->pcicfg);
  1334. }
  1335. static int be_map_pci_bars(struct be_adapter *adapter)
  1336. {
  1337. u8 __iomem *addr;
  1338. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1339. pci_resource_len(adapter->pdev, 2));
  1340. if (addr == NULL)
  1341. return -ENOMEM;
  1342. adapter->ctrl.csr = addr;
  1343. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1344. 128 * 1024);
  1345. if (addr == NULL)
  1346. goto pci_map_err;
  1347. adapter->ctrl.db = addr;
  1348. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1349. pci_resource_len(adapter->pdev, 1));
  1350. if (addr == NULL)
  1351. goto pci_map_err;
  1352. adapter->ctrl.pcicfg = addr;
  1353. return 0;
  1354. pci_map_err:
  1355. be_unmap_pci_bars(adapter);
  1356. return -ENOMEM;
  1357. }
  1358. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1359. {
  1360. struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
  1361. be_unmap_pci_bars(adapter);
  1362. if (mem->va)
  1363. pci_free_consistent(adapter->pdev, mem->size,
  1364. mem->va, mem->dma);
  1365. }
  1366. /* Initialize the mbox required to send cmds to BE */
  1367. static int be_ctrl_init(struct be_adapter *adapter)
  1368. {
  1369. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1370. struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
  1371. struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
  1372. int status;
  1373. u32 val;
  1374. status = be_map_pci_bars(adapter);
  1375. if (status)
  1376. return status;
  1377. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1378. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1379. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1380. if (!mbox_mem_alloc->va) {
  1381. be_unmap_pci_bars(adapter);
  1382. return -1;
  1383. }
  1384. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1385. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1386. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1387. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1388. spin_lock_init(&ctrl->cmd_lock);
  1389. val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
  1390. ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
  1391. MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
  1392. return 0;
  1393. }
  1394. static void be_stats_cleanup(struct be_adapter *adapter)
  1395. {
  1396. struct be_stats_obj *stats = &adapter->stats;
  1397. struct be_dma_mem *cmd = &stats->cmd;
  1398. if (cmd->va)
  1399. pci_free_consistent(adapter->pdev, cmd->size,
  1400. cmd->va, cmd->dma);
  1401. }
  1402. static int be_stats_init(struct be_adapter *adapter)
  1403. {
  1404. struct be_stats_obj *stats = &adapter->stats;
  1405. struct be_dma_mem *cmd = &stats->cmd;
  1406. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1407. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1408. if (cmd->va == NULL)
  1409. return -1;
  1410. return 0;
  1411. }
  1412. static void __devexit be_remove(struct pci_dev *pdev)
  1413. {
  1414. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1415. if (!adapter)
  1416. return;
  1417. unregister_netdev(adapter->netdev);
  1418. be_stats_cleanup(adapter);
  1419. be_ctrl_cleanup(adapter);
  1420. if (adapter->msix_enabled) {
  1421. pci_disable_msix(adapter->pdev);
  1422. adapter->msix_enabled = false;
  1423. }
  1424. pci_set_drvdata(pdev, NULL);
  1425. pci_release_regions(pdev);
  1426. pci_disable_device(pdev);
  1427. free_netdev(adapter->netdev);
  1428. }
  1429. static int be_hw_up(struct be_adapter *adapter)
  1430. {
  1431. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1432. int status;
  1433. status = be_cmd_POST(ctrl);
  1434. if (status)
  1435. return status;
  1436. status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
  1437. if (status)
  1438. return status;
  1439. status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
  1440. return status;
  1441. }
  1442. static int __devinit be_probe(struct pci_dev *pdev,
  1443. const struct pci_device_id *pdev_id)
  1444. {
  1445. int status = 0;
  1446. struct be_adapter *adapter;
  1447. struct net_device *netdev;
  1448. struct be_ctrl_info *ctrl;
  1449. u8 mac[ETH_ALEN];
  1450. status = pci_enable_device(pdev);
  1451. if (status)
  1452. goto do_none;
  1453. status = pci_request_regions(pdev, DRV_NAME);
  1454. if (status)
  1455. goto disable_dev;
  1456. pci_set_master(pdev);
  1457. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1458. if (netdev == NULL) {
  1459. status = -ENOMEM;
  1460. goto rel_reg;
  1461. }
  1462. adapter = netdev_priv(netdev);
  1463. adapter->pdev = pdev;
  1464. pci_set_drvdata(pdev, adapter);
  1465. adapter->netdev = netdev;
  1466. be_msix_enable(adapter);
  1467. status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1468. if (!status) {
  1469. netdev->features |= NETIF_F_HIGHDMA;
  1470. } else {
  1471. status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1472. if (status) {
  1473. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1474. goto free_netdev;
  1475. }
  1476. }
  1477. ctrl = &adapter->ctrl;
  1478. status = be_ctrl_init(adapter);
  1479. if (status)
  1480. goto free_netdev;
  1481. status = be_stats_init(adapter);
  1482. if (status)
  1483. goto ctrl_clean;
  1484. status = be_hw_up(adapter);
  1485. if (status)
  1486. goto stats_clean;
  1487. status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
  1488. true /* permanent */, 0);
  1489. if (status)
  1490. goto stats_clean;
  1491. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1492. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1493. be_netdev_init(netdev);
  1494. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1495. status = register_netdev(netdev);
  1496. if (status != 0)
  1497. goto stats_clean;
  1498. dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
  1499. return 0;
  1500. stats_clean:
  1501. be_stats_cleanup(adapter);
  1502. ctrl_clean:
  1503. be_ctrl_cleanup(adapter);
  1504. free_netdev:
  1505. free_netdev(adapter->netdev);
  1506. rel_reg:
  1507. pci_release_regions(pdev);
  1508. disable_dev:
  1509. pci_disable_device(pdev);
  1510. do_none:
  1511. dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
  1512. return status;
  1513. }
  1514. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1515. {
  1516. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1517. struct net_device *netdev = adapter->netdev;
  1518. netif_device_detach(netdev);
  1519. if (netif_running(netdev)) {
  1520. rtnl_lock();
  1521. be_close(netdev);
  1522. rtnl_unlock();
  1523. }
  1524. pci_save_state(pdev);
  1525. pci_disable_device(pdev);
  1526. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1527. return 0;
  1528. }
  1529. static int be_resume(struct pci_dev *pdev)
  1530. {
  1531. int status = 0;
  1532. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1533. struct net_device *netdev = adapter->netdev;
  1534. netif_device_detach(netdev);
  1535. status = pci_enable_device(pdev);
  1536. if (status)
  1537. return status;
  1538. pci_set_power_state(pdev, 0);
  1539. pci_restore_state(pdev);
  1540. be_vids_config(netdev);
  1541. if (netif_running(netdev)) {
  1542. rtnl_lock();
  1543. be_open(netdev);
  1544. rtnl_unlock();
  1545. }
  1546. netif_device_attach(netdev);
  1547. return 0;
  1548. }
  1549. static struct pci_driver be_driver = {
  1550. .name = DRV_NAME,
  1551. .id_table = be_dev_ids,
  1552. .probe = be_probe,
  1553. .remove = be_remove,
  1554. .suspend = be_suspend,
  1555. .resume = be_resume
  1556. };
  1557. static int __init be_init_module(void)
  1558. {
  1559. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1560. && rx_frag_size != 2048) {
  1561. printk(KERN_WARNING DRV_NAME
  1562. " : Module param rx_frag_size must be 2048/4096/8192."
  1563. " Using 2048\n");
  1564. rx_frag_size = 2048;
  1565. }
  1566. /* Ensure rx_frag_size is aligned to chache line */
  1567. if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
  1568. printk(KERN_WARNING DRV_NAME
  1569. " : Bad module param rx_frag_size. Using 2048\n");
  1570. rx_frag_size = 2048;
  1571. }
  1572. return pci_register_driver(&be_driver);
  1573. }
  1574. module_init(be_init_module);
  1575. static void __exit be_exit_module(void)
  1576. {
  1577. pci_unregister_driver(&be_driver);
  1578. }
  1579. module_exit(be_exit_module);