en_netdev.c 62 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/ll_poll.h>
  41. #include <linux/mlx4/driver.h>
  42. #include <linux/mlx4/device.h>
  43. #include <linux/mlx4/cmd.h>
  44. #include <linux/mlx4/cq.h>
  45. #include "mlx4_en.h"
  46. #include "en_port.h"
  47. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  48. {
  49. struct mlx4_en_priv *priv = netdev_priv(dev);
  50. int i;
  51. unsigned int offset = 0;
  52. if (up && up != MLX4_EN_NUM_UP)
  53. return -EINVAL;
  54. netdev_set_num_tc(dev, up);
  55. /* Partition Tx queues evenly amongst UP's */
  56. for (i = 0; i < up; i++) {
  57. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  58. offset += priv->num_tx_rings_p_up;
  59. }
  60. return 0;
  61. }
  62. #ifdef CONFIG_NET_LL_RX_POLL
  63. /* must be called with local_bh_disable()d */
  64. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  65. {
  66. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  67. struct net_device *dev = cq->dev;
  68. struct mlx4_en_priv *priv = netdev_priv(dev);
  69. struct mlx4_en_rx_ring *rx_ring = &priv->rx_ring[cq->ring];
  70. int done;
  71. if (!priv->port_up)
  72. return LL_FLUSH_FAILED;
  73. if (!mlx4_en_cq_lock_poll(cq))
  74. return LL_FLUSH_BUSY;
  75. done = mlx4_en_process_rx_cq(dev, cq, 4);
  76. if (likely(done))
  77. rx_ring->cleaned += done;
  78. else
  79. rx_ring->misses++;
  80. mlx4_en_cq_unlock_poll(cq);
  81. return done;
  82. }
  83. #endif /* CONFIG_NET_LL_RX_POLL */
  84. #ifdef CONFIG_RFS_ACCEL
  85. struct mlx4_en_filter {
  86. struct list_head next;
  87. struct work_struct work;
  88. __be32 src_ip;
  89. __be32 dst_ip;
  90. __be16 src_port;
  91. __be16 dst_port;
  92. int rxq_index;
  93. struct mlx4_en_priv *priv;
  94. u32 flow_id; /* RFS infrastructure id */
  95. int id; /* mlx4_en driver id */
  96. u64 reg_id; /* Flow steering API id */
  97. u8 activated; /* Used to prevent expiry before filter
  98. * is attached
  99. */
  100. struct hlist_node filter_chain;
  101. };
  102. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  103. static void mlx4_en_filter_work(struct work_struct *work)
  104. {
  105. struct mlx4_en_filter *filter = container_of(work,
  106. struct mlx4_en_filter,
  107. work);
  108. struct mlx4_en_priv *priv = filter->priv;
  109. struct mlx4_spec_list spec_tcp = {
  110. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  111. {
  112. .tcp_udp = {
  113. .dst_port = filter->dst_port,
  114. .dst_port_msk = (__force __be16)-1,
  115. .src_port = filter->src_port,
  116. .src_port_msk = (__force __be16)-1,
  117. },
  118. },
  119. };
  120. struct mlx4_spec_list spec_ip = {
  121. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  122. {
  123. .ipv4 = {
  124. .dst_ip = filter->dst_ip,
  125. .dst_ip_msk = (__force __be32)-1,
  126. .src_ip = filter->src_ip,
  127. .src_ip_msk = (__force __be32)-1,
  128. },
  129. },
  130. };
  131. struct mlx4_spec_list spec_eth = {
  132. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  133. };
  134. struct mlx4_net_trans_rule rule = {
  135. .list = LIST_HEAD_INIT(rule.list),
  136. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  137. .exclusive = 1,
  138. .allow_loopback = 1,
  139. .promisc_mode = MLX4_FS_REGULAR,
  140. .port = priv->port,
  141. .priority = MLX4_DOMAIN_RFS,
  142. };
  143. int rc;
  144. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  145. list_add_tail(&spec_eth.list, &rule.list);
  146. list_add_tail(&spec_ip.list, &rule.list);
  147. list_add_tail(&spec_tcp.list, &rule.list);
  148. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  149. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  150. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  151. filter->activated = 0;
  152. if (filter->reg_id) {
  153. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  154. if (rc && rc != -ENOENT)
  155. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  156. }
  157. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  158. if (rc)
  159. en_err(priv, "Error attaching flow. err = %d\n", rc);
  160. mlx4_en_filter_rfs_expire(priv);
  161. filter->activated = 1;
  162. }
  163. static inline struct hlist_head *
  164. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  165. __be16 src_port, __be16 dst_port)
  166. {
  167. unsigned long l;
  168. int bucket_idx;
  169. l = (__force unsigned long)src_port |
  170. ((__force unsigned long)dst_port << 2);
  171. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  172. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  173. return &priv->filter_hash[bucket_idx];
  174. }
  175. static struct mlx4_en_filter *
  176. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  177. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  178. u32 flow_id)
  179. {
  180. struct mlx4_en_filter *filter = NULL;
  181. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  182. if (!filter)
  183. return NULL;
  184. filter->priv = priv;
  185. filter->rxq_index = rxq_index;
  186. INIT_WORK(&filter->work, mlx4_en_filter_work);
  187. filter->src_ip = src_ip;
  188. filter->dst_ip = dst_ip;
  189. filter->src_port = src_port;
  190. filter->dst_port = dst_port;
  191. filter->flow_id = flow_id;
  192. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  193. list_add_tail(&filter->next, &priv->filters);
  194. hlist_add_head(&filter->filter_chain,
  195. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  196. dst_port));
  197. return filter;
  198. }
  199. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  200. {
  201. struct mlx4_en_priv *priv = filter->priv;
  202. int rc;
  203. list_del(&filter->next);
  204. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  205. if (rc && rc != -ENOENT)
  206. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  207. kfree(filter);
  208. }
  209. static inline struct mlx4_en_filter *
  210. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  211. __be16 src_port, __be16 dst_port)
  212. {
  213. struct mlx4_en_filter *filter;
  214. struct mlx4_en_filter *ret = NULL;
  215. hlist_for_each_entry(filter,
  216. filter_hash_bucket(priv, src_ip, dst_ip,
  217. src_port, dst_port),
  218. filter_chain) {
  219. if (filter->src_ip == src_ip &&
  220. filter->dst_ip == dst_ip &&
  221. filter->src_port == src_port &&
  222. filter->dst_port == dst_port) {
  223. ret = filter;
  224. break;
  225. }
  226. }
  227. return ret;
  228. }
  229. static int
  230. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  231. u16 rxq_index, u32 flow_id)
  232. {
  233. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  234. struct mlx4_en_filter *filter;
  235. const struct iphdr *ip;
  236. const __be16 *ports;
  237. __be32 src_ip;
  238. __be32 dst_ip;
  239. __be16 src_port;
  240. __be16 dst_port;
  241. int nhoff = skb_network_offset(skb);
  242. int ret = 0;
  243. if (skb->protocol != htons(ETH_P_IP))
  244. return -EPROTONOSUPPORT;
  245. ip = (const struct iphdr *)(skb->data + nhoff);
  246. if (ip_is_fragment(ip))
  247. return -EPROTONOSUPPORT;
  248. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  249. src_ip = ip->saddr;
  250. dst_ip = ip->daddr;
  251. src_port = ports[0];
  252. dst_port = ports[1];
  253. if (ip->protocol != IPPROTO_TCP)
  254. return -EPROTONOSUPPORT;
  255. spin_lock_bh(&priv->filters_lock);
  256. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  257. if (filter) {
  258. if (filter->rxq_index == rxq_index)
  259. goto out;
  260. filter->rxq_index = rxq_index;
  261. } else {
  262. filter = mlx4_en_filter_alloc(priv, rxq_index,
  263. src_ip, dst_ip,
  264. src_port, dst_port, flow_id);
  265. if (!filter) {
  266. ret = -ENOMEM;
  267. goto err;
  268. }
  269. }
  270. queue_work(priv->mdev->workqueue, &filter->work);
  271. out:
  272. ret = filter->id;
  273. err:
  274. spin_unlock_bh(&priv->filters_lock);
  275. return ret;
  276. }
  277. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  278. struct mlx4_en_rx_ring *rx_ring)
  279. {
  280. struct mlx4_en_filter *filter, *tmp;
  281. LIST_HEAD(del_list);
  282. spin_lock_bh(&priv->filters_lock);
  283. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  284. list_move(&filter->next, &del_list);
  285. hlist_del(&filter->filter_chain);
  286. }
  287. spin_unlock_bh(&priv->filters_lock);
  288. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  289. cancel_work_sync(&filter->work);
  290. mlx4_en_filter_free(filter);
  291. }
  292. }
  293. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  294. {
  295. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  296. LIST_HEAD(del_list);
  297. int i = 0;
  298. spin_lock_bh(&priv->filters_lock);
  299. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  300. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  301. break;
  302. if (filter->activated &&
  303. !work_pending(&filter->work) &&
  304. rps_may_expire_flow(priv->dev,
  305. filter->rxq_index, filter->flow_id,
  306. filter->id)) {
  307. list_move(&filter->next, &del_list);
  308. hlist_del(&filter->filter_chain);
  309. } else
  310. last_filter = filter;
  311. i++;
  312. }
  313. if (last_filter && (&last_filter->next != priv->filters.next))
  314. list_move(&priv->filters, &last_filter->next);
  315. spin_unlock_bh(&priv->filters_lock);
  316. list_for_each_entry_safe(filter, tmp, &del_list, next)
  317. mlx4_en_filter_free(filter);
  318. }
  319. #endif
  320. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  321. __be16 proto, u16 vid)
  322. {
  323. struct mlx4_en_priv *priv = netdev_priv(dev);
  324. struct mlx4_en_dev *mdev = priv->mdev;
  325. int err;
  326. int idx;
  327. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  328. set_bit(vid, priv->active_vlans);
  329. /* Add VID to port VLAN filter */
  330. mutex_lock(&mdev->state_lock);
  331. if (mdev->device_up && priv->port_up) {
  332. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  333. if (err)
  334. en_err(priv, "Failed configuring VLAN filter\n");
  335. }
  336. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  337. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  338. mutex_unlock(&mdev->state_lock);
  339. return 0;
  340. }
  341. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  342. __be16 proto, u16 vid)
  343. {
  344. struct mlx4_en_priv *priv = netdev_priv(dev);
  345. struct mlx4_en_dev *mdev = priv->mdev;
  346. int err;
  347. int idx;
  348. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  349. clear_bit(vid, priv->active_vlans);
  350. /* Remove VID from port VLAN filter */
  351. mutex_lock(&mdev->state_lock);
  352. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  353. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  354. else
  355. en_dbg(HW, priv, "could not find vid %d in cache\n", vid);
  356. if (mdev->device_up && priv->port_up) {
  357. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  358. if (err)
  359. en_err(priv, "Failed configuring VLAN filter\n");
  360. }
  361. mutex_unlock(&mdev->state_lock);
  362. return 0;
  363. }
  364. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  365. {
  366. int i;
  367. for (i = ETH_ALEN - 1; i >= 0; --i) {
  368. dst_mac[i] = src_mac & 0xff;
  369. src_mac >>= 8;
  370. }
  371. memset(&dst_mac[ETH_ALEN], 0, 2);
  372. }
  373. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  374. unsigned char *mac, int *qpn, u64 *reg_id)
  375. {
  376. struct mlx4_en_dev *mdev = priv->mdev;
  377. struct mlx4_dev *dev = mdev->dev;
  378. int err;
  379. switch (dev->caps.steering_mode) {
  380. case MLX4_STEERING_MODE_B0: {
  381. struct mlx4_qp qp;
  382. u8 gid[16] = {0};
  383. qp.qpn = *qpn;
  384. memcpy(&gid[10], mac, ETH_ALEN);
  385. gid[5] = priv->port;
  386. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  387. break;
  388. }
  389. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  390. struct mlx4_spec_list spec_eth = { {NULL} };
  391. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  392. struct mlx4_net_trans_rule rule = {
  393. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  394. .exclusive = 0,
  395. .allow_loopback = 1,
  396. .promisc_mode = MLX4_FS_REGULAR,
  397. .priority = MLX4_DOMAIN_NIC,
  398. };
  399. rule.port = priv->port;
  400. rule.qpn = *qpn;
  401. INIT_LIST_HEAD(&rule.list);
  402. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  403. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  404. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  405. list_add_tail(&spec_eth.list, &rule.list);
  406. err = mlx4_flow_attach(dev, &rule, reg_id);
  407. break;
  408. }
  409. default:
  410. return -EINVAL;
  411. }
  412. if (err)
  413. en_warn(priv, "Failed Attaching Unicast\n");
  414. return err;
  415. }
  416. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  417. unsigned char *mac, int qpn, u64 reg_id)
  418. {
  419. struct mlx4_en_dev *mdev = priv->mdev;
  420. struct mlx4_dev *dev = mdev->dev;
  421. switch (dev->caps.steering_mode) {
  422. case MLX4_STEERING_MODE_B0: {
  423. struct mlx4_qp qp;
  424. u8 gid[16] = {0};
  425. qp.qpn = qpn;
  426. memcpy(&gid[10], mac, ETH_ALEN);
  427. gid[5] = priv->port;
  428. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  429. break;
  430. }
  431. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  432. mlx4_flow_detach(dev, reg_id);
  433. break;
  434. }
  435. default:
  436. en_err(priv, "Invalid steering mode.\n");
  437. }
  438. }
  439. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  440. {
  441. struct mlx4_en_dev *mdev = priv->mdev;
  442. struct mlx4_dev *dev = mdev->dev;
  443. struct mlx4_mac_entry *entry;
  444. int index = 0;
  445. int err = 0;
  446. u64 reg_id;
  447. int *qpn = &priv->base_qpn;
  448. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  449. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  450. priv->dev->dev_addr);
  451. index = mlx4_register_mac(dev, priv->port, mac);
  452. if (index < 0) {
  453. err = index;
  454. en_err(priv, "Failed adding MAC: %pM\n",
  455. priv->dev->dev_addr);
  456. return err;
  457. }
  458. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  459. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  460. *qpn = base_qpn + index;
  461. return 0;
  462. }
  463. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  464. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  465. if (err) {
  466. en_err(priv, "Failed to reserve qp for mac registration\n");
  467. goto qp_err;
  468. }
  469. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  470. if (err)
  471. goto steer_err;
  472. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  473. if (!entry) {
  474. err = -ENOMEM;
  475. goto alloc_err;
  476. }
  477. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  478. entry->reg_id = reg_id;
  479. hlist_add_head_rcu(&entry->hlist,
  480. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  481. return 0;
  482. alloc_err:
  483. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  484. steer_err:
  485. mlx4_qp_release_range(dev, *qpn, 1);
  486. qp_err:
  487. mlx4_unregister_mac(dev, priv->port, mac);
  488. return err;
  489. }
  490. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  491. {
  492. struct mlx4_en_dev *mdev = priv->mdev;
  493. struct mlx4_dev *dev = mdev->dev;
  494. int qpn = priv->base_qpn;
  495. u64 mac;
  496. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  497. mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  498. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  499. priv->dev->dev_addr);
  500. mlx4_unregister_mac(dev, priv->port, mac);
  501. } else {
  502. struct mlx4_mac_entry *entry;
  503. struct hlist_node *tmp;
  504. struct hlist_head *bucket;
  505. unsigned int i;
  506. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  507. bucket = &priv->mac_hash[i];
  508. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  509. mac = mlx4_en_mac_to_u64(entry->mac);
  510. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  511. entry->mac);
  512. mlx4_en_uc_steer_release(priv, entry->mac,
  513. qpn, entry->reg_id);
  514. mlx4_unregister_mac(dev, priv->port, mac);
  515. hlist_del_rcu(&entry->hlist);
  516. kfree_rcu(entry, rcu);
  517. }
  518. }
  519. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  520. priv->port, qpn);
  521. mlx4_qp_release_range(dev, qpn, 1);
  522. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  523. }
  524. }
  525. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  526. unsigned char *new_mac, unsigned char *prev_mac)
  527. {
  528. struct mlx4_en_dev *mdev = priv->mdev;
  529. struct mlx4_dev *dev = mdev->dev;
  530. int err = 0;
  531. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  532. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  533. struct hlist_head *bucket;
  534. unsigned int mac_hash;
  535. struct mlx4_mac_entry *entry;
  536. struct hlist_node *tmp;
  537. u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
  538. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  539. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  540. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  541. mlx4_en_uc_steer_release(priv, entry->mac,
  542. qpn, entry->reg_id);
  543. mlx4_unregister_mac(dev, priv->port,
  544. prev_mac_u64);
  545. hlist_del_rcu(&entry->hlist);
  546. synchronize_rcu();
  547. memcpy(entry->mac, new_mac, ETH_ALEN);
  548. entry->reg_id = 0;
  549. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  550. hlist_add_head_rcu(&entry->hlist,
  551. &priv->mac_hash[mac_hash]);
  552. mlx4_register_mac(dev, priv->port, new_mac_u64);
  553. err = mlx4_en_uc_steer_add(priv, new_mac,
  554. &qpn,
  555. &entry->reg_id);
  556. return err;
  557. }
  558. }
  559. return -EINVAL;
  560. }
  561. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  562. }
  563. u64 mlx4_en_mac_to_u64(u8 *addr)
  564. {
  565. u64 mac = 0;
  566. int i;
  567. for (i = 0; i < ETH_ALEN; i++) {
  568. mac <<= 8;
  569. mac |= addr[i];
  570. }
  571. return mac;
  572. }
  573. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
  574. {
  575. int err = 0;
  576. if (priv->port_up) {
  577. /* Remove old MAC and insert the new one */
  578. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  579. priv->dev->dev_addr, priv->prev_mac);
  580. if (err)
  581. en_err(priv, "Failed changing HW MAC address\n");
  582. memcpy(priv->prev_mac, priv->dev->dev_addr,
  583. sizeof(priv->prev_mac));
  584. } else
  585. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  586. return err;
  587. }
  588. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  589. {
  590. struct mlx4_en_priv *priv = netdev_priv(dev);
  591. struct mlx4_en_dev *mdev = priv->mdev;
  592. struct sockaddr *saddr = addr;
  593. int err;
  594. if (!is_valid_ether_addr(saddr->sa_data))
  595. return -EADDRNOTAVAIL;
  596. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  597. mutex_lock(&mdev->state_lock);
  598. err = mlx4_en_do_set_mac(priv);
  599. mutex_unlock(&mdev->state_lock);
  600. return err;
  601. }
  602. static void mlx4_en_clear_list(struct net_device *dev)
  603. {
  604. struct mlx4_en_priv *priv = netdev_priv(dev);
  605. struct mlx4_en_mc_list *tmp, *mc_to_del;
  606. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  607. list_del(&mc_to_del->list);
  608. kfree(mc_to_del);
  609. }
  610. }
  611. static void mlx4_en_cache_mclist(struct net_device *dev)
  612. {
  613. struct mlx4_en_priv *priv = netdev_priv(dev);
  614. struct netdev_hw_addr *ha;
  615. struct mlx4_en_mc_list *tmp;
  616. mlx4_en_clear_list(dev);
  617. netdev_for_each_mc_addr(ha, dev) {
  618. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  619. if (!tmp) {
  620. mlx4_en_clear_list(dev);
  621. return;
  622. }
  623. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  624. list_add_tail(&tmp->list, &priv->mc_list);
  625. }
  626. }
  627. static void update_mclist_flags(struct mlx4_en_priv *priv,
  628. struct list_head *dst,
  629. struct list_head *src)
  630. {
  631. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  632. bool found;
  633. /* Find all the entries that should be removed from dst,
  634. * These are the entries that are not found in src
  635. */
  636. list_for_each_entry(dst_tmp, dst, list) {
  637. found = false;
  638. list_for_each_entry(src_tmp, src, list) {
  639. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  640. found = true;
  641. break;
  642. }
  643. }
  644. if (!found)
  645. dst_tmp->action = MCLIST_REM;
  646. }
  647. /* Add entries that exist in src but not in dst
  648. * mark them as need to add
  649. */
  650. list_for_each_entry(src_tmp, src, list) {
  651. found = false;
  652. list_for_each_entry(dst_tmp, dst, list) {
  653. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  654. dst_tmp->action = MCLIST_NONE;
  655. found = true;
  656. break;
  657. }
  658. }
  659. if (!found) {
  660. new_mc = kmemdup(src_tmp,
  661. sizeof(struct mlx4_en_mc_list),
  662. GFP_KERNEL);
  663. if (!new_mc)
  664. return;
  665. new_mc->action = MCLIST_ADD;
  666. list_add_tail(&new_mc->list, dst);
  667. }
  668. }
  669. }
  670. static void mlx4_en_set_rx_mode(struct net_device *dev)
  671. {
  672. struct mlx4_en_priv *priv = netdev_priv(dev);
  673. if (!priv->port_up)
  674. return;
  675. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  676. }
  677. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  678. struct mlx4_en_dev *mdev)
  679. {
  680. int err = 0;
  681. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  682. if (netif_msg_rx_status(priv))
  683. en_warn(priv, "Entering promiscuous mode\n");
  684. priv->flags |= MLX4_EN_FLAG_PROMISC;
  685. /* Enable promiscouos mode */
  686. switch (mdev->dev->caps.steering_mode) {
  687. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  688. err = mlx4_flow_steer_promisc_add(mdev->dev,
  689. priv->port,
  690. priv->base_qpn,
  691. MLX4_FS_ALL_DEFAULT);
  692. if (err)
  693. en_err(priv, "Failed enabling promiscuous mode\n");
  694. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  695. break;
  696. case MLX4_STEERING_MODE_B0:
  697. err = mlx4_unicast_promisc_add(mdev->dev,
  698. priv->base_qpn,
  699. priv->port);
  700. if (err)
  701. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  702. /* Add the default qp number as multicast
  703. * promisc
  704. */
  705. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  706. err = mlx4_multicast_promisc_add(mdev->dev,
  707. priv->base_qpn,
  708. priv->port);
  709. if (err)
  710. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  711. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  712. }
  713. break;
  714. case MLX4_STEERING_MODE_A0:
  715. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  716. priv->port,
  717. priv->base_qpn,
  718. 1);
  719. if (err)
  720. en_err(priv, "Failed enabling promiscuous mode\n");
  721. break;
  722. }
  723. /* Disable port multicast filter (unconditionally) */
  724. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  725. 0, MLX4_MCAST_DISABLE);
  726. if (err)
  727. en_err(priv, "Failed disabling multicast filter\n");
  728. /* Disable port VLAN filter */
  729. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  730. if (err)
  731. en_err(priv, "Failed disabling VLAN filter\n");
  732. }
  733. }
  734. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  735. struct mlx4_en_dev *mdev)
  736. {
  737. int err = 0;
  738. if (netif_msg_rx_status(priv))
  739. en_warn(priv, "Leaving promiscuous mode\n");
  740. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  741. /* Disable promiscouos mode */
  742. switch (mdev->dev->caps.steering_mode) {
  743. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  744. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  745. priv->port,
  746. MLX4_FS_ALL_DEFAULT);
  747. if (err)
  748. en_err(priv, "Failed disabling promiscuous mode\n");
  749. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  750. break;
  751. case MLX4_STEERING_MODE_B0:
  752. err = mlx4_unicast_promisc_remove(mdev->dev,
  753. priv->base_qpn,
  754. priv->port);
  755. if (err)
  756. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  757. /* Disable Multicast promisc */
  758. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  759. err = mlx4_multicast_promisc_remove(mdev->dev,
  760. priv->base_qpn,
  761. priv->port);
  762. if (err)
  763. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  764. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  765. }
  766. break;
  767. case MLX4_STEERING_MODE_A0:
  768. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  769. priv->port,
  770. priv->base_qpn, 0);
  771. if (err)
  772. en_err(priv, "Failed disabling promiscuous mode\n");
  773. break;
  774. }
  775. /* Enable port VLAN filter */
  776. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  777. if (err)
  778. en_err(priv, "Failed enabling VLAN filter\n");
  779. }
  780. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  781. struct net_device *dev,
  782. struct mlx4_en_dev *mdev)
  783. {
  784. struct mlx4_en_mc_list *mclist, *tmp;
  785. u64 mcast_addr = 0;
  786. u8 mc_list[16] = {0};
  787. int err = 0;
  788. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  789. if (dev->flags & IFF_ALLMULTI) {
  790. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  791. 0, MLX4_MCAST_DISABLE);
  792. if (err)
  793. en_err(priv, "Failed disabling multicast filter\n");
  794. /* Add the default qp number as multicast promisc */
  795. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  796. switch (mdev->dev->caps.steering_mode) {
  797. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  798. err = mlx4_flow_steer_promisc_add(mdev->dev,
  799. priv->port,
  800. priv->base_qpn,
  801. MLX4_FS_MC_DEFAULT);
  802. break;
  803. case MLX4_STEERING_MODE_B0:
  804. err = mlx4_multicast_promisc_add(mdev->dev,
  805. priv->base_qpn,
  806. priv->port);
  807. break;
  808. case MLX4_STEERING_MODE_A0:
  809. break;
  810. }
  811. if (err)
  812. en_err(priv, "Failed entering multicast promisc mode\n");
  813. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  814. }
  815. } else {
  816. /* Disable Multicast promisc */
  817. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  818. switch (mdev->dev->caps.steering_mode) {
  819. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  820. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  821. priv->port,
  822. MLX4_FS_MC_DEFAULT);
  823. break;
  824. case MLX4_STEERING_MODE_B0:
  825. err = mlx4_multicast_promisc_remove(mdev->dev,
  826. priv->base_qpn,
  827. priv->port);
  828. break;
  829. case MLX4_STEERING_MODE_A0:
  830. break;
  831. }
  832. if (err)
  833. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  834. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  835. }
  836. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  837. 0, MLX4_MCAST_DISABLE);
  838. if (err)
  839. en_err(priv, "Failed disabling multicast filter\n");
  840. /* Flush mcast filter and init it with broadcast address */
  841. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  842. 1, MLX4_MCAST_CONFIG);
  843. /* Update multicast list - we cache all addresses so they won't
  844. * change while HW is updated holding the command semaphor */
  845. netif_addr_lock_bh(dev);
  846. mlx4_en_cache_mclist(dev);
  847. netif_addr_unlock_bh(dev);
  848. list_for_each_entry(mclist, &priv->mc_list, list) {
  849. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  850. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  851. mcast_addr, 0, MLX4_MCAST_CONFIG);
  852. }
  853. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  854. 0, MLX4_MCAST_ENABLE);
  855. if (err)
  856. en_err(priv, "Failed enabling multicast filter\n");
  857. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  858. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  859. if (mclist->action == MCLIST_REM) {
  860. /* detach this address and delete from list */
  861. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  862. mc_list[5] = priv->port;
  863. err = mlx4_multicast_detach(mdev->dev,
  864. &priv->rss_map.indir_qp,
  865. mc_list,
  866. MLX4_PROT_ETH,
  867. mclist->reg_id);
  868. if (err)
  869. en_err(priv, "Fail to detach multicast address\n");
  870. /* remove from list */
  871. list_del(&mclist->list);
  872. kfree(mclist);
  873. } else if (mclist->action == MCLIST_ADD) {
  874. /* attach the address */
  875. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  876. /* needed for B0 steering support */
  877. mc_list[5] = priv->port;
  878. err = mlx4_multicast_attach(mdev->dev,
  879. &priv->rss_map.indir_qp,
  880. mc_list,
  881. priv->port, 0,
  882. MLX4_PROT_ETH,
  883. &mclist->reg_id);
  884. if (err)
  885. en_err(priv, "Fail to attach multicast address\n");
  886. }
  887. }
  888. }
  889. }
  890. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  891. struct net_device *dev,
  892. struct mlx4_en_dev *mdev)
  893. {
  894. struct netdev_hw_addr *ha;
  895. struct mlx4_mac_entry *entry;
  896. struct hlist_node *tmp;
  897. bool found;
  898. u64 mac;
  899. int err = 0;
  900. struct hlist_head *bucket;
  901. unsigned int i;
  902. int removed = 0;
  903. u32 prev_flags;
  904. /* Note that we do not need to protect our mac_hash traversal with rcu,
  905. * since all modification code is protected by mdev->state_lock
  906. */
  907. /* find what to remove */
  908. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  909. bucket = &priv->mac_hash[i];
  910. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  911. found = false;
  912. netdev_for_each_uc_addr(ha, dev) {
  913. if (ether_addr_equal_64bits(entry->mac,
  914. ha->addr)) {
  915. found = true;
  916. break;
  917. }
  918. }
  919. /* MAC address of the port is not in uc list */
  920. if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
  921. found = true;
  922. if (!found) {
  923. mac = mlx4_en_mac_to_u64(entry->mac);
  924. mlx4_en_uc_steer_release(priv, entry->mac,
  925. priv->base_qpn,
  926. entry->reg_id);
  927. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  928. hlist_del_rcu(&entry->hlist);
  929. kfree_rcu(entry, rcu);
  930. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  931. entry->mac, priv->port);
  932. ++removed;
  933. }
  934. }
  935. }
  936. /* if we didn't remove anything, there is no use in trying to add
  937. * again once we are in a forced promisc mode state
  938. */
  939. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  940. return;
  941. prev_flags = priv->flags;
  942. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  943. /* find what to add */
  944. netdev_for_each_uc_addr(ha, dev) {
  945. found = false;
  946. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  947. hlist_for_each_entry(entry, bucket, hlist) {
  948. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  949. found = true;
  950. break;
  951. }
  952. }
  953. if (!found) {
  954. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  955. if (!entry) {
  956. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  957. ha->addr, priv->port);
  958. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  959. break;
  960. }
  961. mac = mlx4_en_mac_to_u64(ha->addr);
  962. memcpy(entry->mac, ha->addr, ETH_ALEN);
  963. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  964. if (err < 0) {
  965. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  966. ha->addr, priv->port, err);
  967. kfree(entry);
  968. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  969. break;
  970. }
  971. err = mlx4_en_uc_steer_add(priv, ha->addr,
  972. &priv->base_qpn,
  973. &entry->reg_id);
  974. if (err) {
  975. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  976. ha->addr, priv->port, err);
  977. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  978. kfree(entry);
  979. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  980. break;
  981. } else {
  982. unsigned int mac_hash;
  983. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  984. ha->addr, priv->port);
  985. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  986. bucket = &priv->mac_hash[mac_hash];
  987. hlist_add_head_rcu(&entry->hlist, bucket);
  988. }
  989. }
  990. }
  991. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  992. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  993. priv->port);
  994. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  995. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  996. priv->port);
  997. }
  998. }
  999. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1000. {
  1001. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1002. rx_mode_task);
  1003. struct mlx4_en_dev *mdev = priv->mdev;
  1004. struct net_device *dev = priv->dev;
  1005. mutex_lock(&mdev->state_lock);
  1006. if (!mdev->device_up) {
  1007. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1008. goto out;
  1009. }
  1010. if (!priv->port_up) {
  1011. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1012. goto out;
  1013. }
  1014. if (!netif_carrier_ok(dev)) {
  1015. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1016. if (priv->port_state.link_state) {
  1017. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1018. netif_carrier_on(dev);
  1019. en_dbg(LINK, priv, "Link Up\n");
  1020. }
  1021. }
  1022. }
  1023. if (dev->priv_flags & IFF_UNICAST_FLT)
  1024. mlx4_en_do_uc_filter(priv, dev, mdev);
  1025. /* Promsicuous mode: disable all filters */
  1026. if ((dev->flags & IFF_PROMISC) ||
  1027. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1028. mlx4_en_set_promisc_mode(priv, mdev);
  1029. goto out;
  1030. }
  1031. /* Not in promiscuous mode */
  1032. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1033. mlx4_en_clear_promisc_mode(priv, mdev);
  1034. mlx4_en_do_multicast(priv, dev, mdev);
  1035. out:
  1036. mutex_unlock(&mdev->state_lock);
  1037. }
  1038. #ifdef CONFIG_NET_POLL_CONTROLLER
  1039. static void mlx4_en_netpoll(struct net_device *dev)
  1040. {
  1041. struct mlx4_en_priv *priv = netdev_priv(dev);
  1042. struct mlx4_en_cq *cq;
  1043. unsigned long flags;
  1044. int i;
  1045. for (i = 0; i < priv->rx_ring_num; i++) {
  1046. cq = &priv->rx_cq[i];
  1047. spin_lock_irqsave(&cq->lock, flags);
  1048. napi_synchronize(&cq->napi);
  1049. mlx4_en_process_rx_cq(dev, cq, 0);
  1050. spin_unlock_irqrestore(&cq->lock, flags);
  1051. }
  1052. }
  1053. #endif
  1054. static void mlx4_en_tx_timeout(struct net_device *dev)
  1055. {
  1056. struct mlx4_en_priv *priv = netdev_priv(dev);
  1057. struct mlx4_en_dev *mdev = priv->mdev;
  1058. if (netif_msg_timer(priv))
  1059. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1060. priv->port_stats.tx_timeout++;
  1061. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1062. queue_work(mdev->workqueue, &priv->watchdog_task);
  1063. }
  1064. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1065. {
  1066. struct mlx4_en_priv *priv = netdev_priv(dev);
  1067. spin_lock_bh(&priv->stats_lock);
  1068. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1069. spin_unlock_bh(&priv->stats_lock);
  1070. return &priv->ret_stats;
  1071. }
  1072. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1073. {
  1074. struct mlx4_en_cq *cq;
  1075. int i;
  1076. /* If we haven't received a specific coalescing setting
  1077. * (module param), we set the moderation parameters as follows:
  1078. * - moder_cnt is set to the number of mtu sized packets to
  1079. * satisfy our coalescing target.
  1080. * - moder_time is set to a fixed value.
  1081. */
  1082. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1083. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1084. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1085. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1086. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1087. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1088. /* Setup cq moderation params */
  1089. for (i = 0; i < priv->rx_ring_num; i++) {
  1090. cq = &priv->rx_cq[i];
  1091. cq->moder_cnt = priv->rx_frames;
  1092. cq->moder_time = priv->rx_usecs;
  1093. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1094. priv->last_moder_packets[i] = 0;
  1095. priv->last_moder_bytes[i] = 0;
  1096. }
  1097. for (i = 0; i < priv->tx_ring_num; i++) {
  1098. cq = &priv->tx_cq[i];
  1099. cq->moder_cnt = priv->tx_frames;
  1100. cq->moder_time = priv->tx_usecs;
  1101. }
  1102. /* Reset auto-moderation params */
  1103. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1104. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1105. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1106. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1107. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1108. priv->adaptive_rx_coal = 1;
  1109. priv->last_moder_jiffies = 0;
  1110. priv->last_moder_tx_packets = 0;
  1111. }
  1112. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1113. {
  1114. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1115. struct mlx4_en_cq *cq;
  1116. unsigned long packets;
  1117. unsigned long rate;
  1118. unsigned long avg_pkt_size;
  1119. unsigned long rx_packets;
  1120. unsigned long rx_bytes;
  1121. unsigned long rx_pkt_diff;
  1122. int moder_time;
  1123. int ring, err;
  1124. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1125. return;
  1126. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1127. spin_lock_bh(&priv->stats_lock);
  1128. rx_packets = priv->rx_ring[ring].packets;
  1129. rx_bytes = priv->rx_ring[ring].bytes;
  1130. spin_unlock_bh(&priv->stats_lock);
  1131. rx_pkt_diff = ((unsigned long) (rx_packets -
  1132. priv->last_moder_packets[ring]));
  1133. packets = rx_pkt_diff;
  1134. rate = packets * HZ / period;
  1135. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1136. priv->last_moder_bytes[ring])) / packets : 0;
  1137. /* Apply auto-moderation only when packet rate
  1138. * exceeds a rate that it matters */
  1139. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1140. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1141. if (rate < priv->pkt_rate_low)
  1142. moder_time = priv->rx_usecs_low;
  1143. else if (rate > priv->pkt_rate_high)
  1144. moder_time = priv->rx_usecs_high;
  1145. else
  1146. moder_time = (rate - priv->pkt_rate_low) *
  1147. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1148. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1149. priv->rx_usecs_low;
  1150. } else {
  1151. moder_time = priv->rx_usecs_low;
  1152. }
  1153. if (moder_time != priv->last_moder_time[ring]) {
  1154. priv->last_moder_time[ring] = moder_time;
  1155. cq = &priv->rx_cq[ring];
  1156. cq->moder_time = moder_time;
  1157. cq->moder_cnt = priv->rx_frames;
  1158. err = mlx4_en_set_cq_moder(priv, cq);
  1159. if (err)
  1160. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1161. ring);
  1162. }
  1163. priv->last_moder_packets[ring] = rx_packets;
  1164. priv->last_moder_bytes[ring] = rx_bytes;
  1165. }
  1166. priv->last_moder_jiffies = jiffies;
  1167. }
  1168. static void mlx4_en_do_get_stats(struct work_struct *work)
  1169. {
  1170. struct delayed_work *delay = to_delayed_work(work);
  1171. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1172. stats_task);
  1173. struct mlx4_en_dev *mdev = priv->mdev;
  1174. int err;
  1175. mutex_lock(&mdev->state_lock);
  1176. if (mdev->device_up) {
  1177. if (priv->port_up) {
  1178. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1179. if (err)
  1180. en_dbg(HW, priv, "Could not update stats\n");
  1181. mlx4_en_auto_moderation(priv);
  1182. }
  1183. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1184. }
  1185. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1186. mlx4_en_do_set_mac(priv);
  1187. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1188. }
  1189. mutex_unlock(&mdev->state_lock);
  1190. }
  1191. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1192. * periodically
  1193. */
  1194. static void mlx4_en_service_task(struct work_struct *work)
  1195. {
  1196. struct delayed_work *delay = to_delayed_work(work);
  1197. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1198. service_task);
  1199. struct mlx4_en_dev *mdev = priv->mdev;
  1200. mutex_lock(&mdev->state_lock);
  1201. if (mdev->device_up) {
  1202. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1203. mlx4_en_ptp_overflow_check(mdev);
  1204. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1205. SERVICE_TASK_DELAY);
  1206. }
  1207. mutex_unlock(&mdev->state_lock);
  1208. }
  1209. static void mlx4_en_linkstate(struct work_struct *work)
  1210. {
  1211. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1212. linkstate_task);
  1213. struct mlx4_en_dev *mdev = priv->mdev;
  1214. int linkstate = priv->link_state;
  1215. mutex_lock(&mdev->state_lock);
  1216. /* If observable port state changed set carrier state and
  1217. * report to system log */
  1218. if (priv->last_link_state != linkstate) {
  1219. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1220. en_info(priv, "Link Down\n");
  1221. netif_carrier_off(priv->dev);
  1222. } else {
  1223. en_info(priv, "Link Up\n");
  1224. netif_carrier_on(priv->dev);
  1225. }
  1226. }
  1227. priv->last_link_state = linkstate;
  1228. mutex_unlock(&mdev->state_lock);
  1229. }
  1230. int mlx4_en_start_port(struct net_device *dev)
  1231. {
  1232. struct mlx4_en_priv *priv = netdev_priv(dev);
  1233. struct mlx4_en_dev *mdev = priv->mdev;
  1234. struct mlx4_en_cq *cq;
  1235. struct mlx4_en_tx_ring *tx_ring;
  1236. int rx_index = 0;
  1237. int tx_index = 0;
  1238. int err = 0;
  1239. int i;
  1240. int j;
  1241. u8 mc_list[16] = {0};
  1242. if (priv->port_up) {
  1243. en_dbg(DRV, priv, "start port called while port already up\n");
  1244. return 0;
  1245. }
  1246. INIT_LIST_HEAD(&priv->mc_list);
  1247. INIT_LIST_HEAD(&priv->curr_list);
  1248. INIT_LIST_HEAD(&priv->ethtool_list);
  1249. memset(&priv->ethtool_rules[0], 0,
  1250. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1251. /* Calculate Rx buf size */
  1252. dev->mtu = min(dev->mtu, priv->max_mtu);
  1253. mlx4_en_calc_rx_buf(dev);
  1254. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1255. /* Configure rx cq's and rings */
  1256. err = mlx4_en_activate_rx_rings(priv);
  1257. if (err) {
  1258. en_err(priv, "Failed to activate RX rings\n");
  1259. return err;
  1260. }
  1261. for (i = 0; i < priv->rx_ring_num; i++) {
  1262. cq = &priv->rx_cq[i];
  1263. mlx4_en_cq_init_lock(cq);
  1264. err = mlx4_en_activate_cq(priv, cq, i);
  1265. if (err) {
  1266. en_err(priv, "Failed activating Rx CQ\n");
  1267. goto cq_err;
  1268. }
  1269. for (j = 0; j < cq->size; j++)
  1270. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1271. err = mlx4_en_set_cq_moder(priv, cq);
  1272. if (err) {
  1273. en_err(priv, "Failed setting cq moderation parameters");
  1274. mlx4_en_deactivate_cq(priv, cq);
  1275. goto cq_err;
  1276. }
  1277. mlx4_en_arm_cq(priv, cq);
  1278. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1279. ++rx_index;
  1280. }
  1281. /* Set qp number */
  1282. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1283. err = mlx4_en_get_qp(priv);
  1284. if (err) {
  1285. en_err(priv, "Failed getting eth qp\n");
  1286. goto cq_err;
  1287. }
  1288. mdev->mac_removed[priv->port] = 0;
  1289. err = mlx4_en_config_rss_steer(priv);
  1290. if (err) {
  1291. en_err(priv, "Failed configuring rss steering\n");
  1292. goto mac_err;
  1293. }
  1294. err = mlx4_en_create_drop_qp(priv);
  1295. if (err)
  1296. goto rss_err;
  1297. /* Configure tx cq's and rings */
  1298. for (i = 0; i < priv->tx_ring_num; i++) {
  1299. /* Configure cq */
  1300. cq = &priv->tx_cq[i];
  1301. err = mlx4_en_activate_cq(priv, cq, i);
  1302. if (err) {
  1303. en_err(priv, "Failed allocating Tx CQ\n");
  1304. goto tx_err;
  1305. }
  1306. err = mlx4_en_set_cq_moder(priv, cq);
  1307. if (err) {
  1308. en_err(priv, "Failed setting cq moderation parameters");
  1309. mlx4_en_deactivate_cq(priv, cq);
  1310. goto tx_err;
  1311. }
  1312. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1313. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1314. /* Configure ring */
  1315. tx_ring = &priv->tx_ring[i];
  1316. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1317. i / priv->num_tx_rings_p_up);
  1318. if (err) {
  1319. en_err(priv, "Failed allocating Tx ring\n");
  1320. mlx4_en_deactivate_cq(priv, cq);
  1321. goto tx_err;
  1322. }
  1323. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1324. /* Arm CQ for TX completions */
  1325. mlx4_en_arm_cq(priv, cq);
  1326. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1327. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1328. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1329. ++tx_index;
  1330. }
  1331. /* Configure port */
  1332. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1333. priv->rx_skb_size + ETH_FCS_LEN,
  1334. priv->prof->tx_pause,
  1335. priv->prof->tx_ppp,
  1336. priv->prof->rx_pause,
  1337. priv->prof->rx_ppp);
  1338. if (err) {
  1339. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1340. priv->port, err);
  1341. goto tx_err;
  1342. }
  1343. /* Set default qp number */
  1344. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1345. if (err) {
  1346. en_err(priv, "Failed setting default qp numbers\n");
  1347. goto tx_err;
  1348. }
  1349. /* Init port */
  1350. en_dbg(HW, priv, "Initializing port\n");
  1351. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1352. if (err) {
  1353. en_err(priv, "Failed Initializing port\n");
  1354. goto tx_err;
  1355. }
  1356. /* Attach rx QP to bradcast address */
  1357. memset(&mc_list[10], 0xff, ETH_ALEN);
  1358. mc_list[5] = priv->port; /* needed for B0 steering support */
  1359. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1360. priv->port, 0, MLX4_PROT_ETH,
  1361. &priv->broadcast_id))
  1362. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1363. /* Must redo promiscuous mode setup. */
  1364. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1365. /* Schedule multicast task to populate multicast list */
  1366. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1367. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1368. priv->port_up = true;
  1369. netif_tx_start_all_queues(dev);
  1370. netif_device_attach(dev);
  1371. return 0;
  1372. tx_err:
  1373. while (tx_index--) {
  1374. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1375. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1376. }
  1377. mlx4_en_destroy_drop_qp(priv);
  1378. rss_err:
  1379. mlx4_en_release_rss_steer(priv);
  1380. mac_err:
  1381. mlx4_en_put_qp(priv);
  1382. cq_err:
  1383. while (rx_index--)
  1384. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1385. for (i = 0; i < priv->rx_ring_num; i++)
  1386. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1387. return err; /* need to close devices */
  1388. }
  1389. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1390. {
  1391. struct mlx4_en_priv *priv = netdev_priv(dev);
  1392. struct mlx4_en_dev *mdev = priv->mdev;
  1393. struct mlx4_en_mc_list *mclist, *tmp;
  1394. struct ethtool_flow_id *flow, *tmp_flow;
  1395. int i;
  1396. u8 mc_list[16] = {0};
  1397. if (!priv->port_up) {
  1398. en_dbg(DRV, priv, "stop port called while port already down\n");
  1399. return;
  1400. }
  1401. /* close port*/
  1402. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1403. /* Synchronize with tx routine */
  1404. netif_tx_lock_bh(dev);
  1405. if (detach)
  1406. netif_device_detach(dev);
  1407. netif_tx_stop_all_queues(dev);
  1408. netif_tx_unlock_bh(dev);
  1409. netif_tx_disable(dev);
  1410. /* Set port as not active */
  1411. priv->port_up = false;
  1412. /* Promsicuous mode */
  1413. if (mdev->dev->caps.steering_mode ==
  1414. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1415. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1416. MLX4_EN_FLAG_MC_PROMISC);
  1417. mlx4_flow_steer_promisc_remove(mdev->dev,
  1418. priv->port,
  1419. MLX4_FS_ALL_DEFAULT);
  1420. mlx4_flow_steer_promisc_remove(mdev->dev,
  1421. priv->port,
  1422. MLX4_FS_MC_DEFAULT);
  1423. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1424. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1425. /* Disable promiscouos mode */
  1426. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1427. priv->port);
  1428. /* Disable Multicast promisc */
  1429. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1430. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1431. priv->port);
  1432. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1433. }
  1434. }
  1435. /* Detach All multicasts */
  1436. memset(&mc_list[10], 0xff, ETH_ALEN);
  1437. mc_list[5] = priv->port; /* needed for B0 steering support */
  1438. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1439. MLX4_PROT_ETH, priv->broadcast_id);
  1440. list_for_each_entry(mclist, &priv->curr_list, list) {
  1441. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1442. mc_list[5] = priv->port;
  1443. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1444. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1445. }
  1446. mlx4_en_clear_list(dev);
  1447. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1448. list_del(&mclist->list);
  1449. kfree(mclist);
  1450. }
  1451. /* Flush multicast filter */
  1452. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1453. /* Remove flow steering rules for the port*/
  1454. if (mdev->dev->caps.steering_mode ==
  1455. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1456. ASSERT_RTNL();
  1457. list_for_each_entry_safe(flow, tmp_flow,
  1458. &priv->ethtool_list, list) {
  1459. mlx4_flow_detach(mdev->dev, flow->id);
  1460. list_del(&flow->list);
  1461. }
  1462. }
  1463. mlx4_en_destroy_drop_qp(priv);
  1464. /* Free TX Rings */
  1465. for (i = 0; i < priv->tx_ring_num; i++) {
  1466. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1467. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1468. }
  1469. msleep(10);
  1470. for (i = 0; i < priv->tx_ring_num; i++)
  1471. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1472. /* Free RSS qps */
  1473. mlx4_en_release_rss_steer(priv);
  1474. /* Unregister Mac address for the port */
  1475. mlx4_en_put_qp(priv);
  1476. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1477. mdev->mac_removed[priv->port] = 1;
  1478. /* Free RX Rings */
  1479. for (i = 0; i < priv->rx_ring_num; i++) {
  1480. struct mlx4_en_cq *cq = &priv->rx_cq[i];
  1481. local_bh_disable();
  1482. while (!mlx4_en_cq_lock_napi(cq)) {
  1483. pr_info("CQ %d locked\n", i);
  1484. mdelay(1);
  1485. }
  1486. local_bh_enable();
  1487. while (test_bit(NAPI_STATE_SCHED, &cq->napi.state))
  1488. msleep(1);
  1489. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1490. mlx4_en_deactivate_cq(priv, cq);
  1491. }
  1492. }
  1493. static void mlx4_en_restart(struct work_struct *work)
  1494. {
  1495. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1496. watchdog_task);
  1497. struct mlx4_en_dev *mdev = priv->mdev;
  1498. struct net_device *dev = priv->dev;
  1499. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1500. mutex_lock(&mdev->state_lock);
  1501. if (priv->port_up) {
  1502. mlx4_en_stop_port(dev, 1);
  1503. if (mlx4_en_start_port(dev))
  1504. en_err(priv, "Failed restarting port %d\n", priv->port);
  1505. }
  1506. mutex_unlock(&mdev->state_lock);
  1507. }
  1508. static void mlx4_en_clear_stats(struct net_device *dev)
  1509. {
  1510. struct mlx4_en_priv *priv = netdev_priv(dev);
  1511. struct mlx4_en_dev *mdev = priv->mdev;
  1512. int i;
  1513. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1514. en_dbg(HW, priv, "Failed dumping statistics\n");
  1515. memset(&priv->stats, 0, sizeof(priv->stats));
  1516. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1517. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1518. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1519. for (i = 0; i < priv->tx_ring_num; i++) {
  1520. priv->tx_ring[i].bytes = 0;
  1521. priv->tx_ring[i].packets = 0;
  1522. priv->tx_ring[i].tx_csum = 0;
  1523. }
  1524. for (i = 0; i < priv->rx_ring_num; i++) {
  1525. priv->rx_ring[i].bytes = 0;
  1526. priv->rx_ring[i].packets = 0;
  1527. priv->rx_ring[i].csum_ok = 0;
  1528. priv->rx_ring[i].csum_none = 0;
  1529. }
  1530. }
  1531. static int mlx4_en_open(struct net_device *dev)
  1532. {
  1533. struct mlx4_en_priv *priv = netdev_priv(dev);
  1534. struct mlx4_en_dev *mdev = priv->mdev;
  1535. int err = 0;
  1536. mutex_lock(&mdev->state_lock);
  1537. if (!mdev->device_up) {
  1538. en_err(priv, "Cannot open - device down/disabled\n");
  1539. err = -EBUSY;
  1540. goto out;
  1541. }
  1542. /* Reset HW statistics and SW counters */
  1543. mlx4_en_clear_stats(dev);
  1544. err = mlx4_en_start_port(dev);
  1545. if (err)
  1546. en_err(priv, "Failed starting port:%d\n", priv->port);
  1547. out:
  1548. mutex_unlock(&mdev->state_lock);
  1549. return err;
  1550. }
  1551. static int mlx4_en_close(struct net_device *dev)
  1552. {
  1553. struct mlx4_en_priv *priv = netdev_priv(dev);
  1554. struct mlx4_en_dev *mdev = priv->mdev;
  1555. en_dbg(IFDOWN, priv, "Close port called\n");
  1556. mutex_lock(&mdev->state_lock);
  1557. mlx4_en_stop_port(dev, 0);
  1558. netif_carrier_off(dev);
  1559. mutex_unlock(&mdev->state_lock);
  1560. return 0;
  1561. }
  1562. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1563. {
  1564. int i;
  1565. #ifdef CONFIG_RFS_ACCEL
  1566. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1567. priv->dev->rx_cpu_rmap = NULL;
  1568. #endif
  1569. for (i = 0; i < priv->tx_ring_num; i++) {
  1570. if (priv->tx_ring[i].tx_info)
  1571. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1572. if (priv->tx_cq[i].buf)
  1573. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1574. }
  1575. for (i = 0; i < priv->rx_ring_num; i++) {
  1576. if (priv->rx_ring[i].rx_info)
  1577. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1578. priv->prof->rx_ring_size, priv->stride);
  1579. if (priv->rx_cq[i].buf)
  1580. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1581. }
  1582. if (priv->base_tx_qpn) {
  1583. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1584. priv->base_tx_qpn = 0;
  1585. }
  1586. }
  1587. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1588. {
  1589. struct mlx4_en_port_profile *prof = priv->prof;
  1590. int i;
  1591. int err;
  1592. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1593. if (err) {
  1594. en_err(priv, "failed reserving range for TX rings\n");
  1595. return err;
  1596. }
  1597. /* Create tx Rings */
  1598. for (i = 0; i < priv->tx_ring_num; i++) {
  1599. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1600. prof->tx_ring_size, i, TX))
  1601. goto err;
  1602. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1603. prof->tx_ring_size, TXBB_SIZE))
  1604. goto err;
  1605. }
  1606. /* Create rx Rings */
  1607. for (i = 0; i < priv->rx_ring_num; i++) {
  1608. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1609. prof->rx_ring_size, i, RX))
  1610. goto err;
  1611. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1612. prof->rx_ring_size, priv->stride))
  1613. goto err;
  1614. }
  1615. #ifdef CONFIG_RFS_ACCEL
  1616. if (priv->mdev->dev->caps.comp_pool) {
  1617. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1618. if (!priv->dev->rx_cpu_rmap)
  1619. goto err;
  1620. }
  1621. #endif
  1622. return 0;
  1623. err:
  1624. en_err(priv, "Failed to allocate NIC resources\n");
  1625. return -ENOMEM;
  1626. }
  1627. void mlx4_en_destroy_netdev(struct net_device *dev)
  1628. {
  1629. struct mlx4_en_priv *priv = netdev_priv(dev);
  1630. struct mlx4_en_dev *mdev = priv->mdev;
  1631. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1632. /* Unregister device - this will close the port if it was up */
  1633. if (priv->registered)
  1634. unregister_netdev(dev);
  1635. if (priv->allocated)
  1636. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1637. cancel_delayed_work(&priv->stats_task);
  1638. cancel_delayed_work(&priv->service_task);
  1639. /* flush any pending task for this netdev */
  1640. flush_workqueue(mdev->workqueue);
  1641. /* Detach the netdev so tasks would not attempt to access it */
  1642. mutex_lock(&mdev->state_lock);
  1643. mdev->pndev[priv->port] = NULL;
  1644. mutex_unlock(&mdev->state_lock);
  1645. mlx4_en_free_resources(priv);
  1646. kfree(priv->tx_ring);
  1647. kfree(priv->tx_cq);
  1648. free_netdev(dev);
  1649. }
  1650. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1651. {
  1652. struct mlx4_en_priv *priv = netdev_priv(dev);
  1653. struct mlx4_en_dev *mdev = priv->mdev;
  1654. int err = 0;
  1655. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1656. dev->mtu, new_mtu);
  1657. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1658. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1659. return -EPERM;
  1660. }
  1661. dev->mtu = new_mtu;
  1662. if (netif_running(dev)) {
  1663. mutex_lock(&mdev->state_lock);
  1664. if (!mdev->device_up) {
  1665. /* NIC is probably restarting - let watchdog task reset
  1666. * the port */
  1667. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1668. } else {
  1669. mlx4_en_stop_port(dev, 1);
  1670. err = mlx4_en_start_port(dev);
  1671. if (err) {
  1672. en_err(priv, "Failed restarting port:%d\n",
  1673. priv->port);
  1674. queue_work(mdev->workqueue, &priv->watchdog_task);
  1675. }
  1676. }
  1677. mutex_unlock(&mdev->state_lock);
  1678. }
  1679. return 0;
  1680. }
  1681. static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
  1682. {
  1683. struct mlx4_en_priv *priv = netdev_priv(dev);
  1684. struct mlx4_en_dev *mdev = priv->mdev;
  1685. struct hwtstamp_config config;
  1686. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1687. return -EFAULT;
  1688. /* reserved for future extensions */
  1689. if (config.flags)
  1690. return -EINVAL;
  1691. /* device doesn't support time stamping */
  1692. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1693. return -EINVAL;
  1694. /* TX HW timestamp */
  1695. switch (config.tx_type) {
  1696. case HWTSTAMP_TX_OFF:
  1697. case HWTSTAMP_TX_ON:
  1698. break;
  1699. default:
  1700. return -ERANGE;
  1701. }
  1702. /* RX HW timestamp */
  1703. switch (config.rx_filter) {
  1704. case HWTSTAMP_FILTER_NONE:
  1705. break;
  1706. case HWTSTAMP_FILTER_ALL:
  1707. case HWTSTAMP_FILTER_SOME:
  1708. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1709. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1710. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1711. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1712. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1713. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1714. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1715. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1716. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1717. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1718. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1719. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1720. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1721. break;
  1722. default:
  1723. return -ERANGE;
  1724. }
  1725. if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
  1726. config.tx_type = HWTSTAMP_TX_OFF;
  1727. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1728. }
  1729. return copy_to_user(ifr->ifr_data, &config,
  1730. sizeof(config)) ? -EFAULT : 0;
  1731. }
  1732. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1733. {
  1734. switch (cmd) {
  1735. case SIOCSHWTSTAMP:
  1736. return mlx4_en_hwtstamp_ioctl(dev, ifr);
  1737. default:
  1738. return -EOPNOTSUPP;
  1739. }
  1740. }
  1741. static int mlx4_en_set_features(struct net_device *netdev,
  1742. netdev_features_t features)
  1743. {
  1744. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1745. if (features & NETIF_F_LOOPBACK)
  1746. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1747. else
  1748. priv->ctrl_flags &=
  1749. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1750. mlx4_en_update_loopback_state(netdev, features);
  1751. return 0;
  1752. }
  1753. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1754. {
  1755. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1756. struct mlx4_en_dev *mdev = en_priv->mdev;
  1757. u64 mac_u64 = mlx4_en_mac_to_u64(mac);
  1758. if (!is_valid_ether_addr(mac))
  1759. return -EINVAL;
  1760. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1761. }
  1762. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1763. {
  1764. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1765. struct mlx4_en_dev *mdev = en_priv->mdev;
  1766. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1767. }
  1768. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1769. {
  1770. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1771. struct mlx4_en_dev *mdev = en_priv->mdev;
  1772. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1773. }
  1774. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1775. {
  1776. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1777. struct mlx4_en_dev *mdev = en_priv->mdev;
  1778. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1779. }
  1780. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1781. {
  1782. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1783. struct mlx4_en_dev *mdev = en_priv->mdev;
  1784. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1785. }
  1786. static const struct net_device_ops mlx4_netdev_ops = {
  1787. .ndo_open = mlx4_en_open,
  1788. .ndo_stop = mlx4_en_close,
  1789. .ndo_start_xmit = mlx4_en_xmit,
  1790. .ndo_select_queue = mlx4_en_select_queue,
  1791. .ndo_get_stats = mlx4_en_get_stats,
  1792. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1793. .ndo_set_mac_address = mlx4_en_set_mac,
  1794. .ndo_validate_addr = eth_validate_addr,
  1795. .ndo_change_mtu = mlx4_en_change_mtu,
  1796. .ndo_do_ioctl = mlx4_en_ioctl,
  1797. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1798. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1799. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1800. #ifdef CONFIG_NET_POLL_CONTROLLER
  1801. .ndo_poll_controller = mlx4_en_netpoll,
  1802. #endif
  1803. .ndo_set_features = mlx4_en_set_features,
  1804. .ndo_setup_tc = mlx4_en_setup_tc,
  1805. #ifdef CONFIG_RFS_ACCEL
  1806. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1807. #endif
  1808. #ifdef CONFIG_NET_LL_RX_POLL
  1809. .ndo_ll_poll = mlx4_en_low_latency_recv,
  1810. #endif
  1811. };
  1812. static const struct net_device_ops mlx4_netdev_ops_master = {
  1813. .ndo_open = mlx4_en_open,
  1814. .ndo_stop = mlx4_en_close,
  1815. .ndo_start_xmit = mlx4_en_xmit,
  1816. .ndo_select_queue = mlx4_en_select_queue,
  1817. .ndo_get_stats = mlx4_en_get_stats,
  1818. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1819. .ndo_set_mac_address = mlx4_en_set_mac,
  1820. .ndo_validate_addr = eth_validate_addr,
  1821. .ndo_change_mtu = mlx4_en_change_mtu,
  1822. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1823. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1824. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1825. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  1826. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  1827. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  1828. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  1829. .ndo_get_vf_config = mlx4_en_get_vf_config,
  1830. #ifdef CONFIG_NET_POLL_CONTROLLER
  1831. .ndo_poll_controller = mlx4_en_netpoll,
  1832. #endif
  1833. .ndo_set_features = mlx4_en_set_features,
  1834. .ndo_setup_tc = mlx4_en_setup_tc,
  1835. #ifdef CONFIG_RFS_ACCEL
  1836. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1837. #endif
  1838. };
  1839. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1840. struct mlx4_en_port_profile *prof)
  1841. {
  1842. struct net_device *dev;
  1843. struct mlx4_en_priv *priv;
  1844. int i;
  1845. int err;
  1846. u64 mac_u64;
  1847. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1848. MAX_TX_RINGS, MAX_RX_RINGS);
  1849. if (dev == NULL)
  1850. return -ENOMEM;
  1851. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1852. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1853. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1854. dev->dev_id = port - 1;
  1855. /*
  1856. * Initialize driver private data
  1857. */
  1858. priv = netdev_priv(dev);
  1859. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1860. priv->dev = dev;
  1861. priv->mdev = mdev;
  1862. priv->ddev = &mdev->pdev->dev;
  1863. priv->prof = prof;
  1864. priv->port = port;
  1865. priv->port_up = false;
  1866. priv->flags = prof->flags;
  1867. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1868. MLX4_WQE_CTRL_SOLICITED);
  1869. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1870. priv->tx_ring_num = prof->tx_ring_num;
  1871. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1872. GFP_KERNEL);
  1873. if (!priv->tx_ring) {
  1874. err = -ENOMEM;
  1875. goto out;
  1876. }
  1877. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
  1878. GFP_KERNEL);
  1879. if (!priv->tx_cq) {
  1880. err = -ENOMEM;
  1881. goto out;
  1882. }
  1883. priv->rx_ring_num = prof->rx_ring_num;
  1884. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1885. priv->mac_index = -1;
  1886. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1887. spin_lock_init(&priv->stats_lock);
  1888. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1889. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1890. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1891. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1892. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  1893. #ifdef CONFIG_MLX4_EN_DCB
  1894. if (!mlx4_is_slave(priv->mdev->dev)) {
  1895. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  1896. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1897. } else {
  1898. en_info(priv, "enabling only PFC DCB ops\n");
  1899. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  1900. }
  1901. }
  1902. #endif
  1903. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  1904. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  1905. /* Query for default mac and max mtu */
  1906. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1907. /* Set default MAC */
  1908. dev->addr_len = ETH_ALEN;
  1909. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1910. if (!is_valid_ether_addr(dev->dev_addr)) {
  1911. if (mlx4_is_slave(priv->mdev->dev)) {
  1912. eth_hw_addr_random(dev);
  1913. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  1914. mac_u64 = mlx4_en_mac_to_u64(dev->dev_addr);
  1915. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  1916. } else {
  1917. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1918. priv->port, dev->dev_addr);
  1919. err = -EINVAL;
  1920. goto out;
  1921. }
  1922. }
  1923. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1924. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1925. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1926. err = mlx4_en_alloc_resources(priv);
  1927. if (err)
  1928. goto out;
  1929. #ifdef CONFIG_RFS_ACCEL
  1930. INIT_LIST_HEAD(&priv->filters);
  1931. spin_lock_init(&priv->filters_lock);
  1932. #endif
  1933. /* Initialize time stamping config */
  1934. priv->hwtstamp_config.flags = 0;
  1935. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  1936. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  1937. /* Allocate page for receive rings */
  1938. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1939. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1940. if (err) {
  1941. en_err(priv, "Failed to allocate page for rx qps\n");
  1942. goto out;
  1943. }
  1944. priv->allocated = 1;
  1945. /*
  1946. * Initialize netdev entry points
  1947. */
  1948. if (mlx4_is_master(priv->mdev->dev))
  1949. dev->netdev_ops = &mlx4_netdev_ops_master;
  1950. else
  1951. dev->netdev_ops = &mlx4_netdev_ops;
  1952. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1953. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1954. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1955. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1956. /*
  1957. * Set driver features
  1958. */
  1959. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1960. if (mdev->LSO_support)
  1961. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1962. dev->vlan_features = dev->hw_features;
  1963. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1964. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1965. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  1966. NETIF_F_HW_VLAN_CTAG_FILTER;
  1967. dev->hw_features |= NETIF_F_LOOPBACK;
  1968. if (mdev->dev->caps.steering_mode ==
  1969. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1970. dev->hw_features |= NETIF_F_NTUPLE;
  1971. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1972. dev->priv_flags |= IFF_UNICAST_FLT;
  1973. mdev->pndev[port] = dev;
  1974. netif_carrier_off(dev);
  1975. mlx4_en_set_default_moderation(priv);
  1976. err = register_netdev(dev);
  1977. if (err) {
  1978. en_err(priv, "Netdev registration failed for port %d\n", port);
  1979. goto out;
  1980. }
  1981. priv->registered = 1;
  1982. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1983. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1984. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1985. /* Configure port */
  1986. mlx4_en_calc_rx_buf(dev);
  1987. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1988. priv->rx_skb_size + ETH_FCS_LEN,
  1989. prof->tx_pause, prof->tx_ppp,
  1990. prof->rx_pause, prof->rx_ppp);
  1991. if (err) {
  1992. en_err(priv, "Failed setting port general configurations "
  1993. "for port %d, with error %d\n", priv->port, err);
  1994. goto out;
  1995. }
  1996. /* Init port */
  1997. en_warn(priv, "Initializing port\n");
  1998. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1999. if (err) {
  2000. en_err(priv, "Failed Initializing port\n");
  2001. goto out;
  2002. }
  2003. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2004. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2005. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2006. SERVICE_TASK_DELAY);
  2007. return 0;
  2008. out:
  2009. mlx4_en_destroy_netdev(dev);
  2010. return err;
  2011. }