cx88-dvb.c 46 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. #include "stv0900.h"
  54. #include "stb6100.h"
  55. #include "stb6100_proc.h"
  56. #include "mb86a16.h"
  57. #include "ds3000.h"
  58. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  59. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  60. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  61. MODULE_LICENSE("GPL");
  62. static unsigned int debug;
  63. module_param(debug, int, 0644);
  64. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  65. static unsigned int dvb_buf_tscnt = 32;
  66. module_param(dvb_buf_tscnt, int, 0644);
  67. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  68. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  69. #define dprintk(level,fmt, arg...) if (debug >= level) \
  70. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  71. /* ------------------------------------------------------------------ */
  72. static int dvb_buf_setup(struct videobuf_queue *q,
  73. unsigned int *count, unsigned int *size)
  74. {
  75. struct cx8802_dev *dev = q->priv_data;
  76. dev->ts_packet_size = 188 * 4;
  77. dev->ts_packet_count = dvb_buf_tscnt;
  78. *size = dev->ts_packet_size * dev->ts_packet_count;
  79. *count = dvb_buf_tscnt;
  80. return 0;
  81. }
  82. static int dvb_buf_prepare(struct videobuf_queue *q,
  83. struct videobuf_buffer *vb, enum v4l2_field field)
  84. {
  85. struct cx8802_dev *dev = q->priv_data;
  86. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  87. }
  88. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  89. {
  90. struct cx8802_dev *dev = q->priv_data;
  91. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  92. }
  93. static void dvb_buf_release(struct videobuf_queue *q,
  94. struct videobuf_buffer *vb)
  95. {
  96. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  97. }
  98. static const struct videobuf_queue_ops dvb_qops = {
  99. .buf_setup = dvb_buf_setup,
  100. .buf_prepare = dvb_buf_prepare,
  101. .buf_queue = dvb_buf_queue,
  102. .buf_release = dvb_buf_release,
  103. };
  104. /* ------------------------------------------------------------------ */
  105. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  106. {
  107. struct cx8802_dev *dev= fe->dvb->priv;
  108. struct cx8802_driver *drv = NULL;
  109. int ret = 0;
  110. int fe_id;
  111. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  112. if (!fe_id) {
  113. printk(KERN_ERR "%s() No frontend found\n", __func__);
  114. return -EINVAL;
  115. }
  116. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  117. if (drv) {
  118. if (acquire){
  119. dev->frontends.active_fe_id = fe_id;
  120. ret = drv->request_acquire(drv);
  121. } else {
  122. ret = drv->request_release(drv);
  123. dev->frontends.active_fe_id = 0;
  124. }
  125. }
  126. return ret;
  127. }
  128. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  129. {
  130. struct videobuf_dvb_frontends *f;
  131. struct videobuf_dvb_frontend *fe;
  132. if (!core->dvbdev)
  133. return;
  134. f = &core->dvbdev->frontends;
  135. if (!f)
  136. return;
  137. if (f->gate <= 1) /* undefined or fe0 */
  138. fe = videobuf_dvb_get_frontend(f, 1);
  139. else
  140. fe = videobuf_dvb_get_frontend(f, f->gate);
  141. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  142. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  143. }
  144. /* ------------------------------------------------------------------ */
  145. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  146. {
  147. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  148. static const u8 reset [] = { RESET, 0x80 };
  149. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  150. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  151. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  152. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  153. mt352_write(fe, clock_config, sizeof(clock_config));
  154. udelay(200);
  155. mt352_write(fe, reset, sizeof(reset));
  156. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  157. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  158. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  159. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  160. return 0;
  161. }
  162. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  163. {
  164. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  165. static const u8 reset [] = { RESET, 0x80 };
  166. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  167. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  168. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  169. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  170. mt352_write(fe, clock_config, sizeof(clock_config));
  171. udelay(200);
  172. mt352_write(fe, reset, sizeof(reset));
  173. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  174. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  175. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  176. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  177. return 0;
  178. }
  179. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  180. {
  181. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  182. static const u8 reset [] = { 0x50, 0x80 };
  183. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  184. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  185. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  186. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  187. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  188. mt352_write(fe, clock_config, sizeof(clock_config));
  189. udelay(2000);
  190. mt352_write(fe, reset, sizeof(reset));
  191. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  192. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  193. udelay(2000);
  194. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  195. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  196. return 0;
  197. }
  198. static const struct mt352_config dvico_fusionhdtv = {
  199. .demod_address = 0x0f,
  200. .demod_init = dvico_fusionhdtv_demod_init,
  201. };
  202. static const struct mt352_config dntv_live_dvbt_config = {
  203. .demod_address = 0x0f,
  204. .demod_init = dntv_live_dvbt_demod_init,
  205. };
  206. static const struct mt352_config dvico_fusionhdtv_dual = {
  207. .demod_address = 0x0f,
  208. .demod_init = dvico_dual_demod_init,
  209. };
  210. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  211. .demod_address = (0x1e >> 1),
  212. .no_tuner = 1,
  213. .if2 = 45600,
  214. };
  215. static struct mb86a16_config twinhan_vp1027 = {
  216. .demod_address = 0x08,
  217. };
  218. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  219. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  220. {
  221. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  222. static const u8 reset [] = { 0x50, 0x80 };
  223. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  224. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  225. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  226. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  227. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  228. mt352_write(fe, clock_config, sizeof(clock_config));
  229. udelay(2000);
  230. mt352_write(fe, reset, sizeof(reset));
  231. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  232. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  233. udelay(2000);
  234. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  235. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  236. return 0;
  237. }
  238. static const struct mt352_config dntv_live_dvbt_pro_config = {
  239. .demod_address = 0x0f,
  240. .no_tuner = 1,
  241. .demod_init = dntv_live_dvbt_pro_demod_init,
  242. };
  243. #endif
  244. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  245. .demod_address = 0x0f,
  246. .no_tuner = 1,
  247. };
  248. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  249. .demod_address = 0x0f,
  250. .if2 = 45600,
  251. .no_tuner = 1,
  252. };
  253. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  254. .demod_address = 0x0f,
  255. .if2 = 4560,
  256. .no_tuner = 1,
  257. .demod_init = dvico_fusionhdtv_demod_init,
  258. };
  259. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  260. .demod_address = 0x0f,
  261. };
  262. static const struct cx22702_config connexant_refboard_config = {
  263. .demod_address = 0x43,
  264. .output_mode = CX22702_SERIAL_OUTPUT,
  265. };
  266. static const struct cx22702_config hauppauge_hvr_config = {
  267. .demod_address = 0x63,
  268. .output_mode = CX22702_SERIAL_OUTPUT,
  269. };
  270. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  271. {
  272. struct cx8802_dev *dev= fe->dvb->priv;
  273. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  274. return 0;
  275. }
  276. static const struct or51132_config pchdtv_hd3000 = {
  277. .demod_address = 0x15,
  278. .set_ts_params = or51132_set_ts_param,
  279. };
  280. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  281. {
  282. struct cx8802_dev *dev= fe->dvb->priv;
  283. struct cx88_core *core = dev->core;
  284. dprintk(1, "%s: index = %d\n", __func__, index);
  285. if (index == 0)
  286. cx_clear(MO_GP0_IO, 8);
  287. else
  288. cx_set(MO_GP0_IO, 8);
  289. return 0;
  290. }
  291. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  292. {
  293. struct cx8802_dev *dev= fe->dvb->priv;
  294. if (is_punctured)
  295. dev->ts_gen_cntrl |= 0x04;
  296. else
  297. dev->ts_gen_cntrl &= ~0x04;
  298. return 0;
  299. }
  300. static struct lgdt330x_config fusionhdtv_3_gold = {
  301. .demod_address = 0x0e,
  302. .demod_chip = LGDT3302,
  303. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  304. .set_ts_params = lgdt330x_set_ts_param,
  305. };
  306. static const struct lgdt330x_config fusionhdtv_5_gold = {
  307. .demod_address = 0x0e,
  308. .demod_chip = LGDT3303,
  309. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  310. .set_ts_params = lgdt330x_set_ts_param,
  311. };
  312. static const struct lgdt330x_config pchdtv_hd5500 = {
  313. .demod_address = 0x59,
  314. .demod_chip = LGDT3303,
  315. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  316. .set_ts_params = lgdt330x_set_ts_param,
  317. };
  318. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  319. {
  320. struct cx8802_dev *dev= fe->dvb->priv;
  321. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  322. return 0;
  323. }
  324. static const struct nxt200x_config ati_hdtvwonder = {
  325. .demod_address = 0x0a,
  326. .set_ts_params = nxt200x_set_ts_param,
  327. };
  328. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  329. int is_punctured)
  330. {
  331. struct cx8802_dev *dev= fe->dvb->priv;
  332. dev->ts_gen_cntrl = 0x02;
  333. return 0;
  334. }
  335. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  336. fe_sec_voltage_t voltage)
  337. {
  338. struct cx8802_dev *dev= fe->dvb->priv;
  339. struct cx88_core *core = dev->core;
  340. if (voltage == SEC_VOLTAGE_OFF)
  341. cx_write(MO_GP0_IO, 0x000006fb);
  342. else
  343. cx_write(MO_GP0_IO, 0x000006f9);
  344. if (core->prev_set_voltage)
  345. return core->prev_set_voltage(fe, voltage);
  346. return 0;
  347. }
  348. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  349. fe_sec_voltage_t voltage)
  350. {
  351. struct cx8802_dev *dev= fe->dvb->priv;
  352. struct cx88_core *core = dev->core;
  353. if (voltage == SEC_VOLTAGE_OFF) {
  354. dprintk(1,"LNB Voltage OFF\n");
  355. cx_write(MO_GP0_IO, 0x0000efff);
  356. }
  357. if (core->prev_set_voltage)
  358. return core->prev_set_voltage(fe, voltage);
  359. return 0;
  360. }
  361. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  362. fe_sec_voltage_t voltage)
  363. {
  364. struct cx8802_dev *dev= fe->dvb->priv;
  365. struct cx88_core *core = dev->core;
  366. cx_set(MO_GP0_IO, 0x6040);
  367. switch (voltage) {
  368. case SEC_VOLTAGE_13:
  369. cx_clear(MO_GP0_IO, 0x20);
  370. break;
  371. case SEC_VOLTAGE_18:
  372. cx_set(MO_GP0_IO, 0x20);
  373. break;
  374. case SEC_VOLTAGE_OFF:
  375. cx_clear(MO_GP0_IO, 0x20);
  376. break;
  377. }
  378. if (core->prev_set_voltage)
  379. return core->prev_set_voltage(fe, voltage);
  380. return 0;
  381. }
  382. static int vp1027_set_voltage(struct dvb_frontend *fe,
  383. fe_sec_voltage_t voltage)
  384. {
  385. struct cx8802_dev *dev = fe->dvb->priv;
  386. struct cx88_core *core = dev->core;
  387. switch (voltage) {
  388. case SEC_VOLTAGE_13:
  389. dprintk(1, "LNB SEC Voltage=13\n");
  390. cx_write(MO_GP0_IO, 0x00001220);
  391. break;
  392. case SEC_VOLTAGE_18:
  393. dprintk(1, "LNB SEC Voltage=18\n");
  394. cx_write(MO_GP0_IO, 0x00001222);
  395. break;
  396. case SEC_VOLTAGE_OFF:
  397. dprintk(1, "LNB Voltage OFF\n");
  398. cx_write(MO_GP0_IO, 0x00001230);
  399. break;
  400. }
  401. if (core->prev_set_voltage)
  402. return core->prev_set_voltage(fe, voltage);
  403. return 0;
  404. }
  405. static const struct cx24123_config geniatech_dvbs_config = {
  406. .demod_address = 0x55,
  407. .set_ts_params = cx24123_set_ts_param,
  408. };
  409. static const struct cx24123_config hauppauge_novas_config = {
  410. .demod_address = 0x55,
  411. .set_ts_params = cx24123_set_ts_param,
  412. };
  413. static const struct cx24123_config kworld_dvbs_100_config = {
  414. .demod_address = 0x15,
  415. .set_ts_params = cx24123_set_ts_param,
  416. .lnb_polarity = 1,
  417. };
  418. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  419. .demod_address = 0x32 >> 1,
  420. .output_mode = S5H1409_PARALLEL_OUTPUT,
  421. .gpio = S5H1409_GPIO_ON,
  422. .qam_if = 44000,
  423. .inversion = S5H1409_INVERSION_OFF,
  424. .status_mode = S5H1409_DEMODLOCKING,
  425. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  426. };
  427. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  428. .demod_address = 0x32 >> 1,
  429. .output_mode = S5H1409_SERIAL_OUTPUT,
  430. .gpio = S5H1409_GPIO_OFF,
  431. .inversion = S5H1409_INVERSION_OFF,
  432. .status_mode = S5H1409_DEMODLOCKING,
  433. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  434. };
  435. static const struct s5h1409_config kworld_atsc_120_config = {
  436. .demod_address = 0x32 >> 1,
  437. .output_mode = S5H1409_SERIAL_OUTPUT,
  438. .gpio = S5H1409_GPIO_OFF,
  439. .inversion = S5H1409_INVERSION_OFF,
  440. .status_mode = S5H1409_DEMODLOCKING,
  441. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  442. };
  443. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  444. .i2c_address = 0x64,
  445. .if_khz = 5380,
  446. };
  447. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  448. .demod_address = (0x1e >> 1),
  449. .no_tuner = 1,
  450. .if2 = 45600,
  451. };
  452. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  453. .demod_address = (0x1e >> 1),
  454. .no_tuner = 1,
  455. .disable_i2c_gate_ctrl = 1,
  456. };
  457. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  458. .output_mode = S5H1411_SERIAL_OUTPUT,
  459. .gpio = S5H1411_GPIO_ON,
  460. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  461. .qam_if = S5H1411_IF_44000,
  462. .vsb_if = S5H1411_IF_44000,
  463. .inversion = S5H1411_INVERSION_OFF,
  464. .status_mode = S5H1411_DEMODLOCKING
  465. };
  466. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  467. .i2c_address = 0xc2 >> 1,
  468. .if_khz = 5380,
  469. };
  470. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  471. {
  472. struct dvb_frontend *fe;
  473. struct videobuf_dvb_frontend *fe0 = NULL;
  474. struct xc2028_ctrl ctl;
  475. struct xc2028_config cfg = {
  476. .i2c_adap = &dev->core->i2c_adap,
  477. .i2c_addr = addr,
  478. .ctrl = &ctl,
  479. };
  480. /* Get the first frontend */
  481. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  482. if (!fe0)
  483. return -EINVAL;
  484. if (!fe0->dvb.frontend) {
  485. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  486. "Can't attach xc3028\n",
  487. dev->core->name);
  488. return -EINVAL;
  489. }
  490. /*
  491. * Some xc3028 devices may be hidden by an I2C gate. This is known
  492. * to happen with some s5h1409-based devices.
  493. * Now that I2C gate is open, sets up xc3028 configuration
  494. */
  495. cx88_setup_xc3028(dev->core, &ctl);
  496. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  497. if (!fe) {
  498. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  499. dev->core->name);
  500. dvb_frontend_detach(fe0->dvb.frontend);
  501. dvb_unregister_frontend(fe0->dvb.frontend);
  502. fe0->dvb.frontend = NULL;
  503. return -EINVAL;
  504. }
  505. printk(KERN_INFO "%s/2: xc3028 attached\n",
  506. dev->core->name);
  507. return 0;
  508. }
  509. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  510. int is_punctured)
  511. {
  512. struct cx8802_dev *dev = fe->dvb->priv;
  513. dev->ts_gen_cntrl = 0x2;
  514. return 0;
  515. }
  516. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  517. int is_punctured)
  518. {
  519. struct cx8802_dev *dev = fe->dvb->priv;
  520. dev->ts_gen_cntrl = 0;
  521. return 0;
  522. }
  523. static int cx24116_reset_device(struct dvb_frontend *fe)
  524. {
  525. struct cx8802_dev *dev = fe->dvb->priv;
  526. struct cx88_core *core = dev->core;
  527. /* Reset the part */
  528. /* Put the cx24116 into reset */
  529. cx_write(MO_SRST_IO, 0);
  530. msleep(10);
  531. /* Take the cx24116 out of reset */
  532. cx_write(MO_SRST_IO, 1);
  533. msleep(10);
  534. return 0;
  535. }
  536. static const struct cx24116_config hauppauge_hvr4000_config = {
  537. .demod_address = 0x05,
  538. .set_ts_params = cx24116_set_ts_param,
  539. .reset_device = cx24116_reset_device,
  540. };
  541. static const struct cx24116_config tevii_s460_config = {
  542. .demod_address = 0x55,
  543. .set_ts_params = cx24116_set_ts_param,
  544. .reset_device = cx24116_reset_device,
  545. };
  546. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  547. int is_punctured)
  548. {
  549. struct cx8802_dev *dev = fe->dvb->priv;
  550. dev->ts_gen_cntrl = 4;
  551. return 0;
  552. }
  553. static struct ds3000_config tevii_ds3000_config = {
  554. .demod_address = 0x68,
  555. .set_ts_params = ds3000_set_ts_param,
  556. };
  557. static const struct stv0900_config prof_7301_stv0900_config = {
  558. .demod_address = 0x6a,
  559. /* demod_mode = 0,*/
  560. .xtal = 27000000,
  561. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  562. .diseqc_mode = 2,/* 2/3 PWM */
  563. .tun1_maddress = 0,/* 0x60 */
  564. .tun1_adc = 0,/* 2 Vpp */
  565. .path1_mode = 3,
  566. .set_ts_params = stv0900_set_ts_param,
  567. };
  568. static const struct stb6100_config prof_7301_stb6100_config = {
  569. .tuner_address = 0x60,
  570. .refclock = 27000000,
  571. };
  572. static const struct stv0299_config tevii_tuner_sharp_config = {
  573. .demod_address = 0x68,
  574. .inittab = sharp_z0194a_inittab,
  575. .mclk = 88000000UL,
  576. .invert = 1,
  577. .skip_reinit = 0,
  578. .lock_output = 1,
  579. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  580. .min_delay_ms = 100,
  581. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  582. .set_ts_params = cx24116_set_ts_param,
  583. };
  584. static const struct stv0288_config tevii_tuner_earda_config = {
  585. .demod_address = 0x68,
  586. .min_delay_ms = 100,
  587. .set_ts_params = cx24116_set_ts_param,
  588. };
  589. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  590. {
  591. struct cx88_core *core = dev->core;
  592. struct videobuf_dvb_frontend *fe = NULL;
  593. int i;
  594. mutex_init(&dev->frontends.lock);
  595. INIT_LIST_HEAD(&dev->frontends.felist);
  596. if (!core->board.num_frontends)
  597. return -ENODEV;
  598. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  599. core->board.num_frontends);
  600. for (i = 1; i <= core->board.num_frontends; i++) {
  601. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  602. if (!fe) {
  603. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  604. videobuf_dvb_dealloc_frontends(&dev->frontends);
  605. return -ENOMEM;
  606. }
  607. }
  608. return 0;
  609. }
  610. static const u8 samsung_smt_7020_inittab[] = {
  611. 0x01, 0x15,
  612. 0x02, 0x00,
  613. 0x03, 0x00,
  614. 0x04, 0x7D,
  615. 0x05, 0x0F,
  616. 0x06, 0x02,
  617. 0x07, 0x00,
  618. 0x08, 0x60,
  619. 0x0A, 0xC2,
  620. 0x0B, 0x00,
  621. 0x0C, 0x01,
  622. 0x0D, 0x81,
  623. 0x0E, 0x44,
  624. 0x0F, 0x09,
  625. 0x10, 0x3C,
  626. 0x11, 0x84,
  627. 0x12, 0xDA,
  628. 0x13, 0x99,
  629. 0x14, 0x8D,
  630. 0x15, 0xCE,
  631. 0x16, 0xE8,
  632. 0x17, 0x43,
  633. 0x18, 0x1C,
  634. 0x19, 0x1B,
  635. 0x1A, 0x1D,
  636. 0x1C, 0x12,
  637. 0x1D, 0x00,
  638. 0x1E, 0x00,
  639. 0x1F, 0x00,
  640. 0x20, 0x00,
  641. 0x21, 0x00,
  642. 0x22, 0x00,
  643. 0x23, 0x00,
  644. 0x28, 0x02,
  645. 0x29, 0x28,
  646. 0x2A, 0x14,
  647. 0x2B, 0x0F,
  648. 0x2C, 0x09,
  649. 0x2D, 0x05,
  650. 0x31, 0x1F,
  651. 0x32, 0x19,
  652. 0x33, 0xFC,
  653. 0x34, 0x13,
  654. 0xff, 0xff,
  655. };
  656. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
  657. struct dvb_frontend_parameters *params)
  658. {
  659. struct cx8802_dev *dev = fe->dvb->priv;
  660. u8 buf[4];
  661. u32 div;
  662. struct i2c_msg msg = {
  663. .addr = 0x61,
  664. .flags = 0,
  665. .buf = buf,
  666. .len = sizeof(buf) };
  667. div = params->frequency / 125;
  668. buf[0] = (div >> 8) & 0x7f;
  669. buf[1] = div & 0xff;
  670. buf[2] = 0x84; /* 0xC4 */
  671. buf[3] = 0x00;
  672. if (params->frequency < 1500000)
  673. buf[3] |= 0x10;
  674. if (fe->ops.i2c_gate_ctrl)
  675. fe->ops.i2c_gate_ctrl(fe, 1);
  676. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  677. return -EIO;
  678. return 0;
  679. }
  680. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  681. fe_sec_tone_mode_t tone)
  682. {
  683. struct cx8802_dev *dev = fe->dvb->priv;
  684. struct cx88_core *core = dev->core;
  685. cx_set(MO_GP0_IO, 0x0800);
  686. switch (tone) {
  687. case SEC_TONE_ON:
  688. cx_set(MO_GP0_IO, 0x08);
  689. break;
  690. case SEC_TONE_OFF:
  691. cx_clear(MO_GP0_IO, 0x08);
  692. break;
  693. default:
  694. return -EINVAL;
  695. }
  696. return 0;
  697. }
  698. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  699. fe_sec_voltage_t voltage)
  700. {
  701. struct cx8802_dev *dev = fe->dvb->priv;
  702. struct cx88_core *core = dev->core;
  703. u8 data;
  704. struct i2c_msg msg = {
  705. .addr = 8,
  706. .flags = 0,
  707. .buf = &data,
  708. .len = sizeof(data) };
  709. cx_set(MO_GP0_IO, 0x8000);
  710. switch (voltage) {
  711. case SEC_VOLTAGE_OFF:
  712. break;
  713. case SEC_VOLTAGE_13:
  714. data = ISL6421_EN1 | ISL6421_LLC1;
  715. cx_clear(MO_GP0_IO, 0x80);
  716. break;
  717. case SEC_VOLTAGE_18:
  718. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  719. cx_clear(MO_GP0_IO, 0x80);
  720. break;
  721. default:
  722. return -EINVAL;
  723. };
  724. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  725. }
  726. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  727. u32 srate, u32 ratio)
  728. {
  729. u8 aclk = 0;
  730. u8 bclk = 0;
  731. if (srate < 1500000) {
  732. aclk = 0xb7;
  733. bclk = 0x47;
  734. } else if (srate < 3000000) {
  735. aclk = 0xb7;
  736. bclk = 0x4b;
  737. } else if (srate < 7000000) {
  738. aclk = 0xb7;
  739. bclk = 0x4f;
  740. } else if (srate < 14000000) {
  741. aclk = 0xb7;
  742. bclk = 0x53;
  743. } else if (srate < 30000000) {
  744. aclk = 0xb6;
  745. bclk = 0x53;
  746. } else if (srate < 45000000) {
  747. aclk = 0xb4;
  748. bclk = 0x51;
  749. }
  750. stv0299_writereg(fe, 0x13, aclk);
  751. stv0299_writereg(fe, 0x14, bclk);
  752. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  753. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  754. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  755. return 0;
  756. }
  757. static const struct stv0299_config samsung_stv0299_config = {
  758. .demod_address = 0x68,
  759. .inittab = samsung_smt_7020_inittab,
  760. .mclk = 88000000UL,
  761. .invert = 0,
  762. .skip_reinit = 0,
  763. .lock_output = STV0299_LOCKOUTPUT_LK,
  764. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  765. .min_delay_ms = 100,
  766. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  767. };
  768. static int dvb_register(struct cx8802_dev *dev)
  769. {
  770. struct cx88_core *core = dev->core;
  771. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  772. int mfe_shared = 0; /* bus not shared by default */
  773. if (0 != core->i2c_rc) {
  774. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  775. goto frontend_detach;
  776. }
  777. /* Get the first frontend */
  778. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  779. if (!fe0)
  780. goto frontend_detach;
  781. /* multi-frontend gate control is undefined or defaults to fe0 */
  782. dev->frontends.gate = 0;
  783. /* Sets the gate control callback to be used by i2c command calls */
  784. core->gate_ctrl = cx88_dvb_gate_ctrl;
  785. /* init frontend(s) */
  786. switch (core->boardnr) {
  787. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  788. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  789. &connexant_refboard_config,
  790. &core->i2c_adap);
  791. if (fe0->dvb.frontend != NULL) {
  792. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  793. 0x61, &core->i2c_adap,
  794. DVB_PLL_THOMSON_DTT759X))
  795. goto frontend_detach;
  796. }
  797. break;
  798. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  799. case CX88_BOARD_CONEXANT_DVB_T1:
  800. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  801. case CX88_BOARD_WINFAST_DTV1000:
  802. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  803. &connexant_refboard_config,
  804. &core->i2c_adap);
  805. if (fe0->dvb.frontend != NULL) {
  806. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  807. 0x60, &core->i2c_adap,
  808. DVB_PLL_THOMSON_DTT7579))
  809. goto frontend_detach;
  810. }
  811. break;
  812. case CX88_BOARD_WINFAST_DTV2000H:
  813. case CX88_BOARD_WINFAST_DTV2000H_J:
  814. case CX88_BOARD_HAUPPAUGE_HVR1100:
  815. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  816. case CX88_BOARD_HAUPPAUGE_HVR1300:
  817. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  818. &hauppauge_hvr_config,
  819. &core->i2c_adap);
  820. if (fe0->dvb.frontend != NULL) {
  821. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  822. &core->i2c_adap, 0x61,
  823. TUNER_PHILIPS_FMD1216ME_MK3))
  824. goto frontend_detach;
  825. }
  826. break;
  827. case CX88_BOARD_HAUPPAUGE_HVR3000:
  828. /* MFE frontend 1 */
  829. mfe_shared = 1;
  830. dev->frontends.gate = 2;
  831. /* DVB-S init */
  832. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  833. &hauppauge_novas_config,
  834. &dev->core->i2c_adap);
  835. if (fe0->dvb.frontend) {
  836. if (!dvb_attach(isl6421_attach,
  837. fe0->dvb.frontend,
  838. &dev->core->i2c_adap,
  839. 0x08, ISL6421_DCL, 0x00))
  840. goto frontend_detach;
  841. }
  842. /* MFE frontend 2 */
  843. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  844. if (!fe1)
  845. goto frontend_detach;
  846. /* DVB-T init */
  847. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  848. &hauppauge_hvr_config,
  849. &dev->core->i2c_adap);
  850. if (fe1->dvb.frontend) {
  851. fe1->dvb.frontend->id = 1;
  852. if (!dvb_attach(simple_tuner_attach,
  853. fe1->dvb.frontend,
  854. &dev->core->i2c_adap,
  855. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  856. goto frontend_detach;
  857. }
  858. break;
  859. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  860. fe0->dvb.frontend = dvb_attach(mt352_attach,
  861. &dvico_fusionhdtv,
  862. &core->i2c_adap);
  863. if (fe0->dvb.frontend != NULL) {
  864. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  865. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  866. goto frontend_detach;
  867. break;
  868. }
  869. /* ZL10353 replaces MT352 on later cards */
  870. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  871. &dvico_fusionhdtv_plus_v1_1,
  872. &core->i2c_adap);
  873. if (fe0->dvb.frontend != NULL) {
  874. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  875. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  876. goto frontend_detach;
  877. }
  878. break;
  879. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  880. /* The tin box says DEE1601, but it seems to be DTT7579
  881. * compatible, with a slightly different MT352 AGC gain. */
  882. fe0->dvb.frontend = dvb_attach(mt352_attach,
  883. &dvico_fusionhdtv_dual,
  884. &core->i2c_adap);
  885. if (fe0->dvb.frontend != NULL) {
  886. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  887. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  888. goto frontend_detach;
  889. break;
  890. }
  891. /* ZL10353 replaces MT352 on later cards */
  892. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  893. &dvico_fusionhdtv_plus_v1_1,
  894. &core->i2c_adap);
  895. if (fe0->dvb.frontend != NULL) {
  896. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  897. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  898. goto frontend_detach;
  899. }
  900. break;
  901. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  902. fe0->dvb.frontend = dvb_attach(mt352_attach,
  903. &dvico_fusionhdtv,
  904. &core->i2c_adap);
  905. if (fe0->dvb.frontend != NULL) {
  906. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  907. 0x61, NULL, DVB_PLL_LG_Z201))
  908. goto frontend_detach;
  909. }
  910. break;
  911. case CX88_BOARD_KWORLD_DVB_T:
  912. case CX88_BOARD_DNTV_LIVE_DVB_T:
  913. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  914. fe0->dvb.frontend = dvb_attach(mt352_attach,
  915. &dntv_live_dvbt_config,
  916. &core->i2c_adap);
  917. if (fe0->dvb.frontend != NULL) {
  918. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  919. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  920. goto frontend_detach;
  921. }
  922. break;
  923. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  924. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  925. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  926. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  927. &dev->vp3054->adap);
  928. if (fe0->dvb.frontend != NULL) {
  929. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  930. &core->i2c_adap, 0x61,
  931. TUNER_PHILIPS_FMD1216ME_MK3))
  932. goto frontend_detach;
  933. }
  934. #else
  935. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  936. core->name);
  937. #endif
  938. break;
  939. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  940. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  941. &dvico_fusionhdtv_hybrid,
  942. &core->i2c_adap);
  943. if (fe0->dvb.frontend != NULL) {
  944. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  945. &core->i2c_adap, 0x61,
  946. TUNER_THOMSON_FE6600))
  947. goto frontend_detach;
  948. }
  949. break;
  950. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  951. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  952. &dvico_fusionhdtv_xc3028,
  953. &core->i2c_adap);
  954. if (fe0->dvb.frontend == NULL)
  955. fe0->dvb.frontend = dvb_attach(mt352_attach,
  956. &dvico_fusionhdtv_mt352_xc3028,
  957. &core->i2c_adap);
  958. /*
  959. * On this board, the demod provides the I2C bus pullup.
  960. * We must not permit gate_ctrl to be performed, or
  961. * the xc3028 cannot communicate on the bus.
  962. */
  963. if (fe0->dvb.frontend)
  964. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  965. if (attach_xc3028(0x61, dev) < 0)
  966. goto frontend_detach;
  967. break;
  968. case CX88_BOARD_PCHDTV_HD3000:
  969. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  970. &core->i2c_adap);
  971. if (fe0->dvb.frontend != NULL) {
  972. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  973. &core->i2c_adap, 0x61,
  974. TUNER_THOMSON_DTT761X))
  975. goto frontend_detach;
  976. }
  977. break;
  978. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  979. dev->ts_gen_cntrl = 0x08;
  980. /* Do a hardware reset of chip before using it. */
  981. cx_clear(MO_GP0_IO, 1);
  982. mdelay(100);
  983. cx_set(MO_GP0_IO, 1);
  984. mdelay(200);
  985. /* Select RF connector callback */
  986. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  987. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  988. &fusionhdtv_3_gold,
  989. &core->i2c_adap);
  990. if (fe0->dvb.frontend != NULL) {
  991. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  992. &core->i2c_adap, 0x61,
  993. TUNER_MICROTUNE_4042FI5))
  994. goto frontend_detach;
  995. }
  996. break;
  997. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  998. dev->ts_gen_cntrl = 0x08;
  999. /* Do a hardware reset of chip before using it. */
  1000. cx_clear(MO_GP0_IO, 1);
  1001. mdelay(100);
  1002. cx_set(MO_GP0_IO, 9);
  1003. mdelay(200);
  1004. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1005. &fusionhdtv_3_gold,
  1006. &core->i2c_adap);
  1007. if (fe0->dvb.frontend != NULL) {
  1008. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1009. &core->i2c_adap, 0x61,
  1010. TUNER_THOMSON_DTT761X))
  1011. goto frontend_detach;
  1012. }
  1013. break;
  1014. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1015. dev->ts_gen_cntrl = 0x08;
  1016. /* Do a hardware reset of chip before using it. */
  1017. cx_clear(MO_GP0_IO, 1);
  1018. mdelay(100);
  1019. cx_set(MO_GP0_IO, 1);
  1020. mdelay(200);
  1021. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1022. &fusionhdtv_5_gold,
  1023. &core->i2c_adap);
  1024. if (fe0->dvb.frontend != NULL) {
  1025. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1026. &core->i2c_adap, 0x61,
  1027. TUNER_LG_TDVS_H06XF))
  1028. goto frontend_detach;
  1029. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1030. &core->i2c_adap, 0x43))
  1031. goto frontend_detach;
  1032. }
  1033. break;
  1034. case CX88_BOARD_PCHDTV_HD5500:
  1035. dev->ts_gen_cntrl = 0x08;
  1036. /* Do a hardware reset of chip before using it. */
  1037. cx_clear(MO_GP0_IO, 1);
  1038. mdelay(100);
  1039. cx_set(MO_GP0_IO, 1);
  1040. mdelay(200);
  1041. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1042. &pchdtv_hd5500,
  1043. &core->i2c_adap);
  1044. if (fe0->dvb.frontend != NULL) {
  1045. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1046. &core->i2c_adap, 0x61,
  1047. TUNER_LG_TDVS_H06XF))
  1048. goto frontend_detach;
  1049. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1050. &core->i2c_adap, 0x43))
  1051. goto frontend_detach;
  1052. }
  1053. break;
  1054. case CX88_BOARD_ATI_HDTVWONDER:
  1055. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1056. &ati_hdtvwonder,
  1057. &core->i2c_adap);
  1058. if (fe0->dvb.frontend != NULL) {
  1059. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1060. &core->i2c_adap, 0x61,
  1061. TUNER_PHILIPS_TUV1236D))
  1062. goto frontend_detach;
  1063. }
  1064. break;
  1065. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1066. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1067. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1068. &hauppauge_novas_config,
  1069. &core->i2c_adap);
  1070. if (fe0->dvb.frontend) {
  1071. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1072. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1073. goto frontend_detach;
  1074. }
  1075. break;
  1076. case CX88_BOARD_KWORLD_DVBS_100:
  1077. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1078. &kworld_dvbs_100_config,
  1079. &core->i2c_adap);
  1080. if (fe0->dvb.frontend) {
  1081. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1082. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1083. }
  1084. break;
  1085. case CX88_BOARD_GENIATECH_DVBS:
  1086. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1087. &geniatech_dvbs_config,
  1088. &core->i2c_adap);
  1089. if (fe0->dvb.frontend) {
  1090. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1091. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1092. }
  1093. break;
  1094. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1095. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1096. &pinnacle_pctv_hd_800i_config,
  1097. &core->i2c_adap);
  1098. if (fe0->dvb.frontend != NULL) {
  1099. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1100. &core->i2c_adap,
  1101. &pinnacle_pctv_hd_800i_tuner_config))
  1102. goto frontend_detach;
  1103. }
  1104. break;
  1105. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1106. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1107. &dvico_hdtv5_pci_nano_config,
  1108. &core->i2c_adap);
  1109. if (fe0->dvb.frontend != NULL) {
  1110. struct dvb_frontend *fe;
  1111. struct xc2028_config cfg = {
  1112. .i2c_adap = &core->i2c_adap,
  1113. .i2c_addr = 0x61,
  1114. };
  1115. static struct xc2028_ctrl ctl = {
  1116. .fname = XC2028_DEFAULT_FIRMWARE,
  1117. .max_len = 64,
  1118. .scode_table = XC3028_FE_OREN538,
  1119. };
  1120. fe = dvb_attach(xc2028_attach,
  1121. fe0->dvb.frontend, &cfg);
  1122. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1123. fe->ops.tuner_ops.set_config(fe, &ctl);
  1124. }
  1125. break;
  1126. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1127. case CX88_BOARD_WINFAST_DTV1800H:
  1128. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1129. &cx88_pinnacle_hybrid_pctv,
  1130. &core->i2c_adap);
  1131. if (fe0->dvb.frontend) {
  1132. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1133. if (attach_xc3028(0x61, dev) < 0)
  1134. goto frontend_detach;
  1135. }
  1136. break;
  1137. case CX88_BOARD_GENIATECH_X8000_MT:
  1138. dev->ts_gen_cntrl = 0x00;
  1139. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1140. &cx88_geniatech_x8000_mt,
  1141. &core->i2c_adap);
  1142. if (attach_xc3028(0x61, dev) < 0)
  1143. goto frontend_detach;
  1144. break;
  1145. case CX88_BOARD_KWORLD_ATSC_120:
  1146. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1147. &kworld_atsc_120_config,
  1148. &core->i2c_adap);
  1149. if (attach_xc3028(0x61, dev) < 0)
  1150. goto frontend_detach;
  1151. break;
  1152. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1153. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1154. &dvico_fusionhdtv7_config,
  1155. &core->i2c_adap);
  1156. if (fe0->dvb.frontend != NULL) {
  1157. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1158. &core->i2c_adap,
  1159. &dvico_fusionhdtv7_tuner_config))
  1160. goto frontend_detach;
  1161. }
  1162. break;
  1163. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1164. /* MFE frontend 1 */
  1165. mfe_shared = 1;
  1166. dev->frontends.gate = 2;
  1167. /* DVB-S/S2 Init */
  1168. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1169. &hauppauge_hvr4000_config,
  1170. &dev->core->i2c_adap);
  1171. if (fe0->dvb.frontend) {
  1172. if (!dvb_attach(isl6421_attach,
  1173. fe0->dvb.frontend,
  1174. &dev->core->i2c_adap,
  1175. 0x08, ISL6421_DCL, 0x00))
  1176. goto frontend_detach;
  1177. }
  1178. /* MFE frontend 2 */
  1179. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1180. if (!fe1)
  1181. goto frontend_detach;
  1182. /* DVB-T Init */
  1183. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1184. &hauppauge_hvr_config,
  1185. &dev->core->i2c_adap);
  1186. if (fe1->dvb.frontend) {
  1187. fe1->dvb.frontend->id = 1;
  1188. if (!dvb_attach(simple_tuner_attach,
  1189. fe1->dvb.frontend,
  1190. &dev->core->i2c_adap,
  1191. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1192. goto frontend_detach;
  1193. }
  1194. break;
  1195. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1196. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1197. &hauppauge_hvr4000_config,
  1198. &dev->core->i2c_adap);
  1199. if (fe0->dvb.frontend) {
  1200. if (!dvb_attach(isl6421_attach,
  1201. fe0->dvb.frontend,
  1202. &dev->core->i2c_adap,
  1203. 0x08, ISL6421_DCL, 0x00))
  1204. goto frontend_detach;
  1205. }
  1206. break;
  1207. case CX88_BOARD_PROF_6200:
  1208. case CX88_BOARD_TBS_8910:
  1209. case CX88_BOARD_TEVII_S420:
  1210. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1211. &tevii_tuner_sharp_config,
  1212. &core->i2c_adap);
  1213. if (fe0->dvb.frontend != NULL) {
  1214. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1215. &core->i2c_adap, DVB_PLL_OPERA1))
  1216. goto frontend_detach;
  1217. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1218. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1219. } else {
  1220. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1221. &tevii_tuner_earda_config,
  1222. &core->i2c_adap);
  1223. if (fe0->dvb.frontend != NULL) {
  1224. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1225. &core->i2c_adap))
  1226. goto frontend_detach;
  1227. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1228. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1229. }
  1230. }
  1231. break;
  1232. case CX88_BOARD_TEVII_S460:
  1233. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1234. &tevii_s460_config,
  1235. &core->i2c_adap);
  1236. if (fe0->dvb.frontend != NULL)
  1237. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1238. break;
  1239. case CX88_BOARD_TEVII_S464:
  1240. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1241. &tevii_ds3000_config,
  1242. &core->i2c_adap);
  1243. if (fe0->dvb.frontend != NULL)
  1244. fe0->dvb.frontend->ops.set_voltage =
  1245. tevii_dvbs_set_voltage;
  1246. break;
  1247. case CX88_BOARD_OMICOM_SS4_PCI:
  1248. case CX88_BOARD_TBS_8920:
  1249. case CX88_BOARD_PROF_7300:
  1250. case CX88_BOARD_SATTRADE_ST4200:
  1251. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1252. &hauppauge_hvr4000_config,
  1253. &core->i2c_adap);
  1254. if (fe0->dvb.frontend != NULL)
  1255. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1256. break;
  1257. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1258. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1259. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1260. &core->i2c_adap);
  1261. if (fe0->dvb.frontend) {
  1262. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1263. if (attach_xc3028(0x61, dev) < 0)
  1264. goto frontend_detach;
  1265. }
  1266. break;
  1267. case CX88_BOARD_PROF_7301:{
  1268. struct dvb_tuner_ops *tuner_ops = NULL;
  1269. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1270. &prof_7301_stv0900_config,
  1271. &core->i2c_adap, 0);
  1272. if (fe0->dvb.frontend != NULL) {
  1273. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1274. &prof_7301_stb6100_config,
  1275. &core->i2c_adap))
  1276. goto frontend_detach;
  1277. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1278. tuner_ops->set_frequency = stb6100_set_freq;
  1279. tuner_ops->get_frequency = stb6100_get_freq;
  1280. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1281. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1282. core->prev_set_voltage =
  1283. fe0->dvb.frontend->ops.set_voltage;
  1284. fe0->dvb.frontend->ops.set_voltage =
  1285. tevii_dvbs_set_voltage;
  1286. }
  1287. break;
  1288. }
  1289. case CX88_BOARD_SAMSUNG_SMT_7020:
  1290. dev->ts_gen_cntrl = 0x08;
  1291. cx_set(MO_GP0_IO, 0x0101);
  1292. cx_clear(MO_GP0_IO, 0x01);
  1293. mdelay(100);
  1294. cx_set(MO_GP0_IO, 0x01);
  1295. mdelay(200);
  1296. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1297. &samsung_stv0299_config,
  1298. &dev->core->i2c_adap);
  1299. if (fe0->dvb.frontend) {
  1300. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1301. samsung_smt_7020_tuner_set_params;
  1302. fe0->dvb.frontend->tuner_priv =
  1303. &dev->core->i2c_adap;
  1304. fe0->dvb.frontend->ops.set_voltage =
  1305. samsung_smt_7020_set_voltage;
  1306. fe0->dvb.frontend->ops.set_tone =
  1307. samsung_smt_7020_set_tone;
  1308. }
  1309. break;
  1310. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1311. dev->ts_gen_cntrl = 0x00;
  1312. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1313. &twinhan_vp1027,
  1314. &core->i2c_adap);
  1315. if (fe0->dvb.frontend) {
  1316. core->prev_set_voltage =
  1317. fe0->dvb.frontend->ops.set_voltage;
  1318. fe0->dvb.frontend->ops.set_voltage =
  1319. vp1027_set_voltage;
  1320. }
  1321. break;
  1322. default:
  1323. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1324. core->name);
  1325. break;
  1326. }
  1327. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1328. printk(KERN_ERR
  1329. "%s/2: frontend initialization failed\n",
  1330. core->name);
  1331. goto frontend_detach;
  1332. }
  1333. /* define general-purpose callback pointer */
  1334. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1335. /* Ensure all frontends negotiate bus access */
  1336. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1337. if (fe1)
  1338. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1339. /* Put the analog decoder in standby to keep it quiet */
  1340. call_all(core, core, s_power, 0);
  1341. /* register everything */
  1342. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1343. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1344. frontend_detach:
  1345. core->gate_ctrl = NULL;
  1346. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1347. return -EINVAL;
  1348. }
  1349. /* ----------------------------------------------------------- */
  1350. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1351. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1352. {
  1353. struct cx88_core *core = drv->core;
  1354. int err = 0;
  1355. dprintk( 1, "%s\n", __func__);
  1356. switch (core->boardnr) {
  1357. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1358. /* We arrive here with either the cx23416 or the cx22702
  1359. * on the bus. Take the bus from the cx23416 and enable the
  1360. * cx22702 demod
  1361. */
  1362. /* Toggle reset on cx22702 leaving i2c active */
  1363. cx_set(MO_GP0_IO, 0x00000080);
  1364. udelay(1000);
  1365. cx_clear(MO_GP0_IO, 0x00000080);
  1366. udelay(50);
  1367. cx_set(MO_GP0_IO, 0x00000080);
  1368. udelay(1000);
  1369. /* enable the cx22702 pins */
  1370. cx_clear(MO_GP0_IO, 0x00000004);
  1371. udelay(1000);
  1372. break;
  1373. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1374. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1375. /* Toggle reset on cx22702 leaving i2c active */
  1376. cx_set(MO_GP0_IO, 0x00000080);
  1377. udelay(1000);
  1378. cx_clear(MO_GP0_IO, 0x00000080);
  1379. udelay(50);
  1380. cx_set(MO_GP0_IO, 0x00000080);
  1381. udelay(1000);
  1382. switch (core->dvbdev->frontends.active_fe_id) {
  1383. case 1: /* DVB-S/S2 Enabled */
  1384. /* tri-state the cx22702 pins */
  1385. cx_set(MO_GP0_IO, 0x00000004);
  1386. /* Take the cx24116/cx24123 out of reset */
  1387. cx_write(MO_SRST_IO, 1);
  1388. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1389. break;
  1390. case 2: /* DVB-T Enabled */
  1391. /* Put the cx24116/cx24123 into reset */
  1392. cx_write(MO_SRST_IO, 0);
  1393. /* enable the cx22702 pins */
  1394. cx_clear(MO_GP0_IO, 0x00000004);
  1395. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1396. break;
  1397. }
  1398. udelay(1000);
  1399. break;
  1400. default:
  1401. err = -ENODEV;
  1402. }
  1403. return err;
  1404. }
  1405. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1406. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1407. {
  1408. struct cx88_core *core = drv->core;
  1409. int err = 0;
  1410. dprintk( 1, "%s\n", __func__);
  1411. switch (core->boardnr) {
  1412. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1413. /* Do Nothing, leave the cx22702 on the bus. */
  1414. break;
  1415. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1416. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1417. break;
  1418. default:
  1419. err = -ENODEV;
  1420. }
  1421. return err;
  1422. }
  1423. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1424. {
  1425. struct cx88_core *core = drv->core;
  1426. struct cx8802_dev *dev = drv->core->dvbdev;
  1427. int err;
  1428. struct videobuf_dvb_frontend *fe;
  1429. int i;
  1430. dprintk( 1, "%s\n", __func__);
  1431. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1432. core->boardnr,
  1433. core->name,
  1434. core->pci_bus,
  1435. core->pci_slot);
  1436. err = -ENODEV;
  1437. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1438. goto fail_core;
  1439. /* If vp3054 isn't enabled, a stub will just return 0 */
  1440. err = vp3054_i2c_probe(dev);
  1441. if (0 != err)
  1442. goto fail_core;
  1443. /* dvb stuff */
  1444. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1445. dev->ts_gen_cntrl = 0x0c;
  1446. err = cx8802_alloc_frontends(dev);
  1447. if (err)
  1448. goto fail_core;
  1449. err = -ENODEV;
  1450. for (i = 1; i <= core->board.num_frontends; i++) {
  1451. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1452. if (fe == NULL) {
  1453. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1454. __func__, i);
  1455. goto fail_probe;
  1456. }
  1457. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1458. &dev->pci->dev, &dev->slock,
  1459. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1460. V4L2_FIELD_TOP,
  1461. sizeof(struct cx88_buffer),
  1462. dev, NULL);
  1463. /* init struct videobuf_dvb */
  1464. fe->dvb.name = dev->core->name;
  1465. }
  1466. err = dvb_register(dev);
  1467. if (err)
  1468. /* frontends/adapter de-allocated in dvb_register */
  1469. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1470. core->name, err);
  1471. return err;
  1472. fail_probe:
  1473. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1474. fail_core:
  1475. return err;
  1476. }
  1477. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1478. {
  1479. struct cx88_core *core = drv->core;
  1480. struct cx8802_dev *dev = drv->core->dvbdev;
  1481. dprintk( 1, "%s\n", __func__);
  1482. videobuf_dvb_unregister_bus(&dev->frontends);
  1483. vp3054_i2c_remove(dev);
  1484. core->gate_ctrl = NULL;
  1485. return 0;
  1486. }
  1487. static struct cx8802_driver cx8802_dvb_driver = {
  1488. .type_id = CX88_MPEG_DVB,
  1489. .hw_access = CX8802_DRVCTL_SHARED,
  1490. .probe = cx8802_dvb_probe,
  1491. .remove = cx8802_dvb_remove,
  1492. .advise_acquire = cx8802_dvb_advise_acquire,
  1493. .advise_release = cx8802_dvb_advise_release,
  1494. };
  1495. static int __init dvb_init(void)
  1496. {
  1497. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1498. (CX88_VERSION_CODE >> 16) & 0xff,
  1499. (CX88_VERSION_CODE >> 8) & 0xff,
  1500. CX88_VERSION_CODE & 0xff);
  1501. #ifdef SNAPSHOT
  1502. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1503. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1504. #endif
  1505. return cx8802_register_driver(&cx8802_dvb_driver);
  1506. }
  1507. static void __exit dvb_fini(void)
  1508. {
  1509. cx8802_unregister_driver(&cx8802_dvb_driver);
  1510. }
  1511. module_init(dvb_init);
  1512. module_exit(dvb_fini);
  1513. /*
  1514. * Local variables:
  1515. * c-basic-offset: 8
  1516. * compile-command: "make DVB=1"
  1517. * End:
  1518. */