ab8500.h 6.1 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6. */
  7. #ifndef MFD_AB8500_H
  8. #define MFD_AB8500_H
  9. #include <linux/device.h>
  10. /*
  11. * AB8500 bank addresses
  12. */
  13. #define AB8500_SYS_CTRL1_BLOCK 0x1
  14. #define AB8500_SYS_CTRL2_BLOCK 0x2
  15. #define AB8500_REGU_CTRL1 0x3
  16. #define AB8500_REGU_CTRL2 0x4
  17. #define AB8500_USB 0x5
  18. #define AB8500_TVOUT 0x6
  19. #define AB8500_DBI 0x7
  20. #define AB8500_ECI_AV_ACC 0x8
  21. #define AB8500_RESERVED 0x9
  22. #define AB8500_GPADC 0xA
  23. #define AB8500_CHARGER 0xB
  24. #define AB8500_GAS_GAUGE 0xC
  25. #define AB8500_AUDIO 0xD
  26. #define AB8500_INTERRUPT 0xE
  27. #define AB8500_RTC 0xF
  28. #define AB8500_MISC 0x10
  29. #define AB8500_DEBUG 0x12
  30. #define AB8500_PROD_TEST 0x13
  31. #define AB8500_OTP_EMUL 0x15
  32. /*
  33. * Interrupts
  34. */
  35. #define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
  36. #define AB8500_INT_UN_PLUG_TV_DET 1
  37. #define AB8500_INT_PLUG_TV_DET 2
  38. #define AB8500_INT_TEMP_WARM 3
  39. #define AB8500_INT_PON_KEY2DB_F 4
  40. #define AB8500_INT_PON_KEY2DB_R 5
  41. #define AB8500_INT_PON_KEY1DB_F 6
  42. #define AB8500_INT_PON_KEY1DB_R 7
  43. #define AB8500_INT_BATT_OVV 8
  44. #define AB8500_INT_MAIN_CH_UNPLUG_DET 10
  45. #define AB8500_INT_MAIN_CH_PLUG_DET 11
  46. #define AB8500_INT_USB_ID_DET_F 12
  47. #define AB8500_INT_USB_ID_DET_R 13
  48. #define AB8500_INT_VBUS_DET_F 14
  49. #define AB8500_INT_VBUS_DET_R 15
  50. #define AB8500_INT_VBUS_CH_DROP_END 16
  51. #define AB8500_INT_RTC_60S 17
  52. #define AB8500_INT_RTC_ALARM 18
  53. #define AB8500_INT_BAT_CTRL_INDB 20
  54. #define AB8500_INT_CH_WD_EXP 21
  55. #define AB8500_INT_VBUS_OVV 22
  56. #define AB8500_INT_MAIN_CH_DROP_END 23
  57. #define AB8500_INT_CCN_CONV_ACC 24
  58. #define AB8500_INT_INT_AUD 25
  59. #define AB8500_INT_CCEOC 26
  60. #define AB8500_INT_CC_INT_CALIB 27
  61. #define AB8500_INT_LOW_BAT_F 28
  62. #define AB8500_INT_LOW_BAT_R 29
  63. #define AB8500_INT_BUP_CHG_NOT_OK 30
  64. #define AB8500_INT_BUP_CHG_OK 31
  65. #define AB8500_INT_GP_HW_ADC_CONV_END 32
  66. #define AB8500_INT_ACC_DETECT_1DB_F 33
  67. #define AB8500_INT_ACC_DETECT_1DB_R 34
  68. #define AB8500_INT_ACC_DETECT_22DB_F 35
  69. #define AB8500_INT_ACC_DETECT_22DB_R 36
  70. #define AB8500_INT_ACC_DETECT_21DB_F 37
  71. #define AB8500_INT_ACC_DETECT_21DB_R 38
  72. #define AB8500_INT_GP_SW_ADC_CONV_END 39
  73. #define AB8500_INT_ACC_DETECT_1DB_F 33
  74. #define AB8500_INT_ACC_DETECT_1DB_R 34
  75. #define AB8500_INT_ACC_DETECT_22DB_F 35
  76. #define AB8500_INT_ACC_DETECT_22DB_R 36
  77. #define AB8500_INT_ACC_DETECT_21DB_F 37
  78. #define AB8500_INT_ACC_DETECT_21DB_R 38
  79. #define AB8500_INT_GP_SW_ADC_CONV_END 39
  80. #define AB8500_INT_GPIO6R 40
  81. #define AB8500_INT_GPIO7R 41
  82. #define AB8500_INT_GPIO8R 42
  83. #define AB8500_INT_GPIO9R 43
  84. #define AB8500_INT_GPIO10R 44
  85. #define AB8500_INT_GPIO11R 45
  86. #define AB8500_INT_GPIO12R 46
  87. #define AB8500_INT_GPIO13R 47
  88. #define AB8500_INT_GPIO24R 48
  89. #define AB8500_INT_GPIO25R 49
  90. #define AB8500_INT_GPIO36R 50
  91. #define AB8500_INT_GPIO37R 51
  92. #define AB8500_INT_GPIO38R 52
  93. #define AB8500_INT_GPIO39R 53
  94. #define AB8500_INT_GPIO40R 54
  95. #define AB8500_INT_GPIO41R 55
  96. #define AB8500_INT_GPIO6F 56
  97. #define AB8500_INT_GPIO7F 57
  98. #define AB8500_INT_GPIO8F 58
  99. #define AB8500_INT_GPIO9F 59
  100. #define AB8500_INT_GPIO10F 60
  101. #define AB8500_INT_GPIO11F 61
  102. #define AB8500_INT_GPIO12F 62
  103. #define AB8500_INT_GPIO13F 63
  104. #define AB8500_INT_GPIO24F 64
  105. #define AB8500_INT_GPIO25F 65
  106. #define AB8500_INT_GPIO36F 66
  107. #define AB8500_INT_GPIO37F 67
  108. #define AB8500_INT_GPIO38F 68
  109. #define AB8500_INT_GPIO39F 69
  110. #define AB8500_INT_GPIO40F 70
  111. #define AB8500_INT_GPIO41F 71
  112. #define AB8500_INT_ADP_SOURCE_ERROR 72
  113. #define AB8500_INT_ADP_SINK_ERROR 73
  114. #define AB8500_INT_ADP_PROBE_PLUG 74
  115. #define AB8500_INT_ADP_PROBE_UNPLUG 75
  116. #define AB8500_INT_ADP_SENSE_OFF 76
  117. #define AB8500_INT_USB_PHY_POWER_ERR 78
  118. #define AB8500_INT_USB_LINK_STATUS 79
  119. #define AB8500_INT_BTEMP_LOW 80
  120. #define AB8500_INT_BTEMP_LOW_MEDIUM 81
  121. #define AB8500_INT_BTEMP_MEDIUM_HIGH 82
  122. #define AB8500_INT_BTEMP_HIGH 83
  123. #define AB8500_INT_USB_CHARGER_NOT_OK 89
  124. #define AB8500_INT_ID_WAKEUP_R 90
  125. #define AB8500_INT_ID_DET_R1R 92
  126. #define AB8500_INT_ID_DET_R2R 93
  127. #define AB8500_INT_ID_DET_R3R 94
  128. #define AB8500_INT_ID_DET_R4R 95
  129. #define AB8500_INT_ID_WAKEUP_F 96
  130. #define AB8500_INT_ID_DET_R1F 98
  131. #define AB8500_INT_ID_DET_R2F 99
  132. #define AB8500_INT_ID_DET_R3F 100
  133. #define AB8500_INT_ID_DET_R4F 101
  134. #define AB8500_INT_USB_CHG_DET_DONE 102
  135. #define AB8500_INT_USB_CH_TH_PROT_F 104
  136. #define AB8500_INT_USB_CH_TH_PROT_R 105
  137. #define AB8500_INT_MAIN_CH_TH_PROT_F 106
  138. #define AB8500_INT_MAIN_CH_TH_PROT_R 107
  139. #define AB8500_INT_USB_CHARGER_NOT_OKF 111
  140. #define AB8500_NR_IRQS 112
  141. #define AB8500_NUM_IRQ_REGS 14
  142. /**
  143. * struct ab8500 - ab8500 internal structure
  144. * @dev: parent device
  145. * @lock: read/write operations lock
  146. * @irq_lock: genirq bus lock
  147. * @irq: irq line
  148. * @chip_id: chip revision id
  149. * @write: register write
  150. * @read: register read
  151. * @rx_buf: rx buf for SPI
  152. * @tx_buf: tx buf for SPI
  153. * @mask: cache of IRQ regs for bus lock
  154. * @oldmask: cache of previous IRQ regs for bus lock
  155. */
  156. struct ab8500 {
  157. struct device *dev;
  158. struct mutex lock;
  159. struct mutex irq_lock;
  160. int irq_base;
  161. int irq;
  162. u8 chip_id;
  163. int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
  164. int (*read) (struct ab8500 *a8500, u16 addr);
  165. unsigned long tx_buf[4];
  166. unsigned long rx_buf[4];
  167. u8 mask[AB8500_NUM_IRQ_REGS];
  168. u8 oldmask[AB8500_NUM_IRQ_REGS];
  169. };
  170. struct regulator_reg_init;
  171. struct regulator_init_data;
  172. struct ab8500_gpio_platform_data;
  173. /**
  174. * struct ab8500_platform_data - AB8500 platform data
  175. * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
  176. * @init: board-specific initialization after detection of ab8500
  177. * @num_regulator_reg_init: number of regulator init registers
  178. * @regulator_reg_init: regulator init registers
  179. * @num_regulator: number of regulators
  180. * @regulator: machine-specific constraints for regulators
  181. */
  182. struct ab8500_platform_data {
  183. int irq_base;
  184. void (*init) (struct ab8500 *);
  185. int num_regulator_reg_init;
  186. struct ab8500_regulator_reg_init *regulator_reg_init;
  187. int num_regulator;
  188. struct regulator_init_data *regulator;
  189. struct ab8500_gpio_platform_data *gpio;
  190. };
  191. extern int __devinit ab8500_init(struct ab8500 *ab8500);
  192. extern int __devexit ab8500_exit(struct ab8500 *ab8500);
  193. #endif /* MFD_AB8500_H */