iwl-rx.c 40 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <net/mac80211.h>
  31. #include "iwl-eeprom.h"
  32. #include "iwl-dev.h"
  33. #include "iwl-core.h"
  34. #include "iwl-sta.h"
  35. #include "iwl-io.h"
  36. #include "iwl-calib.h"
  37. #include "iwl-helpers.h"
  38. /************************** RX-FUNCTIONS ****************************/
  39. /*
  40. * Rx theory of operation
  41. *
  42. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  43. * each of which point to Receive Buffers to be filled by the NIC. These get
  44. * used not only for Rx frames, but for any command response or notification
  45. * from the NIC. The driver and NIC manage the Rx buffers by means
  46. * of indexes into the circular buffer.
  47. *
  48. * Rx Queue Indexes
  49. * The host/firmware share two index registers for managing the Rx buffers.
  50. *
  51. * The READ index maps to the first position that the firmware may be writing
  52. * to -- the driver can read up to (but not including) this position and get
  53. * good data.
  54. * The READ index is managed by the firmware once the card is enabled.
  55. *
  56. * The WRITE index maps to the last position the driver has read from -- the
  57. * position preceding WRITE is the last slot the firmware can place a packet.
  58. *
  59. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  60. * WRITE = READ.
  61. *
  62. * During initialization, the host sets up the READ queue position to the first
  63. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  64. *
  65. * When the firmware places a packet in a buffer, it will advance the READ index
  66. * and fire the RX interrupt. The driver can then query the READ index and
  67. * process as many packets as possible, moving the WRITE index forward as it
  68. * resets the Rx queue buffers with new memory.
  69. *
  70. * The management in the driver is as follows:
  71. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  72. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  73. * to replenish the iwl->rxq->rx_free.
  74. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  75. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  76. * 'processed' and 'read' driver indexes as well)
  77. * + A received packet is processed and handed to the kernel network stack,
  78. * detached from the iwl->rxq. The driver 'processed' index is updated.
  79. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  80. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  81. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  82. * were enough free buffers and RX_STALLED is set it is cleared.
  83. *
  84. *
  85. * Driver sequence:
  86. *
  87. * iwl_rx_queue_alloc() Allocates rx_free
  88. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  89. * iwl_rx_queue_restock
  90. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  91. * queue, updates firmware pointers, and updates
  92. * the WRITE index. If insufficient rx_free buffers
  93. * are available, schedules iwl_rx_replenish
  94. *
  95. * -- enable interrupts --
  96. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  97. * READ INDEX, detaching the SKB from the pool.
  98. * Moves the packet buffer from queue to rx_used.
  99. * Calls iwl_rx_queue_restock to refill any empty
  100. * slots.
  101. * ...
  102. *
  103. */
  104. /**
  105. * iwl_rx_queue_space - Return number of free slots available in queue.
  106. */
  107. int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  108. {
  109. int s = q->read - q->write;
  110. if (s <= 0)
  111. s += RX_QUEUE_SIZE;
  112. /* keep some buffer to not confuse full and empty queue */
  113. s -= 2;
  114. if (s < 0)
  115. s = 0;
  116. return s;
  117. }
  118. EXPORT_SYMBOL(iwl_rx_queue_space);
  119. /**
  120. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  121. */
  122. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  123. {
  124. u32 reg = 0;
  125. int ret = 0;
  126. unsigned long flags;
  127. spin_lock_irqsave(&q->lock, flags);
  128. if (q->need_update == 0)
  129. goto exit_unlock;
  130. /* If power-saving is in use, make sure device is awake */
  131. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  132. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  133. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  134. iwl_set_bit(priv, CSR_GP_CNTRL,
  135. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  136. goto exit_unlock;
  137. }
  138. ret = iwl_grab_nic_access(priv);
  139. if (ret)
  140. goto exit_unlock;
  141. /* Device expects a multiple of 8 */
  142. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  143. q->write & ~0x7);
  144. iwl_release_nic_access(priv);
  145. /* Else device is assumed to be awake */
  146. } else
  147. /* Device expects a multiple of 8 */
  148. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  149. q->need_update = 0;
  150. exit_unlock:
  151. spin_unlock_irqrestore(&q->lock, flags);
  152. return ret;
  153. }
  154. EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
  155. /**
  156. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  157. */
  158. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  159. dma_addr_t dma_addr)
  160. {
  161. return cpu_to_le32((u32)(dma_addr >> 8));
  162. }
  163. /**
  164. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  165. *
  166. * If there are slots in the RX queue that need to be restocked,
  167. * and we have free pre-allocated buffers, fill the ranks as much
  168. * as we can, pulling from rx_free.
  169. *
  170. * This moves the 'write' index forward to catch up with 'processed', and
  171. * also updates the memory address in the firmware to reference the new
  172. * target buffer.
  173. */
  174. int iwl_rx_queue_restock(struct iwl_priv *priv)
  175. {
  176. struct iwl_rx_queue *rxq = &priv->rxq;
  177. struct list_head *element;
  178. struct iwl_rx_mem_buffer *rxb;
  179. unsigned long flags;
  180. int write;
  181. int ret = 0;
  182. spin_lock_irqsave(&rxq->lock, flags);
  183. write = rxq->write & ~0x7;
  184. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  185. /* Get next free Rx buffer, remove from free list */
  186. element = rxq->rx_free.next;
  187. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  188. list_del(element);
  189. /* Point to Rx buffer via next RBD in circular buffer */
  190. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  191. rxq->queue[rxq->write] = rxb;
  192. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  193. rxq->free_count--;
  194. }
  195. spin_unlock_irqrestore(&rxq->lock, flags);
  196. /* If the pre-allocated buffer pool is dropping low, schedule to
  197. * refill it */
  198. if (rxq->free_count <= RX_LOW_WATERMARK)
  199. queue_work(priv->workqueue, &priv->rx_replenish);
  200. /* If we've added more space for the firmware to place data, tell it.
  201. * Increment device's write pointer in multiples of 8. */
  202. if ((write != (rxq->write & ~0x7))
  203. || (abs(rxq->write - rxq->read) > 7)) {
  204. spin_lock_irqsave(&rxq->lock, flags);
  205. rxq->need_update = 1;
  206. spin_unlock_irqrestore(&rxq->lock, flags);
  207. ret = iwl_rx_queue_update_write_ptr(priv, rxq);
  208. }
  209. return ret;
  210. }
  211. EXPORT_SYMBOL(iwl_rx_queue_restock);
  212. /**
  213. * iwl_rx_replenish - Move all used packet from rx_used to rx_free
  214. *
  215. * When moving to rx_free an SKB is allocated for the slot.
  216. *
  217. * Also restock the Rx queue via iwl_rx_queue_restock.
  218. * This is called as a scheduled work item (except for during initialization)
  219. */
  220. void iwl_rx_allocate(struct iwl_priv *priv)
  221. {
  222. struct iwl_rx_queue *rxq = &priv->rxq;
  223. struct list_head *element;
  224. struct iwl_rx_mem_buffer *rxb;
  225. unsigned long flags;
  226. spin_lock_irqsave(&rxq->lock, flags);
  227. while (!list_empty(&rxq->rx_used)) {
  228. element = rxq->rx_used.next;
  229. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  230. /* Alloc a new receive buffer */
  231. rxb->skb = alloc_skb(priv->hw_params.rx_buf_size,
  232. __GFP_NOWARN | GFP_ATOMIC);
  233. if (!rxb->skb) {
  234. if (net_ratelimit())
  235. printk(KERN_CRIT DRV_NAME
  236. ": Can not allocate SKB buffers\n");
  237. /* We don't reschedule replenish work here -- we will
  238. * call the restock method and if it still needs
  239. * more buffers it will schedule replenish */
  240. break;
  241. }
  242. priv->alloc_rxb_skb++;
  243. list_del(element);
  244. /* Get physical address of RB/SKB */
  245. rxb->dma_addr =
  246. pci_map_single(priv->pci_dev, rxb->skb->data,
  247. priv->hw_params.rx_buf_size, PCI_DMA_FROMDEVICE);
  248. list_add_tail(&rxb->list, &rxq->rx_free);
  249. rxq->free_count++;
  250. }
  251. spin_unlock_irqrestore(&rxq->lock, flags);
  252. }
  253. EXPORT_SYMBOL(iwl_rx_allocate);
  254. void iwl_rx_replenish(struct iwl_priv *priv)
  255. {
  256. unsigned long flags;
  257. iwl_rx_allocate(priv);
  258. spin_lock_irqsave(&priv->lock, flags);
  259. iwl_rx_queue_restock(priv);
  260. spin_unlock_irqrestore(&priv->lock, flags);
  261. }
  262. EXPORT_SYMBOL(iwl_rx_replenish);
  263. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  264. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  265. * This free routine walks the list of POOL entries and if SKB is set to
  266. * non NULL it is unmapped and freed
  267. */
  268. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  269. {
  270. int i;
  271. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  272. if (rxq->pool[i].skb != NULL) {
  273. pci_unmap_single(priv->pci_dev,
  274. rxq->pool[i].dma_addr,
  275. priv->hw_params.rx_buf_size,
  276. PCI_DMA_FROMDEVICE);
  277. dev_kfree_skb(rxq->pool[i].skb);
  278. }
  279. }
  280. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  281. rxq->dma_addr);
  282. rxq->bd = NULL;
  283. }
  284. EXPORT_SYMBOL(iwl_rx_queue_free);
  285. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  286. {
  287. struct iwl_rx_queue *rxq = &priv->rxq;
  288. struct pci_dev *dev = priv->pci_dev;
  289. int i;
  290. spin_lock_init(&rxq->lock);
  291. INIT_LIST_HEAD(&rxq->rx_free);
  292. INIT_LIST_HEAD(&rxq->rx_used);
  293. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  294. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  295. if (!rxq->bd)
  296. return -ENOMEM;
  297. /* Fill the rx_used queue with _all_ of the Rx buffers */
  298. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  299. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  300. /* Set us so that we have processed and used all buffers, but have
  301. * not restocked the Rx queue with fresh buffers */
  302. rxq->read = rxq->write = 0;
  303. rxq->free_count = 0;
  304. rxq->need_update = 0;
  305. return 0;
  306. }
  307. EXPORT_SYMBOL(iwl_rx_queue_alloc);
  308. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  309. {
  310. unsigned long flags;
  311. int i;
  312. spin_lock_irqsave(&rxq->lock, flags);
  313. INIT_LIST_HEAD(&rxq->rx_free);
  314. INIT_LIST_HEAD(&rxq->rx_used);
  315. /* Fill the rx_used queue with _all_ of the Rx buffers */
  316. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  317. /* In the reset function, these buffers may have been allocated
  318. * to an SKB, so we need to unmap and free potential storage */
  319. if (rxq->pool[i].skb != NULL) {
  320. pci_unmap_single(priv->pci_dev,
  321. rxq->pool[i].dma_addr,
  322. priv->hw_params.rx_buf_size,
  323. PCI_DMA_FROMDEVICE);
  324. priv->alloc_rxb_skb--;
  325. dev_kfree_skb(rxq->pool[i].skb);
  326. rxq->pool[i].skb = NULL;
  327. }
  328. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  329. }
  330. /* Set us so that we have processed and used all buffers, but have
  331. * not restocked the Rx queue with fresh buffers */
  332. rxq->read = rxq->write = 0;
  333. rxq->free_count = 0;
  334. spin_unlock_irqrestore(&rxq->lock, flags);
  335. }
  336. EXPORT_SYMBOL(iwl_rx_queue_reset);
  337. int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  338. {
  339. int ret;
  340. unsigned long flags;
  341. unsigned int rb_size;
  342. spin_lock_irqsave(&priv->lock, flags);
  343. ret = iwl_grab_nic_access(priv);
  344. if (ret) {
  345. spin_unlock_irqrestore(&priv->lock, flags);
  346. return ret;
  347. }
  348. if (priv->cfg->mod_params->amsdu_size_8K)
  349. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  350. else
  351. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  352. /* Stop Rx DMA */
  353. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  354. /* Reset driver's Rx queue write index */
  355. iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  356. /* Tell device where to find RBD circular buffer in DRAM */
  357. iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  358. rxq->dma_addr >> 8);
  359. /* Tell device where in DRAM to update its Rx status */
  360. iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  361. (priv->shared_phys + priv->rb_closed_offset) >> 4);
  362. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  363. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  364. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  365. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  366. rb_size |
  367. /* 0x10 << 4 | */
  368. (RX_QUEUE_SIZE_LOG <<
  369. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  370. /*
  371. * iwl_write32(priv,CSR_INT_COAL_REG,0);
  372. */
  373. iwl_release_nic_access(priv);
  374. spin_unlock_irqrestore(&priv->lock, flags);
  375. return 0;
  376. }
  377. int iwl_rxq_stop(struct iwl_priv *priv)
  378. {
  379. int ret;
  380. unsigned long flags;
  381. spin_lock_irqsave(&priv->lock, flags);
  382. ret = iwl_grab_nic_access(priv);
  383. if (unlikely(ret)) {
  384. spin_unlock_irqrestore(&priv->lock, flags);
  385. return ret;
  386. }
  387. /* stop Rx DMA */
  388. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  389. ret = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  390. (1 << 24), 1000);
  391. if (ret < 0)
  392. IWL_ERROR("Can't stop Rx DMA.\n");
  393. iwl_release_nic_access(priv);
  394. spin_unlock_irqrestore(&priv->lock, flags);
  395. return 0;
  396. }
  397. EXPORT_SYMBOL(iwl_rxq_stop);
  398. void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
  399. struct iwl_rx_mem_buffer *rxb)
  400. {
  401. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  402. struct iwl4965_missed_beacon_notif *missed_beacon;
  403. missed_beacon = &pkt->u.missed_beacon;
  404. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  405. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  406. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  407. le32_to_cpu(missed_beacon->total_missed_becons),
  408. le32_to_cpu(missed_beacon->num_recvd_beacons),
  409. le32_to_cpu(missed_beacon->num_expected_beacons));
  410. if (!test_bit(STATUS_SCANNING, &priv->status))
  411. iwl_init_sensitivity(priv);
  412. }
  413. }
  414. EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
  415. int iwl_rx_agg_start(struct iwl_priv *priv, const u8 *addr, int tid, u16 ssn)
  416. {
  417. unsigned long flags;
  418. int sta_id;
  419. sta_id = iwl_find_station(priv, addr);
  420. if (sta_id == IWL_INVALID_STATION)
  421. return -ENXIO;
  422. spin_lock_irqsave(&priv->sta_lock, flags);
  423. priv->stations[sta_id].sta.station_flags_msk = 0;
  424. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  425. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  426. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  427. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  428. spin_unlock_irqrestore(&priv->sta_lock, flags);
  429. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  430. CMD_ASYNC);
  431. }
  432. EXPORT_SYMBOL(iwl_rx_agg_start);
  433. int iwl_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
  434. {
  435. unsigned long flags;
  436. int sta_id;
  437. sta_id = iwl_find_station(priv, addr);
  438. if (sta_id == IWL_INVALID_STATION)
  439. return -ENXIO;
  440. spin_lock_irqsave(&priv->sta_lock, flags);
  441. priv->stations[sta_id].sta.station_flags_msk = 0;
  442. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  443. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  444. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  445. spin_unlock_irqrestore(&priv->sta_lock, flags);
  446. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  447. CMD_ASYNC);
  448. }
  449. EXPORT_SYMBOL(iwl_rx_agg_stop);
  450. /* Calculate noise level, based on measurements during network silence just
  451. * before arriving beacon. This measurement can be done only if we know
  452. * exactly when to expect beacons, therefore only when we're associated. */
  453. static void iwl_rx_calc_noise(struct iwl_priv *priv)
  454. {
  455. struct statistics_rx_non_phy *rx_info
  456. = &(priv->statistics.rx.general);
  457. int num_active_rx = 0;
  458. int total_silence = 0;
  459. int bcn_silence_a =
  460. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  461. int bcn_silence_b =
  462. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  463. int bcn_silence_c =
  464. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  465. if (bcn_silence_a) {
  466. total_silence += bcn_silence_a;
  467. num_active_rx++;
  468. }
  469. if (bcn_silence_b) {
  470. total_silence += bcn_silence_b;
  471. num_active_rx++;
  472. }
  473. if (bcn_silence_c) {
  474. total_silence += bcn_silence_c;
  475. num_active_rx++;
  476. }
  477. /* Average among active antennas */
  478. if (num_active_rx)
  479. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  480. else
  481. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  482. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  483. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  484. priv->last_rx_noise);
  485. }
  486. #define REG_RECALIB_PERIOD (60)
  487. void iwl_rx_statistics(struct iwl_priv *priv,
  488. struct iwl_rx_mem_buffer *rxb)
  489. {
  490. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  491. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  492. (int)sizeof(priv->statistics), pkt->len);
  493. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  494. set_bit(STATUS_STATISTICS, &priv->status);
  495. /* Reschedule the statistics timer to occur in
  496. * REG_RECALIB_PERIOD seconds to ensure we get a
  497. * thermal update even if the uCode doesn't give
  498. * us one */
  499. mod_timer(&priv->statistics_periodic, jiffies +
  500. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  501. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  502. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  503. iwl_rx_calc_noise(priv);
  504. queue_work(priv->workqueue, &priv->run_time_calib_work);
  505. }
  506. iwl_leds_background(priv);
  507. if (priv->cfg->ops->lib->temperature)
  508. priv->cfg->ops->lib->temperature(priv, &pkt->u.stats);
  509. }
  510. EXPORT_SYMBOL(iwl_rx_statistics);
  511. #define PERFECT_RSSI (-20) /* dBm */
  512. #define WORST_RSSI (-95) /* dBm */
  513. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  514. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  515. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  516. * about formulas used below. */
  517. static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  518. {
  519. int sig_qual;
  520. int degradation = PERFECT_RSSI - rssi_dbm;
  521. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  522. * as indicator; formula is (signal dbm - noise dbm).
  523. * SNR at or above 40 is a great signal (100%).
  524. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  525. * Weakest usable signal is usually 10 - 15 dB SNR. */
  526. if (noise_dbm) {
  527. if (rssi_dbm - noise_dbm >= 40)
  528. return 100;
  529. else if (rssi_dbm < noise_dbm)
  530. return 0;
  531. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  532. /* Else use just the signal level.
  533. * This formula is a least squares fit of data points collected and
  534. * compared with a reference system that had a percentage (%) display
  535. * for signal quality. */
  536. } else
  537. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  538. (15 * RSSI_RANGE + 62 * degradation)) /
  539. (RSSI_RANGE * RSSI_RANGE);
  540. if (sig_qual > 100)
  541. sig_qual = 100;
  542. else if (sig_qual < 1)
  543. sig_qual = 0;
  544. return sig_qual;
  545. }
  546. #ifdef CONFIG_IWLWIFI_DEBUG
  547. /**
  548. * iwl_dbg_report_frame - dump frame to syslog during debug sessions
  549. *
  550. * You may hack this function to show different aspects of received frames,
  551. * including selective frame dumps.
  552. * group100 parameter selects whether to show 1 out of 100 good frames.
  553. *
  554. * TODO: This was originally written for 3945, need to audit for
  555. * proper operation with 4965.
  556. */
  557. static void iwl_dbg_report_frame(struct iwl_priv *priv,
  558. struct iwl_rx_packet *pkt,
  559. struct ieee80211_hdr *header, int group100)
  560. {
  561. u32 to_us;
  562. u32 print_summary = 0;
  563. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  564. u32 hundred = 0;
  565. u32 dataframe = 0;
  566. __le16 fc;
  567. u16 seq_ctl;
  568. u16 channel;
  569. u16 phy_flags;
  570. int rate_sym;
  571. u16 length;
  572. u16 status;
  573. u16 bcn_tmr;
  574. u32 tsf_low;
  575. u64 tsf;
  576. u8 rssi;
  577. u8 agc;
  578. u16 sig_avg;
  579. u16 noise_diff;
  580. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  581. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  582. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  583. u8 *data = IWL_RX_DATA(pkt);
  584. if (likely(!(priv->debug_level & IWL_DL_RX)))
  585. return;
  586. /* MAC header */
  587. fc = header->frame_control;
  588. seq_ctl = le16_to_cpu(header->seq_ctrl);
  589. /* metadata */
  590. channel = le16_to_cpu(rx_hdr->channel);
  591. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  592. rate_sym = rx_hdr->rate;
  593. length = le16_to_cpu(rx_hdr->len);
  594. /* end-of-frame status and timestamp */
  595. status = le32_to_cpu(rx_end->status);
  596. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  597. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  598. tsf = le64_to_cpu(rx_end->timestamp);
  599. /* signal statistics */
  600. rssi = rx_stats->rssi;
  601. agc = rx_stats->agc;
  602. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  603. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  604. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  605. /* if data frame is to us and all is good,
  606. * (optionally) print summary for only 1 out of every 100 */
  607. if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
  608. cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  609. dataframe = 1;
  610. if (!group100)
  611. print_summary = 1; /* print each frame */
  612. else if (priv->framecnt_to_us < 100) {
  613. priv->framecnt_to_us++;
  614. print_summary = 0;
  615. } else {
  616. priv->framecnt_to_us = 0;
  617. print_summary = 1;
  618. hundred = 1;
  619. }
  620. } else {
  621. /* print summary for all other frames */
  622. print_summary = 1;
  623. }
  624. if (print_summary) {
  625. char *title;
  626. int rate_idx;
  627. u32 bitrate;
  628. if (hundred)
  629. title = "100Frames";
  630. else if (ieee80211_has_retry(fc))
  631. title = "Retry";
  632. else if (ieee80211_is_assoc_resp(fc))
  633. title = "AscRsp";
  634. else if (ieee80211_is_reassoc_resp(fc))
  635. title = "RasRsp";
  636. else if (ieee80211_is_probe_resp(fc)) {
  637. title = "PrbRsp";
  638. print_dump = 1; /* dump frame contents */
  639. } else if (ieee80211_is_beacon(fc)) {
  640. title = "Beacon";
  641. print_dump = 1; /* dump frame contents */
  642. } else if (ieee80211_is_atim(fc))
  643. title = "ATIM";
  644. else if (ieee80211_is_auth(fc))
  645. title = "Auth";
  646. else if (ieee80211_is_deauth(fc))
  647. title = "DeAuth";
  648. else if (ieee80211_is_disassoc(fc))
  649. title = "DisAssoc";
  650. else
  651. title = "Frame";
  652. rate_idx = iwl_hwrate_to_plcp_idx(rate_sym);
  653. if (unlikely(rate_idx == -1))
  654. bitrate = 0;
  655. else
  656. bitrate = iwl_rates[rate_idx].ieee / 2;
  657. /* print frame summary.
  658. * MAC addresses show just the last byte (for brevity),
  659. * but you can hack it to show more, if you'd like to. */
  660. if (dataframe)
  661. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  662. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  663. title, le16_to_cpu(fc), header->addr1[5],
  664. length, rssi, channel, bitrate);
  665. else {
  666. /* src/dst addresses assume managed mode */
  667. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  668. "src=0x%02x, rssi=%u, tim=%lu usec, "
  669. "phy=0x%02x, chnl=%d\n",
  670. title, le16_to_cpu(fc), header->addr1[5],
  671. header->addr3[5], rssi,
  672. tsf_low - priv->scan_start_tsf,
  673. phy_flags, channel);
  674. }
  675. }
  676. if (print_dump)
  677. iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
  678. }
  679. #else
  680. static inline void iwl_dbg_report_frame(struct iwl_priv *priv,
  681. struct iwl_rx_packet *pkt,
  682. struct ieee80211_hdr *header,
  683. int group100)
  684. {
  685. }
  686. #endif
  687. static void iwl_add_radiotap(struct iwl_priv *priv,
  688. struct sk_buff *skb,
  689. struct iwl4965_rx_phy_res *rx_start,
  690. struct ieee80211_rx_status *stats,
  691. u32 ampdu_status)
  692. {
  693. s8 signal = stats->signal;
  694. s8 noise = 0;
  695. int rate = stats->rate_idx;
  696. u64 tsf = stats->mactime;
  697. __le16 antenna;
  698. __le16 phy_flags_hw = rx_start->phy_flags;
  699. struct iwl4965_rt_rx_hdr {
  700. struct ieee80211_radiotap_header rt_hdr;
  701. __le64 rt_tsf; /* TSF */
  702. u8 rt_flags; /* radiotap packet flags */
  703. u8 rt_rate; /* rate in 500kb/s */
  704. __le16 rt_channelMHz; /* channel in MHz */
  705. __le16 rt_chbitmask; /* channel bitfield */
  706. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  707. s8 rt_dbmnoise;
  708. u8 rt_antenna; /* antenna number */
  709. } __attribute__ ((packed)) *iwl4965_rt;
  710. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  711. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  712. if (net_ratelimit())
  713. printk(KERN_ERR "not enough headroom [%d] for "
  714. "radiotap head [%zd]\n",
  715. skb_headroom(skb), sizeof(*iwl4965_rt));
  716. return;
  717. }
  718. /* put radiotap header in front of 802.11 header and data */
  719. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  720. /* initialise radiotap header */
  721. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  722. iwl4965_rt->rt_hdr.it_pad = 0;
  723. /* total header + data */
  724. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  725. &iwl4965_rt->rt_hdr.it_len);
  726. /* Indicate all the fields we add to the radiotap header */
  727. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  728. (1 << IEEE80211_RADIOTAP_FLAGS) |
  729. (1 << IEEE80211_RADIOTAP_RATE) |
  730. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  731. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  732. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  733. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  734. &iwl4965_rt->rt_hdr.it_present);
  735. /* Zero the flags, we'll add to them as we go */
  736. iwl4965_rt->rt_flags = 0;
  737. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  738. iwl4965_rt->rt_dbmsignal = signal;
  739. iwl4965_rt->rt_dbmnoise = noise;
  740. /* Convert the channel frequency and set the flags */
  741. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  742. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  743. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  744. IEEE80211_CHAN_5GHZ),
  745. &iwl4965_rt->rt_chbitmask);
  746. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  747. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  748. IEEE80211_CHAN_2GHZ),
  749. &iwl4965_rt->rt_chbitmask);
  750. else /* 802.11g */
  751. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  752. IEEE80211_CHAN_2GHZ),
  753. &iwl4965_rt->rt_chbitmask);
  754. if (rate == -1)
  755. iwl4965_rt->rt_rate = 0;
  756. else
  757. iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
  758. /*
  759. * "antenna number"
  760. *
  761. * It seems that the antenna field in the phy flags value
  762. * is actually a bitfield. This is undefined by radiotap,
  763. * it wants an actual antenna number but I always get "7"
  764. * for most legacy frames I receive indicating that the
  765. * same frame was received on all three RX chains.
  766. *
  767. * I think this field should be removed in favour of a
  768. * new 802.11n radiotap field "RX chains" that is defined
  769. * as a bitmask.
  770. */
  771. antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
  772. iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
  773. /* set the preamble flag if appropriate */
  774. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  775. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  776. stats->flag |= RX_FLAG_RADIOTAP;
  777. }
  778. static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  779. {
  780. /* 0 - mgmt, 1 - cnt, 2 - data */
  781. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  782. priv->rx_stats[idx].cnt++;
  783. priv->rx_stats[idx].bytes += len;
  784. }
  785. /*
  786. * returns non-zero if packet should be dropped
  787. */
  788. static int iwl_set_decrypted_flag(struct iwl_priv *priv,
  789. struct ieee80211_hdr *hdr,
  790. u32 decrypt_res,
  791. struct ieee80211_rx_status *stats)
  792. {
  793. u16 fc = le16_to_cpu(hdr->frame_control);
  794. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  795. return 0;
  796. if (!(fc & IEEE80211_FCTL_PROTECTED))
  797. return 0;
  798. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  799. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  800. case RX_RES_STATUS_SEC_TYPE_TKIP:
  801. /* The uCode has got a bad phase 1 Key, pushes the packet.
  802. * Decryption will be done in SW. */
  803. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  804. RX_RES_STATUS_BAD_KEY_TTAK)
  805. break;
  806. case RX_RES_STATUS_SEC_TYPE_WEP:
  807. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  808. RX_RES_STATUS_BAD_ICV_MIC) {
  809. /* bad ICV, the packet is destroyed since the
  810. * decryption is inplace, drop it */
  811. IWL_DEBUG_RX("Packet destroyed\n");
  812. return -1;
  813. }
  814. case RX_RES_STATUS_SEC_TYPE_CCMP:
  815. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  816. RX_RES_STATUS_DECRYPT_OK) {
  817. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  818. stats->flag |= RX_FLAG_DECRYPTED;
  819. }
  820. break;
  821. default:
  822. break;
  823. }
  824. return 0;
  825. }
  826. static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
  827. {
  828. u32 decrypt_out = 0;
  829. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  830. RX_RES_STATUS_STATION_FOUND)
  831. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  832. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  833. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  834. /* packet was not encrypted */
  835. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  836. RX_RES_STATUS_SEC_TYPE_NONE)
  837. return decrypt_out;
  838. /* packet was encrypted with unknown alg */
  839. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  840. RX_RES_STATUS_SEC_TYPE_ERR)
  841. return decrypt_out;
  842. /* decryption was not done in HW */
  843. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  844. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  845. return decrypt_out;
  846. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  847. case RX_RES_STATUS_SEC_TYPE_CCMP:
  848. /* alg is CCM: check MIC only */
  849. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  850. /* Bad MIC */
  851. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  852. else
  853. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  854. break;
  855. case RX_RES_STATUS_SEC_TYPE_TKIP:
  856. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  857. /* Bad TTAK */
  858. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  859. break;
  860. }
  861. /* fall through if TTAK OK */
  862. default:
  863. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  864. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  865. else
  866. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  867. break;
  868. };
  869. IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
  870. decrypt_in, decrypt_out);
  871. return decrypt_out;
  872. }
  873. static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
  874. int include_phy,
  875. struct iwl_rx_mem_buffer *rxb,
  876. struct ieee80211_rx_status *stats)
  877. {
  878. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  879. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  880. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  881. struct ieee80211_hdr *hdr;
  882. u16 len;
  883. __le32 *rx_end;
  884. unsigned int skblen;
  885. u32 ampdu_status;
  886. u32 ampdu_status_legacy;
  887. if (!include_phy && priv->last_phy_res[0])
  888. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  889. if (!rx_start) {
  890. IWL_ERROR("MPDU frame without a PHY data\n");
  891. return;
  892. }
  893. if (include_phy) {
  894. hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
  895. rx_start->cfg_phy_cnt);
  896. len = le16_to_cpu(rx_start->byte_count);
  897. rx_end = (__le32 *) ((u8 *) &pkt->u.raw[0] +
  898. sizeof(struct iwl4965_rx_phy_res) +
  899. rx_start->cfg_phy_cnt + len);
  900. } else {
  901. struct iwl4965_rx_mpdu_res_start *amsdu =
  902. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  903. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  904. sizeof(struct iwl4965_rx_mpdu_res_start));
  905. len = le16_to_cpu(amsdu->byte_count);
  906. rx_start->byte_count = amsdu->byte_count;
  907. rx_end = (__le32 *) (((u8 *) hdr) + len);
  908. }
  909. ampdu_status = le32_to_cpu(*rx_end);
  910. skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
  911. if (!include_phy) {
  912. /* New status scheme, need to translate */
  913. ampdu_status_legacy = ampdu_status;
  914. ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
  915. }
  916. /* start from MAC */
  917. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  918. skb_put(rxb->skb, len); /* end where data ends */
  919. /* We only process data packets if the interface is open */
  920. if (unlikely(!priv->is_open)) {
  921. IWL_DEBUG_DROP_LIMIT
  922. ("Dropping packet while interface is not open.\n");
  923. return;
  924. }
  925. stats->flag = 0;
  926. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  927. /* in case of HW accelerated crypto and bad decryption, drop */
  928. if (!priv->hw_params.sw_crypto &&
  929. iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
  930. return;
  931. if (priv->add_radiotap)
  932. iwl_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  933. iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
  934. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  935. priv->alloc_rxb_skb--;
  936. rxb->skb = NULL;
  937. }
  938. /* Calc max signal level (dBm) among 3 possible receivers */
  939. static int iwl_calc_rssi(struct iwl_priv *priv,
  940. struct iwl4965_rx_phy_res *rx_resp)
  941. {
  942. /* data from PHY/DSP regarding signal strength, etc.,
  943. * contents are always there, not configurable by host. */
  944. struct iwl4965_rx_non_cfg_phy *ncphy =
  945. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  946. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  947. >> IWL_AGC_DB_POS;
  948. u32 valid_antennae =
  949. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  950. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  951. u8 max_rssi = 0;
  952. u32 i;
  953. /* Find max rssi among 3 possible receivers.
  954. * These values are measured by the digital signal processor (DSP).
  955. * They should stay fairly constant even as the signal strength varies,
  956. * if the radio's automatic gain control (AGC) is working right.
  957. * AGC value (see below) will provide the "interesting" info. */
  958. for (i = 0; i < 3; i++)
  959. if (valid_antennae & (1 << i))
  960. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  961. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  962. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  963. max_rssi, agc);
  964. /* dBm = max_rssi dB - agc dB - constant.
  965. * Higher AGC (higher radio gain) means lower signal. */
  966. return max_rssi - agc - IWL_RSSI_OFFSET;
  967. }
  968. static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
  969. {
  970. unsigned long flags;
  971. spin_lock_irqsave(&priv->sta_lock, flags);
  972. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  973. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  974. priv->stations[sta_id].sta.sta.modify_mask = 0;
  975. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  976. spin_unlock_irqrestore(&priv->sta_lock, flags);
  977. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  978. }
  979. static void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
  980. {
  981. /* FIXME: need locking over ps_status ??? */
  982. u8 sta_id = iwl_find_station(priv, addr);
  983. if (sta_id != IWL_INVALID_STATION) {
  984. u8 sta_awake = priv->stations[sta_id].
  985. ps_status == STA_PS_STATUS_WAKE;
  986. if (sta_awake && ps_bit)
  987. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  988. else if (!sta_awake && !ps_bit) {
  989. iwl_sta_modify_ps_wake(priv, sta_id);
  990. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  991. }
  992. }
  993. }
  994. /* This is necessary only for a number of statistics, see the caller. */
  995. static int iwl_is_network_packet(struct iwl_priv *priv,
  996. struct ieee80211_hdr *header)
  997. {
  998. /* Filter incoming packets to determine if they are targeted toward
  999. * this network, discarding packets coming from ourselves */
  1000. switch (priv->iw_mode) {
  1001. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1002. /* packets to our IBSS update information */
  1003. return !compare_ether_addr(header->addr3, priv->bssid);
  1004. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1005. /* packets to our IBSS update information */
  1006. return !compare_ether_addr(header->addr2, priv->bssid);
  1007. default:
  1008. return 1;
  1009. }
  1010. }
  1011. /* Called for REPLY_RX (legacy ABG frames), or
  1012. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  1013. void iwl_rx_reply_rx(struct iwl_priv *priv,
  1014. struct iwl_rx_mem_buffer *rxb)
  1015. {
  1016. struct ieee80211_hdr *header;
  1017. struct ieee80211_rx_status rx_status;
  1018. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1019. /* Use phy data (Rx signal strength, etc.) contained within
  1020. * this rx packet for legacy frames,
  1021. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  1022. int include_phy = (pkt->hdr.cmd == REPLY_RX);
  1023. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  1024. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  1025. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  1026. __le32 *rx_end;
  1027. unsigned int len = 0;
  1028. u16 fc;
  1029. u8 network_packet;
  1030. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  1031. rx_status.freq =
  1032. ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
  1033. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  1034. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  1035. rx_status.rate_idx =
  1036. iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
  1037. if (rx_status.band == IEEE80211_BAND_5GHZ)
  1038. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  1039. rx_status.antenna = 0;
  1040. rx_status.flag = 0;
  1041. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  1042. IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
  1043. rx_start->cfg_phy_cnt);
  1044. return;
  1045. }
  1046. if (!include_phy) {
  1047. if (priv->last_phy_res[0])
  1048. rx_start = (struct iwl4965_rx_phy_res *)
  1049. &priv->last_phy_res[1];
  1050. else
  1051. rx_start = NULL;
  1052. }
  1053. if (!rx_start) {
  1054. IWL_ERROR("MPDU frame without a PHY data\n");
  1055. return;
  1056. }
  1057. if (include_phy) {
  1058. header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
  1059. + rx_start->cfg_phy_cnt);
  1060. len = le16_to_cpu(rx_start->byte_count);
  1061. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  1062. sizeof(struct iwl4965_rx_phy_res) + len);
  1063. } else {
  1064. struct iwl4965_rx_mpdu_res_start *amsdu =
  1065. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  1066. header = (void *)(pkt->u.raw +
  1067. sizeof(struct iwl4965_rx_mpdu_res_start));
  1068. len = le16_to_cpu(amsdu->byte_count);
  1069. rx_end = (__le32 *) (pkt->u.raw +
  1070. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  1071. }
  1072. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  1073. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  1074. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  1075. le32_to_cpu(*rx_end));
  1076. return;
  1077. }
  1078. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  1079. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  1080. rx_status.signal = iwl_calc_rssi(priv, rx_start);
  1081. /* Meaningful noise values are available only from beacon statistics,
  1082. * which are gathered only when associated, and indicate noise
  1083. * only for the associated network channel ...
  1084. * Ignore these noise values while scanning (other channels) */
  1085. if (iwl_is_associated(priv) &&
  1086. !test_bit(STATUS_SCANNING, &priv->status)) {
  1087. rx_status.noise = priv->last_rx_noise;
  1088. rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
  1089. rx_status.noise);
  1090. } else {
  1091. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  1092. rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
  1093. }
  1094. /* Reset beacon noise level if not associated. */
  1095. if (!iwl_is_associated(priv))
  1096. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  1097. /* Set "1" to report good data frames in groups of 100 */
  1098. /* FIXME: need to optimze the call: */
  1099. iwl_dbg_report_frame(priv, pkt, header, 1);
  1100. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  1101. rx_status.signal, rx_status.noise, rx_status.signal,
  1102. (unsigned long long)rx_status.mactime);
  1103. /* Take shortcut when only in monitor mode */
  1104. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  1105. iwl_pass_packet_to_mac80211(priv, include_phy,
  1106. rxb, &rx_status);
  1107. return;
  1108. }
  1109. network_packet = iwl_is_network_packet(priv, header);
  1110. if (network_packet) {
  1111. priv->last_rx_rssi = rx_status.signal;
  1112. priv->last_beacon_time = priv->ucode_beacon_time;
  1113. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  1114. }
  1115. fc = le16_to_cpu(header->frame_control);
  1116. switch (fc & IEEE80211_FCTL_FTYPE) {
  1117. case IEEE80211_FTYPE_MGMT:
  1118. case IEEE80211_FTYPE_DATA:
  1119. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  1120. iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  1121. header->addr2);
  1122. /* fall through */
  1123. default:
  1124. iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
  1125. &rx_status);
  1126. break;
  1127. }
  1128. }
  1129. EXPORT_SYMBOL(iwl_rx_reply_rx);
  1130. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  1131. * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  1132. void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
  1133. struct iwl_rx_mem_buffer *rxb)
  1134. {
  1135. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1136. priv->last_phy_res[0] = 1;
  1137. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  1138. sizeof(struct iwl4965_rx_phy_res));
  1139. }
  1140. EXPORT_SYMBOL(iwl_rx_reply_rx_phy);