Makefile.build 10 KB

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  1. # ==========================================================================
  2. # Building
  3. # ==========================================================================
  4. src := $(obj)
  5. PHONY := __build
  6. __build:
  7. # Init all relevant variables used in kbuild files so
  8. # 1) they have correct type
  9. # 2) they do not inherit any value from the environment
  10. obj-y :=
  11. obj-m :=
  12. lib-y :=
  13. lib-m :=
  14. always :=
  15. targets :=
  16. subdir-y :=
  17. subdir-m :=
  18. EXTRA_AFLAGS :=
  19. EXTRA_CFLAGS :=
  20. EXTRA_CPPFLAGS :=
  21. EXTRA_LDFLAGS :=
  22. # Read .config if it exist, otherwise ignore
  23. -include include/config/auto.conf
  24. include scripts/Kbuild.include
  25. # For backward compatibility check that these variables does not change
  26. save-cflags := $(CFLAGS)
  27. # The filename Kbuild has precedence over Makefile
  28. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  29. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  30. include $(kbuild-file)
  31. # If the save-* variables changed error out
  32. ifeq ($(KBUILD_NOPEDANTIC),)
  33. ifneq ("$(save-cflags)","$(CFLAGS)")
  34. $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
  35. endif
  36. endif
  37. include scripts/Makefile.lib
  38. ifdef host-progs
  39. ifneq ($(hostprogs-y),$(host-progs))
  40. $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
  41. hostprogs-y += $(host-progs)
  42. endif
  43. endif
  44. # Do not include host rules unles needed
  45. ifneq ($(hostprogs-y)$(hostprogs-m),)
  46. include scripts/Makefile.host
  47. endif
  48. ifneq ($(KBUILD_SRC),)
  49. # Create output directory if not already present
  50. _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
  51. # Create directories for object files if directory does not exist
  52. # Needed when obj-y := dir/file.o syntax is used
  53. _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
  54. endif
  55. ifndef obj
  56. $(warning kbuild: Makefile.build is included improperly)
  57. endif
  58. # ===========================================================================
  59. ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
  60. lib-target := $(obj)/lib.a
  61. endif
  62. ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
  63. builtin-target := $(obj)/built-in.o
  64. endif
  65. # We keep a list of all modules in $(MODVERDIR)
  66. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  67. $(if $(KBUILD_MODULES),$(obj-m)) \
  68. $(subdir-ym) $(always)
  69. @:
  70. # Linus' kernel sanity checking tool
  71. ifneq ($(KBUILD_CHECKSRC),0)
  72. ifeq ($(KBUILD_CHECKSRC),2)
  73. quiet_cmd_force_checksrc = CHECK $<
  74. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  75. else
  76. quiet_cmd_checksrc = CHECK $<
  77. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  78. endif
  79. endif
  80. # Compile C sources (.c)
  81. # ---------------------------------------------------------------------------
  82. # Default is built-in, unless we know otherwise
  83. modkern_cflags := $(CFLAGS_KERNEL)
  84. quiet_modtag := $(empty) $(empty)
  85. $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
  86. $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
  87. $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
  88. $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
  89. $(real-objs-m) : quiet_modtag := [M]
  90. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  91. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  92. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  93. $(obj-m) : quiet_modtag := [M]
  94. # Default for not multi-part modules
  95. modname = $(basetarget)
  96. $(multi-objs-m) : modname = $(modname-multi)
  97. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  98. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  99. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  100. $(multi-objs-y) : modname = $(modname-multi)
  101. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  102. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  103. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  104. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  105. cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
  106. $(obj)/%.s: $(src)/%.c FORCE
  107. $(call if_changed_dep,cc_s_c)
  108. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  109. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  110. $(obj)/%.i: $(src)/%.c FORCE
  111. $(call if_changed_dep,cc_i_c)
  112. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  113. cmd_cc_symtypes_c = \
  114. $(CPP) -D__GENKSYMS__ $(c_flags) $< \
  115. | $(GENKSYMS) -T $@ >/dev/null; \
  116. test -s $@ || rm -f $@
  117. $(obj)/%.symtypes : $(src)/%.c FORCE
  118. $(call if_changed_dep,cc_symtypes_c)
  119. # C (.c) files
  120. # The C file is compiled and updated dependency information is generated.
  121. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  122. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  123. ifndef CONFIG_MODVERSIONS
  124. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  125. else
  126. # When module versioning is enabled the following steps are executed:
  127. # o compile a .tmp_<file>.o from <file>.c
  128. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  129. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  130. # are done.
  131. # o otherwise, we calculate symbol versions using the good old
  132. # genksyms on the preprocessed source and postprocess them in a way
  133. # that they are usable as a linker script
  134. # o generate <file>.o from .tmp_<file>.o using the linker to
  135. # replace the unresolved symbols __crc_exported_symbol with
  136. # the actual value of the checksum generated by genksyms
  137. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  138. cmd_modversions = \
  139. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  140. $(CPP) -D__GENKSYMS__ $(c_flags) $< \
  141. | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
  142. -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
  143. > $(@D)/.tmp_$(@F:.o=.ver); \
  144. \
  145. $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  146. -T $(@D)/.tmp_$(@F:.o=.ver); \
  147. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  148. else \
  149. mv -f $(@D)/.tmp_$(@F) $@; \
  150. fi;
  151. endif
  152. define rule_cc_o_c
  153. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  154. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  155. $(cmd_modversions) \
  156. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  157. $(dot-target).tmp; \
  158. rm -f $(depfile); \
  159. mv -f $(dot-target).tmp $(dot-target).cmd
  160. endef
  161. # Built-in and composite module parts
  162. $(obj)/%.o: $(src)/%.c FORCE
  163. $(call cmd,force_checksrc)
  164. $(call if_changed_rule,cc_o_c)
  165. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  166. $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
  167. $(call cmd,force_checksrc)
  168. $(call if_changed_rule,cc_o_c)
  169. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  170. quiet_cmd_cc_lst_c = MKLST $@
  171. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  172. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  173. System.map $(OBJDUMP) > $@
  174. $(obj)/%.lst: $(src)/%.c FORCE
  175. $(call if_changed_dep,cc_lst_c)
  176. # Compile assembler sources (.S)
  177. # ---------------------------------------------------------------------------
  178. modkern_aflags := $(AFLAGS_KERNEL)
  179. $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
  180. $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
  181. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  182. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  183. $(obj)/%.s: $(src)/%.S FORCE
  184. $(call if_changed_dep,as_s_S)
  185. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  186. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  187. $(obj)/%.o: $(src)/%.S FORCE
  188. $(call if_changed_dep,as_o_S)
  189. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  190. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  191. # Linker scripts preprocessor (.lds.S -> .lds)
  192. # ---------------------------------------------------------------------------
  193. quiet_cmd_cpp_lds_S = LDS $@
  194. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
  195. $(obj)/%.lds: $(src)/%.lds.S FORCE
  196. $(call if_changed_dep,cpp_lds_S)
  197. # Build the compiled-in targets
  198. # ---------------------------------------------------------------------------
  199. # To build objects in subdirs, we need to descend into the directories
  200. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  201. #
  202. # Rule to compile a set of .o files into one .o file
  203. #
  204. ifdef builtin-target
  205. quiet_cmd_link_o_target = LD $@
  206. # If the list of objects to link is empty, just create an empty built-in.o
  207. cmd_link_o_target = $(if $(strip $(obj-y)),\
  208. $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
  209. rm -f $@; $(AR) rcs $@)
  210. $(builtin-target): $(obj-y) FORCE
  211. $(call if_changed,link_o_target)
  212. targets += $(builtin-target)
  213. endif # builtin-target
  214. #
  215. # Rule to compile a set of .o files into one .a file
  216. #
  217. ifdef lib-target
  218. quiet_cmd_link_l_target = AR $@
  219. cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
  220. $(lib-target): $(lib-y) FORCE
  221. $(call if_changed,link_l_target)
  222. targets += $(lib-target)
  223. endif
  224. #
  225. # Rule to link composite objects
  226. #
  227. # Composite objects are specified in kbuild makefile as follows:
  228. # <composite-object>-objs := <list of .o files>
  229. # or
  230. # <composite-object>-y := <list of .o files>
  231. link_multi_deps = \
  232. $(filter $(addprefix $(obj)/, \
  233. $($(subst $(obj)/,,$(@:.o=-objs))) \
  234. $($(subst $(obj)/,,$(@:.o=-y)))), $^)
  235. quiet_cmd_link_multi-y = LD $@
  236. cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
  237. quiet_cmd_link_multi-m = LD [M] $@
  238. cmd_link_multi-m = $(cmd_link_multi-y)
  239. # We would rather have a list of rules like
  240. # foo.o: $(foo-objs)
  241. # but that's not so easy, so we rather make all composite objects depend
  242. # on the set of all their parts
  243. $(multi-used-y) : %.o: $(multi-objs-y) FORCE
  244. $(call if_changed,link_multi-y)
  245. $(multi-used-m) : %.o: $(multi-objs-m) FORCE
  246. $(call if_changed,link_multi-m)
  247. @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
  248. targets += $(multi-used-y) $(multi-used-m)
  249. # Descending
  250. # ---------------------------------------------------------------------------
  251. PHONY += $(subdir-ym)
  252. $(subdir-ym):
  253. $(Q)$(MAKE) $(build)=$@
  254. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  255. # ---------------------------------------------------------------------------
  256. PHONY += FORCE
  257. FORCE:
  258. # Read all saved command lines and dependencies for the $(targets) we
  259. # may be building above, using $(if_changed{,_dep}). As an
  260. # optimization, we don't need to read them if the target does not
  261. # exist, we will rebuild anyway in that case.
  262. targets := $(wildcard $(sort $(targets)))
  263. cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
  264. ifneq ($(cmd_files),)
  265. include $(cmd_files)
  266. endif
  267. # Declare the contents of the .PHONY variable as phony. We keep that
  268. # information in a variable se we can use it in if_changed and friends.
  269. .PHONY: $(PHONY)