ide.h 9.8 KB

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  1. /****************************************************************************/
  2. /*
  3. * linux/include/asm-m68knommu/ide.h
  4. *
  5. * Copyright (C) 1994-1996 Linus Torvalds & authors
  6. * Copyright (C) 2001 Lineo Inc., davidm@uclinux.org
  7. */
  8. /****************************************************************************/
  9. #ifndef _M68KNOMMU_IDE_H
  10. #define _M68KNOMMU_IDE_H
  11. #ifdef __KERNEL__
  12. /****************************************************************************/
  13. #include <linux/config.h>
  14. #include <linux/interrupt.h>
  15. #include <asm/setup.h>
  16. #include <asm/io.h>
  17. #include <asm/irq.h>
  18. /****************************************************************************/
  19. /*
  20. * some coldfire specifics
  21. */
  22. #ifdef CONFIG_COLDFIRE
  23. #include <asm/coldfire.h>
  24. #include <asm/mcfsim.h>
  25. /*
  26. * Save some space, only have 1 interface
  27. */
  28. #define MAX_HWIFS 1 /* we only have one interface for now */
  29. #ifdef CONFIG_SECUREEDGEMP3
  30. #define MCFSIM_LOCALCS MCFSIM_CSCR4
  31. #else
  32. #define MCFSIM_LOCALCS MCFSIM_CSCR6
  33. #endif
  34. #endif /* CONFIG_COLDFIRE */
  35. /****************************************************************************/
  36. /*
  37. * Fix up things that may not have been provided
  38. */
  39. #ifndef MAX_HWIFS
  40. #define MAX_HWIFS 4 /* same as the other archs */
  41. #endif
  42. #undef SUPPORT_SLOW_DATA_PORTS
  43. #define SUPPORT_SLOW_DATA_PORTS 0
  44. #undef SUPPORT_VLB_SYNC
  45. #define SUPPORT_VLB_SYNC 0
  46. /* this definition is used only on startup .. */
  47. #undef HD_DATA
  48. #define HD_DATA NULL
  49. #define DBGIDE(fmt,a...)
  50. // #define DBGIDE(fmt,a...) printk(fmt, ##a)
  51. #define IDE_INLINE __inline__
  52. // #define IDE_INLINE
  53. /****************************************************************************/
  54. typedef union {
  55. unsigned all : 8; /* all of the bits together */
  56. struct {
  57. unsigned bit7 : 1; /* always 1 */
  58. unsigned lba : 1; /* using LBA instead of CHS */
  59. unsigned bit5 : 1; /* always 1 */
  60. unsigned unit : 1; /* drive select number, 0 or 1 */
  61. unsigned head : 4; /* always zeros here */
  62. } b;
  63. } select_t;
  64. /*
  65. * our list of ports/irq's for different boards
  66. */
  67. static struct m68k_ide_defaults {
  68. ide_ioreg_t base;
  69. int irq;
  70. } m68k_ide_defaults[MAX_HWIFS] = {
  71. #if defined(CONFIG_SECUREEDGEMP3)
  72. { ((ide_ioreg_t)0x30800000), 29 },
  73. #elif defined(CONFIG_eLIA)
  74. { ((ide_ioreg_t)0x30c00000), 29 },
  75. #else
  76. { ((ide_ioreg_t)0x0), 0 }
  77. #endif
  78. };
  79. /****************************************************************************/
  80. static IDE_INLINE int ide_default_irq(ide_ioreg_t base)
  81. {
  82. int i;
  83. for (i = 0; i < MAX_HWIFS; i++)
  84. if (m68k_ide_defaults[i].base == base)
  85. return(m68k_ide_defaults[i].irq);
  86. return 0;
  87. }
  88. static IDE_INLINE ide_ioreg_t ide_default_io_base(int index)
  89. {
  90. if (index >= 0 && index < MAX_HWIFS)
  91. return(m68k_ide_defaults[index].base);
  92. return 0;
  93. }
  94. /*
  95. * Set up a hw structure for a specified data port, control port and IRQ.
  96. * This should follow whatever the default interface uses.
  97. */
  98. static IDE_INLINE void ide_init_hwif_ports(
  99. hw_regs_t *hw,
  100. ide_ioreg_t data_port,
  101. ide_ioreg_t ctrl_port,
  102. int *irq)
  103. {
  104. ide_ioreg_t reg = data_port;
  105. int i;
  106. for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
  107. hw->io_ports[i] = reg;
  108. reg += 1;
  109. }
  110. if (ctrl_port) {
  111. hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
  112. } else {
  113. hw->io_ports[IDE_CONTROL_OFFSET] = data_port + 0xe;
  114. }
  115. }
  116. #define ide_init_default_irq(base) ide_default_irq(base)
  117. static IDE_INLINE int
  118. ide_request_irq(
  119. unsigned int irq,
  120. void (*handler)(int, void *, struct pt_regs *),
  121. unsigned long flags,
  122. const char *device,
  123. void *dev_id)
  124. {
  125. #ifdef CONFIG_COLDFIRE
  126. mcf_autovector(irq);
  127. #endif
  128. return(request_irq(irq, handler, flags, device, dev_id));
  129. }
  130. static IDE_INLINE void
  131. ide_free_irq(unsigned int irq, void *dev_id)
  132. {
  133. free_irq(irq, dev_id);
  134. }
  135. static IDE_INLINE void
  136. ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name)
  137. {
  138. }
  139. static IDE_INLINE void
  140. ide_release_region(ide_ioreg_t from, unsigned int extent)
  141. {
  142. }
  143. static IDE_INLINE void
  144. ide_fix_driveid(struct hd_driveid *id)
  145. {
  146. #ifdef CONFIG_COLDFIRE
  147. int i, n;
  148. unsigned short *wp = (unsigned short *) id;
  149. int avoid[] = {49, 51, 52, 59, -1 }; /* do not swap these words */
  150. /* Need to byte swap shorts, but not char fields */
  151. for (i = n = 0; i < sizeof(*id) / sizeof(*wp); i++, wp++) {
  152. if (avoid[n] == i) {
  153. n++;
  154. continue;
  155. }
  156. *wp = ((*wp & 0xff) << 8) | ((*wp >> 8) & 0xff);
  157. }
  158. /* have to word swap the one 32 bit field */
  159. id->lba_capacity = ((id->lba_capacity & 0xffff) << 16) |
  160. ((id->lba_capacity >> 16) & 0xffff);
  161. #endif
  162. }
  163. static IDE_INLINE void
  164. ide_release_lock (int *ide_lock)
  165. {
  166. }
  167. static IDE_INLINE void
  168. ide_get_lock(
  169. int *ide_lock,
  170. void (*handler)(int, void *, struct pt_regs *),
  171. void *data)
  172. {
  173. }
  174. #define ide_ack_intr(hwif) \
  175. ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
  176. #define ide__sti() __sti()
  177. /****************************************************************************/
  178. /*
  179. * System specific IO requirements
  180. */
  181. #ifdef CONFIG_COLDFIRE
  182. #ifdef CONFIG_SECUREEDGEMP3
  183. /* Replace standard IO functions for funky mapping of MP3 board */
  184. #undef outb
  185. #undef outb_p
  186. #undef inb
  187. #undef inb_p
  188. #define outb(v, a) ide_outb(v, (unsigned long) (a))
  189. #define outb_p(v, a) ide_outb(v, (unsigned long) (a))
  190. #define inb(a) ide_inb((unsigned long) (a))
  191. #define inb_p(a) ide_inb((unsigned long) (a))
  192. #define ADDR8_PTR(addr) (((addr) & 0x1) ? (0x8000 + (addr) - 1) : (addr))
  193. #define ADDR16_PTR(addr) (addr)
  194. #define ADDR32_PTR(addr) (addr)
  195. #define SWAP8(w) ((((w) & 0xffff) << 8) | (((w) & 0xffff) >> 8))
  196. #define SWAP16(w) (w)
  197. #define SWAP32(w) (w)
  198. static IDE_INLINE void
  199. ide_outb(unsigned int val, unsigned int addr)
  200. {
  201. volatile unsigned short *rp;
  202. DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
  203. rp = (volatile unsigned short *) ADDR8_PTR(addr);
  204. *rp = SWAP8(val);
  205. }
  206. static IDE_INLINE int
  207. ide_inb(unsigned int addr)
  208. {
  209. volatile unsigned short *rp, val;
  210. DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
  211. rp = (volatile unsigned short *) ADDR8_PTR(addr);
  212. val = *rp;
  213. return(SWAP8(val));
  214. }
  215. static IDE_INLINE void
  216. ide_outw(unsigned int val, unsigned int addr)
  217. {
  218. volatile unsigned short *rp;
  219. DBGIDE("%s(val=%x,addr=%x)\n", __FUNCTION__, val, addr);
  220. rp = (volatile unsigned short *) ADDR16_PTR(addr);
  221. *rp = SWAP16(val);
  222. }
  223. static IDE_INLINE void
  224. ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
  225. {
  226. volatile unsigned short *rp, val;
  227. unsigned short *buf;
  228. DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
  229. buf = (unsigned short *) vbuf;
  230. rp = (volatile unsigned short *) ADDR16_PTR(addr);
  231. for (; (len > 0); len--) {
  232. val = *buf++;
  233. *rp = SWAP16(val);
  234. }
  235. }
  236. static IDE_INLINE int
  237. ide_inw(unsigned int addr)
  238. {
  239. volatile unsigned short *rp, val;
  240. DBGIDE("%s(addr=%x)\n", __FUNCTION__, addr);
  241. rp = (volatile unsigned short *) ADDR16_PTR(addr);
  242. val = *rp;
  243. return(SWAP16(val));
  244. }
  245. static IDE_INLINE void
  246. ide_insw(unsigned int addr, void *vbuf, unsigned long len)
  247. {
  248. volatile unsigned short *rp;
  249. unsigned short w, *buf;
  250. DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
  251. buf = (unsigned short *) vbuf;
  252. rp = (volatile unsigned short *) ADDR16_PTR(addr);
  253. for (; (len > 0); len--) {
  254. w = *rp;
  255. *buf++ = SWAP16(w);
  256. }
  257. }
  258. static IDE_INLINE void
  259. ide_insl(unsigned int addr, void *vbuf, unsigned long len)
  260. {
  261. volatile unsigned long *rp;
  262. unsigned long w, *buf;
  263. DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
  264. buf = (unsigned long *) vbuf;
  265. rp = (volatile unsigned long *) ADDR32_PTR(addr);
  266. for (; (len > 0); len--) {
  267. w = *rp;
  268. *buf++ = SWAP32(w);
  269. }
  270. }
  271. static IDE_INLINE void
  272. ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
  273. {
  274. volatile unsigned long *rp, val;
  275. unsigned long *buf;
  276. DBGIDE("%s(addr=%x,vbuf=%p,len=%x)\n", __FUNCTION__, addr, vbuf, len);
  277. buf = (unsigned long *) vbuf;
  278. rp = (volatile unsigned long *) ADDR32_PTR(addr);
  279. for (; (len > 0); len--) {
  280. val = *buf++;
  281. *rp = SWAP32(val);
  282. }
  283. }
  284. #elif CONFIG_eLIA
  285. /* 8/16 bit acesses are controlled by flicking bits in the CS register */
  286. #define ACCESS_MODE_16BIT() \
  287. *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0080
  288. #define ACCESS_MODE_8BIT() \
  289. *((volatile unsigned short *) (MCF_MBAR + MCFSIM_LOCALCS)) = 0x0040
  290. static IDE_INLINE void
  291. ide_outw(unsigned int val, unsigned int addr)
  292. {
  293. ACCESS_MODE_16BIT();
  294. outw(val, addr);
  295. ACCESS_MODE_8BIT();
  296. }
  297. static IDE_INLINE void
  298. ide_outsw(unsigned int addr, const void *vbuf, unsigned long len)
  299. {
  300. ACCESS_MODE_16BIT();
  301. outsw(addr, vbuf, len);
  302. ACCESS_MODE_8BIT();
  303. }
  304. static IDE_INLINE int
  305. ide_inw(unsigned int addr)
  306. {
  307. int ret;
  308. ACCESS_MODE_16BIT();
  309. ret = inw(addr);
  310. ACCESS_MODE_8BIT();
  311. return(ret);
  312. }
  313. static IDE_INLINE void
  314. ide_insw(unsigned int addr, void *vbuf, unsigned long len)
  315. {
  316. ACCESS_MODE_16BIT();
  317. insw(addr, vbuf, len);
  318. ACCESS_MODE_8BIT();
  319. }
  320. static IDE_INLINE void
  321. ide_insl(unsigned int addr, void *vbuf, unsigned long len)
  322. {
  323. ACCESS_MODE_16BIT();
  324. insl(addr, vbuf, len);
  325. ACCESS_MODE_8BIT();
  326. }
  327. static IDE_INLINE void
  328. ide_outsl(unsigned int addr, const void *vbuf, unsigned long len)
  329. {
  330. ACCESS_MODE_16BIT();
  331. outsl(addr, vbuf, len);
  332. ACCESS_MODE_8BIT();
  333. }
  334. #endif /* CONFIG_SECUREEDGEMP3 */
  335. #undef outw
  336. #undef outw_p
  337. #undef outsw
  338. #undef inw
  339. #undef inw_p
  340. #undef insw
  341. #undef insl
  342. #undef outsl
  343. #define outw(v, a) ide_outw(v, (unsigned long) (a))
  344. #define outw_p(v, a) ide_outw(v, (unsigned long) (a))
  345. #define outsw(a, b, n) ide_outsw((unsigned long) (a), b, n)
  346. #define inw(a) ide_inw((unsigned long) (a))
  347. #define inw_p(a) ide_inw((unsigned long) (a))
  348. #define insw(a, b, n) ide_insw((unsigned long) (a), b, n)
  349. #define insl(a, b, n) ide_insl((unsigned long) (a), b, n)
  350. #define outsl(a, b, n) ide_outsl((unsigned long) (a), b, n)
  351. #endif CONFIG_COLDFIRE
  352. /****************************************************************************/
  353. #endif /* __KERNEL__ */
  354. #endif /* _M68KNOMMU_IDE_H */
  355. /****************************************************************************/