iwl4965-base.c 264 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.23k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For normal Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  419. int is_ap, u8 flags, void *ht_data)
  420. {
  421. int i;
  422. int index = IWL_INVALID_STATION;
  423. struct iwl4965_station_entry *station;
  424. unsigned long flags_spin;
  425. DECLARE_MAC_BUF(mac);
  426. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  427. if (is_ap)
  428. index = IWL_AP_ID;
  429. else if (is_broadcast_ether_addr(addr))
  430. index = priv->hw_setting.bcast_sta_id;
  431. else
  432. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  433. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  434. addr)) {
  435. index = i;
  436. break;
  437. }
  438. if (!priv->stations[i].used &&
  439. index == IWL_INVALID_STATION)
  440. index = i;
  441. }
  442. /* These two conditions have the same outcome, but keep them separate
  443. since they have different meanings */
  444. if (unlikely(index == IWL_INVALID_STATION)) {
  445. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  446. return index;
  447. }
  448. if (priv->stations[index].used &&
  449. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  450. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  451. return index;
  452. }
  453. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  454. station = &priv->stations[index];
  455. station->used = 1;
  456. priv->num_stations++;
  457. /* Set up the REPLY_ADD_STA command to send to device */
  458. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  459. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  460. station->sta.mode = 0;
  461. station->sta.sta.sta_id = index;
  462. station->sta.station_flags = 0;
  463. #ifdef CONFIG_IWL4965_HT
  464. /* BCAST station and IBSS stations do not work in HT mode */
  465. if (index != priv->hw_setting.bcast_sta_id &&
  466. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  467. iwl4965_set_ht_add_station(priv, index,
  468. (struct ieee80211_ht_info *) ht_data);
  469. #endif /*CONFIG_IWL4965_HT*/
  470. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  471. /* Add station to device's station table */
  472. iwl4965_send_add_station(priv, &station->sta, flags);
  473. return index;
  474. }
  475. /*************** DRIVER STATUS FUNCTIONS *****/
  476. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  477. {
  478. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  479. * set but EXIT_PENDING is not */
  480. return test_bit(STATUS_READY, &priv->status) &&
  481. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  482. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  483. }
  484. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_ALIVE, &priv->status);
  487. }
  488. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_INIT, &priv->status);
  491. }
  492. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  493. {
  494. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  495. test_bit(STATUS_RF_KILL_SW, &priv->status);
  496. }
  497. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  498. {
  499. if (iwl4965_is_rfkill(priv))
  500. return 0;
  501. return iwl4965_is_ready(priv);
  502. }
  503. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  504. #define IWL_CMD(x) case x : return #x
  505. static const char *get_cmd_string(u8 cmd)
  506. {
  507. switch (cmd) {
  508. IWL_CMD(REPLY_ALIVE);
  509. IWL_CMD(REPLY_ERROR);
  510. IWL_CMD(REPLY_RXON);
  511. IWL_CMD(REPLY_RXON_ASSOC);
  512. IWL_CMD(REPLY_QOS_PARAM);
  513. IWL_CMD(REPLY_RXON_TIMING);
  514. IWL_CMD(REPLY_ADD_STA);
  515. IWL_CMD(REPLY_REMOVE_STA);
  516. IWL_CMD(REPLY_REMOVE_ALL_STA);
  517. IWL_CMD(REPLY_TX);
  518. IWL_CMD(REPLY_RATE_SCALE);
  519. IWL_CMD(REPLY_LEDS_CMD);
  520. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  521. IWL_CMD(RADAR_NOTIFICATION);
  522. IWL_CMD(REPLY_QUIET_CMD);
  523. IWL_CMD(REPLY_CHANNEL_SWITCH);
  524. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  525. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  526. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  527. IWL_CMD(POWER_TABLE_CMD);
  528. IWL_CMD(PM_SLEEP_NOTIFICATION);
  529. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  530. IWL_CMD(REPLY_SCAN_CMD);
  531. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  532. IWL_CMD(SCAN_START_NOTIFICATION);
  533. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  534. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  535. IWL_CMD(BEACON_NOTIFICATION);
  536. IWL_CMD(REPLY_TX_BEACON);
  537. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  538. IWL_CMD(QUIET_NOTIFICATION);
  539. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  540. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  541. IWL_CMD(REPLY_BT_CONFIG);
  542. IWL_CMD(REPLY_STATISTICS_CMD);
  543. IWL_CMD(STATISTICS_NOTIFICATION);
  544. IWL_CMD(REPLY_CARD_STATE_CMD);
  545. IWL_CMD(CARD_STATE_NOTIFICATION);
  546. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  547. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  548. IWL_CMD(SENSITIVITY_CMD);
  549. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  550. IWL_CMD(REPLY_RX_PHY_CMD);
  551. IWL_CMD(REPLY_RX_MPDU_CMD);
  552. IWL_CMD(REPLY_4965_RX);
  553. IWL_CMD(REPLY_COMPRESSED_BA);
  554. default:
  555. return "UNKNOWN";
  556. }
  557. }
  558. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  559. /**
  560. * iwl4965_enqueue_hcmd - enqueue a uCode command
  561. * @priv: device private data point
  562. * @cmd: a point to the ucode command structure
  563. *
  564. * The function returns < 0 values to indicate the operation is
  565. * failed. On success, it turns the index (> 0) of command in the
  566. * command queue.
  567. */
  568. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  569. {
  570. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  571. struct iwl4965_queue *q = &txq->q;
  572. struct iwl4965_tfd_frame *tfd;
  573. u32 *control_flags;
  574. struct iwl4965_cmd *out_cmd;
  575. u32 idx;
  576. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  577. dma_addr_t phys_addr;
  578. int ret;
  579. unsigned long flags;
  580. /* If any of the command structures end up being larger than
  581. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  582. * we will need to increase the size of the TFD entries */
  583. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  584. !(cmd->meta.flags & CMD_SIZE_HUGE));
  585. if (iwl4965_is_rfkill(priv)) {
  586. IWL_DEBUG_INFO("Not sending command - RF KILL");
  587. return -EIO;
  588. }
  589. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  590. IWL_ERROR("No space for Tx\n");
  591. return -ENOSPC;
  592. }
  593. spin_lock_irqsave(&priv->hcmd_lock, flags);
  594. tfd = &txq->bd[q->write_ptr];
  595. memset(tfd, 0, sizeof(*tfd));
  596. control_flags = (u32 *) tfd;
  597. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  598. out_cmd = &txq->cmd[idx];
  599. out_cmd->hdr.cmd = cmd->id;
  600. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  601. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  602. /* At this point, the out_cmd now has all of the incoming cmd
  603. * information */
  604. out_cmd->hdr.flags = 0;
  605. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  606. INDEX_TO_SEQ(q->write_ptr));
  607. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  608. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  609. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  610. offsetof(struct iwl4965_cmd, hdr);
  611. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  612. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  613. "%d bytes at %d[%d]:%d\n",
  614. get_cmd_string(out_cmd->hdr.cmd),
  615. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  616. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  617. txq->need_update = 1;
  618. /* Set up entry in queue's byte count circular buffer */
  619. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  620. /* Increment and update queue's write index */
  621. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  622. iwl4965_tx_queue_update_write_ptr(priv, txq);
  623. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  624. return ret ? ret : idx;
  625. }
  626. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  627. {
  628. int ret;
  629. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  630. /* An asynchronous command can not expect an SKB to be set. */
  631. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  632. /* An asynchronous command MUST have a callback. */
  633. BUG_ON(!cmd->meta.u.callback);
  634. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  635. return -EBUSY;
  636. ret = iwl4965_enqueue_hcmd(priv, cmd);
  637. if (ret < 0) {
  638. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  639. get_cmd_string(cmd->id), ret);
  640. return ret;
  641. }
  642. return 0;
  643. }
  644. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  645. {
  646. int cmd_idx;
  647. int ret;
  648. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  649. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  650. /* A synchronous command can not have a callback set. */
  651. BUG_ON(cmd->meta.u.callback != NULL);
  652. if (atomic_xchg(&entry, 1)) {
  653. IWL_ERROR("Error sending %s: Already sending a host command\n",
  654. get_cmd_string(cmd->id));
  655. return -EBUSY;
  656. }
  657. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  658. if (cmd->meta.flags & CMD_WANT_SKB)
  659. cmd->meta.source = &cmd->meta;
  660. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  661. if (cmd_idx < 0) {
  662. ret = cmd_idx;
  663. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  664. get_cmd_string(cmd->id), ret);
  665. goto out;
  666. }
  667. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  668. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  669. HOST_COMPLETE_TIMEOUT);
  670. if (!ret) {
  671. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  672. IWL_ERROR("Error sending %s: time out after %dms.\n",
  673. get_cmd_string(cmd->id),
  674. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  675. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  676. ret = -ETIMEDOUT;
  677. goto cancel;
  678. }
  679. }
  680. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  681. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  682. get_cmd_string(cmd->id));
  683. ret = -ECANCELED;
  684. goto fail;
  685. }
  686. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  687. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  688. get_cmd_string(cmd->id));
  689. ret = -EIO;
  690. goto fail;
  691. }
  692. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  693. IWL_ERROR("Error: Response NULL in '%s'\n",
  694. get_cmd_string(cmd->id));
  695. ret = -EIO;
  696. goto out;
  697. }
  698. ret = 0;
  699. goto out;
  700. cancel:
  701. if (cmd->meta.flags & CMD_WANT_SKB) {
  702. struct iwl4965_cmd *qcmd;
  703. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  704. * TX cmd queue. Otherwise in case the cmd comes
  705. * in later, it will possibly set an invalid
  706. * address (cmd->meta.source). */
  707. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  708. qcmd->meta.flags &= ~CMD_WANT_SKB;
  709. }
  710. fail:
  711. if (cmd->meta.u.skb) {
  712. dev_kfree_skb_any(cmd->meta.u.skb);
  713. cmd->meta.u.skb = NULL;
  714. }
  715. out:
  716. atomic_set(&entry, 0);
  717. return ret;
  718. }
  719. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  720. {
  721. if (cmd->meta.flags & CMD_ASYNC)
  722. return iwl4965_send_cmd_async(priv, cmd);
  723. return iwl4965_send_cmd_sync(priv, cmd);
  724. }
  725. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  726. {
  727. struct iwl4965_host_cmd cmd = {
  728. .id = id,
  729. .len = len,
  730. .data = data,
  731. };
  732. return iwl4965_send_cmd_sync(priv, &cmd);
  733. }
  734. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  735. {
  736. struct iwl4965_host_cmd cmd = {
  737. .id = id,
  738. .len = sizeof(val),
  739. .data = &val,
  740. };
  741. return iwl4965_send_cmd_sync(priv, &cmd);
  742. }
  743. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  744. {
  745. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  746. }
  747. /**
  748. * iwl4965_rxon_add_station - add station into station table.
  749. *
  750. * there is only one AP station with id= IWL_AP_ID
  751. * NOTE: mutex must be held before calling this fnction
  752. */
  753. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  754. const u8 *addr, int is_ap)
  755. {
  756. u8 sta_id;
  757. /* Add station to device's station table */
  758. #ifdef CONFIG_IWL4965_HT
  759. struct ieee80211_conf *conf = &priv->hw->conf;
  760. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  761. if ((is_ap) &&
  762. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  763. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, cur_ht_config);
  766. else
  767. #endif /* CONFIG_IWL4965_HT */
  768. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  769. 0, NULL);
  770. /* Set up default rate scaling table in device's station table */
  771. iwl4965_add_station(priv, addr, is_ap);
  772. return sta_id;
  773. }
  774. /**
  775. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  776. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  777. * @channel: Any channel valid for the requested phymode
  778. * In addition to setting the staging RXON, priv->phymode is also set.
  779. *
  780. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  781. * in the staging RXON flag structure based on the phymode
  782. */
  783. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  784. u16 channel)
  785. {
  786. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  787. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  788. channel, phymode);
  789. return -EINVAL;
  790. }
  791. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  792. (priv->phymode == phymode))
  793. return 0;
  794. priv->staging_rxon.channel = cpu_to_le16(channel);
  795. if (phymode == MODE_IEEE80211A)
  796. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  797. else
  798. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  799. priv->phymode = phymode;
  800. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  801. return 0;
  802. }
  803. /**
  804. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  805. *
  806. * NOTE: This is really only useful during development and can eventually
  807. * be #ifdef'd out once the driver is stable and folks aren't actively
  808. * making changes
  809. */
  810. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  811. {
  812. int error = 0;
  813. int counter = 1;
  814. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  815. error |= le32_to_cpu(rxon->flags &
  816. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  817. RXON_FLG_RADAR_DETECT_MSK));
  818. if (error)
  819. IWL_WARNING("check 24G fields %d | %d\n",
  820. counter++, error);
  821. } else {
  822. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  823. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  824. if (error)
  825. IWL_WARNING("check 52 fields %d | %d\n",
  826. counter++, error);
  827. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  828. if (error)
  829. IWL_WARNING("check 52 CCK %d | %d\n",
  830. counter++, error);
  831. }
  832. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  833. if (error)
  834. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  835. /* make sure basic rates 6Mbps and 1Mbps are supported */
  836. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  837. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  838. if (error)
  839. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  840. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  841. if (error)
  842. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  843. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  844. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  845. if (error)
  846. IWL_WARNING("check CCK and short slot %d | %d\n",
  847. counter++, error);
  848. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  849. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  850. if (error)
  851. IWL_WARNING("check CCK & auto detect %d | %d\n",
  852. counter++, error);
  853. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  854. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  855. if (error)
  856. IWL_WARNING("check TGG and auto detect %d | %d\n",
  857. counter++, error);
  858. if (error)
  859. IWL_WARNING("Tuning to channel %d\n",
  860. le16_to_cpu(rxon->channel));
  861. if (error) {
  862. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  863. return -1;
  864. }
  865. return 0;
  866. }
  867. /**
  868. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  869. * @priv: staging_rxon is compared to active_rxon
  870. *
  871. * If the RXON structure is changing enough to require a new tune,
  872. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  873. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  874. */
  875. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  876. {
  877. /* These items are only settable from the full RXON command */
  878. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  879. compare_ether_addr(priv->staging_rxon.bssid_addr,
  880. priv->active_rxon.bssid_addr) ||
  881. compare_ether_addr(priv->staging_rxon.node_addr,
  882. priv->active_rxon.node_addr) ||
  883. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  884. priv->active_rxon.wlap_bssid_addr) ||
  885. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  886. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  887. (priv->staging_rxon.air_propagation !=
  888. priv->active_rxon.air_propagation) ||
  889. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  890. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  891. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  892. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  893. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  894. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  895. return 1;
  896. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  897. * be updated with the RXON_ASSOC command -- however only some
  898. * flag transitions are allowed using RXON_ASSOC */
  899. /* Check if we are not switching bands */
  900. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  901. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  902. return 1;
  903. /* Check if we are switching association toggle */
  904. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  905. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  906. return 1;
  907. return 0;
  908. }
  909. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  910. {
  911. int rc = 0;
  912. struct iwl4965_rx_packet *res = NULL;
  913. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  914. struct iwl4965_host_cmd cmd = {
  915. .id = REPLY_RXON_ASSOC,
  916. .len = sizeof(rxon_assoc),
  917. .meta.flags = CMD_WANT_SKB,
  918. .data = &rxon_assoc,
  919. };
  920. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  921. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  922. if ((rxon1->flags == rxon2->flags) &&
  923. (rxon1->filter_flags == rxon2->filter_flags) &&
  924. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  925. (rxon1->ofdm_ht_single_stream_basic_rates ==
  926. rxon2->ofdm_ht_single_stream_basic_rates) &&
  927. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  928. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  929. (rxon1->rx_chain == rxon2->rx_chain) &&
  930. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  931. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  932. return 0;
  933. }
  934. rxon_assoc.flags = priv->staging_rxon.flags;
  935. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  936. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  937. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  938. rxon_assoc.reserved = 0;
  939. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  940. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  941. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  942. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  943. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  944. rc = iwl4965_send_cmd_sync(priv, &cmd);
  945. if (rc)
  946. return rc;
  947. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  948. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  949. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  950. rc = -EIO;
  951. }
  952. priv->alloc_rxb_skb--;
  953. dev_kfree_skb_any(cmd.meta.u.skb);
  954. return rc;
  955. }
  956. /**
  957. * iwl4965_commit_rxon - commit staging_rxon to hardware
  958. *
  959. * The RXON command in staging_rxon is committed to the hardware and
  960. * the active_rxon structure is updated with the new data. This
  961. * function correctly transitions out of the RXON_ASSOC_MSK state if
  962. * a HW tune is required based on the RXON structure changes.
  963. */
  964. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  965. {
  966. /* cast away the const for active_rxon in this function */
  967. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  968. DECLARE_MAC_BUF(mac);
  969. int rc = 0;
  970. if (!iwl4965_is_alive(priv))
  971. return -1;
  972. /* always get timestamp with Rx frame */
  973. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  974. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  975. if (rc) {
  976. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  977. return -EINVAL;
  978. }
  979. /* If we don't need to send a full RXON, we can use
  980. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  981. * and other flags for the current radio configuration. */
  982. if (!iwl4965_full_rxon_required(priv)) {
  983. rc = iwl4965_send_rxon_assoc(priv);
  984. if (rc) {
  985. IWL_ERROR("Error setting RXON_ASSOC "
  986. "configuration (%d).\n", rc);
  987. return rc;
  988. }
  989. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  990. return 0;
  991. }
  992. /* station table will be cleared */
  993. priv->assoc_station_added = 0;
  994. #ifdef CONFIG_IWL4965_SENSITIVITY
  995. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  996. if (!priv->error_recovering)
  997. priv->start_calib = 0;
  998. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  999. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1000. /* If we are currently associated and the new config requires
  1001. * an RXON_ASSOC and the new config wants the associated mask enabled,
  1002. * we must clear the associated from the active configuration
  1003. * before we apply the new config */
  1004. if (iwl4965_is_associated(priv) &&
  1005. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1006. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1007. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1008. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1009. sizeof(struct iwl4965_rxon_cmd),
  1010. &priv->active_rxon);
  1011. /* If the mask clearing failed then we set
  1012. * active_rxon back to what it was previously */
  1013. if (rc) {
  1014. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1015. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1016. "configuration (%d).\n", rc);
  1017. return rc;
  1018. }
  1019. }
  1020. IWL_DEBUG_INFO("Sending RXON\n"
  1021. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1022. "* channel = %d\n"
  1023. "* bssid = %s\n",
  1024. ((priv->staging_rxon.filter_flags &
  1025. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1026. le16_to_cpu(priv->staging_rxon.channel),
  1027. print_mac(mac, priv->staging_rxon.bssid_addr));
  1028. /* Apply the new configuration */
  1029. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1030. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1031. if (rc) {
  1032. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1033. return rc;
  1034. }
  1035. iwl4965_clear_stations_table(priv);
  1036. #ifdef CONFIG_IWL4965_SENSITIVITY
  1037. if (!priv->error_recovering)
  1038. priv->start_calib = 0;
  1039. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1040. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1041. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1042. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1043. /* If we issue a new RXON command which required a tune then we must
  1044. * send a new TXPOWER command or we won't be able to Tx any frames */
  1045. rc = iwl4965_hw_reg_send_txpower(priv);
  1046. if (rc) {
  1047. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1048. return rc;
  1049. }
  1050. /* Add the broadcast address so we can send broadcast frames */
  1051. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1052. IWL_INVALID_STATION) {
  1053. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1054. return -EIO;
  1055. }
  1056. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1057. * add the IWL_AP_ID to the station rate table */
  1058. if (iwl4965_is_associated(priv) &&
  1059. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1060. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1061. == IWL_INVALID_STATION) {
  1062. IWL_ERROR("Error adding AP address for transmit.\n");
  1063. return -EIO;
  1064. }
  1065. priv->assoc_station_added = 1;
  1066. }
  1067. return 0;
  1068. }
  1069. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1070. {
  1071. struct iwl4965_bt_cmd bt_cmd = {
  1072. .flags = 3,
  1073. .lead_time = 0xAA,
  1074. .max_kill = 1,
  1075. .kill_ack_mask = 0,
  1076. .kill_cts_mask = 0,
  1077. };
  1078. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1079. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1080. }
  1081. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1082. {
  1083. int rc = 0;
  1084. struct iwl4965_rx_packet *res;
  1085. struct iwl4965_host_cmd cmd = {
  1086. .id = REPLY_SCAN_ABORT_CMD,
  1087. .meta.flags = CMD_WANT_SKB,
  1088. };
  1089. /* If there isn't a scan actively going on in the hardware
  1090. * then we are in between scan bands and not actually
  1091. * actively scanning, so don't send the abort command */
  1092. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1093. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1094. return 0;
  1095. }
  1096. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1097. if (rc) {
  1098. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1099. return rc;
  1100. }
  1101. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1102. if (res->u.status != CAN_ABORT_STATUS) {
  1103. /* The scan abort will return 1 for success or
  1104. * 2 for "failure". A failure condition can be
  1105. * due to simply not being in an active scan which
  1106. * can occur if we send the scan abort before we
  1107. * the microcode has notified us that a scan is
  1108. * completed. */
  1109. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1110. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1111. clear_bit(STATUS_SCAN_HW, &priv->status);
  1112. }
  1113. dev_kfree_skb_any(cmd.meta.u.skb);
  1114. return rc;
  1115. }
  1116. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1117. struct iwl4965_cmd *cmd,
  1118. struct sk_buff *skb)
  1119. {
  1120. return 1;
  1121. }
  1122. /*
  1123. * CARD_STATE_CMD
  1124. *
  1125. * Use: Sets the device's internal card state to enable, disable, or halt
  1126. *
  1127. * When in the 'enable' state the card operates as normal.
  1128. * When in the 'disable' state, the card enters into a low power mode.
  1129. * When in the 'halt' state, the card is shut down and must be fully
  1130. * restarted to come back on.
  1131. */
  1132. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1133. {
  1134. struct iwl4965_host_cmd cmd = {
  1135. .id = REPLY_CARD_STATE_CMD,
  1136. .len = sizeof(u32),
  1137. .data = &flags,
  1138. .meta.flags = meta_flag,
  1139. };
  1140. if (meta_flag & CMD_ASYNC)
  1141. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1142. return iwl4965_send_cmd(priv, &cmd);
  1143. }
  1144. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1145. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1146. {
  1147. struct iwl4965_rx_packet *res = NULL;
  1148. if (!skb) {
  1149. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1150. return 1;
  1151. }
  1152. res = (struct iwl4965_rx_packet *)skb->data;
  1153. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1154. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1155. res->hdr.flags);
  1156. return 1;
  1157. }
  1158. switch (res->u.add_sta.status) {
  1159. case ADD_STA_SUCCESS_MSK:
  1160. break;
  1161. default:
  1162. break;
  1163. }
  1164. /* We didn't cache the SKB; let the caller free it */
  1165. return 1;
  1166. }
  1167. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1168. struct iwl4965_addsta_cmd *sta, u8 flags)
  1169. {
  1170. struct iwl4965_rx_packet *res = NULL;
  1171. int rc = 0;
  1172. struct iwl4965_host_cmd cmd = {
  1173. .id = REPLY_ADD_STA,
  1174. .len = sizeof(struct iwl4965_addsta_cmd),
  1175. .meta.flags = flags,
  1176. .data = sta,
  1177. };
  1178. if (flags & CMD_ASYNC)
  1179. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1180. else
  1181. cmd.meta.flags |= CMD_WANT_SKB;
  1182. rc = iwl4965_send_cmd(priv, &cmd);
  1183. if (rc || (flags & CMD_ASYNC))
  1184. return rc;
  1185. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1186. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1187. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1188. res->hdr.flags);
  1189. rc = -EIO;
  1190. }
  1191. if (rc == 0) {
  1192. switch (res->u.add_sta.status) {
  1193. case ADD_STA_SUCCESS_MSK:
  1194. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1195. break;
  1196. default:
  1197. rc = -EIO;
  1198. IWL_WARNING("REPLY_ADD_STA failed\n");
  1199. break;
  1200. }
  1201. }
  1202. priv->alloc_rxb_skb--;
  1203. dev_kfree_skb_any(cmd.meta.u.skb);
  1204. return rc;
  1205. }
  1206. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1207. struct ieee80211_key_conf *keyconf,
  1208. u8 sta_id)
  1209. {
  1210. unsigned long flags;
  1211. __le16 key_flags = 0;
  1212. switch (keyconf->alg) {
  1213. case ALG_CCMP:
  1214. key_flags |= STA_KEY_FLG_CCMP;
  1215. key_flags |= cpu_to_le16(
  1216. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1217. key_flags &= ~STA_KEY_FLG_INVALID;
  1218. break;
  1219. case ALG_TKIP:
  1220. case ALG_WEP:
  1221. default:
  1222. return -EINVAL;
  1223. }
  1224. spin_lock_irqsave(&priv->sta_lock, flags);
  1225. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1226. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1227. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1228. keyconf->keylen);
  1229. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1230. keyconf->keylen);
  1231. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1232. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1233. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1234. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1235. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1236. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1237. return 0;
  1238. }
  1239. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1240. {
  1241. unsigned long flags;
  1242. spin_lock_irqsave(&priv->sta_lock, flags);
  1243. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1244. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1245. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1246. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1247. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1248. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1249. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1250. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1251. return 0;
  1252. }
  1253. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1254. {
  1255. struct list_head *element;
  1256. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1257. priv->frames_count);
  1258. while (!list_empty(&priv->free_frames)) {
  1259. element = priv->free_frames.next;
  1260. list_del(element);
  1261. kfree(list_entry(element, struct iwl4965_frame, list));
  1262. priv->frames_count--;
  1263. }
  1264. if (priv->frames_count) {
  1265. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1266. priv->frames_count);
  1267. priv->frames_count = 0;
  1268. }
  1269. }
  1270. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1271. {
  1272. struct iwl4965_frame *frame;
  1273. struct list_head *element;
  1274. if (list_empty(&priv->free_frames)) {
  1275. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1276. if (!frame) {
  1277. IWL_ERROR("Could not allocate frame!\n");
  1278. return NULL;
  1279. }
  1280. priv->frames_count++;
  1281. return frame;
  1282. }
  1283. element = priv->free_frames.next;
  1284. list_del(element);
  1285. return list_entry(element, struct iwl4965_frame, list);
  1286. }
  1287. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1288. {
  1289. memset(frame, 0, sizeof(*frame));
  1290. list_add(&frame->list, &priv->free_frames);
  1291. }
  1292. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1293. struct ieee80211_hdr *hdr,
  1294. const u8 *dest, int left)
  1295. {
  1296. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1297. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1298. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1299. return 0;
  1300. if (priv->ibss_beacon->len > left)
  1301. return 0;
  1302. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1303. return priv->ibss_beacon->len;
  1304. }
  1305. int iwl4965_rate_index_from_plcp(int plcp)
  1306. {
  1307. int i = 0;
  1308. /* 4965 HT rate format */
  1309. if (plcp & RATE_MCS_HT_MSK) {
  1310. i = (plcp & 0xff);
  1311. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1312. i = i - IWL_RATE_MIMO_6M_PLCP;
  1313. i += IWL_FIRST_OFDM_RATE;
  1314. /* skip 9M not supported in ht*/
  1315. if (i >= IWL_RATE_9M_INDEX)
  1316. i += 1;
  1317. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1318. (i <= IWL_LAST_OFDM_RATE))
  1319. return i;
  1320. /* 4965 legacy rate format, search for match in table */
  1321. } else {
  1322. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1323. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1324. return i;
  1325. }
  1326. return -1;
  1327. }
  1328. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1329. {
  1330. u8 i;
  1331. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1332. i = iwl4965_rates[i].next_ieee) {
  1333. if (rate_mask & (1 << i))
  1334. return iwl4965_rates[i].plcp;
  1335. }
  1336. return IWL_RATE_INVALID;
  1337. }
  1338. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1339. {
  1340. struct iwl4965_frame *frame;
  1341. unsigned int frame_size;
  1342. int rc;
  1343. u8 rate;
  1344. frame = iwl4965_get_free_frame(priv);
  1345. if (!frame) {
  1346. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1347. "command.\n");
  1348. return -ENOMEM;
  1349. }
  1350. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1351. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1352. 0xFF0);
  1353. if (rate == IWL_INVALID_RATE)
  1354. rate = IWL_RATE_6M_PLCP;
  1355. } else {
  1356. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1357. if (rate == IWL_INVALID_RATE)
  1358. rate = IWL_RATE_1M_PLCP;
  1359. }
  1360. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1361. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1362. &frame->u.cmd[0]);
  1363. iwl4965_free_frame(priv, frame);
  1364. return rc;
  1365. }
  1366. /******************************************************************************
  1367. *
  1368. * EEPROM related functions
  1369. *
  1370. ******************************************************************************/
  1371. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1372. {
  1373. memcpy(mac, priv->eeprom.mac_address, 6);
  1374. }
  1375. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1376. {
  1377. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1378. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1379. }
  1380. /**
  1381. * iwl4965_eeprom_init - read EEPROM contents
  1382. *
  1383. * Load the EEPROM contents from adapter into priv->eeprom
  1384. *
  1385. * NOTE: This routine uses the non-debug IO access functions.
  1386. */
  1387. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1388. {
  1389. u16 *e = (u16 *)&priv->eeprom;
  1390. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1391. u32 r;
  1392. int sz = sizeof(priv->eeprom);
  1393. int rc;
  1394. int i;
  1395. u16 addr;
  1396. /* The EEPROM structure has several padding buffers within it
  1397. * and when adding new EEPROM maps is subject to programmer errors
  1398. * which may be very difficult to identify without explicitly
  1399. * checking the resulting size of the eeprom map. */
  1400. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1401. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1402. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1403. return -ENOENT;
  1404. }
  1405. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1406. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1407. if (rc < 0) {
  1408. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1409. return -ENOENT;
  1410. }
  1411. /* eeprom is an array of 16bit values */
  1412. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1413. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1414. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1415. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1416. i += IWL_EEPROM_ACCESS_DELAY) {
  1417. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1418. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1419. break;
  1420. udelay(IWL_EEPROM_ACCESS_DELAY);
  1421. }
  1422. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1423. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1424. rc = -ETIMEDOUT;
  1425. goto done;
  1426. }
  1427. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1428. }
  1429. rc = 0;
  1430. done:
  1431. iwl4965_eeprom_release_semaphore(priv);
  1432. return rc;
  1433. }
  1434. /******************************************************************************
  1435. *
  1436. * Misc. internal state and helper functions
  1437. *
  1438. ******************************************************************************/
  1439. #ifdef CONFIG_IWL4965_DEBUG
  1440. /**
  1441. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1442. *
  1443. * You may hack this function to show different aspects of received frames,
  1444. * including selective frame dumps.
  1445. * group100 parameter selects whether to show 1 out of 100 good frames.
  1446. *
  1447. * TODO: This was originally written for 3945, need to audit for
  1448. * proper operation with 4965.
  1449. */
  1450. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1451. struct iwl4965_rx_packet *pkt,
  1452. struct ieee80211_hdr *header, int group100)
  1453. {
  1454. u32 to_us;
  1455. u32 print_summary = 0;
  1456. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1457. u32 hundred = 0;
  1458. u32 dataframe = 0;
  1459. u16 fc;
  1460. u16 seq_ctl;
  1461. u16 channel;
  1462. u16 phy_flags;
  1463. int rate_sym;
  1464. u16 length;
  1465. u16 status;
  1466. u16 bcn_tmr;
  1467. u32 tsf_low;
  1468. u64 tsf;
  1469. u8 rssi;
  1470. u8 agc;
  1471. u16 sig_avg;
  1472. u16 noise_diff;
  1473. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1474. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1475. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1476. u8 *data = IWL_RX_DATA(pkt);
  1477. /* MAC header */
  1478. fc = le16_to_cpu(header->frame_control);
  1479. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1480. /* metadata */
  1481. channel = le16_to_cpu(rx_hdr->channel);
  1482. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1483. rate_sym = rx_hdr->rate;
  1484. length = le16_to_cpu(rx_hdr->len);
  1485. /* end-of-frame status and timestamp */
  1486. status = le32_to_cpu(rx_end->status);
  1487. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1488. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1489. tsf = le64_to_cpu(rx_end->timestamp);
  1490. /* signal statistics */
  1491. rssi = rx_stats->rssi;
  1492. agc = rx_stats->agc;
  1493. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1494. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1495. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1496. /* if data frame is to us and all is good,
  1497. * (optionally) print summary for only 1 out of every 100 */
  1498. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1499. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1500. dataframe = 1;
  1501. if (!group100)
  1502. print_summary = 1; /* print each frame */
  1503. else if (priv->framecnt_to_us < 100) {
  1504. priv->framecnt_to_us++;
  1505. print_summary = 0;
  1506. } else {
  1507. priv->framecnt_to_us = 0;
  1508. print_summary = 1;
  1509. hundred = 1;
  1510. }
  1511. } else {
  1512. /* print summary for all other frames */
  1513. print_summary = 1;
  1514. }
  1515. if (print_summary) {
  1516. char *title;
  1517. u32 rate;
  1518. if (hundred)
  1519. title = "100Frames";
  1520. else if (fc & IEEE80211_FCTL_RETRY)
  1521. title = "Retry";
  1522. else if (ieee80211_is_assoc_response(fc))
  1523. title = "AscRsp";
  1524. else if (ieee80211_is_reassoc_response(fc))
  1525. title = "RasRsp";
  1526. else if (ieee80211_is_probe_response(fc)) {
  1527. title = "PrbRsp";
  1528. print_dump = 1; /* dump frame contents */
  1529. } else if (ieee80211_is_beacon(fc)) {
  1530. title = "Beacon";
  1531. print_dump = 1; /* dump frame contents */
  1532. } else if (ieee80211_is_atim(fc))
  1533. title = "ATIM";
  1534. else if (ieee80211_is_auth(fc))
  1535. title = "Auth";
  1536. else if (ieee80211_is_deauth(fc))
  1537. title = "DeAuth";
  1538. else if (ieee80211_is_disassoc(fc))
  1539. title = "DisAssoc";
  1540. else
  1541. title = "Frame";
  1542. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1543. if (rate == -1)
  1544. rate = 0;
  1545. else
  1546. rate = iwl4965_rates[rate].ieee / 2;
  1547. /* print frame summary.
  1548. * MAC addresses show just the last byte (for brevity),
  1549. * but you can hack it to show more, if you'd like to. */
  1550. if (dataframe)
  1551. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1552. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1553. title, fc, header->addr1[5],
  1554. length, rssi, channel, rate);
  1555. else {
  1556. /* src/dst addresses assume managed mode */
  1557. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1558. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1559. "phy=0x%02x, chnl=%d\n",
  1560. title, fc, header->addr1[5],
  1561. header->addr3[5], rssi,
  1562. tsf_low - priv->scan_start_tsf,
  1563. phy_flags, channel);
  1564. }
  1565. }
  1566. if (print_dump)
  1567. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1568. }
  1569. #endif
  1570. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1571. {
  1572. if (priv->hw_setting.shared_virt)
  1573. pci_free_consistent(priv->pci_dev,
  1574. sizeof(struct iwl4965_shared),
  1575. priv->hw_setting.shared_virt,
  1576. priv->hw_setting.shared_phys);
  1577. }
  1578. /**
  1579. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1580. *
  1581. * return : set the bit for each supported rate insert in ie
  1582. */
  1583. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1584. u16 basic_rate, int *left)
  1585. {
  1586. u16 ret_rates = 0, bit;
  1587. int i;
  1588. u8 *cnt = ie;
  1589. u8 *rates = ie + 1;
  1590. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1591. if (bit & supported_rate) {
  1592. ret_rates |= bit;
  1593. rates[*cnt] = iwl4965_rates[i].ieee |
  1594. ((bit & basic_rate) ? 0x80 : 0x00);
  1595. (*cnt)++;
  1596. (*left)--;
  1597. if ((*left <= 0) ||
  1598. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1599. break;
  1600. }
  1601. }
  1602. return ret_rates;
  1603. }
  1604. #ifdef CONFIG_IWL4965_HT
  1605. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1606. struct ieee80211_ht_cap *ht_cap,
  1607. u8 use_current_config);
  1608. #endif
  1609. /**
  1610. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1611. */
  1612. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1613. struct ieee80211_mgmt *frame,
  1614. int left, int is_direct)
  1615. {
  1616. int len = 0;
  1617. u8 *pos = NULL;
  1618. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1619. #ifdef CONFIG_IWL4965_HT
  1620. struct ieee80211_hw_mode *mode;
  1621. #endif /* CONFIG_IWL4965_HT */
  1622. /* Make sure there is enough space for the probe request,
  1623. * two mandatory IEs and the data */
  1624. left -= 24;
  1625. if (left < 0)
  1626. return 0;
  1627. len += 24;
  1628. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1629. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1630. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1631. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1632. frame->seq_ctrl = 0;
  1633. /* fill in our indirect SSID IE */
  1634. /* ...next IE... */
  1635. left -= 2;
  1636. if (left < 0)
  1637. return 0;
  1638. len += 2;
  1639. pos = &(frame->u.probe_req.variable[0]);
  1640. *pos++ = WLAN_EID_SSID;
  1641. *pos++ = 0;
  1642. /* fill in our direct SSID IE... */
  1643. if (is_direct) {
  1644. /* ...next IE... */
  1645. left -= 2 + priv->essid_len;
  1646. if (left < 0)
  1647. return 0;
  1648. /* ... fill it in... */
  1649. *pos++ = WLAN_EID_SSID;
  1650. *pos++ = priv->essid_len;
  1651. memcpy(pos, priv->essid, priv->essid_len);
  1652. pos += priv->essid_len;
  1653. len += 2 + priv->essid_len;
  1654. }
  1655. /* fill in supported rate */
  1656. /* ...next IE... */
  1657. left -= 2;
  1658. if (left < 0)
  1659. return 0;
  1660. /* ... fill it in... */
  1661. *pos++ = WLAN_EID_SUPP_RATES;
  1662. *pos = 0;
  1663. /* exclude 60M rate */
  1664. active_rates = priv->rates_mask;
  1665. active_rates &= ~IWL_RATE_60M_MASK;
  1666. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1667. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1668. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1669. active_rate_basic, &left);
  1670. active_rates &= ~ret_rates;
  1671. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1672. active_rate_basic, &left);
  1673. active_rates &= ~ret_rates;
  1674. len += 2 + *pos;
  1675. pos += (*pos) + 1;
  1676. if (active_rates == 0)
  1677. goto fill_end;
  1678. /* fill in supported extended rate */
  1679. /* ...next IE... */
  1680. left -= 2;
  1681. if (left < 0)
  1682. return 0;
  1683. /* ... fill it in... */
  1684. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1685. *pos = 0;
  1686. iwl4965_supported_rate_to_ie(pos, active_rates,
  1687. active_rate_basic, &left);
  1688. if (*pos > 0)
  1689. len += 2 + *pos;
  1690. #ifdef CONFIG_IWL4965_HT
  1691. mode = priv->hw->conf.mode;
  1692. if (mode->ht_info.ht_supported) {
  1693. pos += (*pos) + 1;
  1694. *pos++ = WLAN_EID_HT_CAPABILITY;
  1695. *pos++ = sizeof(struct ieee80211_ht_cap);
  1696. iwl4965_set_ht_capab(priv->hw,
  1697. (struct ieee80211_ht_cap *)pos, 0);
  1698. len += 2 + sizeof(struct ieee80211_ht_cap);
  1699. }
  1700. #endif /*CONFIG_IWL4965_HT */
  1701. fill_end:
  1702. return (u16)len;
  1703. }
  1704. /*
  1705. * QoS support
  1706. */
  1707. #ifdef CONFIG_IWL4965_QOS
  1708. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1709. struct iwl4965_qosparam_cmd *qos)
  1710. {
  1711. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1712. sizeof(struct iwl4965_qosparam_cmd), qos);
  1713. }
  1714. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1715. {
  1716. u16 cw_min = 15;
  1717. u16 cw_max = 1023;
  1718. u8 aifs = 2;
  1719. u8 is_legacy = 0;
  1720. unsigned long flags;
  1721. int i;
  1722. spin_lock_irqsave(&priv->lock, flags);
  1723. priv->qos_data.qos_active = 0;
  1724. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1725. if (priv->qos_data.qos_enable)
  1726. priv->qos_data.qos_active = 1;
  1727. if (!(priv->active_rate & 0xfff0)) {
  1728. cw_min = 31;
  1729. is_legacy = 1;
  1730. }
  1731. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1732. if (priv->qos_data.qos_enable)
  1733. priv->qos_data.qos_active = 1;
  1734. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1735. cw_min = 31;
  1736. is_legacy = 1;
  1737. }
  1738. if (priv->qos_data.qos_active)
  1739. aifs = 3;
  1740. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1741. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1742. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1743. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1744. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1745. if (priv->qos_data.qos_active) {
  1746. i = 1;
  1747. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1748. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1749. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1751. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1752. i = 2;
  1753. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1754. cpu_to_le16((cw_min + 1) / 2 - 1);
  1755. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1756. cpu_to_le16(cw_max);
  1757. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1758. if (is_legacy)
  1759. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1760. cpu_to_le16(6016);
  1761. else
  1762. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1763. cpu_to_le16(3008);
  1764. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1765. i = 3;
  1766. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1767. cpu_to_le16((cw_min + 1) / 4 - 1);
  1768. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1769. cpu_to_le16((cw_max + 1) / 2 - 1);
  1770. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1771. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1772. if (is_legacy)
  1773. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1774. cpu_to_le16(3264);
  1775. else
  1776. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1777. cpu_to_le16(1504);
  1778. } else {
  1779. for (i = 1; i < 4; i++) {
  1780. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1781. cpu_to_le16(cw_min);
  1782. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1783. cpu_to_le16(cw_max);
  1784. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1785. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1786. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1787. }
  1788. }
  1789. IWL_DEBUG_QOS("set QoS to default \n");
  1790. spin_unlock_irqrestore(&priv->lock, flags);
  1791. }
  1792. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1793. {
  1794. unsigned long flags;
  1795. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1796. return;
  1797. if (!priv->qos_data.qos_enable)
  1798. return;
  1799. spin_lock_irqsave(&priv->lock, flags);
  1800. priv->qos_data.def_qos_parm.qos_flags = 0;
  1801. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1802. !priv->qos_data.qos_cap.q_AP.txop_request)
  1803. priv->qos_data.def_qos_parm.qos_flags |=
  1804. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1805. if (priv->qos_data.qos_active)
  1806. priv->qos_data.def_qos_parm.qos_flags |=
  1807. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1808. #ifdef CONFIG_IWL4965_HT
  1809. if (priv->current_ht_config.is_ht)
  1810. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1811. #endif /* CONFIG_IWL4965_HT */
  1812. spin_unlock_irqrestore(&priv->lock, flags);
  1813. if (force || iwl4965_is_associated(priv)) {
  1814. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1815. priv->qos_data.qos_active,
  1816. priv->qos_data.def_qos_parm.qos_flags);
  1817. iwl4965_send_qos_params_command(priv,
  1818. &(priv->qos_data.def_qos_parm));
  1819. }
  1820. }
  1821. #endif /* CONFIG_IWL4965_QOS */
  1822. /*
  1823. * Power management (not Tx power!) functions
  1824. */
  1825. #define MSEC_TO_USEC 1024
  1826. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1827. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1828. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1829. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1830. __constant_cpu_to_le32(X1), \
  1831. __constant_cpu_to_le32(X2), \
  1832. __constant_cpu_to_le32(X3), \
  1833. __constant_cpu_to_le32(X4)}
  1834. /* default power management (not Tx power) table values */
  1835. /* for tim 0-10 */
  1836. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1837. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1838. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1839. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1840. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1841. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1842. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1843. };
  1844. /* for tim > 10 */
  1845. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1846. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1847. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1848. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1849. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1850. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1851. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1852. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1853. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1854. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1855. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1856. };
  1857. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1858. {
  1859. int rc = 0, i;
  1860. struct iwl4965_power_mgr *pow_data;
  1861. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1862. u16 pci_pm;
  1863. IWL_DEBUG_POWER("Initialize power \n");
  1864. pow_data = &(priv->power_data);
  1865. memset(pow_data, 0, sizeof(*pow_data));
  1866. pow_data->active_index = IWL_POWER_RANGE_0;
  1867. pow_data->dtim_val = 0xffff;
  1868. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1869. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1870. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1871. if (rc != 0)
  1872. return 0;
  1873. else {
  1874. struct iwl4965_powertable_cmd *cmd;
  1875. IWL_DEBUG_POWER("adjust power command flags\n");
  1876. for (i = 0; i < IWL_POWER_AC; i++) {
  1877. cmd = &pow_data->pwr_range_0[i].cmd;
  1878. if (pci_pm & 0x1)
  1879. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1880. else
  1881. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1882. }
  1883. }
  1884. return rc;
  1885. }
  1886. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1887. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1888. {
  1889. int rc = 0, i;
  1890. u8 skip;
  1891. u32 max_sleep = 0;
  1892. struct iwl4965_power_vec_entry *range;
  1893. u8 period = 0;
  1894. struct iwl4965_power_mgr *pow_data;
  1895. if (mode > IWL_POWER_INDEX_5) {
  1896. IWL_DEBUG_POWER("Error invalid power mode \n");
  1897. return -1;
  1898. }
  1899. pow_data = &(priv->power_data);
  1900. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1901. range = &pow_data->pwr_range_0[0];
  1902. else
  1903. range = &pow_data->pwr_range_1[1];
  1904. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1905. #ifdef IWL_MAC80211_DISABLE
  1906. if (priv->assoc_network != NULL) {
  1907. unsigned long flags;
  1908. period = priv->assoc_network->tim.tim_period;
  1909. }
  1910. #endif /*IWL_MAC80211_DISABLE */
  1911. skip = range[mode].no_dtim;
  1912. if (period == 0) {
  1913. period = 1;
  1914. skip = 0;
  1915. }
  1916. if (skip == 0) {
  1917. max_sleep = period;
  1918. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1919. } else {
  1920. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1921. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1922. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1923. }
  1924. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1925. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1926. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1927. }
  1928. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1929. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1930. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1931. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1932. le32_to_cpu(cmd->sleep_interval[0]),
  1933. le32_to_cpu(cmd->sleep_interval[1]),
  1934. le32_to_cpu(cmd->sleep_interval[2]),
  1935. le32_to_cpu(cmd->sleep_interval[3]),
  1936. le32_to_cpu(cmd->sleep_interval[4]));
  1937. return rc;
  1938. }
  1939. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1940. {
  1941. u32 uninitialized_var(final_mode);
  1942. int rc;
  1943. struct iwl4965_powertable_cmd cmd;
  1944. /* If on battery, set to 3,
  1945. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1946. * else user level */
  1947. switch (mode) {
  1948. case IWL_POWER_BATTERY:
  1949. final_mode = IWL_POWER_INDEX_3;
  1950. break;
  1951. case IWL_POWER_AC:
  1952. final_mode = IWL_POWER_MODE_CAM;
  1953. break;
  1954. default:
  1955. final_mode = mode;
  1956. break;
  1957. }
  1958. cmd.keep_alive_beacons = 0;
  1959. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1960. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1961. if (final_mode == IWL_POWER_MODE_CAM)
  1962. clear_bit(STATUS_POWER_PMI, &priv->status);
  1963. else
  1964. set_bit(STATUS_POWER_PMI, &priv->status);
  1965. return rc;
  1966. }
  1967. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1968. {
  1969. /* Filter incoming packets to determine if they are targeted toward
  1970. * this network, discarding packets coming from ourselves */
  1971. switch (priv->iw_mode) {
  1972. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1973. /* packets from our adapter are dropped (echo) */
  1974. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1975. return 0;
  1976. /* {broad,multi}cast packets to our IBSS go through */
  1977. if (is_multicast_ether_addr(header->addr1))
  1978. return !compare_ether_addr(header->addr3, priv->bssid);
  1979. /* packets to our adapter go through */
  1980. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1981. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1982. /* packets from our adapter are dropped (echo) */
  1983. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1984. return 0;
  1985. /* {broad,multi}cast packets to our BSS go through */
  1986. if (is_multicast_ether_addr(header->addr1))
  1987. return !compare_ether_addr(header->addr2, priv->bssid);
  1988. /* packets to our adapter go through */
  1989. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1990. }
  1991. return 1;
  1992. }
  1993. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1994. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1995. {
  1996. switch (status & TX_STATUS_MSK) {
  1997. case TX_STATUS_SUCCESS:
  1998. return "SUCCESS";
  1999. TX_STATUS_ENTRY(SHORT_LIMIT);
  2000. TX_STATUS_ENTRY(LONG_LIMIT);
  2001. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  2002. TX_STATUS_ENTRY(MGMNT_ABORT);
  2003. TX_STATUS_ENTRY(NEXT_FRAG);
  2004. TX_STATUS_ENTRY(LIFE_EXPIRE);
  2005. TX_STATUS_ENTRY(DEST_PS);
  2006. TX_STATUS_ENTRY(ABORTED);
  2007. TX_STATUS_ENTRY(BT_RETRY);
  2008. TX_STATUS_ENTRY(STA_INVALID);
  2009. TX_STATUS_ENTRY(FRAG_DROPPED);
  2010. TX_STATUS_ENTRY(TID_DISABLE);
  2011. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2012. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2013. TX_STATUS_ENTRY(TX_LOCKED);
  2014. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2015. }
  2016. return "UNKNOWN";
  2017. }
  2018. /**
  2019. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2020. *
  2021. * NOTE: priv->mutex is not required before calling this function
  2022. */
  2023. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2024. {
  2025. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2026. clear_bit(STATUS_SCANNING, &priv->status);
  2027. return 0;
  2028. }
  2029. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2030. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2031. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2032. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2033. queue_work(priv->workqueue, &priv->abort_scan);
  2034. } else
  2035. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2036. return test_bit(STATUS_SCANNING, &priv->status);
  2037. }
  2038. return 0;
  2039. }
  2040. /**
  2041. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2042. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2043. *
  2044. * NOTE: priv->mutex must be held before calling this function
  2045. */
  2046. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2047. {
  2048. unsigned long now = jiffies;
  2049. int ret;
  2050. ret = iwl4965_scan_cancel(priv);
  2051. if (ret && ms) {
  2052. mutex_unlock(&priv->mutex);
  2053. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2054. test_bit(STATUS_SCANNING, &priv->status))
  2055. msleep(1);
  2056. mutex_lock(&priv->mutex);
  2057. return test_bit(STATUS_SCANNING, &priv->status);
  2058. }
  2059. return ret;
  2060. }
  2061. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2062. {
  2063. /* Reset ieee stats */
  2064. /* We don't reset the net_device_stats (ieee->stats) on
  2065. * re-association */
  2066. priv->last_seq_num = -1;
  2067. priv->last_frag_num = -1;
  2068. priv->last_packet_time = 0;
  2069. iwl4965_scan_cancel(priv);
  2070. }
  2071. #define MAX_UCODE_BEACON_INTERVAL 4096
  2072. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2073. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2074. {
  2075. u16 new_val = 0;
  2076. u16 beacon_factor = 0;
  2077. beacon_factor =
  2078. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2079. / MAX_UCODE_BEACON_INTERVAL;
  2080. new_val = beacon_val / beacon_factor;
  2081. return cpu_to_le16(new_val);
  2082. }
  2083. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2084. {
  2085. u64 interval_tm_unit;
  2086. u64 tsf, result;
  2087. unsigned long flags;
  2088. struct ieee80211_conf *conf = NULL;
  2089. u16 beacon_int = 0;
  2090. conf = ieee80211_get_hw_conf(priv->hw);
  2091. spin_lock_irqsave(&priv->lock, flags);
  2092. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2093. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2094. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2095. tsf = priv->timestamp1;
  2096. tsf = ((tsf << 32) | priv->timestamp0);
  2097. beacon_int = priv->beacon_int;
  2098. spin_unlock_irqrestore(&priv->lock, flags);
  2099. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2100. if (beacon_int == 0) {
  2101. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2102. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2103. } else {
  2104. priv->rxon_timing.beacon_interval =
  2105. cpu_to_le16(beacon_int);
  2106. priv->rxon_timing.beacon_interval =
  2107. iwl4965_adjust_beacon_interval(
  2108. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2109. }
  2110. priv->rxon_timing.atim_window = 0;
  2111. } else {
  2112. priv->rxon_timing.beacon_interval =
  2113. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2114. /* TODO: we need to get atim_window from upper stack
  2115. * for now we set to 0 */
  2116. priv->rxon_timing.atim_window = 0;
  2117. }
  2118. interval_tm_unit =
  2119. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2120. result = do_div(tsf, interval_tm_unit);
  2121. priv->rxon_timing.beacon_init_val =
  2122. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2123. IWL_DEBUG_ASSOC
  2124. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2125. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2126. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2127. le16_to_cpu(priv->rxon_timing.atim_window));
  2128. }
  2129. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2130. {
  2131. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2132. IWL_ERROR("APs don't scan.\n");
  2133. return 0;
  2134. }
  2135. if (!iwl4965_is_ready_rf(priv)) {
  2136. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2137. return -EIO;
  2138. }
  2139. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2140. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2141. return -EAGAIN;
  2142. }
  2143. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2144. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2145. "Queuing.\n");
  2146. return -EAGAIN;
  2147. }
  2148. IWL_DEBUG_INFO("Starting scan...\n");
  2149. priv->scan_bands = 2;
  2150. set_bit(STATUS_SCANNING, &priv->status);
  2151. priv->scan_start = jiffies;
  2152. priv->scan_pass_start = priv->scan_start;
  2153. queue_work(priv->workqueue, &priv->request_scan);
  2154. return 0;
  2155. }
  2156. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2157. {
  2158. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2159. if (hw_decrypt)
  2160. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2161. else
  2162. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2163. return 0;
  2164. }
  2165. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2166. {
  2167. if (phymode == MODE_IEEE80211A) {
  2168. priv->staging_rxon.flags &=
  2169. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2170. | RXON_FLG_CCK_MSK);
  2171. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2172. } else {
  2173. /* Copied from iwl4965_bg_post_associate() */
  2174. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2175. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2176. else
  2177. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2178. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2179. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2180. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2181. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2182. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2183. }
  2184. }
  2185. /*
  2186. * initialize rxon structure with default values from eeprom
  2187. */
  2188. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2189. {
  2190. const struct iwl4965_channel_info *ch_info;
  2191. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2192. switch (priv->iw_mode) {
  2193. case IEEE80211_IF_TYPE_AP:
  2194. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2195. break;
  2196. case IEEE80211_IF_TYPE_STA:
  2197. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2198. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2199. break;
  2200. case IEEE80211_IF_TYPE_IBSS:
  2201. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2202. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2203. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2204. RXON_FILTER_ACCEPT_GRP_MSK;
  2205. break;
  2206. case IEEE80211_IF_TYPE_MNTR:
  2207. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2208. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2209. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2210. break;
  2211. }
  2212. #if 0
  2213. /* TODO: Figure out when short_preamble would be set and cache from
  2214. * that */
  2215. if (!hw_to_local(priv->hw)->short_preamble)
  2216. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2217. else
  2218. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2219. #endif
  2220. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2221. le16_to_cpu(priv->staging_rxon.channel));
  2222. if (!ch_info)
  2223. ch_info = &priv->channel_info[0];
  2224. /*
  2225. * in some case A channels are all non IBSS
  2226. * in this case force B/G channel
  2227. */
  2228. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2229. !(is_channel_ibss(ch_info)))
  2230. ch_info = &priv->channel_info[0];
  2231. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2232. if (is_channel_a_band(ch_info))
  2233. priv->phymode = MODE_IEEE80211A;
  2234. else
  2235. priv->phymode = MODE_IEEE80211G;
  2236. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2237. priv->staging_rxon.ofdm_basic_rates =
  2238. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2239. priv->staging_rxon.cck_basic_rates =
  2240. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2241. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2242. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2243. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2244. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2245. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2246. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2247. iwl4965_set_rxon_chain(priv);
  2248. }
  2249. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2250. {
  2251. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2252. const struct iwl4965_channel_info *ch_info;
  2253. ch_info = iwl4965_get_channel_info(priv,
  2254. priv->phymode,
  2255. le16_to_cpu(priv->staging_rxon.channel));
  2256. if (!ch_info || !is_channel_ibss(ch_info)) {
  2257. IWL_ERROR("channel %d not IBSS channel\n",
  2258. le16_to_cpu(priv->staging_rxon.channel));
  2259. return -EINVAL;
  2260. }
  2261. }
  2262. priv->iw_mode = mode;
  2263. iwl4965_connection_init_rx_config(priv);
  2264. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2265. iwl4965_clear_stations_table(priv);
  2266. /* dont commit rxon if rf-kill is on*/
  2267. if (!iwl4965_is_ready_rf(priv))
  2268. return -EAGAIN;
  2269. cancel_delayed_work(&priv->scan_check);
  2270. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2271. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2272. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2273. return -EAGAIN;
  2274. }
  2275. iwl4965_commit_rxon(priv);
  2276. return 0;
  2277. }
  2278. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2279. struct ieee80211_tx_control *ctl,
  2280. struct iwl4965_cmd *cmd,
  2281. struct sk_buff *skb_frag,
  2282. int last_frag)
  2283. {
  2284. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2285. switch (keyinfo->alg) {
  2286. case ALG_CCMP:
  2287. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2288. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2289. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2290. break;
  2291. case ALG_TKIP:
  2292. #if 0
  2293. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2294. if (last_frag)
  2295. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2296. 8);
  2297. else
  2298. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2299. #endif
  2300. break;
  2301. case ALG_WEP:
  2302. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2303. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2304. if (keyinfo->keylen == 13)
  2305. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2306. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2307. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2308. "with key %d\n", ctl->key_idx);
  2309. break;
  2310. default:
  2311. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2312. break;
  2313. }
  2314. }
  2315. /*
  2316. * handle build REPLY_TX command notification.
  2317. */
  2318. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2319. struct iwl4965_cmd *cmd,
  2320. struct ieee80211_tx_control *ctrl,
  2321. struct ieee80211_hdr *hdr,
  2322. int is_unicast, u8 std_id)
  2323. {
  2324. __le16 *qc;
  2325. u16 fc = le16_to_cpu(hdr->frame_control);
  2326. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2327. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2328. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2329. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2330. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2331. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2332. if (ieee80211_is_probe_response(fc) &&
  2333. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2334. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2335. } else {
  2336. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2337. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2338. }
  2339. if (ieee80211_is_back_request(fc))
  2340. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2341. cmd->cmd.tx.sta_id = std_id;
  2342. if (ieee80211_get_morefrag(hdr))
  2343. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2344. qc = ieee80211_get_qos_ctrl(hdr);
  2345. if (qc) {
  2346. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2347. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2348. } else
  2349. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2350. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2351. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2352. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2353. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2354. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2355. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2356. }
  2357. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2358. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2360. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2361. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2362. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2363. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2364. else
  2365. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2366. } else
  2367. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2368. cmd->cmd.tx.driver_txop = 0;
  2369. cmd->cmd.tx.tx_flags = tx_flags;
  2370. cmd->cmd.tx.next_frame_len = 0;
  2371. }
  2372. /**
  2373. * iwl4965_get_sta_id - Find station's index within station table
  2374. *
  2375. * If new IBSS station, create new entry in station table
  2376. */
  2377. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2378. struct ieee80211_hdr *hdr)
  2379. {
  2380. int sta_id;
  2381. u16 fc = le16_to_cpu(hdr->frame_control);
  2382. DECLARE_MAC_BUF(mac);
  2383. /* If this frame is broadcast or management, use broadcast station id */
  2384. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2385. is_multicast_ether_addr(hdr->addr1))
  2386. return priv->hw_setting.bcast_sta_id;
  2387. switch (priv->iw_mode) {
  2388. /* If we are a client station in a BSS network, use the special
  2389. * AP station entry (that's the only station we communicate with) */
  2390. case IEEE80211_IF_TYPE_STA:
  2391. return IWL_AP_ID;
  2392. /* If we are an AP, then find the station, or use BCAST */
  2393. case IEEE80211_IF_TYPE_AP:
  2394. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2395. if (sta_id != IWL_INVALID_STATION)
  2396. return sta_id;
  2397. return priv->hw_setting.bcast_sta_id;
  2398. /* If this frame is going out to an IBSS network, find the station,
  2399. * or create a new station table entry */
  2400. case IEEE80211_IF_TYPE_IBSS:
  2401. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2402. if (sta_id != IWL_INVALID_STATION)
  2403. return sta_id;
  2404. /* Create new station table entry */
  2405. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2406. 0, CMD_ASYNC, NULL);
  2407. if (sta_id != IWL_INVALID_STATION)
  2408. return sta_id;
  2409. IWL_DEBUG_DROP("Station %s not in station map. "
  2410. "Defaulting to broadcast...\n",
  2411. print_mac(mac, hdr->addr1));
  2412. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2413. return priv->hw_setting.bcast_sta_id;
  2414. default:
  2415. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2416. return priv->hw_setting.bcast_sta_id;
  2417. }
  2418. }
  2419. /*
  2420. * start REPLY_TX command process
  2421. */
  2422. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2423. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2424. {
  2425. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2426. struct iwl4965_tfd_frame *tfd;
  2427. u32 *control_flags;
  2428. int txq_id = ctl->queue;
  2429. struct iwl4965_tx_queue *txq = NULL;
  2430. struct iwl4965_queue *q = NULL;
  2431. dma_addr_t phys_addr;
  2432. dma_addr_t txcmd_phys;
  2433. dma_addr_t scratch_phys;
  2434. struct iwl4965_cmd *out_cmd = NULL;
  2435. u16 len, idx, len_org;
  2436. u8 id, hdr_len, unicast;
  2437. u8 sta_id;
  2438. u16 seq_number = 0;
  2439. u16 fc;
  2440. __le16 *qc;
  2441. u8 wait_write_ptr = 0;
  2442. unsigned long flags;
  2443. int rc;
  2444. spin_lock_irqsave(&priv->lock, flags);
  2445. if (iwl4965_is_rfkill(priv)) {
  2446. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2447. goto drop_unlock;
  2448. }
  2449. if (!priv->vif) {
  2450. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2451. goto drop_unlock;
  2452. }
  2453. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2454. IWL_ERROR("ERROR: No TX rate available.\n");
  2455. goto drop_unlock;
  2456. }
  2457. unicast = !is_multicast_ether_addr(hdr->addr1);
  2458. id = 0;
  2459. fc = le16_to_cpu(hdr->frame_control);
  2460. #ifdef CONFIG_IWL4965_DEBUG
  2461. if (ieee80211_is_auth(fc))
  2462. IWL_DEBUG_TX("Sending AUTH frame\n");
  2463. else if (ieee80211_is_assoc_request(fc))
  2464. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2465. else if (ieee80211_is_reassoc_request(fc))
  2466. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2467. #endif
  2468. /* drop all data frame if we are not associated */
  2469. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2470. (!iwl4965_is_associated(priv) ||
  2471. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2472. !priv->assoc_station_added)) {
  2473. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2474. goto drop_unlock;
  2475. }
  2476. spin_unlock_irqrestore(&priv->lock, flags);
  2477. hdr_len = ieee80211_get_hdrlen(fc);
  2478. /* Find (or create) index into station table for destination station */
  2479. sta_id = iwl4965_get_sta_id(priv, hdr);
  2480. if (sta_id == IWL_INVALID_STATION) {
  2481. DECLARE_MAC_BUF(mac);
  2482. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2483. print_mac(mac, hdr->addr1));
  2484. goto drop;
  2485. }
  2486. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2487. qc = ieee80211_get_qos_ctrl(hdr);
  2488. if (qc) {
  2489. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2490. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2491. IEEE80211_SCTL_SEQ;
  2492. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2493. (hdr->seq_ctrl &
  2494. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2495. seq_number += 0x10;
  2496. #ifdef CONFIG_IWL4965_HT
  2497. /* aggregation is on for this <sta,tid> */
  2498. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2499. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2500. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2501. #endif /* CONFIG_IWL4965_HT */
  2502. }
  2503. /* Descriptor for chosen Tx queue */
  2504. txq = &priv->txq[txq_id];
  2505. q = &txq->q;
  2506. spin_lock_irqsave(&priv->lock, flags);
  2507. /* Set up first empty TFD within this queue's circular TFD buffer */
  2508. tfd = &txq->bd[q->write_ptr];
  2509. memset(tfd, 0, sizeof(*tfd));
  2510. control_flags = (u32 *) tfd;
  2511. idx = get_cmd_index(q, q->write_ptr, 0);
  2512. /* Set up driver data for this TFD */
  2513. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2514. txq->txb[q->write_ptr].skb[0] = skb;
  2515. memcpy(&(txq->txb[q->write_ptr].status.control),
  2516. ctl, sizeof(struct ieee80211_tx_control));
  2517. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2518. out_cmd = &txq->cmd[idx];
  2519. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2520. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2521. /*
  2522. * Set up the Tx-command (not MAC!) header.
  2523. * Store the chosen Tx queue and TFD index within the sequence field;
  2524. * after Tx, uCode's Tx response will return this value so driver can
  2525. * locate the frame within the tx queue and do post-tx processing.
  2526. */
  2527. out_cmd->hdr.cmd = REPLY_TX;
  2528. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2529. INDEX_TO_SEQ(q->write_ptr)));
  2530. /* Copy MAC header from skb into command buffer */
  2531. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2532. /*
  2533. * Use the first empty entry in this queue's command buffer array
  2534. * to contain the Tx command and MAC header concatenated together
  2535. * (payload data will be in another buffer).
  2536. * Size of this varies, due to varying MAC header length.
  2537. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2538. * of the MAC header (device reads on dword boundaries).
  2539. * We'll tell device about this padding later.
  2540. */
  2541. len = priv->hw_setting.tx_cmd_len +
  2542. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2543. len_org = len;
  2544. len = (len + 3) & ~3;
  2545. if (len_org != len)
  2546. len_org = 1;
  2547. else
  2548. len_org = 0;
  2549. /* Physical address of this Tx command's header (not MAC header!),
  2550. * within command buffer array. */
  2551. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2552. offsetof(struct iwl4965_cmd, hdr);
  2553. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2554. * first entry */
  2555. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2556. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2557. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2558. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2559. * if any (802.11 null frames have no payload). */
  2560. len = skb->len - hdr_len;
  2561. if (len) {
  2562. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2563. len, PCI_DMA_TODEVICE);
  2564. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2565. }
  2566. /* Tell 4965 about any 2-byte padding after MAC header */
  2567. if (len_org)
  2568. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2569. /* Total # bytes to be transmitted */
  2570. len = (u16)skb->len;
  2571. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2572. /* TODO need this for burst mode later on */
  2573. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2574. /* set is_hcca to 0; it probably will never be implemented */
  2575. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2576. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2577. offsetof(struct iwl4965_tx_cmd, scratch);
  2578. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2579. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2580. if (!ieee80211_get_morefrag(hdr)) {
  2581. txq->need_update = 1;
  2582. if (qc) {
  2583. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2584. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2585. }
  2586. } else {
  2587. wait_write_ptr = 1;
  2588. txq->need_update = 0;
  2589. }
  2590. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2591. sizeof(out_cmd->cmd.tx));
  2592. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2593. ieee80211_get_hdrlen(fc));
  2594. /* Set up entry for this TFD in Tx byte-count array */
  2595. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2596. /* Tell device the write index *just past* this latest filled TFD */
  2597. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2598. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2599. spin_unlock_irqrestore(&priv->lock, flags);
  2600. if (rc)
  2601. return rc;
  2602. if ((iwl4965_queue_space(q) < q->high_mark)
  2603. && priv->mac80211_registered) {
  2604. if (wait_write_ptr) {
  2605. spin_lock_irqsave(&priv->lock, flags);
  2606. txq->need_update = 1;
  2607. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2608. spin_unlock_irqrestore(&priv->lock, flags);
  2609. }
  2610. ieee80211_stop_queue(priv->hw, ctl->queue);
  2611. }
  2612. return 0;
  2613. drop_unlock:
  2614. spin_unlock_irqrestore(&priv->lock, flags);
  2615. drop:
  2616. return -1;
  2617. }
  2618. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2619. {
  2620. const struct ieee80211_hw_mode *hw = NULL;
  2621. struct ieee80211_rate *rate;
  2622. int i;
  2623. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2624. if (!hw) {
  2625. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2626. return;
  2627. }
  2628. priv->active_rate = 0;
  2629. priv->active_rate_basic = 0;
  2630. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2631. hw->mode == MODE_IEEE80211A ?
  2632. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2633. for (i = 0; i < hw->num_rates; i++) {
  2634. rate = &(hw->rates[i]);
  2635. if ((rate->val < IWL_RATE_COUNT) &&
  2636. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2637. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2638. rate->val, iwl4965_rates[rate->val].plcp,
  2639. (rate->flags & IEEE80211_RATE_BASIC) ?
  2640. "*" : "");
  2641. priv->active_rate |= (1 << rate->val);
  2642. if (rate->flags & IEEE80211_RATE_BASIC)
  2643. priv->active_rate_basic |= (1 << rate->val);
  2644. } else
  2645. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2646. rate->val, iwl4965_rates[rate->val].plcp);
  2647. }
  2648. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2649. priv->active_rate, priv->active_rate_basic);
  2650. /*
  2651. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2652. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2653. * OFDM
  2654. */
  2655. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2656. priv->staging_rxon.cck_basic_rates =
  2657. ((priv->active_rate_basic &
  2658. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2659. else
  2660. priv->staging_rxon.cck_basic_rates =
  2661. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2662. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2663. priv->staging_rxon.ofdm_basic_rates =
  2664. ((priv->active_rate_basic &
  2665. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2666. IWL_FIRST_OFDM_RATE) & 0xFF;
  2667. else
  2668. priv->staging_rxon.ofdm_basic_rates =
  2669. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2670. }
  2671. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2672. {
  2673. unsigned long flags;
  2674. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2675. return;
  2676. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2677. disable_radio ? "OFF" : "ON");
  2678. if (disable_radio) {
  2679. iwl4965_scan_cancel(priv);
  2680. /* FIXME: This is a workaround for AP */
  2681. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2682. spin_lock_irqsave(&priv->lock, flags);
  2683. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2684. CSR_UCODE_SW_BIT_RFKILL);
  2685. spin_unlock_irqrestore(&priv->lock, flags);
  2686. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2687. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2688. }
  2689. return;
  2690. }
  2691. spin_lock_irqsave(&priv->lock, flags);
  2692. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2693. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2694. spin_unlock_irqrestore(&priv->lock, flags);
  2695. /* wake up ucode */
  2696. msleep(10);
  2697. spin_lock_irqsave(&priv->lock, flags);
  2698. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2699. if (!iwl4965_grab_nic_access(priv))
  2700. iwl4965_release_nic_access(priv);
  2701. spin_unlock_irqrestore(&priv->lock, flags);
  2702. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2703. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2704. "disabled by HW switch\n");
  2705. return;
  2706. }
  2707. queue_work(priv->workqueue, &priv->restart);
  2708. return;
  2709. }
  2710. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2711. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2712. {
  2713. u16 fc =
  2714. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2715. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2716. return;
  2717. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2718. return;
  2719. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2720. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2721. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2722. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2723. RX_RES_STATUS_BAD_ICV_MIC)
  2724. stats->flag |= RX_FLAG_MMIC_ERROR;
  2725. case RX_RES_STATUS_SEC_TYPE_WEP:
  2726. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2727. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2728. RX_RES_STATUS_DECRYPT_OK) {
  2729. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2730. stats->flag |= RX_FLAG_DECRYPTED;
  2731. }
  2732. break;
  2733. default:
  2734. break;
  2735. }
  2736. }
  2737. #define IWL_PACKET_RETRY_TIME HZ
  2738. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2739. {
  2740. u16 sc = le16_to_cpu(header->seq_ctrl);
  2741. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2742. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2743. u16 *last_seq, *last_frag;
  2744. unsigned long *last_time;
  2745. switch (priv->iw_mode) {
  2746. case IEEE80211_IF_TYPE_IBSS:{
  2747. struct list_head *p;
  2748. struct iwl4965_ibss_seq *entry = NULL;
  2749. u8 *mac = header->addr2;
  2750. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2751. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2752. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2753. if (!compare_ether_addr(entry->mac, mac))
  2754. break;
  2755. }
  2756. if (p == &priv->ibss_mac_hash[index]) {
  2757. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2758. if (!entry) {
  2759. IWL_ERROR("Cannot malloc new mac entry\n");
  2760. return 0;
  2761. }
  2762. memcpy(entry->mac, mac, ETH_ALEN);
  2763. entry->seq_num = seq;
  2764. entry->frag_num = frag;
  2765. entry->packet_time = jiffies;
  2766. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2767. return 0;
  2768. }
  2769. last_seq = &entry->seq_num;
  2770. last_frag = &entry->frag_num;
  2771. last_time = &entry->packet_time;
  2772. break;
  2773. }
  2774. case IEEE80211_IF_TYPE_STA:
  2775. last_seq = &priv->last_seq_num;
  2776. last_frag = &priv->last_frag_num;
  2777. last_time = &priv->last_packet_time;
  2778. break;
  2779. default:
  2780. return 0;
  2781. }
  2782. if ((*last_seq == seq) &&
  2783. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2784. if (*last_frag == frag)
  2785. goto drop;
  2786. if (*last_frag + 1 != frag)
  2787. /* out-of-order fragment */
  2788. goto drop;
  2789. } else
  2790. *last_seq = seq;
  2791. *last_frag = frag;
  2792. *last_time = jiffies;
  2793. return 0;
  2794. drop:
  2795. return 1;
  2796. }
  2797. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2798. #include "iwl-spectrum.h"
  2799. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2800. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2801. #define TIME_UNIT 1024
  2802. /*
  2803. * extended beacon time format
  2804. * time in usec will be changed into a 32-bit value in 8:24 format
  2805. * the high 1 byte is the beacon counts
  2806. * the lower 3 bytes is the time in usec within one beacon interval
  2807. */
  2808. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2809. {
  2810. u32 quot;
  2811. u32 rem;
  2812. u32 interval = beacon_interval * 1024;
  2813. if (!interval || !usec)
  2814. return 0;
  2815. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2816. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2817. return (quot << 24) + rem;
  2818. }
  2819. /* base is usually what we get from ucode with each received frame,
  2820. * the same as HW timer counter counting down
  2821. */
  2822. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2823. {
  2824. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2825. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2826. u32 interval = beacon_interval * TIME_UNIT;
  2827. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2828. (addon & BEACON_TIME_MASK_HIGH);
  2829. if (base_low > addon_low)
  2830. res += base_low - addon_low;
  2831. else if (base_low < addon_low) {
  2832. res += interval + base_low - addon_low;
  2833. res += (1 << 24);
  2834. } else
  2835. res += (1 << 24);
  2836. return cpu_to_le32(res);
  2837. }
  2838. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2839. struct ieee80211_measurement_params *params,
  2840. u8 type)
  2841. {
  2842. struct iwl4965_spectrum_cmd spectrum;
  2843. struct iwl4965_rx_packet *res;
  2844. struct iwl4965_host_cmd cmd = {
  2845. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2846. .data = (void *)&spectrum,
  2847. .meta.flags = CMD_WANT_SKB,
  2848. };
  2849. u32 add_time = le64_to_cpu(params->start_time);
  2850. int rc;
  2851. int spectrum_resp_status;
  2852. int duration = le16_to_cpu(params->duration);
  2853. if (iwl4965_is_associated(priv))
  2854. add_time =
  2855. iwl4965_usecs_to_beacons(
  2856. le64_to_cpu(params->start_time) - priv->last_tsf,
  2857. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2858. memset(&spectrum, 0, sizeof(spectrum));
  2859. spectrum.channel_count = cpu_to_le16(1);
  2860. spectrum.flags =
  2861. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2862. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2863. cmd.len = sizeof(spectrum);
  2864. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2865. if (iwl4965_is_associated(priv))
  2866. spectrum.start_time =
  2867. iwl4965_add_beacon_time(priv->last_beacon_time,
  2868. add_time,
  2869. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2870. else
  2871. spectrum.start_time = 0;
  2872. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2873. spectrum.channels[0].channel = params->channel;
  2874. spectrum.channels[0].type = type;
  2875. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2876. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2877. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2878. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2879. if (rc)
  2880. return rc;
  2881. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2882. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2883. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2884. rc = -EIO;
  2885. }
  2886. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2887. switch (spectrum_resp_status) {
  2888. case 0: /* Command will be handled */
  2889. if (res->u.spectrum.id != 0xff) {
  2890. IWL_DEBUG_INFO
  2891. ("Replaced existing measurement: %d\n",
  2892. res->u.spectrum.id);
  2893. priv->measurement_status &= ~MEASUREMENT_READY;
  2894. }
  2895. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2896. rc = 0;
  2897. break;
  2898. case 1: /* Command will not be handled */
  2899. rc = -EAGAIN;
  2900. break;
  2901. }
  2902. dev_kfree_skb_any(cmd.meta.u.skb);
  2903. return rc;
  2904. }
  2905. #endif
  2906. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2907. struct iwl4965_tx_info *tx_sta)
  2908. {
  2909. tx_sta->status.ack_signal = 0;
  2910. tx_sta->status.excessive_retries = 0;
  2911. tx_sta->status.queue_length = 0;
  2912. tx_sta->status.queue_number = 0;
  2913. if (in_interrupt())
  2914. ieee80211_tx_status_irqsafe(priv->hw,
  2915. tx_sta->skb[0], &(tx_sta->status));
  2916. else
  2917. ieee80211_tx_status(priv->hw,
  2918. tx_sta->skb[0], &(tx_sta->status));
  2919. tx_sta->skb[0] = NULL;
  2920. }
  2921. /**
  2922. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2923. *
  2924. * When FW advances 'R' index, all entries between old and new 'R' index
  2925. * need to be reclaimed. As result, some free space forms. If there is
  2926. * enough free space (> low mark), wake the stack that feeds us.
  2927. */
  2928. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2929. {
  2930. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2931. struct iwl4965_queue *q = &txq->q;
  2932. int nfreed = 0;
  2933. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2934. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2935. "is out of range [0-%d] %d %d.\n", txq_id,
  2936. index, q->n_bd, q->write_ptr, q->read_ptr);
  2937. return 0;
  2938. }
  2939. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2940. q->read_ptr != index;
  2941. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2942. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2943. iwl4965_txstatus_to_ieee(priv,
  2944. &(txq->txb[txq->q.read_ptr]));
  2945. iwl4965_hw_txq_free_tfd(priv, txq);
  2946. } else if (nfreed > 1) {
  2947. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2948. q->write_ptr, q->read_ptr);
  2949. queue_work(priv->workqueue, &priv->restart);
  2950. }
  2951. nfreed++;
  2952. }
  2953. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2954. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2955. priv->mac80211_registered)
  2956. ieee80211_wake_queue(priv->hw, txq_id); */
  2957. return nfreed;
  2958. }
  2959. static int iwl4965_is_tx_success(u32 status)
  2960. {
  2961. status &= TX_STATUS_MSK;
  2962. return (status == TX_STATUS_SUCCESS)
  2963. || (status == TX_STATUS_DIRECT_DONE);
  2964. }
  2965. /******************************************************************************
  2966. *
  2967. * Generic RX handler implementations
  2968. *
  2969. ******************************************************************************/
  2970. #ifdef CONFIG_IWL4965_HT
  2971. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2972. struct ieee80211_hdr *hdr)
  2973. {
  2974. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2975. return IWL_AP_ID;
  2976. else {
  2977. u8 *da = ieee80211_get_DA(hdr);
  2978. return iwl4965_hw_find_station(priv, da);
  2979. }
  2980. }
  2981. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2982. struct iwl4965_priv *priv, int txq_id, int idx)
  2983. {
  2984. if (priv->txq[txq_id].txb[idx].skb[0])
  2985. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2986. txb[idx].skb[0]->data;
  2987. return NULL;
  2988. }
  2989. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2990. {
  2991. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2992. tx_resp->frame_count);
  2993. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2994. }
  2995. /**
  2996. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2997. */
  2998. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2999. struct iwl4965_ht_agg *agg,
  3000. struct iwl4965_tx_resp_agg *tx_resp,
  3001. u16 start_idx)
  3002. {
  3003. u16 status;
  3004. struct agg_tx_status *frame_status = &tx_resp->status;
  3005. struct ieee80211_tx_status *tx_status = NULL;
  3006. struct ieee80211_hdr *hdr = NULL;
  3007. int i, sh;
  3008. int txq_id, idx;
  3009. u16 seq;
  3010. if (agg->wait_for_ba)
  3011. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  3012. agg->frame_count = tx_resp->frame_count;
  3013. agg->start_idx = start_idx;
  3014. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3015. agg->bitmap = 0;
  3016. /* # frames attempted by Tx command */
  3017. if (agg->frame_count == 1) {
  3018. /* Only one frame was attempted; no block-ack will arrive */
  3019. status = le16_to_cpu(frame_status[0].status);
  3020. seq = le16_to_cpu(frame_status[0].sequence);
  3021. idx = SEQ_TO_INDEX(seq);
  3022. txq_id = SEQ_TO_QUEUE(seq);
  3023. /* FIXME: code repetition */
  3024. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  3025. agg->frame_count, agg->start_idx, idx);
  3026. tx_status = &(priv->txq[txq_id].txb[idx].status);
  3027. tx_status->retry_count = tx_resp->failure_frame;
  3028. tx_status->queue_number = status & 0xff;
  3029. tx_status->queue_length = tx_resp->failure_rts;
  3030. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  3031. tx_status->flags = iwl4965_is_tx_success(status)?
  3032. IEEE80211_TX_STATUS_ACK : 0;
  3033. tx_status->control.tx_rate =
  3034. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3035. /* FIXME: code repetition end */
  3036. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3037. status & 0xff, tx_resp->failure_frame);
  3038. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3039. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3040. agg->wait_for_ba = 0;
  3041. } else {
  3042. /* Two or more frames were attempted; expect block-ack */
  3043. u64 bitmap = 0;
  3044. int start = agg->start_idx;
  3045. /* Construct bit-map of pending frames within Tx window */
  3046. for (i = 0; i < agg->frame_count; i++) {
  3047. u16 sc;
  3048. status = le16_to_cpu(frame_status[i].status);
  3049. seq = le16_to_cpu(frame_status[i].sequence);
  3050. idx = SEQ_TO_INDEX(seq);
  3051. txq_id = SEQ_TO_QUEUE(seq);
  3052. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3053. AGG_TX_STATE_ABORT_MSK))
  3054. continue;
  3055. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3056. agg->frame_count, txq_id, idx);
  3057. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3058. sc = le16_to_cpu(hdr->seq_ctrl);
  3059. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3060. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3061. " idx=%d, seq_idx=%d, seq=%d\n",
  3062. idx, SEQ_TO_SN(sc),
  3063. hdr->seq_ctrl);
  3064. return -1;
  3065. }
  3066. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3067. i, idx, SEQ_TO_SN(sc));
  3068. sh = idx - start;
  3069. if (sh > 64) {
  3070. sh = (start - idx) + 0xff;
  3071. bitmap = bitmap << sh;
  3072. sh = 0;
  3073. start = idx;
  3074. } else if (sh < -64)
  3075. sh = 0xff - (start - idx);
  3076. else if (sh < 0) {
  3077. sh = start - idx;
  3078. start = idx;
  3079. bitmap = bitmap << sh;
  3080. sh = 0;
  3081. }
  3082. bitmap |= (1 << sh);
  3083. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3084. start, (u32)(bitmap & 0xFFFFFFFF));
  3085. }
  3086. agg->bitmap = bitmap;
  3087. agg->start_idx = start;
  3088. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3089. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  3090. agg->frame_count, agg->start_idx,
  3091. agg->bitmap);
  3092. if (bitmap)
  3093. agg->wait_for_ba = 1;
  3094. }
  3095. return 0;
  3096. }
  3097. #endif
  3098. /**
  3099. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3100. */
  3101. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3102. struct iwl4965_rx_mem_buffer *rxb)
  3103. {
  3104. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3105. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3106. int txq_id = SEQ_TO_QUEUE(sequence);
  3107. int index = SEQ_TO_INDEX(sequence);
  3108. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3109. struct ieee80211_tx_status *tx_status;
  3110. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3111. u32 status = le32_to_cpu(tx_resp->status);
  3112. #ifdef CONFIG_IWL4965_HT
  3113. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  3114. struct ieee80211_hdr *hdr;
  3115. __le16 *qc;
  3116. #endif
  3117. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3118. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3119. "is out of range [0-%d] %d %d\n", txq_id,
  3120. index, txq->q.n_bd, txq->q.write_ptr,
  3121. txq->q.read_ptr);
  3122. return;
  3123. }
  3124. #ifdef CONFIG_IWL4965_HT
  3125. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3126. qc = ieee80211_get_qos_ctrl(hdr);
  3127. if (qc)
  3128. tid = le16_to_cpu(*qc) & 0xf;
  3129. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3130. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  3131. IWL_ERROR("Station not known\n");
  3132. return;
  3133. }
  3134. if (txq->sched_retry) {
  3135. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3136. struct iwl4965_ht_agg *agg = NULL;
  3137. if (!qc)
  3138. return;
  3139. agg = &priv->stations[sta_id].tid[tid].agg;
  3140. iwl4965_tx_status_reply_tx(priv, agg,
  3141. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  3142. if ((tx_resp->frame_count == 1) &&
  3143. !iwl4965_is_tx_success(status)) {
  3144. /* TODO: send BAR */
  3145. }
  3146. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  3147. int freed;
  3148. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3149. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3150. "%d index %d\n", scd_ssn , index);
  3151. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3152. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3153. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3154. txq_id >= 0 && priv->mac80211_registered &&
  3155. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3156. ieee80211_wake_queue(priv->hw, txq_id);
  3157. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3158. }
  3159. } else {
  3160. #endif /* CONFIG_IWL4965_HT */
  3161. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3162. tx_status->retry_count = tx_resp->failure_frame;
  3163. tx_status->queue_number = status;
  3164. tx_status->queue_length = tx_resp->bt_kill_count;
  3165. tx_status->queue_length |= tx_resp->failure_rts;
  3166. tx_status->flags =
  3167. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3168. tx_status->control.tx_rate =
  3169. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3170. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3171. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3172. status, le32_to_cpu(tx_resp->rate_n_flags),
  3173. tx_resp->failure_frame);
  3174. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3175. if (index != -1) {
  3176. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3177. #ifdef CONFIG_IWL4965_HT
  3178. if (tid != MAX_TID_COUNT)
  3179. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3180. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3181. (txq_id >= 0) &&
  3182. priv->mac80211_registered)
  3183. ieee80211_wake_queue(priv->hw, txq_id);
  3184. if (tid != MAX_TID_COUNT)
  3185. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3186. #endif
  3187. }
  3188. #ifdef CONFIG_IWL4965_HT
  3189. }
  3190. #endif /* CONFIG_IWL4965_HT */
  3191. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3192. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3193. }
  3194. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3195. struct iwl4965_rx_mem_buffer *rxb)
  3196. {
  3197. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3198. struct iwl4965_alive_resp *palive;
  3199. struct delayed_work *pwork;
  3200. palive = &pkt->u.alive_frame;
  3201. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3202. "0x%01X 0x%01X\n",
  3203. palive->is_valid, palive->ver_type,
  3204. palive->ver_subtype);
  3205. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3206. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3207. memcpy(&priv->card_alive_init,
  3208. &pkt->u.alive_frame,
  3209. sizeof(struct iwl4965_init_alive_resp));
  3210. pwork = &priv->init_alive_start;
  3211. } else {
  3212. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3213. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3214. sizeof(struct iwl4965_alive_resp));
  3215. pwork = &priv->alive_start;
  3216. }
  3217. /* We delay the ALIVE response by 5ms to
  3218. * give the HW RF Kill time to activate... */
  3219. if (palive->is_valid == UCODE_VALID_OK)
  3220. queue_delayed_work(priv->workqueue, pwork,
  3221. msecs_to_jiffies(5));
  3222. else
  3223. IWL_WARNING("uCode did not respond OK.\n");
  3224. }
  3225. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3226. struct iwl4965_rx_mem_buffer *rxb)
  3227. {
  3228. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3229. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3230. return;
  3231. }
  3232. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3233. struct iwl4965_rx_mem_buffer *rxb)
  3234. {
  3235. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3236. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3237. "seq 0x%04X ser 0x%08X\n",
  3238. le32_to_cpu(pkt->u.err_resp.error_type),
  3239. get_cmd_string(pkt->u.err_resp.cmd_id),
  3240. pkt->u.err_resp.cmd_id,
  3241. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3242. le32_to_cpu(pkt->u.err_resp.error_info));
  3243. }
  3244. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3245. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3246. {
  3247. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3248. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3249. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3250. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3251. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3252. rxon->channel = csa->channel;
  3253. priv->staging_rxon.channel = csa->channel;
  3254. }
  3255. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3256. struct iwl4965_rx_mem_buffer *rxb)
  3257. {
  3258. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3259. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3260. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3261. if (!report->state) {
  3262. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3263. "Spectrum Measure Notification: Start\n");
  3264. return;
  3265. }
  3266. memcpy(&priv->measure_report, report, sizeof(*report));
  3267. priv->measurement_status |= MEASUREMENT_READY;
  3268. #endif
  3269. }
  3270. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3271. struct iwl4965_rx_mem_buffer *rxb)
  3272. {
  3273. #ifdef CONFIG_IWL4965_DEBUG
  3274. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3275. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3276. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3277. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3278. #endif
  3279. }
  3280. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3281. struct iwl4965_rx_mem_buffer *rxb)
  3282. {
  3283. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3284. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3285. "notification for %s:\n",
  3286. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3287. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3288. }
  3289. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3290. {
  3291. struct iwl4965_priv *priv =
  3292. container_of(work, struct iwl4965_priv, beacon_update);
  3293. struct sk_buff *beacon;
  3294. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3295. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3296. if (!beacon) {
  3297. IWL_ERROR("update beacon failed\n");
  3298. return;
  3299. }
  3300. mutex_lock(&priv->mutex);
  3301. /* new beacon skb is allocated every time; dispose previous.*/
  3302. if (priv->ibss_beacon)
  3303. dev_kfree_skb(priv->ibss_beacon);
  3304. priv->ibss_beacon = beacon;
  3305. mutex_unlock(&priv->mutex);
  3306. iwl4965_send_beacon_cmd(priv);
  3307. }
  3308. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3309. struct iwl4965_rx_mem_buffer *rxb)
  3310. {
  3311. #ifdef CONFIG_IWL4965_DEBUG
  3312. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3313. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3314. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3315. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3316. "tsf %d %d rate %d\n",
  3317. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3318. beacon->beacon_notify_hdr.failure_frame,
  3319. le32_to_cpu(beacon->ibss_mgr_status),
  3320. le32_to_cpu(beacon->high_tsf),
  3321. le32_to_cpu(beacon->low_tsf), rate);
  3322. #endif
  3323. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3324. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3325. queue_work(priv->workqueue, &priv->beacon_update);
  3326. }
  3327. /* Service response to REPLY_SCAN_CMD (0x80) */
  3328. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3329. struct iwl4965_rx_mem_buffer *rxb)
  3330. {
  3331. #ifdef CONFIG_IWL4965_DEBUG
  3332. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3333. struct iwl4965_scanreq_notification *notif =
  3334. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3335. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3336. #endif
  3337. }
  3338. /* Service SCAN_START_NOTIFICATION (0x82) */
  3339. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3340. struct iwl4965_rx_mem_buffer *rxb)
  3341. {
  3342. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3343. struct iwl4965_scanstart_notification *notif =
  3344. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3345. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3346. IWL_DEBUG_SCAN("Scan start: "
  3347. "%d [802.11%s] "
  3348. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3349. notif->channel,
  3350. notif->band ? "bg" : "a",
  3351. notif->tsf_high,
  3352. notif->tsf_low, notif->status, notif->beacon_timer);
  3353. }
  3354. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3355. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3356. struct iwl4965_rx_mem_buffer *rxb)
  3357. {
  3358. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3359. struct iwl4965_scanresults_notification *notif =
  3360. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3361. IWL_DEBUG_SCAN("Scan ch.res: "
  3362. "%d [802.11%s] "
  3363. "(TSF: 0x%08X:%08X) - %d "
  3364. "elapsed=%lu usec (%dms since last)\n",
  3365. notif->channel,
  3366. notif->band ? "bg" : "a",
  3367. le32_to_cpu(notif->tsf_high),
  3368. le32_to_cpu(notif->tsf_low),
  3369. le32_to_cpu(notif->statistics[0]),
  3370. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3371. jiffies_to_msecs(elapsed_jiffies
  3372. (priv->last_scan_jiffies, jiffies)));
  3373. priv->last_scan_jiffies = jiffies;
  3374. priv->next_scan_jiffies = 0;
  3375. }
  3376. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3377. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3378. struct iwl4965_rx_mem_buffer *rxb)
  3379. {
  3380. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3381. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3382. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3383. scan_notif->scanned_channels,
  3384. scan_notif->tsf_low,
  3385. scan_notif->tsf_high, scan_notif->status);
  3386. /* The HW is no longer scanning */
  3387. clear_bit(STATUS_SCAN_HW, &priv->status);
  3388. /* The scan completion notification came in, so kill that timer... */
  3389. cancel_delayed_work(&priv->scan_check);
  3390. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3391. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3392. jiffies_to_msecs(elapsed_jiffies
  3393. (priv->scan_pass_start, jiffies)));
  3394. /* Remove this scanned band from the list
  3395. * of pending bands to scan */
  3396. priv->scan_bands--;
  3397. /* If a request to abort was given, or the scan did not succeed
  3398. * then we reset the scan state machine and terminate,
  3399. * re-queuing another scan if one has been requested */
  3400. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3401. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3402. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3403. } else {
  3404. /* If there are more bands on this scan pass reschedule */
  3405. if (priv->scan_bands > 0)
  3406. goto reschedule;
  3407. }
  3408. priv->last_scan_jiffies = jiffies;
  3409. priv->next_scan_jiffies = 0;
  3410. IWL_DEBUG_INFO("Setting scan to off\n");
  3411. clear_bit(STATUS_SCANNING, &priv->status);
  3412. IWL_DEBUG_INFO("Scan took %dms\n",
  3413. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3414. queue_work(priv->workqueue, &priv->scan_completed);
  3415. return;
  3416. reschedule:
  3417. priv->scan_pass_start = jiffies;
  3418. queue_work(priv->workqueue, &priv->request_scan);
  3419. }
  3420. /* Handle notification from uCode that card's power state is changing
  3421. * due to software, hardware, or critical temperature RFKILL */
  3422. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3423. struct iwl4965_rx_mem_buffer *rxb)
  3424. {
  3425. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3426. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3427. unsigned long status = priv->status;
  3428. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3429. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3430. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3431. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3432. RF_CARD_DISABLED)) {
  3433. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3434. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3435. if (!iwl4965_grab_nic_access(priv)) {
  3436. iwl4965_write_direct32(
  3437. priv, HBUS_TARG_MBX_C,
  3438. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3439. iwl4965_release_nic_access(priv);
  3440. }
  3441. if (!(flags & RXON_CARD_DISABLED)) {
  3442. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3443. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3444. if (!iwl4965_grab_nic_access(priv)) {
  3445. iwl4965_write_direct32(
  3446. priv, HBUS_TARG_MBX_C,
  3447. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3448. iwl4965_release_nic_access(priv);
  3449. }
  3450. }
  3451. if (flags & RF_CARD_DISABLED) {
  3452. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3453. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3454. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3455. if (!iwl4965_grab_nic_access(priv))
  3456. iwl4965_release_nic_access(priv);
  3457. }
  3458. }
  3459. if (flags & HW_CARD_DISABLED)
  3460. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3461. else
  3462. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3463. if (flags & SW_CARD_DISABLED)
  3464. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3465. else
  3466. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3467. if (!(flags & RXON_CARD_DISABLED))
  3468. iwl4965_scan_cancel(priv);
  3469. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3470. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3471. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3472. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3473. queue_work(priv->workqueue, &priv->rf_kill);
  3474. else
  3475. wake_up_interruptible(&priv->wait_command_queue);
  3476. }
  3477. /**
  3478. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3479. *
  3480. * Setup the RX handlers for each of the reply types sent from the uCode
  3481. * to the host.
  3482. *
  3483. * This function chains into the hardware specific files for them to setup
  3484. * any hardware specific handlers as well.
  3485. */
  3486. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3487. {
  3488. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3489. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3490. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3491. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3492. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3493. iwl4965_rx_spectrum_measure_notif;
  3494. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3495. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3496. iwl4965_rx_pm_debug_statistics_notif;
  3497. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3498. /*
  3499. * The same handler is used for both the REPLY to a discrete
  3500. * statistics request from the host as well as for the periodic
  3501. * statistics notifications (after received beacons) from the uCode.
  3502. */
  3503. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3504. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3505. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3506. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3507. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3508. iwl4965_rx_scan_results_notif;
  3509. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3510. iwl4965_rx_scan_complete_notif;
  3511. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3512. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3513. /* Set up hardware specific Rx handlers */
  3514. iwl4965_hw_rx_handler_setup(priv);
  3515. }
  3516. /**
  3517. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3518. * @rxb: Rx buffer to reclaim
  3519. *
  3520. * If an Rx buffer has an async callback associated with it the callback
  3521. * will be executed. The attached skb (if present) will only be freed
  3522. * if the callback returns 1
  3523. */
  3524. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3525. struct iwl4965_rx_mem_buffer *rxb)
  3526. {
  3527. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3528. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3529. int txq_id = SEQ_TO_QUEUE(sequence);
  3530. int index = SEQ_TO_INDEX(sequence);
  3531. int huge = sequence & SEQ_HUGE_FRAME;
  3532. int cmd_index;
  3533. struct iwl4965_cmd *cmd;
  3534. /* If a Tx command is being handled and it isn't in the actual
  3535. * command queue then there a command routing bug has been introduced
  3536. * in the queue management code. */
  3537. if (txq_id != IWL_CMD_QUEUE_NUM)
  3538. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3539. txq_id, pkt->hdr.cmd);
  3540. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3541. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3542. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3543. /* Input error checking is done when commands are added to queue. */
  3544. if (cmd->meta.flags & CMD_WANT_SKB) {
  3545. cmd->meta.source->u.skb = rxb->skb;
  3546. rxb->skb = NULL;
  3547. } else if (cmd->meta.u.callback &&
  3548. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3549. rxb->skb = NULL;
  3550. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3551. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3552. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3553. wake_up_interruptible(&priv->wait_command_queue);
  3554. }
  3555. }
  3556. /************************** RX-FUNCTIONS ****************************/
  3557. /*
  3558. * Rx theory of operation
  3559. *
  3560. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3561. * each of which point to Receive Buffers to be filled by 4965. These get
  3562. * used not only for Rx frames, but for any command response or notification
  3563. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3564. * of indexes into the circular buffer.
  3565. *
  3566. * Rx Queue Indexes
  3567. * The host/firmware share two index registers for managing the Rx buffers.
  3568. *
  3569. * The READ index maps to the first position that the firmware may be writing
  3570. * to -- the driver can read up to (but not including) this position and get
  3571. * good data.
  3572. * The READ index is managed by the firmware once the card is enabled.
  3573. *
  3574. * The WRITE index maps to the last position the driver has read from -- the
  3575. * position preceding WRITE is the last slot the firmware can place a packet.
  3576. *
  3577. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3578. * WRITE = READ.
  3579. *
  3580. * During initialization, the host sets up the READ queue position to the first
  3581. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3582. *
  3583. * When the firmware places a packet in a buffer, it will advance the READ index
  3584. * and fire the RX interrupt. The driver can then query the READ index and
  3585. * process as many packets as possible, moving the WRITE index forward as it
  3586. * resets the Rx queue buffers with new memory.
  3587. *
  3588. * The management in the driver is as follows:
  3589. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3590. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3591. * to replenish the iwl->rxq->rx_free.
  3592. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3593. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3594. * 'processed' and 'read' driver indexes as well)
  3595. * + A received packet is processed and handed to the kernel network stack,
  3596. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3597. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3598. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3599. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3600. * were enough free buffers and RX_STALLED is set it is cleared.
  3601. *
  3602. *
  3603. * Driver sequence:
  3604. *
  3605. * iwl4965_rx_queue_alloc() Allocates rx_free
  3606. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3607. * iwl4965_rx_queue_restock
  3608. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3609. * queue, updates firmware pointers, and updates
  3610. * the WRITE index. If insufficient rx_free buffers
  3611. * are available, schedules iwl4965_rx_replenish
  3612. *
  3613. * -- enable interrupts --
  3614. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3615. * READ INDEX, detaching the SKB from the pool.
  3616. * Moves the packet buffer from queue to rx_used.
  3617. * Calls iwl4965_rx_queue_restock to refill any empty
  3618. * slots.
  3619. * ...
  3620. *
  3621. */
  3622. /**
  3623. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3624. */
  3625. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3626. {
  3627. int s = q->read - q->write;
  3628. if (s <= 0)
  3629. s += RX_QUEUE_SIZE;
  3630. /* keep some buffer to not confuse full and empty queue */
  3631. s -= 2;
  3632. if (s < 0)
  3633. s = 0;
  3634. return s;
  3635. }
  3636. /**
  3637. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3638. */
  3639. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3640. {
  3641. u32 reg = 0;
  3642. int rc = 0;
  3643. unsigned long flags;
  3644. spin_lock_irqsave(&q->lock, flags);
  3645. if (q->need_update == 0)
  3646. goto exit_unlock;
  3647. /* If power-saving is in use, make sure device is awake */
  3648. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3649. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3650. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3651. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3652. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3653. goto exit_unlock;
  3654. }
  3655. rc = iwl4965_grab_nic_access(priv);
  3656. if (rc)
  3657. goto exit_unlock;
  3658. /* Device expects a multiple of 8 */
  3659. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3660. q->write & ~0x7);
  3661. iwl4965_release_nic_access(priv);
  3662. /* Else device is assumed to be awake */
  3663. } else
  3664. /* Device expects a multiple of 8 */
  3665. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3666. q->need_update = 0;
  3667. exit_unlock:
  3668. spin_unlock_irqrestore(&q->lock, flags);
  3669. return rc;
  3670. }
  3671. /**
  3672. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3673. */
  3674. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3675. dma_addr_t dma_addr)
  3676. {
  3677. return cpu_to_le32((u32)(dma_addr >> 8));
  3678. }
  3679. /**
  3680. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3681. *
  3682. * If there are slots in the RX queue that need to be restocked,
  3683. * and we have free pre-allocated buffers, fill the ranks as much
  3684. * as we can, pulling from rx_free.
  3685. *
  3686. * This moves the 'write' index forward to catch up with 'processed', and
  3687. * also updates the memory address in the firmware to reference the new
  3688. * target buffer.
  3689. */
  3690. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3691. {
  3692. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3693. struct list_head *element;
  3694. struct iwl4965_rx_mem_buffer *rxb;
  3695. unsigned long flags;
  3696. int write, rc;
  3697. spin_lock_irqsave(&rxq->lock, flags);
  3698. write = rxq->write & ~0x7;
  3699. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3700. /* Get next free Rx buffer, remove from free list */
  3701. element = rxq->rx_free.next;
  3702. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3703. list_del(element);
  3704. /* Point to Rx buffer via next RBD in circular buffer */
  3705. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3706. rxq->queue[rxq->write] = rxb;
  3707. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3708. rxq->free_count--;
  3709. }
  3710. spin_unlock_irqrestore(&rxq->lock, flags);
  3711. /* If the pre-allocated buffer pool is dropping low, schedule to
  3712. * refill it */
  3713. if (rxq->free_count <= RX_LOW_WATERMARK)
  3714. queue_work(priv->workqueue, &priv->rx_replenish);
  3715. /* If we've added more space for the firmware to place data, tell it.
  3716. * Increment device's write pointer in multiples of 8. */
  3717. if ((write != (rxq->write & ~0x7))
  3718. || (abs(rxq->write - rxq->read) > 7)) {
  3719. spin_lock_irqsave(&rxq->lock, flags);
  3720. rxq->need_update = 1;
  3721. spin_unlock_irqrestore(&rxq->lock, flags);
  3722. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3723. if (rc)
  3724. return rc;
  3725. }
  3726. return 0;
  3727. }
  3728. /**
  3729. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3730. *
  3731. * When moving to rx_free an SKB is allocated for the slot.
  3732. *
  3733. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3734. * This is called as a scheduled work item (except for during initialization)
  3735. */
  3736. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3737. {
  3738. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3739. struct list_head *element;
  3740. struct iwl4965_rx_mem_buffer *rxb;
  3741. unsigned long flags;
  3742. spin_lock_irqsave(&rxq->lock, flags);
  3743. while (!list_empty(&rxq->rx_used)) {
  3744. element = rxq->rx_used.next;
  3745. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3746. /* Alloc a new receive buffer */
  3747. rxb->skb =
  3748. alloc_skb(priv->hw_setting.rx_buf_size,
  3749. __GFP_NOWARN | GFP_ATOMIC);
  3750. if (!rxb->skb) {
  3751. if (net_ratelimit())
  3752. printk(KERN_CRIT DRV_NAME
  3753. ": Can not allocate SKB buffers\n");
  3754. /* We don't reschedule replenish work here -- we will
  3755. * call the restock method and if it still needs
  3756. * more buffers it will schedule replenish */
  3757. break;
  3758. }
  3759. priv->alloc_rxb_skb++;
  3760. list_del(element);
  3761. /* Get physical address of RB/SKB */
  3762. rxb->dma_addr =
  3763. pci_map_single(priv->pci_dev, rxb->skb->data,
  3764. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3765. list_add_tail(&rxb->list, &rxq->rx_free);
  3766. rxq->free_count++;
  3767. }
  3768. spin_unlock_irqrestore(&rxq->lock, flags);
  3769. }
  3770. /*
  3771. * this should be called while priv->lock is locked
  3772. */
  3773. static void __iwl4965_rx_replenish(void *data)
  3774. {
  3775. struct iwl4965_priv *priv = data;
  3776. iwl4965_rx_allocate(priv);
  3777. iwl4965_rx_queue_restock(priv);
  3778. }
  3779. void iwl4965_rx_replenish(void *data)
  3780. {
  3781. struct iwl4965_priv *priv = data;
  3782. unsigned long flags;
  3783. iwl4965_rx_allocate(priv);
  3784. spin_lock_irqsave(&priv->lock, flags);
  3785. iwl4965_rx_queue_restock(priv);
  3786. spin_unlock_irqrestore(&priv->lock, flags);
  3787. }
  3788. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3789. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3790. * This free routine walks the list of POOL entries and if SKB is set to
  3791. * non NULL it is unmapped and freed
  3792. */
  3793. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3794. {
  3795. int i;
  3796. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3797. if (rxq->pool[i].skb != NULL) {
  3798. pci_unmap_single(priv->pci_dev,
  3799. rxq->pool[i].dma_addr,
  3800. priv->hw_setting.rx_buf_size,
  3801. PCI_DMA_FROMDEVICE);
  3802. dev_kfree_skb(rxq->pool[i].skb);
  3803. }
  3804. }
  3805. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3806. rxq->dma_addr);
  3807. rxq->bd = NULL;
  3808. }
  3809. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3810. {
  3811. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3812. struct pci_dev *dev = priv->pci_dev;
  3813. int i;
  3814. spin_lock_init(&rxq->lock);
  3815. INIT_LIST_HEAD(&rxq->rx_free);
  3816. INIT_LIST_HEAD(&rxq->rx_used);
  3817. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3818. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3819. if (!rxq->bd)
  3820. return -ENOMEM;
  3821. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3822. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3823. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3824. /* Set us so that we have processed and used all buffers, but have
  3825. * not restocked the Rx queue with fresh buffers */
  3826. rxq->read = rxq->write = 0;
  3827. rxq->free_count = 0;
  3828. rxq->need_update = 0;
  3829. return 0;
  3830. }
  3831. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3832. {
  3833. unsigned long flags;
  3834. int i;
  3835. spin_lock_irqsave(&rxq->lock, flags);
  3836. INIT_LIST_HEAD(&rxq->rx_free);
  3837. INIT_LIST_HEAD(&rxq->rx_used);
  3838. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3839. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3840. /* In the reset function, these buffers may have been allocated
  3841. * to an SKB, so we need to unmap and free potential storage */
  3842. if (rxq->pool[i].skb != NULL) {
  3843. pci_unmap_single(priv->pci_dev,
  3844. rxq->pool[i].dma_addr,
  3845. priv->hw_setting.rx_buf_size,
  3846. PCI_DMA_FROMDEVICE);
  3847. priv->alloc_rxb_skb--;
  3848. dev_kfree_skb(rxq->pool[i].skb);
  3849. rxq->pool[i].skb = NULL;
  3850. }
  3851. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3852. }
  3853. /* Set us so that we have processed and used all buffers, but have
  3854. * not restocked the Rx queue with fresh buffers */
  3855. rxq->read = rxq->write = 0;
  3856. rxq->free_count = 0;
  3857. spin_unlock_irqrestore(&rxq->lock, flags);
  3858. }
  3859. /* Convert linear signal-to-noise ratio into dB */
  3860. static u8 ratio2dB[100] = {
  3861. /* 0 1 2 3 4 5 6 7 8 9 */
  3862. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3863. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3864. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3865. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3866. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3867. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3868. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3869. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3870. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3871. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3872. };
  3873. /* Calculates a relative dB value from a ratio of linear
  3874. * (i.e. not dB) signal levels.
  3875. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3876. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3877. {
  3878. /* 1000:1 or higher just report as 60 dB */
  3879. if (sig_ratio >= 1000)
  3880. return 60;
  3881. /* 100:1 or higher, divide by 10 and use table,
  3882. * add 20 dB to make up for divide by 10 */
  3883. if (sig_ratio >= 100)
  3884. return (20 + (int)ratio2dB[sig_ratio/10]);
  3885. /* We shouldn't see this */
  3886. if (sig_ratio < 1)
  3887. return 0;
  3888. /* Use table for ratios 1:1 - 99:1 */
  3889. return (int)ratio2dB[sig_ratio];
  3890. }
  3891. #define PERFECT_RSSI (-20) /* dBm */
  3892. #define WORST_RSSI (-95) /* dBm */
  3893. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3894. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3895. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3896. * about formulas used below. */
  3897. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3898. {
  3899. int sig_qual;
  3900. int degradation = PERFECT_RSSI - rssi_dbm;
  3901. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3902. * as indicator; formula is (signal dbm - noise dbm).
  3903. * SNR at or above 40 is a great signal (100%).
  3904. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3905. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3906. if (noise_dbm) {
  3907. if (rssi_dbm - noise_dbm >= 40)
  3908. return 100;
  3909. else if (rssi_dbm < noise_dbm)
  3910. return 0;
  3911. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3912. /* Else use just the signal level.
  3913. * This formula is a least squares fit of data points collected and
  3914. * compared with a reference system that had a percentage (%) display
  3915. * for signal quality. */
  3916. } else
  3917. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3918. (15 * RSSI_RANGE + 62 * degradation)) /
  3919. (RSSI_RANGE * RSSI_RANGE);
  3920. if (sig_qual > 100)
  3921. sig_qual = 100;
  3922. else if (sig_qual < 1)
  3923. sig_qual = 0;
  3924. return sig_qual;
  3925. }
  3926. /**
  3927. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3928. *
  3929. * Uses the priv->rx_handlers callback function array to invoke
  3930. * the appropriate handlers, including command responses,
  3931. * frame-received notifications, and other notifications.
  3932. */
  3933. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3934. {
  3935. struct iwl4965_rx_mem_buffer *rxb;
  3936. struct iwl4965_rx_packet *pkt;
  3937. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3938. u32 r, i;
  3939. int reclaim;
  3940. unsigned long flags;
  3941. u8 fill_rx = 0;
  3942. u32 count = 8;
  3943. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3944. * buffer that the driver may process (last buffer filled by ucode). */
  3945. r = iwl4965_hw_get_rx_read(priv);
  3946. i = rxq->read;
  3947. /* Rx interrupt, but nothing sent from uCode */
  3948. if (i == r)
  3949. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3950. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3951. fill_rx = 1;
  3952. while (i != r) {
  3953. rxb = rxq->queue[i];
  3954. /* If an RXB doesn't have a Rx queue slot associated with it,
  3955. * then a bug has been introduced in the queue refilling
  3956. * routines -- catch it here */
  3957. BUG_ON(rxb == NULL);
  3958. rxq->queue[i] = NULL;
  3959. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3960. priv->hw_setting.rx_buf_size,
  3961. PCI_DMA_FROMDEVICE);
  3962. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3963. /* Reclaim a command buffer only if this packet is a response
  3964. * to a (driver-originated) command.
  3965. * If the packet (e.g. Rx frame) originated from uCode,
  3966. * there is no command buffer to reclaim.
  3967. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3968. * but apparently a few don't get set; catch them here. */
  3969. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3970. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3971. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3972. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3973. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3974. (pkt->hdr.cmd != REPLY_TX);
  3975. /* Based on type of command response or notification,
  3976. * handle those that need handling via function in
  3977. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3978. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3979. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3980. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3981. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3982. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3983. } else {
  3984. /* No handling needed */
  3985. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3986. "r %d i %d No handler needed for %s, 0x%02x\n",
  3987. r, i, get_cmd_string(pkt->hdr.cmd),
  3988. pkt->hdr.cmd);
  3989. }
  3990. if (reclaim) {
  3991. /* Invoke any callbacks, transfer the skb to caller, and
  3992. * fire off the (possibly) blocking iwl4965_send_cmd()
  3993. * as we reclaim the driver command queue */
  3994. if (rxb && rxb->skb)
  3995. iwl4965_tx_cmd_complete(priv, rxb);
  3996. else
  3997. IWL_WARNING("Claim null rxb?\n");
  3998. }
  3999. /* For now we just don't re-use anything. We can tweak this
  4000. * later to try and re-use notification packets and SKBs that
  4001. * fail to Rx correctly */
  4002. if (rxb->skb != NULL) {
  4003. priv->alloc_rxb_skb--;
  4004. dev_kfree_skb_any(rxb->skb);
  4005. rxb->skb = NULL;
  4006. }
  4007. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  4008. priv->hw_setting.rx_buf_size,
  4009. PCI_DMA_FROMDEVICE);
  4010. spin_lock_irqsave(&rxq->lock, flags);
  4011. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  4012. spin_unlock_irqrestore(&rxq->lock, flags);
  4013. i = (i + 1) & RX_QUEUE_MASK;
  4014. /* If there are a lot of unused frames,
  4015. * restock the Rx queue so ucode wont assert. */
  4016. if (fill_rx) {
  4017. count++;
  4018. if (count >= 8) {
  4019. priv->rxq.read = i;
  4020. __iwl4965_rx_replenish(priv);
  4021. count = 0;
  4022. }
  4023. }
  4024. }
  4025. /* Backtrack one entry */
  4026. priv->rxq.read = i;
  4027. iwl4965_rx_queue_restock(priv);
  4028. }
  4029. /**
  4030. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4031. */
  4032. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4033. struct iwl4965_tx_queue *txq)
  4034. {
  4035. u32 reg = 0;
  4036. int rc = 0;
  4037. int txq_id = txq->q.id;
  4038. if (txq->need_update == 0)
  4039. return rc;
  4040. /* if we're trying to save power */
  4041. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4042. /* wake up nic if it's powered down ...
  4043. * uCode will wake up, and interrupt us again, so next
  4044. * time we'll skip this part. */
  4045. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4046. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4047. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4048. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4049. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4050. return rc;
  4051. }
  4052. /* restore this queue's parameters in nic hardware. */
  4053. rc = iwl4965_grab_nic_access(priv);
  4054. if (rc)
  4055. return rc;
  4056. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4057. txq->q.write_ptr | (txq_id << 8));
  4058. iwl4965_release_nic_access(priv);
  4059. /* else not in power-save mode, uCode will never sleep when we're
  4060. * trying to tx (during RFKILL, we're not trying to tx). */
  4061. } else
  4062. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4063. txq->q.write_ptr | (txq_id << 8));
  4064. txq->need_update = 0;
  4065. return rc;
  4066. }
  4067. #ifdef CONFIG_IWL4965_DEBUG
  4068. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4069. {
  4070. DECLARE_MAC_BUF(mac);
  4071. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4072. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4073. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4074. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4075. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4076. le32_to_cpu(rxon->filter_flags));
  4077. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4078. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4079. rxon->ofdm_basic_rates);
  4080. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4081. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4082. print_mac(mac, rxon->node_addr));
  4083. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4084. print_mac(mac, rxon->bssid_addr));
  4085. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4086. }
  4087. #endif
  4088. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4089. {
  4090. IWL_DEBUG_ISR("Enabling interrupts\n");
  4091. set_bit(STATUS_INT_ENABLED, &priv->status);
  4092. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4093. }
  4094. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4095. {
  4096. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4097. /* disable interrupts from uCode/NIC to host */
  4098. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4099. /* acknowledge/clear/reset any interrupts still pending
  4100. * from uCode or flow handler (Rx/Tx DMA) */
  4101. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4102. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4103. IWL_DEBUG_ISR("Disabled interrupts\n");
  4104. }
  4105. static const char *desc_lookup(int i)
  4106. {
  4107. switch (i) {
  4108. case 1:
  4109. return "FAIL";
  4110. case 2:
  4111. return "BAD_PARAM";
  4112. case 3:
  4113. return "BAD_CHECKSUM";
  4114. case 4:
  4115. return "NMI_INTERRUPT";
  4116. case 5:
  4117. return "SYSASSERT";
  4118. case 6:
  4119. return "FATAL_ERROR";
  4120. }
  4121. return "UNKNOWN";
  4122. }
  4123. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4124. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4125. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4126. {
  4127. u32 data2, line;
  4128. u32 desc, time, count, base, data1;
  4129. u32 blink1, blink2, ilink1, ilink2;
  4130. int rc;
  4131. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4132. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4133. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4134. return;
  4135. }
  4136. rc = iwl4965_grab_nic_access(priv);
  4137. if (rc) {
  4138. IWL_WARNING("Can not read from adapter at this time.\n");
  4139. return;
  4140. }
  4141. count = iwl4965_read_targ_mem(priv, base);
  4142. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4143. IWL_ERROR("Start IWL Error Log Dump:\n");
  4144. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4145. priv->status, priv->config, count);
  4146. }
  4147. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4148. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4149. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4150. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4151. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4152. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4153. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4154. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4155. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4156. IWL_ERROR("Desc Time "
  4157. "data1 data2 line\n");
  4158. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4159. desc_lookup(desc), desc, time, data1, data2, line);
  4160. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4161. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4162. ilink1, ilink2);
  4163. iwl4965_release_nic_access(priv);
  4164. }
  4165. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4166. /**
  4167. * iwl4965_print_event_log - Dump error event log to syslog
  4168. *
  4169. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4170. */
  4171. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4172. u32 num_events, u32 mode)
  4173. {
  4174. u32 i;
  4175. u32 base; /* SRAM byte address of event log header */
  4176. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4177. u32 ptr; /* SRAM byte address of log data */
  4178. u32 ev, time, data; /* event log data */
  4179. if (num_events == 0)
  4180. return;
  4181. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4182. if (mode == 0)
  4183. event_size = 2 * sizeof(u32);
  4184. else
  4185. event_size = 3 * sizeof(u32);
  4186. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4187. /* "time" is actually "data" for mode 0 (no timestamp).
  4188. * place event id # at far right for easier visual parsing. */
  4189. for (i = 0; i < num_events; i++) {
  4190. ev = iwl4965_read_targ_mem(priv, ptr);
  4191. ptr += sizeof(u32);
  4192. time = iwl4965_read_targ_mem(priv, ptr);
  4193. ptr += sizeof(u32);
  4194. if (mode == 0)
  4195. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4196. else {
  4197. data = iwl4965_read_targ_mem(priv, ptr);
  4198. ptr += sizeof(u32);
  4199. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4200. }
  4201. }
  4202. }
  4203. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4204. {
  4205. int rc;
  4206. u32 base; /* SRAM byte address of event log header */
  4207. u32 capacity; /* event log capacity in # entries */
  4208. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4209. u32 num_wraps; /* # times uCode wrapped to top of log */
  4210. u32 next_entry; /* index of next entry to be written by uCode */
  4211. u32 size; /* # entries that we'll print */
  4212. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4213. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4214. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4215. return;
  4216. }
  4217. rc = iwl4965_grab_nic_access(priv);
  4218. if (rc) {
  4219. IWL_WARNING("Can not read from adapter at this time.\n");
  4220. return;
  4221. }
  4222. /* event log header */
  4223. capacity = iwl4965_read_targ_mem(priv, base);
  4224. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4225. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4226. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4227. size = num_wraps ? capacity : next_entry;
  4228. /* bail out if nothing in log */
  4229. if (size == 0) {
  4230. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4231. iwl4965_release_nic_access(priv);
  4232. return;
  4233. }
  4234. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4235. size, num_wraps);
  4236. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4237. * i.e the next one that uCode would fill. */
  4238. if (num_wraps)
  4239. iwl4965_print_event_log(priv, next_entry,
  4240. capacity - next_entry, mode);
  4241. /* (then/else) start at top of log */
  4242. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4243. iwl4965_release_nic_access(priv);
  4244. }
  4245. /**
  4246. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4247. */
  4248. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4249. {
  4250. /* Set the FW error flag -- cleared on iwl4965_down */
  4251. set_bit(STATUS_FW_ERROR, &priv->status);
  4252. /* Cancel currently queued command. */
  4253. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4254. #ifdef CONFIG_IWL4965_DEBUG
  4255. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4256. iwl4965_dump_nic_error_log(priv);
  4257. iwl4965_dump_nic_event_log(priv);
  4258. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4259. }
  4260. #endif
  4261. wake_up_interruptible(&priv->wait_command_queue);
  4262. /* Keep the restart process from trying to send host
  4263. * commands by clearing the INIT status bit */
  4264. clear_bit(STATUS_READY, &priv->status);
  4265. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4266. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4267. "Restarting adapter due to uCode error.\n");
  4268. if (iwl4965_is_associated(priv)) {
  4269. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4270. sizeof(priv->recovery_rxon));
  4271. priv->error_recovering = 1;
  4272. }
  4273. queue_work(priv->workqueue, &priv->restart);
  4274. }
  4275. }
  4276. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4277. {
  4278. unsigned long flags;
  4279. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4280. sizeof(priv->staging_rxon));
  4281. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4282. iwl4965_commit_rxon(priv);
  4283. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4284. spin_lock_irqsave(&priv->lock, flags);
  4285. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4286. priv->error_recovering = 0;
  4287. spin_unlock_irqrestore(&priv->lock, flags);
  4288. }
  4289. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4290. {
  4291. u32 inta, handled = 0;
  4292. u32 inta_fh;
  4293. unsigned long flags;
  4294. #ifdef CONFIG_IWL4965_DEBUG
  4295. u32 inta_mask;
  4296. #endif
  4297. spin_lock_irqsave(&priv->lock, flags);
  4298. /* Ack/clear/reset pending uCode interrupts.
  4299. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4300. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4301. inta = iwl4965_read32(priv, CSR_INT);
  4302. iwl4965_write32(priv, CSR_INT, inta);
  4303. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4304. * Any new interrupts that happen after this, either while we're
  4305. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4306. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4307. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4308. #ifdef CONFIG_IWL4965_DEBUG
  4309. if (iwl4965_debug_level & IWL_DL_ISR) {
  4310. /* just for debug */
  4311. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4312. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4313. inta, inta_mask, inta_fh);
  4314. }
  4315. #endif
  4316. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4317. * atomic, make sure that inta covers all the interrupts that
  4318. * we've discovered, even if FH interrupt came in just after
  4319. * reading CSR_INT. */
  4320. if (inta_fh & CSR_FH_INT_RX_MASK)
  4321. inta |= CSR_INT_BIT_FH_RX;
  4322. if (inta_fh & CSR_FH_INT_TX_MASK)
  4323. inta |= CSR_INT_BIT_FH_TX;
  4324. /* Now service all interrupt bits discovered above. */
  4325. if (inta & CSR_INT_BIT_HW_ERR) {
  4326. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4327. /* Tell the device to stop sending interrupts */
  4328. iwl4965_disable_interrupts(priv);
  4329. iwl4965_irq_handle_error(priv);
  4330. handled |= CSR_INT_BIT_HW_ERR;
  4331. spin_unlock_irqrestore(&priv->lock, flags);
  4332. return;
  4333. }
  4334. #ifdef CONFIG_IWL4965_DEBUG
  4335. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4336. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4337. if (inta & CSR_INT_BIT_SCD)
  4338. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4339. "the frame/frames.\n");
  4340. /* Alive notification via Rx interrupt will do the real work */
  4341. if (inta & CSR_INT_BIT_ALIVE)
  4342. IWL_DEBUG_ISR("Alive interrupt\n");
  4343. }
  4344. #endif
  4345. /* Safely ignore these bits for debug checks below */
  4346. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4347. /* HW RF KILL switch toggled */
  4348. if (inta & CSR_INT_BIT_RF_KILL) {
  4349. int hw_rf_kill = 0;
  4350. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4351. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4352. hw_rf_kill = 1;
  4353. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4354. "RF_KILL bit toggled to %s.\n",
  4355. hw_rf_kill ? "disable radio":"enable radio");
  4356. /* Queue restart only if RF_KILL switch was set to "kill"
  4357. * when we loaded driver, and is now set to "enable".
  4358. * After we're Alive, RF_KILL gets handled by
  4359. * iwl_rx_card_state_notif() */
  4360. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4361. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4362. queue_work(priv->workqueue, &priv->restart);
  4363. }
  4364. handled |= CSR_INT_BIT_RF_KILL;
  4365. }
  4366. /* Chip got too hot and stopped itself */
  4367. if (inta & CSR_INT_BIT_CT_KILL) {
  4368. IWL_ERROR("Microcode CT kill error detected.\n");
  4369. handled |= CSR_INT_BIT_CT_KILL;
  4370. }
  4371. /* Error detected by uCode */
  4372. if (inta & CSR_INT_BIT_SW_ERR) {
  4373. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4374. inta);
  4375. iwl4965_irq_handle_error(priv);
  4376. handled |= CSR_INT_BIT_SW_ERR;
  4377. }
  4378. /* uCode wakes up after power-down sleep */
  4379. if (inta & CSR_INT_BIT_WAKEUP) {
  4380. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4381. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4382. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4383. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4384. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4385. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4386. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4387. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4388. handled |= CSR_INT_BIT_WAKEUP;
  4389. }
  4390. /* All uCode command responses, including Tx command responses,
  4391. * Rx "responses" (frame-received notification), and other
  4392. * notifications from uCode come through here*/
  4393. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4394. iwl4965_rx_handle(priv);
  4395. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4396. }
  4397. if (inta & CSR_INT_BIT_FH_TX) {
  4398. IWL_DEBUG_ISR("Tx interrupt\n");
  4399. handled |= CSR_INT_BIT_FH_TX;
  4400. }
  4401. if (inta & ~handled)
  4402. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4403. if (inta & ~CSR_INI_SET_MASK) {
  4404. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4405. inta & ~CSR_INI_SET_MASK);
  4406. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4407. }
  4408. /* Re-enable all interrupts */
  4409. iwl4965_enable_interrupts(priv);
  4410. #ifdef CONFIG_IWL4965_DEBUG
  4411. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4412. inta = iwl4965_read32(priv, CSR_INT);
  4413. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4414. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4415. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4416. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4417. }
  4418. #endif
  4419. spin_unlock_irqrestore(&priv->lock, flags);
  4420. }
  4421. static irqreturn_t iwl4965_isr(int irq, void *data)
  4422. {
  4423. struct iwl4965_priv *priv = data;
  4424. u32 inta, inta_mask;
  4425. u32 inta_fh;
  4426. if (!priv)
  4427. return IRQ_NONE;
  4428. spin_lock(&priv->lock);
  4429. /* Disable (but don't clear!) interrupts here to avoid
  4430. * back-to-back ISRs and sporadic interrupts from our NIC.
  4431. * If we have something to service, the tasklet will re-enable ints.
  4432. * If we *don't* have something, we'll re-enable before leaving here. */
  4433. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4434. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4435. /* Discover which interrupts are active/pending */
  4436. inta = iwl4965_read32(priv, CSR_INT);
  4437. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4438. /* Ignore interrupt if there's nothing in NIC to service.
  4439. * This may be due to IRQ shared with another device,
  4440. * or due to sporadic interrupts thrown from our NIC. */
  4441. if (!inta && !inta_fh) {
  4442. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4443. goto none;
  4444. }
  4445. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4446. /* Hardware disappeared. It might have already raised
  4447. * an interrupt */
  4448. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4449. goto unplugged;
  4450. }
  4451. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4452. inta, inta_mask, inta_fh);
  4453. inta &= ~CSR_INT_BIT_SCD;
  4454. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4455. if (likely(inta || inta_fh))
  4456. tasklet_schedule(&priv->irq_tasklet);
  4457. unplugged:
  4458. spin_unlock(&priv->lock);
  4459. return IRQ_HANDLED;
  4460. none:
  4461. /* re-enable interrupts here since we don't have anything to service. */
  4462. iwl4965_enable_interrupts(priv);
  4463. spin_unlock(&priv->lock);
  4464. return IRQ_NONE;
  4465. }
  4466. /************************** EEPROM BANDS ****************************
  4467. *
  4468. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4469. * EEPROM contents to the specific channel number supported for each
  4470. * band.
  4471. *
  4472. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4473. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4474. * The specific geography and calibration information for that channel
  4475. * is contained in the eeprom map itself.
  4476. *
  4477. * During init, we copy the eeprom information and channel map
  4478. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4479. *
  4480. * channel_map_24/52 provides the index in the channel_info array for a
  4481. * given channel. We have to have two separate maps as there is channel
  4482. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4483. * band_2
  4484. *
  4485. * A value of 0xff stored in the channel_map indicates that the channel
  4486. * is not supported by the hardware at all.
  4487. *
  4488. * A value of 0xfe in the channel_map indicates that the channel is not
  4489. * valid for Tx with the current hardware. This means that
  4490. * while the system can tune and receive on a given channel, it may not
  4491. * be able to associate or transmit any frames on that
  4492. * channel. There is no corresponding channel information for that
  4493. * entry.
  4494. *
  4495. *********************************************************************/
  4496. /* 2.4 GHz */
  4497. static const u8 iwl4965_eeprom_band_1[14] = {
  4498. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4499. };
  4500. /* 5.2 GHz bands */
  4501. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4502. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4503. };
  4504. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4505. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4506. };
  4507. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4508. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4509. };
  4510. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4511. 145, 149, 153, 157, 161, 165
  4512. };
  4513. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4514. 1, 2, 3, 4, 5, 6, 7
  4515. };
  4516. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4517. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4518. };
  4519. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4520. int band,
  4521. int *eeprom_ch_count,
  4522. const struct iwl4965_eeprom_channel
  4523. **eeprom_ch_info,
  4524. const u8 **eeprom_ch_index)
  4525. {
  4526. switch (band) {
  4527. case 1: /* 2.4GHz band */
  4528. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4529. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4530. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4531. break;
  4532. case 2: /* 4.9GHz band */
  4533. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4534. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4535. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4536. break;
  4537. case 3: /* 5.2GHz band */
  4538. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4539. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4540. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4541. break;
  4542. case 4: /* 5.5GHz band */
  4543. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4544. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4545. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4546. break;
  4547. case 5: /* 5.7GHz band */
  4548. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4549. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4550. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4551. break;
  4552. case 6: /* 2.4GHz FAT channels */
  4553. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4554. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4555. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4556. break;
  4557. case 7: /* 5 GHz FAT channels */
  4558. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4559. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4560. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4561. break;
  4562. default:
  4563. BUG();
  4564. return;
  4565. }
  4566. }
  4567. /**
  4568. * iwl4965_get_channel_info - Find driver's private channel info
  4569. *
  4570. * Based on band and channel number.
  4571. */
  4572. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4573. int phymode, u16 channel)
  4574. {
  4575. int i;
  4576. switch (phymode) {
  4577. case MODE_IEEE80211A:
  4578. for (i = 14; i < priv->channel_count; i++) {
  4579. if (priv->channel_info[i].channel == channel)
  4580. return &priv->channel_info[i];
  4581. }
  4582. break;
  4583. case MODE_IEEE80211B:
  4584. case MODE_IEEE80211G:
  4585. if (channel >= 1 && channel <= 14)
  4586. return &priv->channel_info[channel - 1];
  4587. break;
  4588. }
  4589. return NULL;
  4590. }
  4591. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4592. ? # x " " : "")
  4593. /**
  4594. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4595. */
  4596. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4597. {
  4598. int eeprom_ch_count = 0;
  4599. const u8 *eeprom_ch_index = NULL;
  4600. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4601. int band, ch;
  4602. struct iwl4965_channel_info *ch_info;
  4603. if (priv->channel_count) {
  4604. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4605. return 0;
  4606. }
  4607. if (priv->eeprom.version < 0x2f) {
  4608. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4609. priv->eeprom.version);
  4610. return -EINVAL;
  4611. }
  4612. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4613. priv->channel_count =
  4614. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4615. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4616. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4617. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4618. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4619. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4620. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4621. priv->channel_count, GFP_KERNEL);
  4622. if (!priv->channel_info) {
  4623. IWL_ERROR("Could not allocate channel_info\n");
  4624. priv->channel_count = 0;
  4625. return -ENOMEM;
  4626. }
  4627. ch_info = priv->channel_info;
  4628. /* Loop through the 5 EEPROM bands adding them in order to the
  4629. * channel map we maintain (that contains additional information than
  4630. * what just in the EEPROM) */
  4631. for (band = 1; band <= 5; band++) {
  4632. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4633. &eeprom_ch_info, &eeprom_ch_index);
  4634. /* Loop through each band adding each of the channels */
  4635. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4636. ch_info->channel = eeprom_ch_index[ch];
  4637. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4638. MODE_IEEE80211A;
  4639. /* permanently store EEPROM's channel regulatory flags
  4640. * and max power in channel info database. */
  4641. ch_info->eeprom = eeprom_ch_info[ch];
  4642. /* Copy the run-time flags so they are there even on
  4643. * invalid channels */
  4644. ch_info->flags = eeprom_ch_info[ch].flags;
  4645. if (!(is_channel_valid(ch_info))) {
  4646. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4647. "No traffic\n",
  4648. ch_info->channel,
  4649. ch_info->flags,
  4650. is_channel_a_band(ch_info) ?
  4651. "5.2" : "2.4");
  4652. ch_info++;
  4653. continue;
  4654. }
  4655. /* Initialize regulatory-based run-time data */
  4656. ch_info->max_power_avg = ch_info->curr_txpow =
  4657. eeprom_ch_info[ch].max_power_avg;
  4658. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4659. ch_info->min_power = 0;
  4660. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4661. " %ddBm): Ad-Hoc %ssupported\n",
  4662. ch_info->channel,
  4663. is_channel_a_band(ch_info) ?
  4664. "5.2" : "2.4",
  4665. CHECK_AND_PRINT(IBSS),
  4666. CHECK_AND_PRINT(ACTIVE),
  4667. CHECK_AND_PRINT(RADAR),
  4668. CHECK_AND_PRINT(WIDE),
  4669. CHECK_AND_PRINT(NARROW),
  4670. CHECK_AND_PRINT(DFS),
  4671. eeprom_ch_info[ch].flags,
  4672. eeprom_ch_info[ch].max_power_avg,
  4673. ((eeprom_ch_info[ch].
  4674. flags & EEPROM_CHANNEL_IBSS)
  4675. && !(eeprom_ch_info[ch].
  4676. flags & EEPROM_CHANNEL_RADAR))
  4677. ? "" : "not ");
  4678. /* Set the user_txpower_limit to the highest power
  4679. * supported by any channel */
  4680. if (eeprom_ch_info[ch].max_power_avg >
  4681. priv->user_txpower_limit)
  4682. priv->user_txpower_limit =
  4683. eeprom_ch_info[ch].max_power_avg;
  4684. ch_info++;
  4685. }
  4686. }
  4687. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4688. for (band = 6; band <= 7; band++) {
  4689. int phymode;
  4690. u8 fat_extension_chan;
  4691. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4692. &eeprom_ch_info, &eeprom_ch_index);
  4693. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4694. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4695. /* Loop through each band adding each of the channels */
  4696. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4697. if ((band == 6) &&
  4698. ((eeprom_ch_index[ch] == 5) ||
  4699. (eeprom_ch_index[ch] == 6) ||
  4700. (eeprom_ch_index[ch] == 7)))
  4701. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4702. else
  4703. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4704. /* Set up driver's info for lower half */
  4705. iwl4965_set_fat_chan_info(priv, phymode,
  4706. eeprom_ch_index[ch],
  4707. &(eeprom_ch_info[ch]),
  4708. fat_extension_chan);
  4709. /* Set up driver's info for upper half */
  4710. iwl4965_set_fat_chan_info(priv, phymode,
  4711. (eeprom_ch_index[ch] + 4),
  4712. &(eeprom_ch_info[ch]),
  4713. HT_IE_EXT_CHANNEL_BELOW);
  4714. }
  4715. }
  4716. return 0;
  4717. }
  4718. /*
  4719. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4720. */
  4721. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4722. {
  4723. kfree(priv->channel_info);
  4724. priv->channel_count = 0;
  4725. }
  4726. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4727. * sending probe req. This should be set long enough to hear probe responses
  4728. * from more than one AP. */
  4729. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4730. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4731. /* For faster active scanning, scan will move to the next channel if fewer than
  4732. * PLCP_QUIET_THRESH packets are heard on this channel within
  4733. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4734. * time if it's a quiet channel (nothing responded to our probe, and there's
  4735. * no other traffic).
  4736. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4737. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4738. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4739. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4740. * Must be set longer than active dwell time.
  4741. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4742. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4743. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4744. #define IWL_PASSIVE_DWELL_BASE (100)
  4745. #define IWL_CHANNEL_TUNE_TIME 5
  4746. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4747. {
  4748. if (phymode == MODE_IEEE80211A)
  4749. return IWL_ACTIVE_DWELL_TIME_52;
  4750. else
  4751. return IWL_ACTIVE_DWELL_TIME_24;
  4752. }
  4753. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4754. {
  4755. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4756. u16 passive = (phymode != MODE_IEEE80211A) ?
  4757. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4758. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4759. if (iwl4965_is_associated(priv)) {
  4760. /* If we're associated, we clamp the maximum passive
  4761. * dwell time to be 98% of the beacon interval (minus
  4762. * 2 * channel tune time) */
  4763. passive = priv->beacon_int;
  4764. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4765. passive = IWL_PASSIVE_DWELL_BASE;
  4766. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4767. }
  4768. if (passive <= active)
  4769. passive = active + 1;
  4770. return passive;
  4771. }
  4772. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4773. u8 is_active, u8 direct_mask,
  4774. struct iwl4965_scan_channel *scan_ch)
  4775. {
  4776. const struct ieee80211_channel *channels = NULL;
  4777. const struct ieee80211_hw_mode *hw_mode;
  4778. const struct iwl4965_channel_info *ch_info;
  4779. u16 passive_dwell = 0;
  4780. u16 active_dwell = 0;
  4781. int added, i;
  4782. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4783. if (!hw_mode)
  4784. return 0;
  4785. channels = hw_mode->channels;
  4786. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4787. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4788. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4789. if (channels[i].chan ==
  4790. le16_to_cpu(priv->active_rxon.channel)) {
  4791. if (iwl4965_is_associated(priv)) {
  4792. IWL_DEBUG_SCAN
  4793. ("Skipping current channel %d\n",
  4794. le16_to_cpu(priv->active_rxon.channel));
  4795. continue;
  4796. }
  4797. } else if (priv->only_active_channel)
  4798. continue;
  4799. scan_ch->channel = channels[i].chan;
  4800. ch_info = iwl4965_get_channel_info(priv, phymode,
  4801. scan_ch->channel);
  4802. if (!is_channel_valid(ch_info)) {
  4803. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4804. scan_ch->channel);
  4805. continue;
  4806. }
  4807. if (!is_active || is_channel_passive(ch_info) ||
  4808. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4809. scan_ch->type = 0; /* passive */
  4810. else
  4811. scan_ch->type = 1; /* active */
  4812. if (scan_ch->type & 1)
  4813. scan_ch->type |= (direct_mask << 1);
  4814. if (is_channel_narrow(ch_info))
  4815. scan_ch->type |= (1 << 7);
  4816. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4817. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4818. /* Set txpower levels to defaults */
  4819. scan_ch->tpc.dsp_atten = 110;
  4820. /* scan_pwr_info->tpc.dsp_atten; */
  4821. /*scan_pwr_info->tpc.tx_gain; */
  4822. if (phymode == MODE_IEEE80211A)
  4823. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4824. else {
  4825. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4826. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4827. * power level:
  4828. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4829. */
  4830. }
  4831. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4832. scan_ch->channel,
  4833. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4834. (scan_ch->type & 1) ?
  4835. active_dwell : passive_dwell);
  4836. scan_ch++;
  4837. added++;
  4838. }
  4839. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4840. return added;
  4841. }
  4842. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4843. {
  4844. int i, j;
  4845. for (i = 0; i < 3; i++) {
  4846. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4847. for (j = 0; j < hw_mode->num_channels; j++)
  4848. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4849. }
  4850. }
  4851. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4852. struct ieee80211_rate *rates)
  4853. {
  4854. int i;
  4855. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4856. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4857. rates[i].val = i; /* Rate scaling will work on indexes */
  4858. rates[i].val2 = i;
  4859. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4860. /* Only OFDM have the bits-per-symbol set */
  4861. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4862. rates[i].flags |= IEEE80211_RATE_OFDM;
  4863. else {
  4864. /*
  4865. * If CCK 1M then set rate flag to CCK else CCK_2
  4866. * which is CCK | PREAMBLE2
  4867. */
  4868. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4869. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4870. }
  4871. /* Set up which ones are basic rates... */
  4872. if (IWL_BASIC_RATES_MASK & (1 << i))
  4873. rates[i].flags |= IEEE80211_RATE_BASIC;
  4874. }
  4875. }
  4876. /**
  4877. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4878. */
  4879. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4880. {
  4881. struct iwl4965_channel_info *ch;
  4882. struct ieee80211_hw_mode *modes;
  4883. struct ieee80211_channel *channels;
  4884. struct ieee80211_channel *geo_ch;
  4885. struct ieee80211_rate *rates;
  4886. int i = 0;
  4887. enum {
  4888. A = 0,
  4889. B = 1,
  4890. G = 2,
  4891. };
  4892. int mode_count = 3;
  4893. if (priv->modes) {
  4894. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4895. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4896. return 0;
  4897. }
  4898. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4899. GFP_KERNEL);
  4900. if (!modes)
  4901. return -ENOMEM;
  4902. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4903. priv->channel_count, GFP_KERNEL);
  4904. if (!channels) {
  4905. kfree(modes);
  4906. return -ENOMEM;
  4907. }
  4908. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4909. GFP_KERNEL);
  4910. if (!rates) {
  4911. kfree(modes);
  4912. kfree(channels);
  4913. return -ENOMEM;
  4914. }
  4915. /* 0 = 802.11a
  4916. * 1 = 802.11b
  4917. * 2 = 802.11g
  4918. */
  4919. /* 5.2GHz channels start after the 2.4GHz channels */
  4920. modes[A].mode = MODE_IEEE80211A;
  4921. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4922. modes[A].rates = rates;
  4923. modes[A].num_rates = 8; /* just OFDM */
  4924. modes[A].rates = &rates[4];
  4925. modes[A].num_channels = 0;
  4926. #ifdef CONFIG_IWL4965_HT
  4927. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4928. #endif
  4929. modes[B].mode = MODE_IEEE80211B;
  4930. modes[B].channels = channels;
  4931. modes[B].rates = rates;
  4932. modes[B].num_rates = 4; /* just CCK */
  4933. modes[B].num_channels = 0;
  4934. modes[G].mode = MODE_IEEE80211G;
  4935. modes[G].channels = channels;
  4936. modes[G].rates = rates;
  4937. modes[G].num_rates = 12; /* OFDM & CCK */
  4938. modes[G].num_channels = 0;
  4939. #ifdef CONFIG_IWL4965_HT
  4940. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4941. #endif
  4942. priv->ieee_channels = channels;
  4943. priv->ieee_rates = rates;
  4944. iwl4965_init_hw_rates(priv, rates);
  4945. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4946. ch = &priv->channel_info[i];
  4947. if (!is_channel_valid(ch)) {
  4948. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4949. "skipping.\n",
  4950. ch->channel, is_channel_a_band(ch) ?
  4951. "5.2" : "2.4");
  4952. continue;
  4953. }
  4954. if (is_channel_a_band(ch)) {
  4955. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4956. } else {
  4957. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4958. modes[G].num_channels++;
  4959. }
  4960. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4961. geo_ch->chan = ch->channel;
  4962. geo_ch->power_level = ch->max_power_avg;
  4963. geo_ch->antenna_max = 0xff;
  4964. if (is_channel_valid(ch)) {
  4965. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4966. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4967. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4968. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4969. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4970. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4971. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4972. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4973. priv->max_channel_txpower_limit =
  4974. ch->max_power_avg;
  4975. }
  4976. geo_ch->val = geo_ch->flag;
  4977. }
  4978. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4979. printk(KERN_INFO DRV_NAME
  4980. ": Incorrectly detected BG card as ABG. Please send "
  4981. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4982. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4983. priv->is_abg = 0;
  4984. }
  4985. printk(KERN_INFO DRV_NAME
  4986. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4987. modes[G].num_channels, modes[A].num_channels);
  4988. /*
  4989. * NOTE: We register these in preference of order -- the
  4990. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4991. * a phymode based on rates or AP capabilities but seems to
  4992. * configure it purely on if the channel being configured
  4993. * is supported by a mode -- and the first match is taken
  4994. */
  4995. if (modes[G].num_channels)
  4996. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4997. if (modes[B].num_channels)
  4998. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4999. if (modes[A].num_channels)
  5000. ieee80211_register_hwmode(priv->hw, &modes[A]);
  5001. priv->modes = modes;
  5002. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5003. return 0;
  5004. }
  5005. /*
  5006. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  5007. */
  5008. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  5009. {
  5010. kfree(priv->modes);
  5011. kfree(priv->ieee_channels);
  5012. kfree(priv->ieee_rates);
  5013. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  5014. }
  5015. /******************************************************************************
  5016. *
  5017. * uCode download functions
  5018. *
  5019. ******************************************************************************/
  5020. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  5021. {
  5022. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  5023. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  5024. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5025. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  5026. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5027. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5028. }
  5029. /**
  5030. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5031. * looking at all data.
  5032. */
  5033. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  5034. u32 len)
  5035. {
  5036. u32 val;
  5037. u32 save_len = len;
  5038. int rc = 0;
  5039. u32 errcnt;
  5040. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5041. rc = iwl4965_grab_nic_access(priv);
  5042. if (rc)
  5043. return rc;
  5044. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5045. errcnt = 0;
  5046. for (; len > 0; len -= sizeof(u32), image++) {
  5047. /* read data comes through single port, auto-incr addr */
  5048. /* NOTE: Use the debugless read so we don't flood kernel log
  5049. * if IWL_DL_IO is set */
  5050. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5051. if (val != le32_to_cpu(*image)) {
  5052. IWL_ERROR("uCode INST section is invalid at "
  5053. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5054. save_len - len, val, le32_to_cpu(*image));
  5055. rc = -EIO;
  5056. errcnt++;
  5057. if (errcnt >= 20)
  5058. break;
  5059. }
  5060. }
  5061. iwl4965_release_nic_access(priv);
  5062. if (!errcnt)
  5063. IWL_DEBUG_INFO
  5064. ("ucode image in INSTRUCTION memory is good\n");
  5065. return rc;
  5066. }
  5067. /**
  5068. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5069. * using sample data 100 bytes apart. If these sample points are good,
  5070. * it's a pretty good bet that everything between them is good, too.
  5071. */
  5072. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5073. {
  5074. u32 val;
  5075. int rc = 0;
  5076. u32 errcnt = 0;
  5077. u32 i;
  5078. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5079. rc = iwl4965_grab_nic_access(priv);
  5080. if (rc)
  5081. return rc;
  5082. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5083. /* read data comes through single port, auto-incr addr */
  5084. /* NOTE: Use the debugless read so we don't flood kernel log
  5085. * if IWL_DL_IO is set */
  5086. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5087. i + RTC_INST_LOWER_BOUND);
  5088. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5089. if (val != le32_to_cpu(*image)) {
  5090. #if 0 /* Enable this if you want to see details */
  5091. IWL_ERROR("uCode INST section is invalid at "
  5092. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5093. i, val, *image);
  5094. #endif
  5095. rc = -EIO;
  5096. errcnt++;
  5097. if (errcnt >= 3)
  5098. break;
  5099. }
  5100. }
  5101. iwl4965_release_nic_access(priv);
  5102. return rc;
  5103. }
  5104. /**
  5105. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5106. * and verify its contents
  5107. */
  5108. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5109. {
  5110. __le32 *image;
  5111. u32 len;
  5112. int rc = 0;
  5113. /* Try bootstrap */
  5114. image = (__le32 *)priv->ucode_boot.v_addr;
  5115. len = priv->ucode_boot.len;
  5116. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5117. if (rc == 0) {
  5118. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5119. return 0;
  5120. }
  5121. /* Try initialize */
  5122. image = (__le32 *)priv->ucode_init.v_addr;
  5123. len = priv->ucode_init.len;
  5124. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5125. if (rc == 0) {
  5126. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5127. return 0;
  5128. }
  5129. /* Try runtime/protocol */
  5130. image = (__le32 *)priv->ucode_code.v_addr;
  5131. len = priv->ucode_code.len;
  5132. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5133. if (rc == 0) {
  5134. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5135. return 0;
  5136. }
  5137. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5138. /* Since nothing seems to match, show first several data entries in
  5139. * instruction SRAM, so maybe visual inspection will give a clue.
  5140. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5141. image = (__le32 *)priv->ucode_boot.v_addr;
  5142. len = priv->ucode_boot.len;
  5143. rc = iwl4965_verify_inst_full(priv, image, len);
  5144. return rc;
  5145. }
  5146. /* check contents of special bootstrap uCode SRAM */
  5147. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5148. {
  5149. __le32 *image = priv->ucode_boot.v_addr;
  5150. u32 len = priv->ucode_boot.len;
  5151. u32 reg;
  5152. u32 val;
  5153. IWL_DEBUG_INFO("Begin verify bsm\n");
  5154. /* verify BSM SRAM contents */
  5155. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5156. for (reg = BSM_SRAM_LOWER_BOUND;
  5157. reg < BSM_SRAM_LOWER_BOUND + len;
  5158. reg += sizeof(u32), image ++) {
  5159. val = iwl4965_read_prph(priv, reg);
  5160. if (val != le32_to_cpu(*image)) {
  5161. IWL_ERROR("BSM uCode verification failed at "
  5162. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5163. BSM_SRAM_LOWER_BOUND,
  5164. reg - BSM_SRAM_LOWER_BOUND, len,
  5165. val, le32_to_cpu(*image));
  5166. return -EIO;
  5167. }
  5168. }
  5169. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5170. return 0;
  5171. }
  5172. /**
  5173. * iwl4965_load_bsm - Load bootstrap instructions
  5174. *
  5175. * BSM operation:
  5176. *
  5177. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5178. * in special SRAM that does not power down during RFKILL. When powering back
  5179. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5180. * the bootstrap program into the on-board processor, and starts it.
  5181. *
  5182. * The bootstrap program loads (via DMA) instructions and data for a new
  5183. * program from host DRAM locations indicated by the host driver in the
  5184. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5185. * automatically.
  5186. *
  5187. * When initializing the NIC, the host driver points the BSM to the
  5188. * "initialize" uCode image. This uCode sets up some internal data, then
  5189. * notifies host via "initialize alive" that it is complete.
  5190. *
  5191. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5192. * normal runtime uCode instructions and a backup uCode data cache buffer
  5193. * (filled initially with starting data values for the on-board processor),
  5194. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5195. * which begins normal operation.
  5196. *
  5197. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5198. * the backup data cache in DRAM before SRAM is powered down.
  5199. *
  5200. * When powering back up, the BSM loads the bootstrap program. This reloads
  5201. * the runtime uCode instructions and the backup data cache into SRAM,
  5202. * and re-launches the runtime uCode from where it left off.
  5203. */
  5204. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5205. {
  5206. __le32 *image = priv->ucode_boot.v_addr;
  5207. u32 len = priv->ucode_boot.len;
  5208. dma_addr_t pinst;
  5209. dma_addr_t pdata;
  5210. u32 inst_len;
  5211. u32 data_len;
  5212. int rc;
  5213. int i;
  5214. u32 done;
  5215. u32 reg_offset;
  5216. IWL_DEBUG_INFO("Begin load bsm\n");
  5217. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5218. if (len > IWL_MAX_BSM_SIZE)
  5219. return -EINVAL;
  5220. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5221. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5222. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5223. * after the "initialize" uCode has run, to point to
  5224. * runtime/protocol instructions and backup data cache. */
  5225. pinst = priv->ucode_init.p_addr >> 4;
  5226. pdata = priv->ucode_init_data.p_addr >> 4;
  5227. inst_len = priv->ucode_init.len;
  5228. data_len = priv->ucode_init_data.len;
  5229. rc = iwl4965_grab_nic_access(priv);
  5230. if (rc)
  5231. return rc;
  5232. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5233. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5234. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5235. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5236. /* Fill BSM memory with bootstrap instructions */
  5237. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5238. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5239. reg_offset += sizeof(u32), image++)
  5240. _iwl4965_write_prph(priv, reg_offset,
  5241. le32_to_cpu(*image));
  5242. rc = iwl4965_verify_bsm(priv);
  5243. if (rc) {
  5244. iwl4965_release_nic_access(priv);
  5245. return rc;
  5246. }
  5247. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5248. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5249. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5250. RTC_INST_LOWER_BOUND);
  5251. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5252. /* Load bootstrap code into instruction SRAM now,
  5253. * to prepare to load "initialize" uCode */
  5254. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5255. BSM_WR_CTRL_REG_BIT_START);
  5256. /* Wait for load of bootstrap uCode to finish */
  5257. for (i = 0; i < 100; i++) {
  5258. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5259. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5260. break;
  5261. udelay(10);
  5262. }
  5263. if (i < 100)
  5264. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5265. else {
  5266. IWL_ERROR("BSM write did not complete!\n");
  5267. return -EIO;
  5268. }
  5269. /* Enable future boot loads whenever power management unit triggers it
  5270. * (e.g. when powering back up after power-save shutdown) */
  5271. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5272. BSM_WR_CTRL_REG_BIT_START_EN);
  5273. iwl4965_release_nic_access(priv);
  5274. return 0;
  5275. }
  5276. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5277. {
  5278. /* Remove all resets to allow NIC to operate */
  5279. iwl4965_write32(priv, CSR_RESET, 0);
  5280. }
  5281. /**
  5282. * iwl4965_read_ucode - Read uCode images from disk file.
  5283. *
  5284. * Copy into buffers for card to fetch via bus-mastering
  5285. */
  5286. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5287. {
  5288. struct iwl4965_ucode *ucode;
  5289. int ret;
  5290. const struct firmware *ucode_raw;
  5291. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5292. u8 *src;
  5293. size_t len;
  5294. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5295. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5296. * request_firmware() is synchronous, file is in memory on return. */
  5297. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5298. if (ret < 0) {
  5299. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5300. name, ret);
  5301. goto error;
  5302. }
  5303. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5304. name, ucode_raw->size);
  5305. /* Make sure that we got at least our header! */
  5306. if (ucode_raw->size < sizeof(*ucode)) {
  5307. IWL_ERROR("File size way too small!\n");
  5308. ret = -EINVAL;
  5309. goto err_release;
  5310. }
  5311. /* Data from ucode file: header followed by uCode images */
  5312. ucode = (void *)ucode_raw->data;
  5313. ver = le32_to_cpu(ucode->ver);
  5314. inst_size = le32_to_cpu(ucode->inst_size);
  5315. data_size = le32_to_cpu(ucode->data_size);
  5316. init_size = le32_to_cpu(ucode->init_size);
  5317. init_data_size = le32_to_cpu(ucode->init_data_size);
  5318. boot_size = le32_to_cpu(ucode->boot_size);
  5319. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5320. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5321. inst_size);
  5322. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5323. data_size);
  5324. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5325. init_size);
  5326. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5327. init_data_size);
  5328. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5329. boot_size);
  5330. /* Verify size of file vs. image size info in file's header */
  5331. if (ucode_raw->size < sizeof(*ucode) +
  5332. inst_size + data_size + init_size +
  5333. init_data_size + boot_size) {
  5334. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5335. (int)ucode_raw->size);
  5336. ret = -EINVAL;
  5337. goto err_release;
  5338. }
  5339. /* Verify that uCode images will fit in card's SRAM */
  5340. if (inst_size > IWL_MAX_INST_SIZE) {
  5341. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5342. inst_size);
  5343. ret = -EINVAL;
  5344. goto err_release;
  5345. }
  5346. if (data_size > IWL_MAX_DATA_SIZE) {
  5347. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5348. data_size);
  5349. ret = -EINVAL;
  5350. goto err_release;
  5351. }
  5352. if (init_size > IWL_MAX_INST_SIZE) {
  5353. IWL_DEBUG_INFO
  5354. ("uCode init instr len %d too large to fit in\n",
  5355. init_size);
  5356. ret = -EINVAL;
  5357. goto err_release;
  5358. }
  5359. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5360. IWL_DEBUG_INFO
  5361. ("uCode init data len %d too large to fit in\n",
  5362. init_data_size);
  5363. ret = -EINVAL;
  5364. goto err_release;
  5365. }
  5366. if (boot_size > IWL_MAX_BSM_SIZE) {
  5367. IWL_DEBUG_INFO
  5368. ("uCode boot instr len %d too large to fit in\n",
  5369. boot_size);
  5370. ret = -EINVAL;
  5371. goto err_release;
  5372. }
  5373. /* Allocate ucode buffers for card's bus-master loading ... */
  5374. /* Runtime instructions and 2 copies of data:
  5375. * 1) unmodified from disk
  5376. * 2) backup cache for save/restore during power-downs */
  5377. priv->ucode_code.len = inst_size;
  5378. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5379. priv->ucode_data.len = data_size;
  5380. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5381. priv->ucode_data_backup.len = data_size;
  5382. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5383. /* Initialization instructions and data */
  5384. if (init_size && init_data_size) {
  5385. priv->ucode_init.len = init_size;
  5386. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5387. priv->ucode_init_data.len = init_data_size;
  5388. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5389. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5390. goto err_pci_alloc;
  5391. }
  5392. /* Bootstrap (instructions only, no data) */
  5393. if (boot_size) {
  5394. priv->ucode_boot.len = boot_size;
  5395. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5396. if (!priv->ucode_boot.v_addr)
  5397. goto err_pci_alloc;
  5398. }
  5399. /* Copy images into buffers for card's bus-master reads ... */
  5400. /* Runtime instructions (first block of data in file) */
  5401. src = &ucode->data[0];
  5402. len = priv->ucode_code.len;
  5403. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5404. memcpy(priv->ucode_code.v_addr, src, len);
  5405. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5406. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5407. /* Runtime data (2nd block)
  5408. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5409. src = &ucode->data[inst_size];
  5410. len = priv->ucode_data.len;
  5411. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5412. memcpy(priv->ucode_data.v_addr, src, len);
  5413. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5414. /* Initialization instructions (3rd block) */
  5415. if (init_size) {
  5416. src = &ucode->data[inst_size + data_size];
  5417. len = priv->ucode_init.len;
  5418. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5419. len);
  5420. memcpy(priv->ucode_init.v_addr, src, len);
  5421. }
  5422. /* Initialization data (4th block) */
  5423. if (init_data_size) {
  5424. src = &ucode->data[inst_size + data_size + init_size];
  5425. len = priv->ucode_init_data.len;
  5426. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5427. len);
  5428. memcpy(priv->ucode_init_data.v_addr, src, len);
  5429. }
  5430. /* Bootstrap instructions (5th block) */
  5431. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5432. len = priv->ucode_boot.len;
  5433. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5434. memcpy(priv->ucode_boot.v_addr, src, len);
  5435. /* We have our copies now, allow OS release its copies */
  5436. release_firmware(ucode_raw);
  5437. return 0;
  5438. err_pci_alloc:
  5439. IWL_ERROR("failed to allocate pci memory\n");
  5440. ret = -ENOMEM;
  5441. iwl4965_dealloc_ucode_pci(priv);
  5442. err_release:
  5443. release_firmware(ucode_raw);
  5444. error:
  5445. return ret;
  5446. }
  5447. /**
  5448. * iwl4965_set_ucode_ptrs - Set uCode address location
  5449. *
  5450. * Tell initialization uCode where to find runtime uCode.
  5451. *
  5452. * BSM registers initially contain pointers to initialization uCode.
  5453. * We need to replace them to load runtime uCode inst and data,
  5454. * and to save runtime data when powering down.
  5455. */
  5456. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5457. {
  5458. dma_addr_t pinst;
  5459. dma_addr_t pdata;
  5460. int rc = 0;
  5461. unsigned long flags;
  5462. /* bits 35:4 for 4965 */
  5463. pinst = priv->ucode_code.p_addr >> 4;
  5464. pdata = priv->ucode_data_backup.p_addr >> 4;
  5465. spin_lock_irqsave(&priv->lock, flags);
  5466. rc = iwl4965_grab_nic_access(priv);
  5467. if (rc) {
  5468. spin_unlock_irqrestore(&priv->lock, flags);
  5469. return rc;
  5470. }
  5471. /* Tell bootstrap uCode where to find image to load */
  5472. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5473. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5474. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5475. priv->ucode_data.len);
  5476. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5477. * that all new ptr/size info is in place */
  5478. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5479. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5480. iwl4965_release_nic_access(priv);
  5481. spin_unlock_irqrestore(&priv->lock, flags);
  5482. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5483. return rc;
  5484. }
  5485. /**
  5486. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5487. *
  5488. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5489. *
  5490. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5491. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5492. * (3945 does not contain this data).
  5493. *
  5494. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5495. */
  5496. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5497. {
  5498. /* Check alive response for "valid" sign from uCode */
  5499. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5500. /* We had an error bringing up the hardware, so take it
  5501. * all the way back down so we can try again */
  5502. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5503. goto restart;
  5504. }
  5505. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5506. * This is a paranoid check, because we would not have gotten the
  5507. * "initialize" alive if code weren't properly loaded. */
  5508. if (iwl4965_verify_ucode(priv)) {
  5509. /* Runtime instruction load was bad;
  5510. * take it all the way back down so we can try again */
  5511. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5512. goto restart;
  5513. }
  5514. /* Calculate temperature */
  5515. priv->temperature = iwl4965_get_temperature(priv);
  5516. /* Send pointers to protocol/runtime uCode image ... init code will
  5517. * load and launch runtime uCode, which will send us another "Alive"
  5518. * notification. */
  5519. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5520. if (iwl4965_set_ucode_ptrs(priv)) {
  5521. /* Runtime instruction load won't happen;
  5522. * take it all the way back down so we can try again */
  5523. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5524. goto restart;
  5525. }
  5526. return;
  5527. restart:
  5528. queue_work(priv->workqueue, &priv->restart);
  5529. }
  5530. /**
  5531. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5532. * from protocol/runtime uCode (initialization uCode's
  5533. * Alive gets handled by iwl4965_init_alive_start()).
  5534. */
  5535. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5536. {
  5537. int rc = 0;
  5538. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5539. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5540. /* We had an error bringing up the hardware, so take it
  5541. * all the way back down so we can try again */
  5542. IWL_DEBUG_INFO("Alive failed.\n");
  5543. goto restart;
  5544. }
  5545. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5546. * This is a paranoid check, because we would not have gotten the
  5547. * "runtime" alive if code weren't properly loaded. */
  5548. if (iwl4965_verify_ucode(priv)) {
  5549. /* Runtime instruction load was bad;
  5550. * take it all the way back down so we can try again */
  5551. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5552. goto restart;
  5553. }
  5554. iwl4965_clear_stations_table(priv);
  5555. rc = iwl4965_alive_notify(priv);
  5556. if (rc) {
  5557. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5558. rc);
  5559. goto restart;
  5560. }
  5561. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5562. set_bit(STATUS_ALIVE, &priv->status);
  5563. /* Clear out the uCode error bit if it is set */
  5564. clear_bit(STATUS_FW_ERROR, &priv->status);
  5565. if (iwl4965_is_rfkill(priv))
  5566. return;
  5567. ieee80211_start_queues(priv->hw);
  5568. priv->active_rate = priv->rates_mask;
  5569. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5570. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5571. if (iwl4965_is_associated(priv)) {
  5572. struct iwl4965_rxon_cmd *active_rxon =
  5573. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5574. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5575. sizeof(priv->staging_rxon));
  5576. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5577. } else {
  5578. /* Initialize our rx_config data */
  5579. iwl4965_connection_init_rx_config(priv);
  5580. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5581. }
  5582. /* Configure Bluetooth device coexistence support */
  5583. iwl4965_send_bt_config(priv);
  5584. /* Configure the adapter for unassociated operation */
  5585. iwl4965_commit_rxon(priv);
  5586. /* At this point, the NIC is initialized and operational */
  5587. priv->notif_missed_beacons = 0;
  5588. set_bit(STATUS_READY, &priv->status);
  5589. iwl4965_rf_kill_ct_config(priv);
  5590. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5591. wake_up_interruptible(&priv->wait_command_queue);
  5592. if (priv->error_recovering)
  5593. iwl4965_error_recovery(priv);
  5594. return;
  5595. restart:
  5596. queue_work(priv->workqueue, &priv->restart);
  5597. }
  5598. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5599. static void __iwl4965_down(struct iwl4965_priv *priv)
  5600. {
  5601. unsigned long flags;
  5602. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5603. struct ieee80211_conf *conf = NULL;
  5604. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5605. conf = ieee80211_get_hw_conf(priv->hw);
  5606. if (!exit_pending)
  5607. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5608. iwl4965_clear_stations_table(priv);
  5609. /* Unblock any waiting calls */
  5610. wake_up_interruptible_all(&priv->wait_command_queue);
  5611. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5612. * exiting the module */
  5613. if (!exit_pending)
  5614. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5615. /* stop and reset the on-board processor */
  5616. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5617. /* tell the device to stop sending interrupts */
  5618. iwl4965_disable_interrupts(priv);
  5619. if (priv->mac80211_registered)
  5620. ieee80211_stop_queues(priv->hw);
  5621. /* If we have not previously called iwl4965_init() then
  5622. * clear all bits but the RF Kill and SUSPEND bits and return */
  5623. if (!iwl4965_is_init(priv)) {
  5624. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5625. STATUS_RF_KILL_HW |
  5626. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5627. STATUS_RF_KILL_SW |
  5628. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5629. STATUS_GEO_CONFIGURED |
  5630. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5631. STATUS_IN_SUSPEND;
  5632. goto exit;
  5633. }
  5634. /* ...otherwise clear out all the status bits but the RF Kill and
  5635. * SUSPEND bits and continue taking the NIC down. */
  5636. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5637. STATUS_RF_KILL_HW |
  5638. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5639. STATUS_RF_KILL_SW |
  5640. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5641. STATUS_GEO_CONFIGURED |
  5642. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5643. STATUS_IN_SUSPEND |
  5644. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5645. STATUS_FW_ERROR;
  5646. spin_lock_irqsave(&priv->lock, flags);
  5647. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5648. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5649. spin_unlock_irqrestore(&priv->lock, flags);
  5650. iwl4965_hw_txq_ctx_stop(priv);
  5651. iwl4965_hw_rxq_stop(priv);
  5652. spin_lock_irqsave(&priv->lock, flags);
  5653. if (!iwl4965_grab_nic_access(priv)) {
  5654. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5655. APMG_CLK_VAL_DMA_CLK_RQT);
  5656. iwl4965_release_nic_access(priv);
  5657. }
  5658. spin_unlock_irqrestore(&priv->lock, flags);
  5659. udelay(5);
  5660. iwl4965_hw_nic_stop_master(priv);
  5661. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5662. iwl4965_hw_nic_reset(priv);
  5663. exit:
  5664. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5665. if (priv->ibss_beacon)
  5666. dev_kfree_skb(priv->ibss_beacon);
  5667. priv->ibss_beacon = NULL;
  5668. /* clear out any free frames */
  5669. iwl4965_clear_free_frames(priv);
  5670. }
  5671. static void iwl4965_down(struct iwl4965_priv *priv)
  5672. {
  5673. mutex_lock(&priv->mutex);
  5674. __iwl4965_down(priv);
  5675. mutex_unlock(&priv->mutex);
  5676. iwl4965_cancel_deferred_work(priv);
  5677. }
  5678. #define MAX_HW_RESTARTS 5
  5679. static int __iwl4965_up(struct iwl4965_priv *priv)
  5680. {
  5681. int rc, i;
  5682. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5683. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5684. return -EIO;
  5685. }
  5686. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5687. IWL_WARNING("Radio disabled by SW RF kill (module "
  5688. "parameter)\n");
  5689. return -ENODEV;
  5690. }
  5691. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5692. IWL_ERROR("ucode not available for device bringup\n");
  5693. return -EIO;
  5694. }
  5695. /* If platform's RF_KILL switch is NOT set to KILL */
  5696. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5697. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5698. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5699. else {
  5700. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5701. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5702. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5703. return -ENODEV;
  5704. }
  5705. }
  5706. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5707. rc = iwl4965_hw_nic_init(priv);
  5708. if (rc) {
  5709. IWL_ERROR("Unable to int nic\n");
  5710. return rc;
  5711. }
  5712. /* make sure rfkill handshake bits are cleared */
  5713. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5714. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5715. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5716. /* clear (again), then enable host interrupts */
  5717. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5718. iwl4965_enable_interrupts(priv);
  5719. /* really make sure rfkill handshake bits are cleared */
  5720. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5721. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5722. /* Copy original ucode data image from disk into backup cache.
  5723. * This will be used to initialize the on-board processor's
  5724. * data SRAM for a clean start when the runtime program first loads. */
  5725. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5726. priv->ucode_data.len);
  5727. /* We return success when we resume from suspend and rf_kill is on. */
  5728. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5729. return 0;
  5730. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5731. iwl4965_clear_stations_table(priv);
  5732. /* load bootstrap state machine,
  5733. * load bootstrap program into processor's memory,
  5734. * prepare to load the "initialize" uCode */
  5735. rc = iwl4965_load_bsm(priv);
  5736. if (rc) {
  5737. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5738. continue;
  5739. }
  5740. /* start card; "initialize" will load runtime ucode */
  5741. iwl4965_nic_start(priv);
  5742. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5743. return 0;
  5744. }
  5745. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5746. __iwl4965_down(priv);
  5747. /* tried to restart and config the device for as long as our
  5748. * patience could withstand */
  5749. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5750. return -EIO;
  5751. }
  5752. /*****************************************************************************
  5753. *
  5754. * Workqueue callbacks
  5755. *
  5756. *****************************************************************************/
  5757. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5758. {
  5759. struct iwl4965_priv *priv =
  5760. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5761. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5762. return;
  5763. mutex_lock(&priv->mutex);
  5764. iwl4965_init_alive_start(priv);
  5765. mutex_unlock(&priv->mutex);
  5766. }
  5767. static void iwl4965_bg_alive_start(struct work_struct *data)
  5768. {
  5769. struct iwl4965_priv *priv =
  5770. container_of(data, struct iwl4965_priv, alive_start.work);
  5771. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5772. return;
  5773. mutex_lock(&priv->mutex);
  5774. iwl4965_alive_start(priv);
  5775. mutex_unlock(&priv->mutex);
  5776. }
  5777. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5778. {
  5779. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5780. wake_up_interruptible(&priv->wait_command_queue);
  5781. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5782. return;
  5783. mutex_lock(&priv->mutex);
  5784. if (!iwl4965_is_rfkill(priv)) {
  5785. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5786. "HW and/or SW RF Kill no longer active, restarting "
  5787. "device\n");
  5788. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5789. queue_work(priv->workqueue, &priv->restart);
  5790. } else {
  5791. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5792. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5793. "disabled by SW switch\n");
  5794. else
  5795. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5796. "Kill switch must be turned off for "
  5797. "wireless networking to work.\n");
  5798. }
  5799. mutex_unlock(&priv->mutex);
  5800. }
  5801. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5802. static void iwl4965_bg_scan_check(struct work_struct *data)
  5803. {
  5804. struct iwl4965_priv *priv =
  5805. container_of(data, struct iwl4965_priv, scan_check.work);
  5806. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5807. return;
  5808. mutex_lock(&priv->mutex);
  5809. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5810. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5811. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5812. "Scan completion watchdog resetting adapter (%dms)\n",
  5813. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5814. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5815. iwl4965_send_scan_abort(priv);
  5816. }
  5817. mutex_unlock(&priv->mutex);
  5818. }
  5819. static void iwl4965_bg_request_scan(struct work_struct *data)
  5820. {
  5821. struct iwl4965_priv *priv =
  5822. container_of(data, struct iwl4965_priv, request_scan);
  5823. struct iwl4965_host_cmd cmd = {
  5824. .id = REPLY_SCAN_CMD,
  5825. .len = sizeof(struct iwl4965_scan_cmd),
  5826. .meta.flags = CMD_SIZE_HUGE,
  5827. };
  5828. int rc = 0;
  5829. struct iwl4965_scan_cmd *scan;
  5830. struct ieee80211_conf *conf = NULL;
  5831. u8 direct_mask;
  5832. int phymode;
  5833. conf = ieee80211_get_hw_conf(priv->hw);
  5834. mutex_lock(&priv->mutex);
  5835. if (!iwl4965_is_ready(priv)) {
  5836. IWL_WARNING("request scan called when driver not ready.\n");
  5837. goto done;
  5838. }
  5839. /* Make sure the scan wasn't cancelled before this queued work
  5840. * was given the chance to run... */
  5841. if (!test_bit(STATUS_SCANNING, &priv->status))
  5842. goto done;
  5843. /* This should never be called or scheduled if there is currently
  5844. * a scan active in the hardware. */
  5845. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5846. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5847. "Ignoring second request.\n");
  5848. rc = -EIO;
  5849. goto done;
  5850. }
  5851. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5852. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5853. goto done;
  5854. }
  5855. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5856. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5857. goto done;
  5858. }
  5859. if (iwl4965_is_rfkill(priv)) {
  5860. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5861. goto done;
  5862. }
  5863. if (!test_bit(STATUS_READY, &priv->status)) {
  5864. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5865. goto done;
  5866. }
  5867. if (!priv->scan_bands) {
  5868. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5869. goto done;
  5870. }
  5871. if (!priv->scan) {
  5872. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5873. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5874. if (!priv->scan) {
  5875. rc = -ENOMEM;
  5876. goto done;
  5877. }
  5878. }
  5879. scan = priv->scan;
  5880. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5881. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5882. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5883. if (iwl4965_is_associated(priv)) {
  5884. u16 interval = 0;
  5885. u32 extra;
  5886. u32 suspend_time = 100;
  5887. u32 scan_suspend_time = 100;
  5888. unsigned long flags;
  5889. IWL_DEBUG_INFO("Scanning while associated...\n");
  5890. spin_lock_irqsave(&priv->lock, flags);
  5891. interval = priv->beacon_int;
  5892. spin_unlock_irqrestore(&priv->lock, flags);
  5893. scan->suspend_time = 0;
  5894. scan->max_out_time = cpu_to_le32(200 * 1024);
  5895. if (!interval)
  5896. interval = suspend_time;
  5897. extra = (suspend_time / interval) << 22;
  5898. scan_suspend_time = (extra |
  5899. ((suspend_time % interval) * 1024));
  5900. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5901. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5902. scan_suspend_time, interval);
  5903. }
  5904. /* We should add the ability for user to lock to PASSIVE ONLY */
  5905. if (priv->one_direct_scan) {
  5906. IWL_DEBUG_SCAN
  5907. ("Kicking off one direct scan for '%s'\n",
  5908. iwl4965_escape_essid(priv->direct_ssid,
  5909. priv->direct_ssid_len));
  5910. scan->direct_scan[0].id = WLAN_EID_SSID;
  5911. scan->direct_scan[0].len = priv->direct_ssid_len;
  5912. memcpy(scan->direct_scan[0].ssid,
  5913. priv->direct_ssid, priv->direct_ssid_len);
  5914. direct_mask = 1;
  5915. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5916. scan->direct_scan[0].id = WLAN_EID_SSID;
  5917. scan->direct_scan[0].len = priv->essid_len;
  5918. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5919. direct_mask = 1;
  5920. } else
  5921. direct_mask = 0;
  5922. /* We don't build a direct scan probe request; the uCode will do
  5923. * that based on the direct_mask added to each channel entry */
  5924. scan->tx_cmd.len = cpu_to_le16(
  5925. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5926. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
  5927. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5928. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5929. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5930. /* flags + rate selection */
  5931. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5932. switch (priv->scan_bands) {
  5933. case 2:
  5934. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5935. scan->tx_cmd.rate_n_flags =
  5936. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5937. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5938. scan->good_CRC_th = 0;
  5939. phymode = MODE_IEEE80211G;
  5940. break;
  5941. case 1:
  5942. scan->tx_cmd.rate_n_flags =
  5943. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5944. RATE_MCS_ANT_B_MSK);
  5945. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5946. phymode = MODE_IEEE80211A;
  5947. break;
  5948. default:
  5949. IWL_WARNING("Invalid scan band count\n");
  5950. goto done;
  5951. }
  5952. /* select Rx chains */
  5953. /* Force use of chains B and C (0x6) for scan Rx.
  5954. * Avoid A (0x1) because of its off-channel reception on A-band.
  5955. * MIMO is not used here, but value is required to make uCode happy. */
  5956. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5957. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5958. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5959. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5960. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5961. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5962. if (direct_mask)
  5963. IWL_DEBUG_SCAN
  5964. ("Initiating direct scan for %s.\n",
  5965. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5966. else
  5967. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5968. scan->channel_count =
  5969. iwl4965_get_channels_for_scan(
  5970. priv, phymode, 1, /* active */
  5971. direct_mask,
  5972. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5973. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5974. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5975. cmd.data = scan;
  5976. scan->len = cpu_to_le16(cmd.len);
  5977. set_bit(STATUS_SCAN_HW, &priv->status);
  5978. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5979. if (rc)
  5980. goto done;
  5981. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5982. IWL_SCAN_CHECK_WATCHDOG);
  5983. mutex_unlock(&priv->mutex);
  5984. return;
  5985. done:
  5986. /* inform mac80211 scan aborted */
  5987. queue_work(priv->workqueue, &priv->scan_completed);
  5988. mutex_unlock(&priv->mutex);
  5989. }
  5990. static void iwl4965_bg_up(struct work_struct *data)
  5991. {
  5992. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5993. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5994. return;
  5995. mutex_lock(&priv->mutex);
  5996. __iwl4965_up(priv);
  5997. mutex_unlock(&priv->mutex);
  5998. }
  5999. static void iwl4965_bg_restart(struct work_struct *data)
  6000. {
  6001. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  6002. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6003. return;
  6004. iwl4965_down(priv);
  6005. queue_work(priv->workqueue, &priv->up);
  6006. }
  6007. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6008. {
  6009. struct iwl4965_priv *priv =
  6010. container_of(data, struct iwl4965_priv, rx_replenish);
  6011. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6012. return;
  6013. mutex_lock(&priv->mutex);
  6014. iwl4965_rx_replenish(priv);
  6015. mutex_unlock(&priv->mutex);
  6016. }
  6017. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6018. static void iwl4965_bg_post_associate(struct work_struct *data)
  6019. {
  6020. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6021. post_associate.work);
  6022. int rc = 0;
  6023. struct ieee80211_conf *conf = NULL;
  6024. DECLARE_MAC_BUF(mac);
  6025. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6026. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6027. return;
  6028. }
  6029. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6030. priv->assoc_id,
  6031. print_mac(mac, priv->active_rxon.bssid_addr));
  6032. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6033. return;
  6034. mutex_lock(&priv->mutex);
  6035. if (!priv->vif || !priv->is_open) {
  6036. mutex_unlock(&priv->mutex);
  6037. return;
  6038. }
  6039. iwl4965_scan_cancel_timeout(priv, 200);
  6040. conf = ieee80211_get_hw_conf(priv->hw);
  6041. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6042. iwl4965_commit_rxon(priv);
  6043. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6044. iwl4965_setup_rxon_timing(priv);
  6045. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6046. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6047. if (rc)
  6048. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6049. "Attempting to continue.\n");
  6050. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6051. #ifdef CONFIG_IWL4965_HT
  6052. if (priv->current_ht_config.is_ht)
  6053. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  6054. #endif /* CONFIG_IWL4965_HT*/
  6055. iwl4965_set_rxon_chain(priv);
  6056. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6057. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6058. priv->assoc_id, priv->beacon_int);
  6059. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6060. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6061. else
  6062. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6063. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6064. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6065. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6066. else
  6067. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6068. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6069. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6070. }
  6071. iwl4965_commit_rxon(priv);
  6072. switch (priv->iw_mode) {
  6073. case IEEE80211_IF_TYPE_STA:
  6074. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6075. break;
  6076. case IEEE80211_IF_TYPE_IBSS:
  6077. /* clear out the station table */
  6078. iwl4965_clear_stations_table(priv);
  6079. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6080. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6081. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6082. iwl4965_send_beacon_cmd(priv);
  6083. break;
  6084. default:
  6085. IWL_ERROR("%s Should not be called in %d mode\n",
  6086. __FUNCTION__, priv->iw_mode);
  6087. break;
  6088. }
  6089. iwl4965_sequence_reset(priv);
  6090. #ifdef CONFIG_IWL4965_SENSITIVITY
  6091. /* Enable Rx differential gain and sensitivity calibrations */
  6092. iwl4965_chain_noise_reset(priv);
  6093. priv->start_calib = 1;
  6094. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6095. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6096. priv->assoc_station_added = 1;
  6097. #ifdef CONFIG_IWL4965_QOS
  6098. iwl4965_activate_qos(priv, 0);
  6099. #endif /* CONFIG_IWL4965_QOS */
  6100. /* we have just associated, don't start scan too early */
  6101. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6102. mutex_unlock(&priv->mutex);
  6103. }
  6104. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6105. {
  6106. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6107. if (!iwl4965_is_ready(priv))
  6108. return;
  6109. mutex_lock(&priv->mutex);
  6110. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6111. iwl4965_send_scan_abort(priv);
  6112. mutex_unlock(&priv->mutex);
  6113. }
  6114. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6115. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6116. {
  6117. struct iwl4965_priv *priv =
  6118. container_of(work, struct iwl4965_priv, scan_completed);
  6119. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6120. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6121. return;
  6122. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6123. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6124. ieee80211_scan_completed(priv->hw);
  6125. /* Since setting the TXPOWER may have been deferred while
  6126. * performing the scan, fire one off */
  6127. mutex_lock(&priv->mutex);
  6128. iwl4965_hw_reg_send_txpower(priv);
  6129. mutex_unlock(&priv->mutex);
  6130. }
  6131. /*****************************************************************************
  6132. *
  6133. * mac80211 entry point functions
  6134. *
  6135. *****************************************************************************/
  6136. #define UCODE_READY_TIMEOUT (2 * HZ)
  6137. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6138. {
  6139. struct iwl4965_priv *priv = hw->priv;
  6140. int ret;
  6141. IWL_DEBUG_MAC80211("enter\n");
  6142. if (pci_enable_device(priv->pci_dev)) {
  6143. IWL_ERROR("Fail to pci_enable_device\n");
  6144. return -ENODEV;
  6145. }
  6146. pci_restore_state(priv->pci_dev);
  6147. pci_enable_msi(priv->pci_dev);
  6148. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  6149. DRV_NAME, priv);
  6150. if (ret) {
  6151. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  6152. goto out_disable_msi;
  6153. }
  6154. /* we should be verifying the device is ready to be opened */
  6155. mutex_lock(&priv->mutex);
  6156. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  6157. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  6158. * ucode filename and max sizes are card-specific. */
  6159. if (!priv->ucode_code.len) {
  6160. ret = iwl4965_read_ucode(priv);
  6161. if (ret) {
  6162. IWL_ERROR("Could not read microcode: %d\n", ret);
  6163. mutex_unlock(&priv->mutex);
  6164. goto out_release_irq;
  6165. }
  6166. }
  6167. ret = __iwl4965_up(priv);
  6168. mutex_unlock(&priv->mutex);
  6169. if (ret)
  6170. goto out_release_irq;
  6171. IWL_DEBUG_INFO("Start UP work done.\n");
  6172. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  6173. return 0;
  6174. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  6175. * mac80211 will not be run successfully. */
  6176. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  6177. test_bit(STATUS_READY, &priv->status),
  6178. UCODE_READY_TIMEOUT);
  6179. if (!ret) {
  6180. if (!test_bit(STATUS_READY, &priv->status)) {
  6181. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  6182. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  6183. ret = -ETIMEDOUT;
  6184. goto out_release_irq;
  6185. }
  6186. }
  6187. priv->is_open = 1;
  6188. IWL_DEBUG_MAC80211("leave\n");
  6189. return 0;
  6190. out_release_irq:
  6191. free_irq(priv->pci_dev->irq, priv);
  6192. out_disable_msi:
  6193. pci_disable_msi(priv->pci_dev);
  6194. pci_disable_device(priv->pci_dev);
  6195. priv->is_open = 0;
  6196. IWL_DEBUG_MAC80211("leave - failed\n");
  6197. return ret;
  6198. }
  6199. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6200. {
  6201. struct iwl4965_priv *priv = hw->priv;
  6202. IWL_DEBUG_MAC80211("enter\n");
  6203. if (!priv->is_open) {
  6204. IWL_DEBUG_MAC80211("leave - skip\n");
  6205. return;
  6206. }
  6207. priv->is_open = 0;
  6208. if (iwl4965_is_ready_rf(priv)) {
  6209. /* stop mac, cancel any scan request and clear
  6210. * RXON_FILTER_ASSOC_MSK BIT
  6211. */
  6212. mutex_lock(&priv->mutex);
  6213. iwl4965_scan_cancel_timeout(priv, 100);
  6214. cancel_delayed_work(&priv->post_associate);
  6215. mutex_unlock(&priv->mutex);
  6216. }
  6217. iwl4965_down(priv);
  6218. flush_workqueue(priv->workqueue);
  6219. free_irq(priv->pci_dev->irq, priv);
  6220. pci_disable_msi(priv->pci_dev);
  6221. pci_save_state(priv->pci_dev);
  6222. pci_disable_device(priv->pci_dev);
  6223. IWL_DEBUG_MAC80211("leave\n");
  6224. }
  6225. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6226. struct ieee80211_tx_control *ctl)
  6227. {
  6228. struct iwl4965_priv *priv = hw->priv;
  6229. IWL_DEBUG_MAC80211("enter\n");
  6230. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6231. IWL_DEBUG_MAC80211("leave - monitor\n");
  6232. return -1;
  6233. }
  6234. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6235. ctl->tx_rate);
  6236. if (iwl4965_tx_skb(priv, skb, ctl))
  6237. dev_kfree_skb_any(skb);
  6238. IWL_DEBUG_MAC80211("leave\n");
  6239. return 0;
  6240. }
  6241. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6242. struct ieee80211_if_init_conf *conf)
  6243. {
  6244. struct iwl4965_priv *priv = hw->priv;
  6245. unsigned long flags;
  6246. DECLARE_MAC_BUF(mac);
  6247. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6248. if (priv->vif) {
  6249. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6250. return -EOPNOTSUPP;
  6251. }
  6252. spin_lock_irqsave(&priv->lock, flags);
  6253. priv->vif = conf->vif;
  6254. spin_unlock_irqrestore(&priv->lock, flags);
  6255. mutex_lock(&priv->mutex);
  6256. if (conf->mac_addr) {
  6257. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6258. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6259. }
  6260. if (iwl4965_is_ready(priv))
  6261. iwl4965_set_mode(priv, conf->type);
  6262. mutex_unlock(&priv->mutex);
  6263. IWL_DEBUG_MAC80211("leave\n");
  6264. return 0;
  6265. }
  6266. /**
  6267. * iwl4965_mac_config - mac80211 config callback
  6268. *
  6269. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6270. * be set inappropriately and the driver currently sets the hardware up to
  6271. * use it whenever needed.
  6272. */
  6273. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6274. {
  6275. struct iwl4965_priv *priv = hw->priv;
  6276. const struct iwl4965_channel_info *ch_info;
  6277. unsigned long flags;
  6278. int ret = 0;
  6279. mutex_lock(&priv->mutex);
  6280. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6281. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6282. if (!iwl4965_is_ready(priv)) {
  6283. IWL_DEBUG_MAC80211("leave - not ready\n");
  6284. ret = -EIO;
  6285. goto out;
  6286. }
  6287. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6288. test_bit(STATUS_SCANNING, &priv->status))) {
  6289. IWL_DEBUG_MAC80211("leave - scanning\n");
  6290. set_bit(STATUS_CONF_PENDING, &priv->status);
  6291. mutex_unlock(&priv->mutex);
  6292. return 0;
  6293. }
  6294. spin_lock_irqsave(&priv->lock, flags);
  6295. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6296. if (!is_channel_valid(ch_info)) {
  6297. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6298. conf->channel, conf->phymode);
  6299. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6300. spin_unlock_irqrestore(&priv->lock, flags);
  6301. ret = -EINVAL;
  6302. goto out;
  6303. }
  6304. #ifdef CONFIG_IWL4965_HT
  6305. /* if we are switching fron ht to 2.4 clear flags
  6306. * from any ht related info since 2.4 does not
  6307. * support ht */
  6308. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6309. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6310. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6311. #endif
  6312. )
  6313. priv->staging_rxon.flags = 0;
  6314. #endif /* CONFIG_IWL4965_HT */
  6315. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6316. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6317. /* The list of supported rates and rate mask can be different
  6318. * for each phymode; since the phymode may have changed, reset
  6319. * the rate mask to what mac80211 lists */
  6320. iwl4965_set_rate(priv);
  6321. spin_unlock_irqrestore(&priv->lock, flags);
  6322. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6323. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6324. iwl4965_hw_channel_switch(priv, conf->channel);
  6325. goto out;
  6326. }
  6327. #endif
  6328. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6329. if (!conf->radio_enabled) {
  6330. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6331. goto out;
  6332. }
  6333. if (iwl4965_is_rfkill(priv)) {
  6334. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6335. ret = -EIO;
  6336. goto out;
  6337. }
  6338. iwl4965_set_rate(priv);
  6339. if (memcmp(&priv->active_rxon,
  6340. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6341. iwl4965_commit_rxon(priv);
  6342. else
  6343. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6344. IWL_DEBUG_MAC80211("leave\n");
  6345. out:
  6346. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6347. mutex_unlock(&priv->mutex);
  6348. return ret;
  6349. }
  6350. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6351. {
  6352. int rc = 0;
  6353. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6354. return;
  6355. /* The following should be done only at AP bring up */
  6356. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6357. /* RXON - unassoc (to set timing command) */
  6358. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6359. iwl4965_commit_rxon(priv);
  6360. /* RXON Timing */
  6361. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6362. iwl4965_setup_rxon_timing(priv);
  6363. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6364. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6365. if (rc)
  6366. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6367. "Attempting to continue.\n");
  6368. iwl4965_set_rxon_chain(priv);
  6369. /* FIXME: what should be the assoc_id for AP? */
  6370. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6371. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6372. priv->staging_rxon.flags |=
  6373. RXON_FLG_SHORT_PREAMBLE_MSK;
  6374. else
  6375. priv->staging_rxon.flags &=
  6376. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6377. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6378. if (priv->assoc_capability &
  6379. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6380. priv->staging_rxon.flags |=
  6381. RXON_FLG_SHORT_SLOT_MSK;
  6382. else
  6383. priv->staging_rxon.flags &=
  6384. ~RXON_FLG_SHORT_SLOT_MSK;
  6385. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6386. priv->staging_rxon.flags &=
  6387. ~RXON_FLG_SHORT_SLOT_MSK;
  6388. }
  6389. /* restore RXON assoc */
  6390. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6391. iwl4965_commit_rxon(priv);
  6392. #ifdef CONFIG_IWL4965_QOS
  6393. iwl4965_activate_qos(priv, 1);
  6394. #endif
  6395. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6396. }
  6397. iwl4965_send_beacon_cmd(priv);
  6398. /* FIXME - we need to add code here to detect a totally new
  6399. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6400. * clear sta table, add BCAST sta... */
  6401. }
  6402. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6403. struct ieee80211_vif *vif,
  6404. struct ieee80211_if_conf *conf)
  6405. {
  6406. struct iwl4965_priv *priv = hw->priv;
  6407. DECLARE_MAC_BUF(mac);
  6408. unsigned long flags;
  6409. int rc;
  6410. if (conf == NULL)
  6411. return -EIO;
  6412. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6413. (!conf->beacon || !conf->ssid_len)) {
  6414. IWL_DEBUG_MAC80211
  6415. ("Leaving in AP mode because HostAPD is not ready.\n");
  6416. return 0;
  6417. }
  6418. if (!iwl4965_is_alive(priv))
  6419. return -EAGAIN;
  6420. mutex_lock(&priv->mutex);
  6421. if (conf->bssid)
  6422. IWL_DEBUG_MAC80211("bssid: %s\n",
  6423. print_mac(mac, conf->bssid));
  6424. /*
  6425. * very dubious code was here; the probe filtering flag is never set:
  6426. *
  6427. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6428. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6429. */
  6430. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6431. IWL_DEBUG_MAC80211("leave - scanning\n");
  6432. mutex_unlock(&priv->mutex);
  6433. return 0;
  6434. }
  6435. if (priv->vif != vif) {
  6436. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6437. mutex_unlock(&priv->mutex);
  6438. return 0;
  6439. }
  6440. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6441. if (!conf->bssid) {
  6442. conf->bssid = priv->mac_addr;
  6443. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6444. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6445. print_mac(mac, conf->bssid));
  6446. }
  6447. if (priv->ibss_beacon)
  6448. dev_kfree_skb(priv->ibss_beacon);
  6449. priv->ibss_beacon = conf->beacon;
  6450. }
  6451. if (iwl4965_is_rfkill(priv))
  6452. goto done;
  6453. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6454. !is_multicast_ether_addr(conf->bssid)) {
  6455. /* If there is currently a HW scan going on in the background
  6456. * then we need to cancel it else the RXON below will fail. */
  6457. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6458. IWL_WARNING("Aborted scan still in progress "
  6459. "after 100ms\n");
  6460. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6461. mutex_unlock(&priv->mutex);
  6462. return -EAGAIN;
  6463. }
  6464. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6465. /* TODO: Audit driver for usage of these members and see
  6466. * if mac80211 deprecates them (priv->bssid looks like it
  6467. * shouldn't be there, but I haven't scanned the IBSS code
  6468. * to verify) - jpk */
  6469. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6470. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6471. iwl4965_config_ap(priv);
  6472. else {
  6473. rc = iwl4965_commit_rxon(priv);
  6474. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6475. iwl4965_rxon_add_station(
  6476. priv, priv->active_rxon.bssid_addr, 1);
  6477. }
  6478. } else {
  6479. iwl4965_scan_cancel_timeout(priv, 100);
  6480. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6481. iwl4965_commit_rxon(priv);
  6482. }
  6483. done:
  6484. spin_lock_irqsave(&priv->lock, flags);
  6485. if (!conf->ssid_len)
  6486. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6487. else
  6488. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6489. priv->essid_len = conf->ssid_len;
  6490. spin_unlock_irqrestore(&priv->lock, flags);
  6491. IWL_DEBUG_MAC80211("leave\n");
  6492. mutex_unlock(&priv->mutex);
  6493. return 0;
  6494. }
  6495. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6496. unsigned int changed_flags,
  6497. unsigned int *total_flags,
  6498. int mc_count, struct dev_addr_list *mc_list)
  6499. {
  6500. /*
  6501. * XXX: dummy
  6502. * see also iwl4965_connection_init_rx_config
  6503. */
  6504. *total_flags = 0;
  6505. }
  6506. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6507. struct ieee80211_if_init_conf *conf)
  6508. {
  6509. struct iwl4965_priv *priv = hw->priv;
  6510. IWL_DEBUG_MAC80211("enter\n");
  6511. mutex_lock(&priv->mutex);
  6512. if (iwl4965_is_ready_rf(priv)) {
  6513. iwl4965_scan_cancel_timeout(priv, 100);
  6514. cancel_delayed_work(&priv->post_associate);
  6515. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6516. iwl4965_commit_rxon(priv);
  6517. }
  6518. if (priv->vif == conf->vif) {
  6519. priv->vif = NULL;
  6520. memset(priv->bssid, 0, ETH_ALEN);
  6521. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6522. priv->essid_len = 0;
  6523. }
  6524. mutex_unlock(&priv->mutex);
  6525. IWL_DEBUG_MAC80211("leave\n");
  6526. }
  6527. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6528. struct ieee80211_vif *vif,
  6529. struct ieee80211_bss_conf *bss_conf,
  6530. u32 changes)
  6531. {
  6532. struct iwl4965_priv *priv = hw->priv;
  6533. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6534. if (bss_conf->use_short_preamble)
  6535. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6536. else
  6537. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6538. }
  6539. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6540. if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
  6541. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6542. else
  6543. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6544. }
  6545. if (changes & BSS_CHANGED_ASSOC) {
  6546. /*
  6547. * TODO:
  6548. * do stuff instead of sniffing assoc resp
  6549. */
  6550. }
  6551. if (iwl4965_is_associated(priv))
  6552. iwl4965_send_rxon_assoc(priv);
  6553. }
  6554. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6555. {
  6556. int rc = 0;
  6557. unsigned long flags;
  6558. struct iwl4965_priv *priv = hw->priv;
  6559. IWL_DEBUG_MAC80211("enter\n");
  6560. mutex_lock(&priv->mutex);
  6561. spin_lock_irqsave(&priv->lock, flags);
  6562. if (!iwl4965_is_ready_rf(priv)) {
  6563. rc = -EIO;
  6564. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6565. goto out_unlock;
  6566. }
  6567. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6568. rc = -EIO;
  6569. IWL_ERROR("ERROR: APs don't scan\n");
  6570. goto out_unlock;
  6571. }
  6572. /* we don't schedule scan within next_scan_jiffies period */
  6573. if (priv->next_scan_jiffies &&
  6574. time_after(priv->next_scan_jiffies, jiffies)) {
  6575. rc = -EAGAIN;
  6576. goto out_unlock;
  6577. }
  6578. /* if we just finished scan ask for delay */
  6579. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6580. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6581. rc = -EAGAIN;
  6582. goto out_unlock;
  6583. }
  6584. if (len) {
  6585. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6586. iwl4965_escape_essid(ssid, len), (int)len);
  6587. priv->one_direct_scan = 1;
  6588. priv->direct_ssid_len = (u8)
  6589. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6590. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6591. } else
  6592. priv->one_direct_scan = 0;
  6593. rc = iwl4965_scan_initiate(priv);
  6594. IWL_DEBUG_MAC80211("leave\n");
  6595. out_unlock:
  6596. spin_unlock_irqrestore(&priv->lock, flags);
  6597. mutex_unlock(&priv->mutex);
  6598. return rc;
  6599. }
  6600. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6601. const u8 *local_addr, const u8 *addr,
  6602. struct ieee80211_key_conf *key)
  6603. {
  6604. struct iwl4965_priv *priv = hw->priv;
  6605. DECLARE_MAC_BUF(mac);
  6606. int rc = 0;
  6607. u8 sta_id;
  6608. IWL_DEBUG_MAC80211("enter\n");
  6609. if (!iwl4965_param_hwcrypto) {
  6610. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6611. return -EOPNOTSUPP;
  6612. }
  6613. if (is_zero_ether_addr(addr))
  6614. /* only support pairwise keys */
  6615. return -EOPNOTSUPP;
  6616. sta_id = iwl4965_hw_find_station(priv, addr);
  6617. if (sta_id == IWL_INVALID_STATION) {
  6618. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6619. print_mac(mac, addr));
  6620. return -EINVAL;
  6621. }
  6622. mutex_lock(&priv->mutex);
  6623. iwl4965_scan_cancel_timeout(priv, 100);
  6624. switch (cmd) {
  6625. case SET_KEY:
  6626. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6627. if (!rc) {
  6628. iwl4965_set_rxon_hwcrypto(priv, 1);
  6629. iwl4965_commit_rxon(priv);
  6630. key->hw_key_idx = sta_id;
  6631. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6632. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6633. }
  6634. break;
  6635. case DISABLE_KEY:
  6636. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6637. if (!rc) {
  6638. iwl4965_set_rxon_hwcrypto(priv, 0);
  6639. iwl4965_commit_rxon(priv);
  6640. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6641. }
  6642. break;
  6643. default:
  6644. rc = -EINVAL;
  6645. }
  6646. IWL_DEBUG_MAC80211("leave\n");
  6647. mutex_unlock(&priv->mutex);
  6648. return rc;
  6649. }
  6650. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6651. const struct ieee80211_tx_queue_params *params)
  6652. {
  6653. struct iwl4965_priv *priv = hw->priv;
  6654. #ifdef CONFIG_IWL4965_QOS
  6655. unsigned long flags;
  6656. int q;
  6657. #endif /* CONFIG_IWL4965_QOS */
  6658. IWL_DEBUG_MAC80211("enter\n");
  6659. if (!iwl4965_is_ready_rf(priv)) {
  6660. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6661. return -EIO;
  6662. }
  6663. if (queue >= AC_NUM) {
  6664. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6665. return 0;
  6666. }
  6667. #ifdef CONFIG_IWL4965_QOS
  6668. if (!priv->qos_data.qos_enable) {
  6669. priv->qos_data.qos_active = 0;
  6670. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6671. return 0;
  6672. }
  6673. q = AC_NUM - 1 - queue;
  6674. spin_lock_irqsave(&priv->lock, flags);
  6675. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6676. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6677. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6678. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6679. cpu_to_le16((params->burst_time * 100));
  6680. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6681. priv->qos_data.qos_active = 1;
  6682. spin_unlock_irqrestore(&priv->lock, flags);
  6683. mutex_lock(&priv->mutex);
  6684. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6685. iwl4965_activate_qos(priv, 1);
  6686. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6687. iwl4965_activate_qos(priv, 0);
  6688. mutex_unlock(&priv->mutex);
  6689. #endif /*CONFIG_IWL4965_QOS */
  6690. IWL_DEBUG_MAC80211("leave\n");
  6691. return 0;
  6692. }
  6693. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6694. struct ieee80211_tx_queue_stats *stats)
  6695. {
  6696. struct iwl4965_priv *priv = hw->priv;
  6697. int i, avail;
  6698. struct iwl4965_tx_queue *txq;
  6699. struct iwl4965_queue *q;
  6700. unsigned long flags;
  6701. IWL_DEBUG_MAC80211("enter\n");
  6702. if (!iwl4965_is_ready_rf(priv)) {
  6703. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6704. return -EIO;
  6705. }
  6706. spin_lock_irqsave(&priv->lock, flags);
  6707. for (i = 0; i < AC_NUM; i++) {
  6708. txq = &priv->txq[i];
  6709. q = &txq->q;
  6710. avail = iwl4965_queue_space(q);
  6711. stats->data[i].len = q->n_window - avail;
  6712. stats->data[i].limit = q->n_window - q->high_mark;
  6713. stats->data[i].count = q->n_window;
  6714. }
  6715. spin_unlock_irqrestore(&priv->lock, flags);
  6716. IWL_DEBUG_MAC80211("leave\n");
  6717. return 0;
  6718. }
  6719. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6720. struct ieee80211_low_level_stats *stats)
  6721. {
  6722. IWL_DEBUG_MAC80211("enter\n");
  6723. IWL_DEBUG_MAC80211("leave\n");
  6724. return 0;
  6725. }
  6726. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6727. {
  6728. IWL_DEBUG_MAC80211("enter\n");
  6729. IWL_DEBUG_MAC80211("leave\n");
  6730. return 0;
  6731. }
  6732. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6733. {
  6734. struct iwl4965_priv *priv = hw->priv;
  6735. unsigned long flags;
  6736. mutex_lock(&priv->mutex);
  6737. IWL_DEBUG_MAC80211("enter\n");
  6738. priv->lq_mngr.lq_ready = 0;
  6739. #ifdef CONFIG_IWL4965_HT
  6740. spin_lock_irqsave(&priv->lock, flags);
  6741. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6742. spin_unlock_irqrestore(&priv->lock, flags);
  6743. #endif /* CONFIG_IWL4965_HT */
  6744. #ifdef CONFIG_IWL4965_QOS
  6745. iwl4965_reset_qos(priv);
  6746. #endif
  6747. cancel_delayed_work(&priv->post_associate);
  6748. spin_lock_irqsave(&priv->lock, flags);
  6749. priv->assoc_id = 0;
  6750. priv->assoc_capability = 0;
  6751. priv->call_post_assoc_from_beacon = 0;
  6752. priv->assoc_station_added = 0;
  6753. /* new association get rid of ibss beacon skb */
  6754. if (priv->ibss_beacon)
  6755. dev_kfree_skb(priv->ibss_beacon);
  6756. priv->ibss_beacon = NULL;
  6757. priv->beacon_int = priv->hw->conf.beacon_int;
  6758. priv->timestamp1 = 0;
  6759. priv->timestamp0 = 0;
  6760. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6761. priv->beacon_int = 0;
  6762. spin_unlock_irqrestore(&priv->lock, flags);
  6763. if (!iwl4965_is_ready_rf(priv)) {
  6764. IWL_DEBUG_MAC80211("leave - not ready\n");
  6765. mutex_unlock(&priv->mutex);
  6766. return;
  6767. }
  6768. /* we are restarting association process
  6769. * clear RXON_FILTER_ASSOC_MSK bit
  6770. */
  6771. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6772. iwl4965_scan_cancel_timeout(priv, 100);
  6773. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6774. iwl4965_commit_rxon(priv);
  6775. }
  6776. /* Per mac80211.h: This is only used in IBSS mode... */
  6777. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6778. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6779. mutex_unlock(&priv->mutex);
  6780. return;
  6781. }
  6782. priv->only_active_channel = 0;
  6783. iwl4965_set_rate(priv);
  6784. mutex_unlock(&priv->mutex);
  6785. IWL_DEBUG_MAC80211("leave\n");
  6786. }
  6787. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6788. struct ieee80211_tx_control *control)
  6789. {
  6790. struct iwl4965_priv *priv = hw->priv;
  6791. unsigned long flags;
  6792. mutex_lock(&priv->mutex);
  6793. IWL_DEBUG_MAC80211("enter\n");
  6794. if (!iwl4965_is_ready_rf(priv)) {
  6795. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6796. mutex_unlock(&priv->mutex);
  6797. return -EIO;
  6798. }
  6799. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6800. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6801. mutex_unlock(&priv->mutex);
  6802. return -EIO;
  6803. }
  6804. spin_lock_irqsave(&priv->lock, flags);
  6805. if (priv->ibss_beacon)
  6806. dev_kfree_skb(priv->ibss_beacon);
  6807. priv->ibss_beacon = skb;
  6808. priv->assoc_id = 0;
  6809. IWL_DEBUG_MAC80211("leave\n");
  6810. spin_unlock_irqrestore(&priv->lock, flags);
  6811. #ifdef CONFIG_IWL4965_QOS
  6812. iwl4965_reset_qos(priv);
  6813. #endif
  6814. queue_work(priv->workqueue, &priv->post_associate.work);
  6815. mutex_unlock(&priv->mutex);
  6816. return 0;
  6817. }
  6818. #ifdef CONFIG_IWL4965_HT
  6819. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6820. struct iwl4965_priv *priv)
  6821. {
  6822. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6823. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6824. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6825. IWL_DEBUG_MAC80211("enter: \n");
  6826. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6827. iwl_conf->is_ht = 0;
  6828. return;
  6829. }
  6830. iwl_conf->is_ht = 1;
  6831. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6832. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6833. iwl_conf->sgf |= 0x1;
  6834. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6835. iwl_conf->sgf |= 0x2;
  6836. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6837. iwl_conf->max_amsdu_size =
  6838. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6839. iwl_conf->supported_chan_width =
  6840. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6841. iwl_conf->tx_mimo_ps_mode =
  6842. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6843. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6844. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6845. iwl_conf->extension_chan_offset =
  6846. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6847. iwl_conf->tx_chan_width =
  6848. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6849. iwl_conf->ht_protection =
  6850. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6851. iwl_conf->non_GF_STA_present =
  6852. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6853. IWL_DEBUG_MAC80211("control channel %d\n",
  6854. iwl_conf->control_channel);
  6855. IWL_DEBUG_MAC80211("leave\n");
  6856. }
  6857. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6858. struct ieee80211_conf *conf)
  6859. {
  6860. struct iwl4965_priv *priv = hw->priv;
  6861. IWL_DEBUG_MAC80211("enter: \n");
  6862. iwl4965_ht_info_fill(conf, priv);
  6863. iwl4965_set_rxon_chain(priv);
  6864. if (priv && priv->assoc_id &&
  6865. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6866. unsigned long flags;
  6867. spin_lock_irqsave(&priv->lock, flags);
  6868. if (priv->beacon_int)
  6869. queue_work(priv->workqueue, &priv->post_associate.work);
  6870. else
  6871. priv->call_post_assoc_from_beacon = 1;
  6872. spin_unlock_irqrestore(&priv->lock, flags);
  6873. }
  6874. IWL_DEBUG_MAC80211("leave:\n");
  6875. return 0;
  6876. }
  6877. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6878. struct ieee80211_ht_cap *ht_cap,
  6879. u8 use_current_config)
  6880. {
  6881. struct ieee80211_conf *conf = &hw->conf;
  6882. struct ieee80211_hw_mode *mode = conf->mode;
  6883. if (use_current_config) {
  6884. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6885. memcpy(ht_cap->supp_mcs_set,
  6886. conf->ht_conf.supp_mcs_set, 16);
  6887. } else {
  6888. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6889. memcpy(ht_cap->supp_mcs_set,
  6890. mode->ht_info.supp_mcs_set, 16);
  6891. }
  6892. ht_cap->ampdu_params_info =
  6893. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6894. ((mode->ht_info.ampdu_density << 2) &
  6895. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6896. }
  6897. #endif /*CONFIG_IWL4965_HT*/
  6898. /*****************************************************************************
  6899. *
  6900. * sysfs attributes
  6901. *
  6902. *****************************************************************************/
  6903. #ifdef CONFIG_IWL4965_DEBUG
  6904. /*
  6905. * The following adds a new attribute to the sysfs representation
  6906. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6907. * used for controlling the debug level.
  6908. *
  6909. * See the level definitions in iwl for details.
  6910. */
  6911. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6912. {
  6913. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6914. }
  6915. static ssize_t store_debug_level(struct device_driver *d,
  6916. const char *buf, size_t count)
  6917. {
  6918. char *p = (char *)buf;
  6919. u32 val;
  6920. val = simple_strtoul(p, &p, 0);
  6921. if (p == buf)
  6922. printk(KERN_INFO DRV_NAME
  6923. ": %s is not in hex or decimal form.\n", buf);
  6924. else
  6925. iwl4965_debug_level = val;
  6926. return strnlen(buf, count);
  6927. }
  6928. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6929. show_debug_level, store_debug_level);
  6930. #endif /* CONFIG_IWL4965_DEBUG */
  6931. static ssize_t show_rf_kill(struct device *d,
  6932. struct device_attribute *attr, char *buf)
  6933. {
  6934. /*
  6935. * 0 - RF kill not enabled
  6936. * 1 - SW based RF kill active (sysfs)
  6937. * 2 - HW based RF kill active
  6938. * 3 - Both HW and SW based RF kill active
  6939. */
  6940. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6941. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6942. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6943. return sprintf(buf, "%i\n", val);
  6944. }
  6945. static ssize_t store_rf_kill(struct device *d,
  6946. struct device_attribute *attr,
  6947. const char *buf, size_t count)
  6948. {
  6949. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6950. mutex_lock(&priv->mutex);
  6951. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6952. mutex_unlock(&priv->mutex);
  6953. return count;
  6954. }
  6955. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6956. static ssize_t show_temperature(struct device *d,
  6957. struct device_attribute *attr, char *buf)
  6958. {
  6959. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6960. if (!iwl4965_is_alive(priv))
  6961. return -EAGAIN;
  6962. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6963. }
  6964. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6965. static ssize_t show_rs_window(struct device *d,
  6966. struct device_attribute *attr,
  6967. char *buf)
  6968. {
  6969. struct iwl4965_priv *priv = d->driver_data;
  6970. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6971. }
  6972. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6973. static ssize_t show_tx_power(struct device *d,
  6974. struct device_attribute *attr, char *buf)
  6975. {
  6976. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6977. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6978. }
  6979. static ssize_t store_tx_power(struct device *d,
  6980. struct device_attribute *attr,
  6981. const char *buf, size_t count)
  6982. {
  6983. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6984. char *p = (char *)buf;
  6985. u32 val;
  6986. val = simple_strtoul(p, &p, 10);
  6987. if (p == buf)
  6988. printk(KERN_INFO DRV_NAME
  6989. ": %s is not in decimal form.\n", buf);
  6990. else
  6991. iwl4965_hw_reg_set_txpower(priv, val);
  6992. return count;
  6993. }
  6994. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6995. static ssize_t show_flags(struct device *d,
  6996. struct device_attribute *attr, char *buf)
  6997. {
  6998. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6999. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  7000. }
  7001. static ssize_t store_flags(struct device *d,
  7002. struct device_attribute *attr,
  7003. const char *buf, size_t count)
  7004. {
  7005. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7006. u32 flags = simple_strtoul(buf, NULL, 0);
  7007. mutex_lock(&priv->mutex);
  7008. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  7009. /* Cancel any currently running scans... */
  7010. if (iwl4965_scan_cancel_timeout(priv, 100))
  7011. IWL_WARNING("Could not cancel scan.\n");
  7012. else {
  7013. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  7014. flags);
  7015. priv->staging_rxon.flags = cpu_to_le32(flags);
  7016. iwl4965_commit_rxon(priv);
  7017. }
  7018. }
  7019. mutex_unlock(&priv->mutex);
  7020. return count;
  7021. }
  7022. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  7023. static ssize_t show_filter_flags(struct device *d,
  7024. struct device_attribute *attr, char *buf)
  7025. {
  7026. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7027. return sprintf(buf, "0x%04X\n",
  7028. le32_to_cpu(priv->active_rxon.filter_flags));
  7029. }
  7030. static ssize_t store_filter_flags(struct device *d,
  7031. struct device_attribute *attr,
  7032. const char *buf, size_t count)
  7033. {
  7034. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7035. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7036. mutex_lock(&priv->mutex);
  7037. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7038. /* Cancel any currently running scans... */
  7039. if (iwl4965_scan_cancel_timeout(priv, 100))
  7040. IWL_WARNING("Could not cancel scan.\n");
  7041. else {
  7042. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7043. "0x%04X\n", filter_flags);
  7044. priv->staging_rxon.filter_flags =
  7045. cpu_to_le32(filter_flags);
  7046. iwl4965_commit_rxon(priv);
  7047. }
  7048. }
  7049. mutex_unlock(&priv->mutex);
  7050. return count;
  7051. }
  7052. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7053. store_filter_flags);
  7054. static ssize_t show_tune(struct device *d,
  7055. struct device_attribute *attr, char *buf)
  7056. {
  7057. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7058. return sprintf(buf, "0x%04X\n",
  7059. (priv->phymode << 8) |
  7060. le16_to_cpu(priv->active_rxon.channel));
  7061. }
  7062. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7063. static ssize_t store_tune(struct device *d,
  7064. struct device_attribute *attr,
  7065. const char *buf, size_t count)
  7066. {
  7067. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7068. char *p = (char *)buf;
  7069. u16 tune = simple_strtoul(p, &p, 0);
  7070. u8 phymode = (tune >> 8) & 0xff;
  7071. u16 channel = tune & 0xff;
  7072. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7073. mutex_lock(&priv->mutex);
  7074. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7075. (priv->phymode != phymode)) {
  7076. const struct iwl4965_channel_info *ch_info;
  7077. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7078. if (!ch_info) {
  7079. IWL_WARNING("Requested invalid phymode/channel "
  7080. "combination: %d %d\n", phymode, channel);
  7081. mutex_unlock(&priv->mutex);
  7082. return -EINVAL;
  7083. }
  7084. /* Cancel any currently running scans... */
  7085. if (iwl4965_scan_cancel_timeout(priv, 100))
  7086. IWL_WARNING("Could not cancel scan.\n");
  7087. else {
  7088. IWL_DEBUG_INFO("Committing phymode and "
  7089. "rxon.channel = %d %d\n",
  7090. phymode, channel);
  7091. iwl4965_set_rxon_channel(priv, phymode, channel);
  7092. iwl4965_set_flags_for_phymode(priv, phymode);
  7093. iwl4965_set_rate(priv);
  7094. iwl4965_commit_rxon(priv);
  7095. }
  7096. }
  7097. mutex_unlock(&priv->mutex);
  7098. return count;
  7099. }
  7100. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7101. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7102. static ssize_t show_measurement(struct device *d,
  7103. struct device_attribute *attr, char *buf)
  7104. {
  7105. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7106. struct iwl4965_spectrum_notification measure_report;
  7107. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7108. u8 *data = (u8 *) & measure_report;
  7109. unsigned long flags;
  7110. spin_lock_irqsave(&priv->lock, flags);
  7111. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7112. spin_unlock_irqrestore(&priv->lock, flags);
  7113. return 0;
  7114. }
  7115. memcpy(&measure_report, &priv->measure_report, size);
  7116. priv->measurement_status = 0;
  7117. spin_unlock_irqrestore(&priv->lock, flags);
  7118. while (size && (PAGE_SIZE - len)) {
  7119. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7120. PAGE_SIZE - len, 1);
  7121. len = strlen(buf);
  7122. if (PAGE_SIZE - len)
  7123. buf[len++] = '\n';
  7124. ofs += 16;
  7125. size -= min(size, 16U);
  7126. }
  7127. return len;
  7128. }
  7129. static ssize_t store_measurement(struct device *d,
  7130. struct device_attribute *attr,
  7131. const char *buf, size_t count)
  7132. {
  7133. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7134. struct ieee80211_measurement_params params = {
  7135. .channel = le16_to_cpu(priv->active_rxon.channel),
  7136. .start_time = cpu_to_le64(priv->last_tsf),
  7137. .duration = cpu_to_le16(1),
  7138. };
  7139. u8 type = IWL_MEASURE_BASIC;
  7140. u8 buffer[32];
  7141. u8 channel;
  7142. if (count) {
  7143. char *p = buffer;
  7144. strncpy(buffer, buf, min(sizeof(buffer), count));
  7145. channel = simple_strtoul(p, NULL, 0);
  7146. if (channel)
  7147. params.channel = channel;
  7148. p = buffer;
  7149. while (*p && *p != ' ')
  7150. p++;
  7151. if (*p)
  7152. type = simple_strtoul(p + 1, NULL, 0);
  7153. }
  7154. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7155. "channel %d (for '%s')\n", type, params.channel, buf);
  7156. iwl4965_get_measurement(priv, &params, type);
  7157. return count;
  7158. }
  7159. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7160. show_measurement, store_measurement);
  7161. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7162. static ssize_t store_retry_rate(struct device *d,
  7163. struct device_attribute *attr,
  7164. const char *buf, size_t count)
  7165. {
  7166. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7167. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7168. if (priv->retry_rate <= 0)
  7169. priv->retry_rate = 1;
  7170. return count;
  7171. }
  7172. static ssize_t show_retry_rate(struct device *d,
  7173. struct device_attribute *attr, char *buf)
  7174. {
  7175. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7176. return sprintf(buf, "%d", priv->retry_rate);
  7177. }
  7178. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7179. store_retry_rate);
  7180. static ssize_t store_power_level(struct device *d,
  7181. struct device_attribute *attr,
  7182. const char *buf, size_t count)
  7183. {
  7184. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7185. int rc;
  7186. int mode;
  7187. mode = simple_strtoul(buf, NULL, 0);
  7188. mutex_lock(&priv->mutex);
  7189. if (!iwl4965_is_ready(priv)) {
  7190. rc = -EAGAIN;
  7191. goto out;
  7192. }
  7193. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7194. mode = IWL_POWER_AC;
  7195. else
  7196. mode |= IWL_POWER_ENABLED;
  7197. if (mode != priv->power_mode) {
  7198. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7199. if (rc) {
  7200. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7201. goto out;
  7202. }
  7203. priv->power_mode = mode;
  7204. }
  7205. rc = count;
  7206. out:
  7207. mutex_unlock(&priv->mutex);
  7208. return rc;
  7209. }
  7210. #define MAX_WX_STRING 80
  7211. /* Values are in microsecond */
  7212. static const s32 timeout_duration[] = {
  7213. 350000,
  7214. 250000,
  7215. 75000,
  7216. 37000,
  7217. 25000,
  7218. };
  7219. static const s32 period_duration[] = {
  7220. 400000,
  7221. 700000,
  7222. 1000000,
  7223. 1000000,
  7224. 1000000
  7225. };
  7226. static ssize_t show_power_level(struct device *d,
  7227. struct device_attribute *attr, char *buf)
  7228. {
  7229. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7230. int level = IWL_POWER_LEVEL(priv->power_mode);
  7231. char *p = buf;
  7232. p += sprintf(p, "%d ", level);
  7233. switch (level) {
  7234. case IWL_POWER_MODE_CAM:
  7235. case IWL_POWER_AC:
  7236. p += sprintf(p, "(AC)");
  7237. break;
  7238. case IWL_POWER_BATTERY:
  7239. p += sprintf(p, "(BATTERY)");
  7240. break;
  7241. default:
  7242. p += sprintf(p,
  7243. "(Timeout %dms, Period %dms)",
  7244. timeout_duration[level - 1] / 1000,
  7245. period_duration[level - 1] / 1000);
  7246. }
  7247. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7248. p += sprintf(p, " OFF\n");
  7249. else
  7250. p += sprintf(p, " \n");
  7251. return (p - buf + 1);
  7252. }
  7253. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7254. store_power_level);
  7255. static ssize_t show_channels(struct device *d,
  7256. struct device_attribute *attr, char *buf)
  7257. {
  7258. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7259. int len = 0, i;
  7260. struct ieee80211_channel *channels = NULL;
  7261. const struct ieee80211_hw_mode *hw_mode = NULL;
  7262. int count = 0;
  7263. if (!iwl4965_is_ready(priv))
  7264. return -EAGAIN;
  7265. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7266. if (!hw_mode)
  7267. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7268. if (hw_mode) {
  7269. channels = hw_mode->channels;
  7270. count = hw_mode->num_channels;
  7271. }
  7272. len +=
  7273. sprintf(&buf[len],
  7274. "Displaying %d channels in 2.4GHz band "
  7275. "(802.11bg):\n", count);
  7276. for (i = 0; i < count; i++)
  7277. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7278. channels[i].chan,
  7279. channels[i].power_level,
  7280. channels[i].
  7281. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7282. " (IEEE 802.11h required)" : "",
  7283. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7284. || (channels[i].
  7285. flag &
  7286. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7287. ", IBSS",
  7288. channels[i].
  7289. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7290. "active/passive" : "passive only");
  7291. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7292. if (hw_mode) {
  7293. channels = hw_mode->channels;
  7294. count = hw_mode->num_channels;
  7295. } else {
  7296. channels = NULL;
  7297. count = 0;
  7298. }
  7299. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7300. "(802.11a):\n", count);
  7301. for (i = 0; i < count; i++)
  7302. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7303. channels[i].chan,
  7304. channels[i].power_level,
  7305. channels[i].
  7306. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7307. " (IEEE 802.11h required)" : "",
  7308. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7309. || (channels[i].
  7310. flag &
  7311. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7312. ", IBSS",
  7313. channels[i].
  7314. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7315. "active/passive" : "passive only");
  7316. return len;
  7317. }
  7318. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7319. static ssize_t show_statistics(struct device *d,
  7320. struct device_attribute *attr, char *buf)
  7321. {
  7322. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7323. u32 size = sizeof(struct iwl4965_notif_statistics);
  7324. u32 len = 0, ofs = 0;
  7325. u8 *data = (u8 *) & priv->statistics;
  7326. int rc = 0;
  7327. if (!iwl4965_is_alive(priv))
  7328. return -EAGAIN;
  7329. mutex_lock(&priv->mutex);
  7330. rc = iwl4965_send_statistics_request(priv);
  7331. mutex_unlock(&priv->mutex);
  7332. if (rc) {
  7333. len = sprintf(buf,
  7334. "Error sending statistics request: 0x%08X\n", rc);
  7335. return len;
  7336. }
  7337. while (size && (PAGE_SIZE - len)) {
  7338. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7339. PAGE_SIZE - len, 1);
  7340. len = strlen(buf);
  7341. if (PAGE_SIZE - len)
  7342. buf[len++] = '\n';
  7343. ofs += 16;
  7344. size -= min(size, 16U);
  7345. }
  7346. return len;
  7347. }
  7348. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7349. static ssize_t show_antenna(struct device *d,
  7350. struct device_attribute *attr, char *buf)
  7351. {
  7352. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7353. if (!iwl4965_is_alive(priv))
  7354. return -EAGAIN;
  7355. return sprintf(buf, "%d\n", priv->antenna);
  7356. }
  7357. static ssize_t store_antenna(struct device *d,
  7358. struct device_attribute *attr,
  7359. const char *buf, size_t count)
  7360. {
  7361. int ant;
  7362. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7363. if (count == 0)
  7364. return 0;
  7365. if (sscanf(buf, "%1i", &ant) != 1) {
  7366. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7367. return count;
  7368. }
  7369. if ((ant >= 0) && (ant <= 2)) {
  7370. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7371. priv->antenna = (enum iwl4965_antenna)ant;
  7372. } else
  7373. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7374. return count;
  7375. }
  7376. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7377. static ssize_t show_status(struct device *d,
  7378. struct device_attribute *attr, char *buf)
  7379. {
  7380. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7381. if (!iwl4965_is_alive(priv))
  7382. return -EAGAIN;
  7383. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7384. }
  7385. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7386. static ssize_t dump_error_log(struct device *d,
  7387. struct device_attribute *attr,
  7388. const char *buf, size_t count)
  7389. {
  7390. char *p = (char *)buf;
  7391. if (p[0] == '1')
  7392. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7393. return strnlen(buf, count);
  7394. }
  7395. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7396. static ssize_t dump_event_log(struct device *d,
  7397. struct device_attribute *attr,
  7398. const char *buf, size_t count)
  7399. {
  7400. char *p = (char *)buf;
  7401. if (p[0] == '1')
  7402. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7403. return strnlen(buf, count);
  7404. }
  7405. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7406. /*****************************************************************************
  7407. *
  7408. * driver setup and teardown
  7409. *
  7410. *****************************************************************************/
  7411. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7412. {
  7413. priv->workqueue = create_workqueue(DRV_NAME);
  7414. init_waitqueue_head(&priv->wait_command_queue);
  7415. INIT_WORK(&priv->up, iwl4965_bg_up);
  7416. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7417. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7418. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7419. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7420. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7421. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7422. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7423. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7424. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7425. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7426. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7427. iwl4965_hw_setup_deferred_work(priv);
  7428. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7429. iwl4965_irq_tasklet, (unsigned long)priv);
  7430. }
  7431. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7432. {
  7433. iwl4965_hw_cancel_deferred_work(priv);
  7434. cancel_delayed_work_sync(&priv->init_alive_start);
  7435. cancel_delayed_work(&priv->scan_check);
  7436. cancel_delayed_work(&priv->alive_start);
  7437. cancel_delayed_work(&priv->post_associate);
  7438. cancel_work_sync(&priv->beacon_update);
  7439. }
  7440. static struct attribute *iwl4965_sysfs_entries[] = {
  7441. &dev_attr_antenna.attr,
  7442. &dev_attr_channels.attr,
  7443. &dev_attr_dump_errors.attr,
  7444. &dev_attr_dump_events.attr,
  7445. &dev_attr_flags.attr,
  7446. &dev_attr_filter_flags.attr,
  7447. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7448. &dev_attr_measurement.attr,
  7449. #endif
  7450. &dev_attr_power_level.attr,
  7451. &dev_attr_retry_rate.attr,
  7452. &dev_attr_rf_kill.attr,
  7453. &dev_attr_rs_window.attr,
  7454. &dev_attr_statistics.attr,
  7455. &dev_attr_status.attr,
  7456. &dev_attr_temperature.attr,
  7457. &dev_attr_tune.attr,
  7458. &dev_attr_tx_power.attr,
  7459. NULL
  7460. };
  7461. static struct attribute_group iwl4965_attribute_group = {
  7462. .name = NULL, /* put in device directory */
  7463. .attrs = iwl4965_sysfs_entries,
  7464. };
  7465. static struct ieee80211_ops iwl4965_hw_ops = {
  7466. .tx = iwl4965_mac_tx,
  7467. .start = iwl4965_mac_start,
  7468. .stop = iwl4965_mac_stop,
  7469. .add_interface = iwl4965_mac_add_interface,
  7470. .remove_interface = iwl4965_mac_remove_interface,
  7471. .config = iwl4965_mac_config,
  7472. .config_interface = iwl4965_mac_config_interface,
  7473. .configure_filter = iwl4965_configure_filter,
  7474. .set_key = iwl4965_mac_set_key,
  7475. .get_stats = iwl4965_mac_get_stats,
  7476. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7477. .conf_tx = iwl4965_mac_conf_tx,
  7478. .get_tsf = iwl4965_mac_get_tsf,
  7479. .reset_tsf = iwl4965_mac_reset_tsf,
  7480. .beacon_update = iwl4965_mac_beacon_update,
  7481. .bss_info_changed = iwl4965_bss_info_changed,
  7482. #ifdef CONFIG_IWL4965_HT
  7483. .conf_ht = iwl4965_mac_conf_ht,
  7484. .ampdu_action = iwl4965_mac_ampdu_action,
  7485. #endif /* CONFIG_IWL4965_HT */
  7486. .hw_scan = iwl4965_mac_hw_scan
  7487. };
  7488. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7489. {
  7490. int err = 0;
  7491. struct iwl4965_priv *priv;
  7492. struct ieee80211_hw *hw;
  7493. int i;
  7494. DECLARE_MAC_BUF(mac);
  7495. /* Disabling hardware scan means that mac80211 will perform scans
  7496. * "the hard way", rather than using device's scan. */
  7497. if (iwl4965_param_disable_hw_scan) {
  7498. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7499. iwl4965_hw_ops.hw_scan = NULL;
  7500. }
  7501. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7502. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7503. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7504. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7505. err = -EINVAL;
  7506. goto out;
  7507. }
  7508. /* mac80211 allocates memory for this device instance, including
  7509. * space for this driver's private structure */
  7510. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7511. if (hw == NULL) {
  7512. IWL_ERROR("Can not allocate network device\n");
  7513. err = -ENOMEM;
  7514. goto out;
  7515. }
  7516. SET_IEEE80211_DEV(hw, &pdev->dev);
  7517. hw->rate_control_algorithm = "iwl-4965-rs";
  7518. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7519. priv = hw->priv;
  7520. priv->hw = hw;
  7521. priv->pci_dev = pdev;
  7522. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7523. #ifdef CONFIG_IWL4965_DEBUG
  7524. iwl4965_debug_level = iwl4965_param_debug;
  7525. atomic_set(&priv->restrict_refcnt, 0);
  7526. #endif
  7527. priv->retry_rate = 1;
  7528. priv->ibss_beacon = NULL;
  7529. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7530. * the range of signal quality values that we'll provide.
  7531. * Negative values for level/noise indicate that we'll provide dBm.
  7532. * For WE, at least, non-0 values here *enable* display of values
  7533. * in app (iwconfig). */
  7534. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7535. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7536. hw->max_signal = 100; /* link quality indication (%) */
  7537. /* Tell mac80211 our Tx characteristics */
  7538. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7539. /* Default value; 4 EDCA QOS priorities */
  7540. hw->queues = 4;
  7541. #ifdef CONFIG_IWL4965_HT
  7542. /* Enhanced value; more queues, to support 11n aggregation */
  7543. hw->queues = 16;
  7544. #endif /* CONFIG_IWL4965_HT */
  7545. spin_lock_init(&priv->lock);
  7546. spin_lock_init(&priv->power_data.lock);
  7547. spin_lock_init(&priv->sta_lock);
  7548. spin_lock_init(&priv->hcmd_lock);
  7549. spin_lock_init(&priv->lq_mngr.lock);
  7550. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7551. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7552. INIT_LIST_HEAD(&priv->free_frames);
  7553. mutex_init(&priv->mutex);
  7554. if (pci_enable_device(pdev)) {
  7555. err = -ENODEV;
  7556. goto out_ieee80211_free_hw;
  7557. }
  7558. pci_set_master(pdev);
  7559. /* Clear the driver's (not device's) station table */
  7560. iwl4965_clear_stations_table(priv);
  7561. priv->data_retry_limit = -1;
  7562. priv->ieee_channels = NULL;
  7563. priv->ieee_rates = NULL;
  7564. priv->phymode = -1;
  7565. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7566. if (!err)
  7567. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7568. if (err) {
  7569. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7570. goto out_pci_disable_device;
  7571. }
  7572. pci_set_drvdata(pdev, priv);
  7573. err = pci_request_regions(pdev, DRV_NAME);
  7574. if (err)
  7575. goto out_pci_disable_device;
  7576. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7577. * PCI Tx retries from interfering with C3 CPU state */
  7578. pci_write_config_byte(pdev, 0x41, 0x00);
  7579. priv->hw_base = pci_iomap(pdev, 0, 0);
  7580. if (!priv->hw_base) {
  7581. err = -ENODEV;
  7582. goto out_pci_release_regions;
  7583. }
  7584. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7585. (unsigned long long) pci_resource_len(pdev, 0));
  7586. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7587. /* Initialize module parameter values here */
  7588. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7589. if (iwl4965_param_disable) {
  7590. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7591. IWL_DEBUG_INFO("Radio disabled.\n");
  7592. }
  7593. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7594. priv->ps_mode = 0;
  7595. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7596. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7597. priv->ps_mode = IWL_MIMO_PS_NONE;
  7598. /* Choose which receivers/antennas to use */
  7599. iwl4965_set_rxon_chain(priv);
  7600. printk(KERN_INFO DRV_NAME
  7601. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7602. /* Device-specific setup */
  7603. if (iwl4965_hw_set_hw_setting(priv)) {
  7604. IWL_ERROR("failed to set hw settings\n");
  7605. goto out_iounmap;
  7606. }
  7607. #ifdef CONFIG_IWL4965_QOS
  7608. if (iwl4965_param_qos_enable)
  7609. priv->qos_data.qos_enable = 1;
  7610. iwl4965_reset_qos(priv);
  7611. priv->qos_data.qos_active = 0;
  7612. priv->qos_data.qos_cap.val = 0;
  7613. #endif /* CONFIG_IWL4965_QOS */
  7614. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7615. iwl4965_setup_deferred_work(priv);
  7616. iwl4965_setup_rx_handlers(priv);
  7617. priv->rates_mask = IWL_RATES_MASK;
  7618. /* If power management is turned on, default to AC mode */
  7619. priv->power_mode = IWL_POWER_AC;
  7620. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7621. iwl4965_disable_interrupts(priv);
  7622. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7623. if (err) {
  7624. IWL_ERROR("failed to create sysfs device attributes\n");
  7625. goto out_release_irq;
  7626. }
  7627. /* nic init */
  7628. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7629. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7630. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7631. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7632. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7633. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7634. if (err < 0) {
  7635. IWL_DEBUG_INFO("Failed to init the card\n");
  7636. goto out_remove_sysfs;
  7637. }
  7638. /* Read the EEPROM */
  7639. err = iwl4965_eeprom_init(priv);
  7640. if (err) {
  7641. IWL_ERROR("Unable to init EEPROM\n");
  7642. goto out_remove_sysfs;
  7643. }
  7644. /* MAC Address location in EEPROM same for 3945/4965 */
  7645. get_eeprom_mac(priv, priv->mac_addr);
  7646. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7647. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7648. err = iwl4965_init_channel_map(priv);
  7649. if (err) {
  7650. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7651. goto out_remove_sysfs;
  7652. }
  7653. err = iwl4965_init_geos(priv);
  7654. if (err) {
  7655. IWL_ERROR("initializing geos failed: %d\n", err);
  7656. goto out_free_channel_map;
  7657. }
  7658. iwl4965_reset_channel_flag(priv);
  7659. iwl4965_rate_control_register(priv->hw);
  7660. err = ieee80211_register_hw(priv->hw);
  7661. if (err) {
  7662. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7663. goto out_free_geos;
  7664. }
  7665. priv->hw->conf.beacon_int = 100;
  7666. priv->mac80211_registered = 1;
  7667. pci_save_state(pdev);
  7668. pci_disable_device(pdev);
  7669. return 0;
  7670. out_free_geos:
  7671. iwl4965_free_geos(priv);
  7672. out_free_channel_map:
  7673. iwl4965_free_channel_map(priv);
  7674. out_remove_sysfs:
  7675. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7676. out_release_irq:
  7677. destroy_workqueue(priv->workqueue);
  7678. priv->workqueue = NULL;
  7679. iwl4965_unset_hw_setting(priv);
  7680. out_iounmap:
  7681. pci_iounmap(pdev, priv->hw_base);
  7682. out_pci_release_regions:
  7683. pci_release_regions(pdev);
  7684. out_pci_disable_device:
  7685. pci_disable_device(pdev);
  7686. pci_set_drvdata(pdev, NULL);
  7687. out_ieee80211_free_hw:
  7688. ieee80211_free_hw(priv->hw);
  7689. out:
  7690. return err;
  7691. }
  7692. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7693. {
  7694. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7695. struct list_head *p, *q;
  7696. int i;
  7697. if (!priv)
  7698. return;
  7699. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7700. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7701. iwl4965_down(priv);
  7702. /* Free MAC hash list for ADHOC */
  7703. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7704. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7705. list_del(p);
  7706. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7707. }
  7708. }
  7709. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7710. iwl4965_dealloc_ucode_pci(priv);
  7711. if (priv->rxq.bd)
  7712. iwl4965_rx_queue_free(priv, &priv->rxq);
  7713. iwl4965_hw_txq_ctx_free(priv);
  7714. iwl4965_unset_hw_setting(priv);
  7715. iwl4965_clear_stations_table(priv);
  7716. if (priv->mac80211_registered) {
  7717. ieee80211_unregister_hw(priv->hw);
  7718. iwl4965_rate_control_unregister(priv->hw);
  7719. }
  7720. /*netif_stop_queue(dev); */
  7721. flush_workqueue(priv->workqueue);
  7722. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7723. * priv->workqueue... so we can't take down the workqueue
  7724. * until now... */
  7725. destroy_workqueue(priv->workqueue);
  7726. priv->workqueue = NULL;
  7727. pci_iounmap(pdev, priv->hw_base);
  7728. pci_release_regions(pdev);
  7729. pci_disable_device(pdev);
  7730. pci_set_drvdata(pdev, NULL);
  7731. iwl4965_free_channel_map(priv);
  7732. iwl4965_free_geos(priv);
  7733. if (priv->ibss_beacon)
  7734. dev_kfree_skb(priv->ibss_beacon);
  7735. ieee80211_free_hw(priv->hw);
  7736. }
  7737. #ifdef CONFIG_PM
  7738. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7739. {
  7740. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7741. if (priv->is_open) {
  7742. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7743. iwl4965_mac_stop(priv->hw);
  7744. priv->is_open = 1;
  7745. }
  7746. pci_set_power_state(pdev, PCI_D3hot);
  7747. return 0;
  7748. }
  7749. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7750. {
  7751. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7752. pci_set_power_state(pdev, PCI_D0);
  7753. if (priv->is_open)
  7754. iwl4965_mac_start(priv->hw);
  7755. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7756. return 0;
  7757. }
  7758. #endif /* CONFIG_PM */
  7759. /*****************************************************************************
  7760. *
  7761. * driver and module entry point
  7762. *
  7763. *****************************************************************************/
  7764. static struct pci_driver iwl4965_driver = {
  7765. .name = DRV_NAME,
  7766. .id_table = iwl4965_hw_card_ids,
  7767. .probe = iwl4965_pci_probe,
  7768. .remove = __devexit_p(iwl4965_pci_remove),
  7769. #ifdef CONFIG_PM
  7770. .suspend = iwl4965_pci_suspend,
  7771. .resume = iwl4965_pci_resume,
  7772. #endif
  7773. };
  7774. static int __init iwl4965_init(void)
  7775. {
  7776. int ret;
  7777. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7778. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7779. ret = pci_register_driver(&iwl4965_driver);
  7780. if (ret) {
  7781. IWL_ERROR("Unable to initialize PCI module\n");
  7782. return ret;
  7783. }
  7784. #ifdef CONFIG_IWL4965_DEBUG
  7785. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7786. if (ret) {
  7787. IWL_ERROR("Unable to create driver sysfs file\n");
  7788. pci_unregister_driver(&iwl4965_driver);
  7789. return ret;
  7790. }
  7791. #endif
  7792. return ret;
  7793. }
  7794. static void __exit iwl4965_exit(void)
  7795. {
  7796. #ifdef CONFIG_IWL4965_DEBUG
  7797. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7798. #endif
  7799. pci_unregister_driver(&iwl4965_driver);
  7800. }
  7801. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7802. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7803. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7804. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7805. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7806. MODULE_PARM_DESC(hwcrypto,
  7807. "using hardware crypto engine (default 0 [software])\n");
  7808. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7809. MODULE_PARM_DESC(debug, "debug output mask");
  7810. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7811. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7812. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7813. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7814. /* QoS */
  7815. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7816. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7817. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7818. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7819. module_exit(iwl4965_exit);
  7820. module_init(iwl4965_init);