leon_kernel.c 13 KB

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  1. /*
  2. * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
  3. * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/errno.h>
  7. #include <linux/mutex.h>
  8. #include <linux/of.h>
  9. #include <linux/of_platform.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/of_device.h>
  12. #include <linux/clocksource.h>
  13. #include <linux/clockchips.h>
  14. #include <asm/oplib.h>
  15. #include <asm/timer.h>
  16. #include <asm/prom.h>
  17. #include <asm/leon.h>
  18. #include <asm/leon_amba.h>
  19. #include <asm/traps.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/smp.h>
  22. #include <asm/setup.h>
  23. #include "kernel.h"
  24. #include "prom.h"
  25. #include "irq.h"
  26. struct leon3_irqctrl_regs_map *leon3_irqctrl_regs; /* interrupt controller base address */
  27. struct leon3_gptimer_regs_map *leon3_gptimer_regs; /* timer controller base address */
  28. int leondebug_irq_disable;
  29. int leon_debug_irqout;
  30. static int dummy_master_l10_counter;
  31. unsigned long amba_system_id;
  32. static DEFINE_SPINLOCK(leon_irq_lock);
  33. unsigned long leon3_gptimer_irq; /* interrupt controller irq number */
  34. unsigned long leon3_gptimer_idx; /* Timer Index (0..6) within Timer Core */
  35. unsigned int sparc_leon_eirq;
  36. #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
  37. #define LEON_IACK (&leon3_irqctrl_regs->iclear)
  38. #define LEON_DO_ACK_HW 1
  39. /* Return the last ACKed IRQ by the Extended IRQ controller. It has already
  40. * been (automatically) ACKed when the CPU takes the trap.
  41. */
  42. static inline unsigned int leon_eirq_get(int cpu)
  43. {
  44. return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->intid[cpu]) & 0x1f;
  45. }
  46. /* Handle one or multiple IRQs from the extended interrupt controller */
  47. static void leon_handle_ext_irq(unsigned int irq, struct irq_desc *desc)
  48. {
  49. unsigned int eirq;
  50. struct irq_bucket *p;
  51. int cpu = sparc_leon3_cpuid();
  52. eirq = leon_eirq_get(cpu);
  53. p = irq_map[eirq];
  54. if ((eirq & 0x10) && p && p->irq) /* bit4 tells if IRQ happened */
  55. generic_handle_irq(p->irq);
  56. }
  57. /* The extended IRQ controller has been found, this function registers it */
  58. void leon_eirq_setup(unsigned int eirq)
  59. {
  60. unsigned long mask, oldmask;
  61. unsigned int veirq;
  62. if (eirq < 1 || eirq > 0xf) {
  63. printk(KERN_ERR "LEON EXT IRQ NUMBER BAD: %d\n", eirq);
  64. return;
  65. }
  66. veirq = leon_build_device_irq(eirq, leon_handle_ext_irq, "extirq", 0);
  67. /*
  68. * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
  69. * controller have a mask-bit of their own, so this is safe.
  70. */
  71. irq_link(veirq);
  72. mask = 1 << eirq;
  73. oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id));
  74. LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask));
  75. sparc_leon_eirq = eirq;
  76. }
  77. unsigned long leon_get_irqmask(unsigned int irq)
  78. {
  79. unsigned long mask;
  80. if (!irq || ((irq > 0xf) && !sparc_leon_eirq)
  81. || ((irq > 0x1f) && sparc_leon_eirq)) {
  82. printk(KERN_ERR
  83. "leon_get_irqmask: false irq number: %d\n", irq);
  84. mask = 0;
  85. } else {
  86. mask = LEON_HARD_INT(irq);
  87. }
  88. return mask;
  89. }
  90. #ifdef CONFIG_SMP
  91. static int irq_choose_cpu(const struct cpumask *affinity)
  92. {
  93. cpumask_t mask;
  94. cpumask_and(&mask, cpu_online_mask, affinity);
  95. if (cpumask_equal(&mask, cpu_online_mask) || cpumask_empty(&mask))
  96. return boot_cpu_id;
  97. else
  98. return cpumask_first(&mask);
  99. }
  100. #else
  101. #define irq_choose_cpu(affinity) boot_cpu_id
  102. #endif
  103. static int leon_set_affinity(struct irq_data *data, const struct cpumask *dest,
  104. bool force)
  105. {
  106. unsigned long mask, oldmask, flags;
  107. int oldcpu, newcpu;
  108. mask = (unsigned long)data->chip_data;
  109. oldcpu = irq_choose_cpu(data->affinity);
  110. newcpu = irq_choose_cpu(dest);
  111. if (oldcpu == newcpu)
  112. goto out;
  113. /* unmask on old CPU first before enabling on the selected CPU */
  114. spin_lock_irqsave(&leon_irq_lock, flags);
  115. oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu));
  116. LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu), (oldmask & ~mask));
  117. oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu));
  118. LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu), (oldmask | mask));
  119. spin_unlock_irqrestore(&leon_irq_lock, flags);
  120. out:
  121. return IRQ_SET_MASK_OK;
  122. }
  123. static void leon_unmask_irq(struct irq_data *data)
  124. {
  125. unsigned long mask, oldmask, flags;
  126. int cpu;
  127. mask = (unsigned long)data->chip_data;
  128. cpu = irq_choose_cpu(data->affinity);
  129. spin_lock_irqsave(&leon_irq_lock, flags);
  130. oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
  131. LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask | mask));
  132. spin_unlock_irqrestore(&leon_irq_lock, flags);
  133. }
  134. static void leon_mask_irq(struct irq_data *data)
  135. {
  136. unsigned long mask, oldmask, flags;
  137. int cpu;
  138. mask = (unsigned long)data->chip_data;
  139. cpu = irq_choose_cpu(data->affinity);
  140. spin_lock_irqsave(&leon_irq_lock, flags);
  141. oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu));
  142. LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu), (oldmask & ~mask));
  143. spin_unlock_irqrestore(&leon_irq_lock, flags);
  144. }
  145. static unsigned int leon_startup_irq(struct irq_data *data)
  146. {
  147. irq_link(data->irq);
  148. leon_unmask_irq(data);
  149. return 0;
  150. }
  151. static void leon_shutdown_irq(struct irq_data *data)
  152. {
  153. leon_mask_irq(data);
  154. irq_unlink(data->irq);
  155. }
  156. /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
  157. static void leon_eoi_irq(struct irq_data *data)
  158. {
  159. unsigned long mask = (unsigned long)data->chip_data;
  160. if (mask & LEON_DO_ACK_HW)
  161. LEON3_BYPASS_STORE_PA(LEON_IACK, mask & ~LEON_DO_ACK_HW);
  162. }
  163. static struct irq_chip leon_irq = {
  164. .name = "leon",
  165. .irq_startup = leon_startup_irq,
  166. .irq_shutdown = leon_shutdown_irq,
  167. .irq_mask = leon_mask_irq,
  168. .irq_unmask = leon_unmask_irq,
  169. .irq_eoi = leon_eoi_irq,
  170. .irq_set_affinity = leon_set_affinity,
  171. };
  172. /*
  173. * Build a LEON IRQ for the edge triggered LEON IRQ controller:
  174. * Edge (normal) IRQ - handle_simple_irq, ack=DONT-CARE, never ack
  175. * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
  176. * Per-CPU Edge - handle_percpu_irq, ack=0
  177. */
  178. unsigned int leon_build_device_irq(unsigned int real_irq,
  179. irq_flow_handler_t flow_handler,
  180. const char *name, int do_ack)
  181. {
  182. unsigned int irq;
  183. unsigned long mask;
  184. struct irq_desc *desc;
  185. irq = 0;
  186. mask = leon_get_irqmask(real_irq);
  187. if (mask == 0)
  188. goto out;
  189. irq = irq_alloc(real_irq, real_irq);
  190. if (irq == 0)
  191. goto out;
  192. if (do_ack)
  193. mask |= LEON_DO_ACK_HW;
  194. desc = irq_to_desc(irq);
  195. if (!desc || !desc->handle_irq || desc->handle_irq == handle_bad_irq) {
  196. irq_set_chip_and_handler_name(irq, &leon_irq,
  197. flow_handler, name);
  198. irq_set_chip_data(irq, (void *)mask);
  199. }
  200. out:
  201. return irq;
  202. }
  203. static unsigned int _leon_build_device_irq(struct platform_device *op,
  204. unsigned int real_irq)
  205. {
  206. return leon_build_device_irq(real_irq, handle_simple_irq, "edge", 0);
  207. }
  208. void leon_update_virq_handling(unsigned int virq,
  209. irq_flow_handler_t flow_handler,
  210. const char *name, int do_ack)
  211. {
  212. unsigned long mask = (unsigned long)irq_get_chip_data(virq);
  213. mask &= ~LEON_DO_ACK_HW;
  214. if (do_ack)
  215. mask |= LEON_DO_ACK_HW;
  216. irq_set_chip_and_handler_name(virq, &leon_irq,
  217. flow_handler, name);
  218. irq_set_chip_data(virq, (void *)mask);
  219. }
  220. static u32 leon_cycles_offset(void)
  221. {
  222. u32 rld, val, off;
  223. rld = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld);
  224. val = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val);
  225. off = rld - val;
  226. return rld - val;
  227. }
  228. #ifdef CONFIG_SMP
  229. /* smp clockevent irq */
  230. irqreturn_t leon_percpu_timer_ce_interrupt(int irq, void *unused)
  231. {
  232. struct clock_event_device *ce;
  233. int cpu = smp_processor_id();
  234. leon_clear_profile_irq(cpu);
  235. if (cpu == boot_cpu_id)
  236. timer_interrupt(irq, NULL);
  237. ce = &per_cpu(sparc32_clockevent, cpu);
  238. irq_enter();
  239. if (ce->event_handler)
  240. ce->event_handler(ce);
  241. irq_exit();
  242. return IRQ_HANDLED;
  243. }
  244. #endif /* CONFIG_SMP */
  245. void __init leon_init_timers(void)
  246. {
  247. int irq, eirq;
  248. struct device_node *rootnp, *np, *nnp;
  249. struct property *pp;
  250. int len;
  251. int icsel;
  252. int ampopts;
  253. int err;
  254. u32 config;
  255. sparc_config.get_cycles_offset = leon_cycles_offset;
  256. sparc_config.cs_period = 1000000 / HZ;
  257. sparc_config.features |= FEAT_L10_CLOCKSOURCE;
  258. #ifndef CONFIG_SMP
  259. sparc_config.features |= FEAT_L10_CLOCKEVENT;
  260. #endif
  261. leondebug_irq_disable = 0;
  262. leon_debug_irqout = 0;
  263. master_l10_counter = (unsigned int *)&dummy_master_l10_counter;
  264. dummy_master_l10_counter = 0;
  265. rootnp = of_find_node_by_path("/ambapp0");
  266. if (!rootnp)
  267. goto bad;
  268. /* Find System ID: GRLIB build ID and optional CHIP ID */
  269. pp = of_find_property(rootnp, "systemid", &len);
  270. if (pp)
  271. amba_system_id = *(unsigned long *)pp->value;
  272. /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
  273. np = of_find_node_by_name(rootnp, "GAISLER_IRQMP");
  274. if (!np) {
  275. np = of_find_node_by_name(rootnp, "01_00d");
  276. if (!np)
  277. goto bad;
  278. }
  279. pp = of_find_property(np, "reg", &len);
  280. if (!pp)
  281. goto bad;
  282. leon3_irqctrl_regs = *(struct leon3_irqctrl_regs_map **)pp->value;
  283. /* Find GPTIMER Timer Registers base address otherwise bail out. */
  284. nnp = rootnp;
  285. do {
  286. np = of_find_node_by_name(nnp, "GAISLER_GPTIMER");
  287. if (!np) {
  288. np = of_find_node_by_name(nnp, "01_011");
  289. if (!np)
  290. goto bad;
  291. }
  292. ampopts = 0;
  293. pp = of_find_property(np, "ampopts", &len);
  294. if (pp) {
  295. ampopts = *(int *)pp->value;
  296. if (ampopts == 0) {
  297. /* Skip this instance, resource already
  298. * allocated by other OS */
  299. nnp = np;
  300. continue;
  301. }
  302. }
  303. /* Select Timer-Instance on Timer Core. Default is zero */
  304. leon3_gptimer_idx = ampopts & 0x7;
  305. pp = of_find_property(np, "reg", &len);
  306. if (pp)
  307. leon3_gptimer_regs = *(struct leon3_gptimer_regs_map **)
  308. pp->value;
  309. pp = of_find_property(np, "interrupts", &len);
  310. if (pp)
  311. leon3_gptimer_irq = *(unsigned int *)pp->value;
  312. } while (0);
  313. if (!(leon3_gptimer_regs && leon3_irqctrl_regs && leon3_gptimer_irq))
  314. goto bad;
  315. LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].val, 0);
  316. LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].rld,
  317. (((1000000 / HZ) - 1)));
  318. LEON3_BYPASS_STORE_PA(
  319. &leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl, 0);
  320. /*
  321. * The IRQ controller may (if implemented) consist of multiple
  322. * IRQ controllers, each mapped on a 4Kb boundary.
  323. * Each CPU may be routed to different IRQCTRLs, however
  324. * we assume that all CPUs (in SMP system) is routed to the
  325. * same IRQ Controller, and for non-SMP only one IRQCTRL is
  326. * accessed anyway.
  327. * In AMP systems, Linux must run on CPU0 for the time being.
  328. */
  329. icsel = LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->icsel[boot_cpu_id/8]);
  330. icsel = (icsel >> ((7 - (boot_cpu_id&0x7)) * 4)) & 0xf;
  331. leon3_irqctrl_regs += icsel;
  332. /* Mask all IRQs on boot-cpu IRQ controller */
  333. LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs->mask[boot_cpu_id], 0);
  334. /* Probe extended IRQ controller */
  335. eirq = (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs->mpstatus)
  336. >> 16) & 0xf;
  337. if (eirq != 0)
  338. leon_eirq_setup(eirq);
  339. #ifdef CONFIG_SMP
  340. {
  341. unsigned long flags;
  342. /*
  343. * In SMP, sun4m adds a IPI handler to IRQ trap handler that
  344. * LEON never must take, sun4d and LEON overwrites the branch
  345. * with a NOP.
  346. */
  347. local_irq_save(flags);
  348. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  349. local_ops->cache_all();
  350. local_irq_restore(flags);
  351. }
  352. #endif
  353. config = LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs->config);
  354. if (config & (1 << LEON3_GPTIMER_SEPIRQ))
  355. leon3_gptimer_irq += leon3_gptimer_idx;
  356. else if ((config & LEON3_GPTIMER_TIMERS) > 1)
  357. pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n");
  358. #ifdef CONFIG_SMP
  359. /* Install per-cpu IRQ handler for broadcasted ticker */
  360. irq = leon_build_device_irq(leon3_gptimer_irq, handle_percpu_irq,
  361. "per-cpu", 0);
  362. err = request_irq(irq, leon_percpu_timer_ce_interrupt,
  363. IRQF_PERCPU | IRQF_TIMER, "timer", NULL);
  364. #else
  365. irq = _leon_build_device_irq(NULL, leon3_gptimer_irq);
  366. err = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer", NULL);
  367. #endif
  368. if (err) {
  369. pr_err("Unable to attach timer IRQ%d\n", irq);
  370. prom_halt();
  371. }
  372. LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs->e[leon3_gptimer_idx].ctrl,
  373. LEON3_GPTIMER_EN |
  374. LEON3_GPTIMER_RL |
  375. LEON3_GPTIMER_LD |
  376. LEON3_GPTIMER_IRQEN);
  377. return;
  378. bad:
  379. printk(KERN_ERR "No Timer/irqctrl found\n");
  380. BUG();
  381. return;
  382. }
  383. static void leon_clear_clock_irq(void)
  384. {
  385. }
  386. static void leon_load_profile_irq(int cpu, unsigned int limit)
  387. {
  388. }
  389. void __init leon_trans_init(struct device_node *dp)
  390. {
  391. if (strcmp(dp->type, "cpu") == 0 && strcmp(dp->name, "<NULL>") == 0) {
  392. struct property *p;
  393. p = of_find_property(dp, "mid", (void *)0);
  394. if (p) {
  395. int mid;
  396. dp->name = prom_early_alloc(5 + 1);
  397. memcpy(&mid, p->value, p->length);
  398. sprintf((char *)dp->name, "cpu%.2d", mid);
  399. }
  400. }
  401. }
  402. #ifdef CONFIG_SMP
  403. void leon_clear_profile_irq(int cpu)
  404. {
  405. }
  406. void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu)
  407. {
  408. unsigned long mask, flags, *addr;
  409. mask = leon_get_irqmask(irq_nr);
  410. spin_lock_irqsave(&leon_irq_lock, flags);
  411. addr = (unsigned long *)LEON_IMASK(cpu);
  412. LEON3_BYPASS_STORE_PA(addr, (LEON3_BYPASS_LOAD_PA(addr) | mask));
  413. spin_unlock_irqrestore(&leon_irq_lock, flags);
  414. }
  415. #endif
  416. void __init leon_init_IRQ(void)
  417. {
  418. sparc_config.init_timers = leon_init_timers;
  419. sparc_config.build_device_irq = _leon_build_device_irq;
  420. sparc_config.clock_rate = 1000000;
  421. sparc_config.clear_clock_irq = leon_clear_clock_irq;
  422. sparc_config.load_profile_irq = leon_load_profile_irq;
  423. }