mt9m111.c 30 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146
  1. /*
  2. * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
  3. *
  4. * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/videodev2.h>
  11. #include <linux/slab.h>
  12. #include <linux/i2c.h>
  13. #include <linux/log2.h>
  14. #include <linux/gpio.h>
  15. #include <linux/delay.h>
  16. #include <media/soc_camera.h>
  17. #include <media/soc_mediabus.h>
  18. #include <media/v4l2-common.h>
  19. #include <media/v4l2-chip-ident.h>
  20. /*
  21. * MT9M111, MT9M112 and MT9M131:
  22. * i2c address is 0x48 or 0x5d (depending on SADDR pin)
  23. * The platform has to define i2c_board_info and call i2c_register_board_info()
  24. */
  25. /*
  26. * Sensor core register addresses (0x000..0x0ff)
  27. */
  28. #define MT9M111_CHIP_VERSION 0x000
  29. #define MT9M111_ROW_START 0x001
  30. #define MT9M111_COLUMN_START 0x002
  31. #define MT9M111_WINDOW_HEIGHT 0x003
  32. #define MT9M111_WINDOW_WIDTH 0x004
  33. #define MT9M111_HORIZONTAL_BLANKING_B 0x005
  34. #define MT9M111_VERTICAL_BLANKING_B 0x006
  35. #define MT9M111_HORIZONTAL_BLANKING_A 0x007
  36. #define MT9M111_VERTICAL_BLANKING_A 0x008
  37. #define MT9M111_SHUTTER_WIDTH 0x009
  38. #define MT9M111_ROW_SPEED 0x00a
  39. #define MT9M111_EXTRA_DELAY 0x00b
  40. #define MT9M111_SHUTTER_DELAY 0x00c
  41. #define MT9M111_RESET 0x00d
  42. #define MT9M111_READ_MODE_B 0x020
  43. #define MT9M111_READ_MODE_A 0x021
  44. #define MT9M111_FLASH_CONTROL 0x023
  45. #define MT9M111_GREEN1_GAIN 0x02b
  46. #define MT9M111_BLUE_GAIN 0x02c
  47. #define MT9M111_RED_GAIN 0x02d
  48. #define MT9M111_GREEN2_GAIN 0x02e
  49. #define MT9M111_GLOBAL_GAIN 0x02f
  50. #define MT9M111_CONTEXT_CONTROL 0x0c8
  51. #define MT9M111_PAGE_MAP 0x0f0
  52. #define MT9M111_BYTE_WISE_ADDR 0x0f1
  53. #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
  54. #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
  55. #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
  56. #define MT9M111_RESET_RESET_SOC (1 << 5)
  57. #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
  58. #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
  59. #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
  60. #define MT9M111_RESET_RESTART_FRAME (1 << 1)
  61. #define MT9M111_RESET_RESET_MODE (1 << 0)
  62. #define MT9M111_RM_FULL_POWER_RD (0 << 10)
  63. #define MT9M111_RM_LOW_POWER_RD (1 << 10)
  64. #define MT9M111_RM_COL_SKIP_4X (1 << 5)
  65. #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
  66. #define MT9M111_RM_COL_SKIP_2X (1 << 3)
  67. #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
  68. #define MT9M111_RMB_MIRROR_COLS (1 << 1)
  69. #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
  70. #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
  71. #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
  72. #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
  73. #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
  74. #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
  75. #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
  76. #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
  77. #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
  78. #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
  79. #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
  80. /*
  81. * Colorpipe register addresses (0x100..0x1ff)
  82. */
  83. #define MT9M111_OPER_MODE_CTRL 0x106
  84. #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
  85. #define MT9M111_REDUCER_XZOOM_B 0x1a0
  86. #define MT9M111_REDUCER_XSIZE_B 0x1a1
  87. #define MT9M111_REDUCER_YZOOM_B 0x1a3
  88. #define MT9M111_REDUCER_YSIZE_B 0x1a4
  89. #define MT9M111_REDUCER_XZOOM_A 0x1a6
  90. #define MT9M111_REDUCER_XSIZE_A 0x1a7
  91. #define MT9M111_REDUCER_YZOOM_A 0x1a9
  92. #define MT9M111_REDUCER_YSIZE_A 0x1aa
  93. #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
  94. #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
  95. #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
  96. #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
  97. #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
  98. #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
  99. #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
  100. #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
  101. #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
  102. #define MT9M111_OUTFMT_RGB (1 << 8)
  103. #define MT9M111_OUTFMT_RGB565 (0 << 6)
  104. #define MT9M111_OUTFMT_RGB555 (1 << 6)
  105. #define MT9M111_OUTFMT_RGB444x (2 << 6)
  106. #define MT9M111_OUTFMT_RGBx444 (3 << 6)
  107. #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
  108. #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
  109. #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
  110. #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
  111. #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
  112. #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
  113. #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
  114. #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
  115. /*
  116. * Camera control register addresses (0x200..0x2ff not implemented)
  117. */
  118. #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
  119. #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
  120. #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
  121. #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
  122. #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
  123. (val), (mask))
  124. #define MT9M111_MIN_DARK_ROWS 8
  125. #define MT9M111_MIN_DARK_COLS 26
  126. #define MT9M111_MAX_HEIGHT 1024
  127. #define MT9M111_MAX_WIDTH 1280
  128. /* MT9M111 has only one fixed colorspace per pixelcode */
  129. struct mt9m111_datafmt {
  130. enum v4l2_mbus_pixelcode code;
  131. enum v4l2_colorspace colorspace;
  132. };
  133. /* Find a data format by a pixel code in an array */
  134. static const struct mt9m111_datafmt *mt9m111_find_datafmt(
  135. enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
  136. int n)
  137. {
  138. int i;
  139. for (i = 0; i < n; i++)
  140. if (fmt[i].code == code)
  141. return fmt + i;
  142. return NULL;
  143. }
  144. static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
  145. {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
  146. {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
  147. {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
  148. {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
  149. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  150. {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
  151. {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
  152. {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
  153. {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
  154. {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
  155. {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
  156. {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
  157. };
  158. enum mt9m111_context {
  159. HIGHPOWER = 0,
  160. LOWPOWER,
  161. };
  162. struct mt9m111 {
  163. struct v4l2_subdev subdev;
  164. int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
  165. * from v4l2-chip-ident.h */
  166. enum mt9m111_context context;
  167. struct v4l2_rect rect;
  168. struct mutex power_lock; /* lock to protect power_count */
  169. int power_count;
  170. const struct mt9m111_datafmt *fmt;
  171. int lastpage; /* PageMap cache value */
  172. unsigned int gain;
  173. unsigned char autoexposure;
  174. unsigned char datawidth;
  175. unsigned int powered:1;
  176. unsigned int hflip:1;
  177. unsigned int vflip:1;
  178. unsigned int autowhitebalance:1;
  179. };
  180. static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
  181. {
  182. return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
  183. }
  184. static int reg_page_map_set(struct i2c_client *client, const u16 reg)
  185. {
  186. int ret;
  187. u16 page;
  188. struct mt9m111 *mt9m111 = to_mt9m111(client);
  189. page = (reg >> 8);
  190. if (page == mt9m111->lastpage)
  191. return 0;
  192. if (page > 2)
  193. return -EINVAL;
  194. ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
  195. if (!ret)
  196. mt9m111->lastpage = page;
  197. return ret;
  198. }
  199. static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
  200. {
  201. int ret;
  202. ret = reg_page_map_set(client, reg);
  203. if (!ret)
  204. ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
  205. dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
  206. return ret;
  207. }
  208. static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
  209. const u16 data)
  210. {
  211. int ret;
  212. ret = reg_page_map_set(client, reg);
  213. if (!ret)
  214. ret = i2c_smbus_write_word_data(client, reg & 0xff,
  215. swab16(data));
  216. dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
  217. return ret;
  218. }
  219. static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
  220. const u16 data)
  221. {
  222. int ret;
  223. ret = mt9m111_reg_read(client, reg);
  224. if (ret >= 0)
  225. ret = mt9m111_reg_write(client, reg, ret | data);
  226. return ret;
  227. }
  228. static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
  229. const u16 data)
  230. {
  231. int ret;
  232. ret = mt9m111_reg_read(client, reg);
  233. if (ret >= 0)
  234. ret = mt9m111_reg_write(client, reg, ret & ~data);
  235. return ret;
  236. }
  237. static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
  238. const u16 data, const u16 mask)
  239. {
  240. int ret;
  241. ret = mt9m111_reg_read(client, reg);
  242. if (ret >= 0)
  243. ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
  244. return ret;
  245. }
  246. static int mt9m111_set_context(struct mt9m111 *mt9m111,
  247. enum mt9m111_context ctxt)
  248. {
  249. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  250. int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
  251. | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
  252. | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
  253. | MT9M111_CTXT_CTRL_VBLANK_SEL_B
  254. | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
  255. int valA = MT9M111_CTXT_CTRL_RESTART;
  256. if (ctxt == HIGHPOWER)
  257. return reg_write(CONTEXT_CONTROL, valB);
  258. else
  259. return reg_write(CONTEXT_CONTROL, valA);
  260. }
  261. static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
  262. struct v4l2_rect *rect)
  263. {
  264. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  265. int ret, is_raw_format;
  266. int width = rect->width;
  267. int height = rect->height;
  268. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  269. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
  270. is_raw_format = 1;
  271. else
  272. is_raw_format = 0;
  273. ret = reg_write(COLUMN_START, rect->left);
  274. if (!ret)
  275. ret = reg_write(ROW_START, rect->top);
  276. if (is_raw_format) {
  277. if (!ret)
  278. ret = reg_write(WINDOW_WIDTH, width);
  279. if (!ret)
  280. ret = reg_write(WINDOW_HEIGHT, height);
  281. } else {
  282. if (!ret)
  283. ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
  284. if (!ret)
  285. ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
  286. if (!ret)
  287. ret = reg_write(REDUCER_XSIZE_B, width);
  288. if (!ret)
  289. ret = reg_write(REDUCER_YSIZE_B, height);
  290. if (!ret)
  291. ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
  292. if (!ret)
  293. ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
  294. if (!ret)
  295. ret = reg_write(REDUCER_XSIZE_A, width);
  296. if (!ret)
  297. ret = reg_write(REDUCER_YSIZE_A, height);
  298. }
  299. return ret;
  300. }
  301. static int mt9m111_enable(struct mt9m111 *mt9m111)
  302. {
  303. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  304. int ret;
  305. ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
  306. if (!ret)
  307. mt9m111->powered = 1;
  308. return ret;
  309. }
  310. static int mt9m111_reset(struct mt9m111 *mt9m111)
  311. {
  312. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  313. int ret;
  314. ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
  315. if (!ret)
  316. ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
  317. if (!ret)
  318. ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
  319. | MT9M111_RESET_RESET_SOC);
  320. return ret;
  321. }
  322. static unsigned long mt9m111_query_bus_param(struct soc_camera_device *icd)
  323. {
  324. struct soc_camera_link *icl = to_soc_camera_link(icd);
  325. unsigned long flags = SOCAM_MASTER | SOCAM_PCLK_SAMPLE_RISING |
  326. SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
  327. SOCAM_DATA_ACTIVE_HIGH | SOCAM_DATAWIDTH_8;
  328. return soc_camera_apply_sensor_flags(icl, flags);
  329. }
  330. static int mt9m111_set_bus_param(struct soc_camera_device *icd, unsigned long f)
  331. {
  332. return 0;
  333. }
  334. static int mt9m111_make_rect(struct mt9m111 *mt9m111,
  335. struct v4l2_rect *rect)
  336. {
  337. if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  338. mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
  339. /* Bayer format - even size lengths */
  340. rect->width = ALIGN(rect->width, 2);
  341. rect->height = ALIGN(rect->height, 2);
  342. /* Let the user play with the starting pixel */
  343. }
  344. /* FIXME: the datasheet doesn't specify minimum sizes */
  345. soc_camera_limit_side(&rect->left, &rect->width,
  346. MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
  347. soc_camera_limit_side(&rect->top, &rect->height,
  348. MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
  349. return mt9m111_setup_rect(mt9m111, rect);
  350. }
  351. static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  352. {
  353. struct v4l2_rect rect = a->c;
  354. struct i2c_client *client = v4l2_get_subdevdata(sd);
  355. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  356. int ret;
  357. dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
  358. __func__, rect.left, rect.top, rect.width, rect.height);
  359. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  360. return -EINVAL;
  361. ret = mt9m111_make_rect(mt9m111, &rect);
  362. if (!ret)
  363. mt9m111->rect = rect;
  364. return ret;
  365. }
  366. static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
  367. {
  368. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  369. a->c = mt9m111->rect;
  370. a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  371. return 0;
  372. }
  373. static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
  374. {
  375. if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  376. return -EINVAL;
  377. a->bounds.left = MT9M111_MIN_DARK_COLS;
  378. a->bounds.top = MT9M111_MIN_DARK_ROWS;
  379. a->bounds.width = MT9M111_MAX_WIDTH;
  380. a->bounds.height = MT9M111_MAX_HEIGHT;
  381. a->defrect = a->bounds;
  382. a->pixelaspect.numerator = 1;
  383. a->pixelaspect.denominator = 1;
  384. return 0;
  385. }
  386. static int mt9m111_g_fmt(struct v4l2_subdev *sd,
  387. struct v4l2_mbus_framefmt *mf)
  388. {
  389. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  390. mf->width = mt9m111->rect.width;
  391. mf->height = mt9m111->rect.height;
  392. mf->code = mt9m111->fmt->code;
  393. mf->colorspace = mt9m111->fmt->colorspace;
  394. mf->field = V4L2_FIELD_NONE;
  395. return 0;
  396. }
  397. static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
  398. enum v4l2_mbus_pixelcode code)
  399. {
  400. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  401. u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  402. MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
  403. MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
  404. MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
  405. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  406. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  407. int ret;
  408. switch (code) {
  409. case V4L2_MBUS_FMT_SBGGR8_1X8:
  410. data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
  411. MT9M111_OUTFMT_RGB;
  412. break;
  413. case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
  414. data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
  415. break;
  416. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
  417. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
  418. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  419. break;
  420. case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
  421. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
  422. break;
  423. case V4L2_MBUS_FMT_RGB565_2X8_LE:
  424. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  425. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  426. break;
  427. case V4L2_MBUS_FMT_RGB565_2X8_BE:
  428. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
  429. break;
  430. case V4L2_MBUS_FMT_BGR565_2X8_BE:
  431. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  432. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  433. break;
  434. case V4L2_MBUS_FMT_BGR565_2X8_LE:
  435. data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
  436. MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  437. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  438. break;
  439. case V4L2_MBUS_FMT_UYVY8_2X8:
  440. data_outfmt2 = 0;
  441. break;
  442. case V4L2_MBUS_FMT_VYUY8_2X8:
  443. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  444. break;
  445. case V4L2_MBUS_FMT_YUYV8_2X8:
  446. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
  447. break;
  448. case V4L2_MBUS_FMT_YVYU8_2X8:
  449. data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
  450. MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
  451. break;
  452. default:
  453. dev_err(&client->dev, "Pixel format not handled: %x\n", code);
  454. return -EINVAL;
  455. }
  456. ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2,
  457. mask_outfmt2);
  458. if (!ret)
  459. ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2,
  460. mask_outfmt2);
  461. return ret;
  462. }
  463. static int mt9m111_s_fmt(struct v4l2_subdev *sd,
  464. struct v4l2_mbus_framefmt *mf)
  465. {
  466. struct i2c_client *client = v4l2_get_subdevdata(sd);
  467. const struct mt9m111_datafmt *fmt;
  468. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  469. struct v4l2_rect rect = {
  470. .left = mt9m111->rect.left,
  471. .top = mt9m111->rect.top,
  472. .width = mf->width,
  473. .height = mf->height,
  474. };
  475. int ret;
  476. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  477. ARRAY_SIZE(mt9m111_colour_fmts));
  478. if (!fmt)
  479. return -EINVAL;
  480. dev_dbg(&client->dev,
  481. "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
  482. mf->code, rect.left, rect.top, rect.width, rect.height);
  483. ret = mt9m111_make_rect(mt9m111, &rect);
  484. if (!ret)
  485. ret = mt9m111_set_pixfmt(mt9m111, mf->code);
  486. if (!ret) {
  487. mt9m111->rect = rect;
  488. mt9m111->fmt = fmt;
  489. mf->colorspace = fmt->colorspace;
  490. }
  491. return ret;
  492. }
  493. static int mt9m111_try_fmt(struct v4l2_subdev *sd,
  494. struct v4l2_mbus_framefmt *mf)
  495. {
  496. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  497. const struct mt9m111_datafmt *fmt;
  498. bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
  499. mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
  500. fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
  501. ARRAY_SIZE(mt9m111_colour_fmts));
  502. if (!fmt) {
  503. fmt = mt9m111->fmt;
  504. mf->code = fmt->code;
  505. }
  506. /*
  507. * With Bayer format enforce even side lengths, but let the user play
  508. * with the starting pixel
  509. */
  510. if (mf->height > MT9M111_MAX_HEIGHT)
  511. mf->height = MT9M111_MAX_HEIGHT;
  512. else if (mf->height < 2)
  513. mf->height = 2;
  514. else if (bayer)
  515. mf->height = ALIGN(mf->height, 2);
  516. if (mf->width > MT9M111_MAX_WIDTH)
  517. mf->width = MT9M111_MAX_WIDTH;
  518. else if (mf->width < 2)
  519. mf->width = 2;
  520. else if (bayer)
  521. mf->width = ALIGN(mf->width, 2);
  522. mf->colorspace = fmt->colorspace;
  523. return 0;
  524. }
  525. static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
  526. struct v4l2_dbg_chip_ident *id)
  527. {
  528. struct i2c_client *client = v4l2_get_subdevdata(sd);
  529. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  530. if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
  531. return -EINVAL;
  532. if (id->match.addr != client->addr)
  533. return -ENODEV;
  534. id->ident = mt9m111->model;
  535. id->revision = 0;
  536. return 0;
  537. }
  538. #ifdef CONFIG_VIDEO_ADV_DEBUG
  539. static int mt9m111_g_register(struct v4l2_subdev *sd,
  540. struct v4l2_dbg_register *reg)
  541. {
  542. struct i2c_client *client = v4l2_get_subdevdata(sd);
  543. int val;
  544. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  545. return -EINVAL;
  546. if (reg->match.addr != client->addr)
  547. return -ENODEV;
  548. val = mt9m111_reg_read(client, reg->reg);
  549. reg->size = 2;
  550. reg->val = (u64)val;
  551. if (reg->val > 0xffff)
  552. return -EIO;
  553. return 0;
  554. }
  555. static int mt9m111_s_register(struct v4l2_subdev *sd,
  556. struct v4l2_dbg_register *reg)
  557. {
  558. struct i2c_client *client = v4l2_get_subdevdata(sd);
  559. if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
  560. return -EINVAL;
  561. if (reg->match.addr != client->addr)
  562. return -ENODEV;
  563. if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
  564. return -EIO;
  565. return 0;
  566. }
  567. #endif
  568. static const struct v4l2_queryctrl mt9m111_controls[] = {
  569. {
  570. .id = V4L2_CID_VFLIP,
  571. .type = V4L2_CTRL_TYPE_BOOLEAN,
  572. .name = "Flip Verticaly",
  573. .minimum = 0,
  574. .maximum = 1,
  575. .step = 1,
  576. .default_value = 0,
  577. }, {
  578. .id = V4L2_CID_HFLIP,
  579. .type = V4L2_CTRL_TYPE_BOOLEAN,
  580. .name = "Flip Horizontaly",
  581. .minimum = 0,
  582. .maximum = 1,
  583. .step = 1,
  584. .default_value = 0,
  585. }, { /* gain = 1/32*val (=>gain=1 if val==32) */
  586. .id = V4L2_CID_GAIN,
  587. .type = V4L2_CTRL_TYPE_INTEGER,
  588. .name = "Gain",
  589. .minimum = 0,
  590. .maximum = 63 * 2 * 2,
  591. .step = 1,
  592. .default_value = 32,
  593. .flags = V4L2_CTRL_FLAG_SLIDER,
  594. }, {
  595. .id = V4L2_CID_EXPOSURE_AUTO,
  596. .type = V4L2_CTRL_TYPE_BOOLEAN,
  597. .name = "Auto Exposure",
  598. .minimum = 0,
  599. .maximum = 1,
  600. .step = 1,
  601. .default_value = 1,
  602. }
  603. };
  604. static struct soc_camera_ops mt9m111_ops = {
  605. .query_bus_param = mt9m111_query_bus_param,
  606. .set_bus_param = mt9m111_set_bus_param,
  607. .controls = mt9m111_controls,
  608. .num_controls = ARRAY_SIZE(mt9m111_controls),
  609. };
  610. static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
  611. {
  612. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  613. int ret;
  614. if (mt9m111->context == HIGHPOWER) {
  615. if (flip)
  616. ret = reg_set(READ_MODE_B, mask);
  617. else
  618. ret = reg_clear(READ_MODE_B, mask);
  619. } else {
  620. if (flip)
  621. ret = reg_set(READ_MODE_A, mask);
  622. else
  623. ret = reg_clear(READ_MODE_A, mask);
  624. }
  625. return ret;
  626. }
  627. static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
  628. {
  629. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  630. int data;
  631. data = reg_read(GLOBAL_GAIN);
  632. if (data >= 0)
  633. return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
  634. (1 << ((data >> 9) & 1));
  635. return data;
  636. }
  637. static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
  638. {
  639. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  640. u16 val;
  641. if (gain > 63 * 2 * 2)
  642. return -EINVAL;
  643. mt9m111->gain = gain;
  644. if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
  645. val = (1 << 10) | (1 << 9) | (gain / 4);
  646. else if ((gain >= 64) && (gain < 64 * 2))
  647. val = (1 << 9) | (gain / 2);
  648. else
  649. val = gain;
  650. return reg_write(GLOBAL_GAIN, val);
  651. }
  652. static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
  653. {
  654. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  655. int ret;
  656. if (on)
  657. ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  658. else
  659. ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
  660. if (!ret)
  661. mt9m111->autoexposure = on;
  662. return ret;
  663. }
  664. static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
  665. {
  666. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  667. int ret;
  668. if (on)
  669. ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  670. else
  671. ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
  672. if (!ret)
  673. mt9m111->autowhitebalance = on;
  674. return ret;
  675. }
  676. static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  677. {
  678. struct i2c_client *client = v4l2_get_subdevdata(sd);
  679. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  680. int data;
  681. switch (ctrl->id) {
  682. case V4L2_CID_VFLIP:
  683. if (mt9m111->context == HIGHPOWER)
  684. data = reg_read(READ_MODE_B);
  685. else
  686. data = reg_read(READ_MODE_A);
  687. if (data < 0)
  688. return -EIO;
  689. ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
  690. break;
  691. case V4L2_CID_HFLIP:
  692. if (mt9m111->context == HIGHPOWER)
  693. data = reg_read(READ_MODE_B);
  694. else
  695. data = reg_read(READ_MODE_A);
  696. if (data < 0)
  697. return -EIO;
  698. ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
  699. break;
  700. case V4L2_CID_GAIN:
  701. data = mt9m111_get_global_gain(mt9m111);
  702. if (data < 0)
  703. return data;
  704. ctrl->value = data;
  705. break;
  706. case V4L2_CID_EXPOSURE_AUTO:
  707. ctrl->value = mt9m111->autoexposure;
  708. break;
  709. case V4L2_CID_AUTO_WHITE_BALANCE:
  710. ctrl->value = mt9m111->autowhitebalance;
  711. break;
  712. }
  713. return 0;
  714. }
  715. static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  716. {
  717. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  718. const struct v4l2_queryctrl *qctrl;
  719. int ret;
  720. qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
  721. if (!qctrl)
  722. return -EINVAL;
  723. switch (ctrl->id) {
  724. case V4L2_CID_VFLIP:
  725. mt9m111->vflip = ctrl->value;
  726. ret = mt9m111_set_flip(mt9m111, ctrl->value,
  727. MT9M111_RMB_MIRROR_ROWS);
  728. break;
  729. case V4L2_CID_HFLIP:
  730. mt9m111->hflip = ctrl->value;
  731. ret = mt9m111_set_flip(mt9m111, ctrl->value,
  732. MT9M111_RMB_MIRROR_COLS);
  733. break;
  734. case V4L2_CID_GAIN:
  735. ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
  736. break;
  737. case V4L2_CID_EXPOSURE_AUTO:
  738. ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
  739. break;
  740. case V4L2_CID_AUTO_WHITE_BALANCE:
  741. ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
  742. break;
  743. default:
  744. ret = -EINVAL;
  745. }
  746. return ret;
  747. }
  748. static int mt9m111_suspend(struct mt9m111 *mt9m111)
  749. {
  750. mt9m111->gain = mt9m111_get_global_gain(mt9m111);
  751. return 0;
  752. }
  753. static void mt9m111_restore_state(struct mt9m111 *mt9m111)
  754. {
  755. mt9m111_set_context(mt9m111, mt9m111->context);
  756. mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
  757. mt9m111_setup_rect(mt9m111, &mt9m111->rect);
  758. mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
  759. mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
  760. mt9m111_set_global_gain(mt9m111, mt9m111->gain);
  761. mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
  762. mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
  763. }
  764. static int mt9m111_resume(struct mt9m111 *mt9m111)
  765. {
  766. int ret = 0;
  767. if (mt9m111->powered) {
  768. ret = mt9m111_enable(mt9m111);
  769. if (!ret)
  770. ret = mt9m111_reset(mt9m111);
  771. if (!ret)
  772. mt9m111_restore_state(mt9m111);
  773. }
  774. return ret;
  775. }
  776. static int mt9m111_init(struct mt9m111 *mt9m111)
  777. {
  778. struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
  779. int ret;
  780. mt9m111->context = HIGHPOWER;
  781. ret = mt9m111_enable(mt9m111);
  782. if (!ret)
  783. ret = mt9m111_reset(mt9m111);
  784. if (!ret)
  785. ret = mt9m111_set_context(mt9m111, mt9m111->context);
  786. if (!ret)
  787. ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
  788. if (ret)
  789. dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
  790. return ret;
  791. }
  792. /*
  793. * Interface active, can use i2c. If it fails, it can indeed mean, that
  794. * this wasn't our capture interface, so, we wait for the right one
  795. */
  796. static int mt9m111_video_probe(struct soc_camera_device *icd,
  797. struct i2c_client *client)
  798. {
  799. struct mt9m111 *mt9m111 = to_mt9m111(client);
  800. s32 data;
  801. int ret;
  802. /* We must have a parent by now. And it cannot be a wrong one. */
  803. BUG_ON(!icd->parent ||
  804. to_soc_camera_host(icd->parent)->nr != icd->iface);
  805. mt9m111->lastpage = -1;
  806. mt9m111->autoexposure = 1;
  807. mt9m111->autowhitebalance = 1;
  808. data = reg_read(CHIP_VERSION);
  809. switch (data) {
  810. case 0x143a: /* MT9M111 or MT9M131 */
  811. mt9m111->model = V4L2_IDENT_MT9M111;
  812. dev_info(&client->dev,
  813. "Detected a MT9M111/MT9M131 chip ID %x\n", data);
  814. break;
  815. case 0x148c: /* MT9M112 */
  816. mt9m111->model = V4L2_IDENT_MT9M112;
  817. dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
  818. break;
  819. default:
  820. ret = -ENODEV;
  821. dev_err(&client->dev,
  822. "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
  823. data);
  824. goto ei2c;
  825. }
  826. ret = mt9m111_init(mt9m111);
  827. ei2c:
  828. return ret;
  829. }
  830. static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
  831. {
  832. struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
  833. struct i2c_client *client = v4l2_get_subdevdata(sd);
  834. int ret = 0;
  835. mutex_lock(&mt9m111->power_lock);
  836. /*
  837. * If the power count is modified from 0 to != 0 or from != 0 to 0,
  838. * update the power state.
  839. */
  840. if (mt9m111->power_count == !on) {
  841. if (on) {
  842. ret = mt9m111_resume(mt9m111);
  843. if (ret) {
  844. dev_err(&client->dev,
  845. "Failed to resume the sensor: %d\n", ret);
  846. goto out;
  847. }
  848. } else {
  849. mt9m111_suspend(mt9m111);
  850. }
  851. }
  852. /* Update the power count. */
  853. mt9m111->power_count += on ? 1 : -1;
  854. WARN_ON(mt9m111->power_count < 0);
  855. out:
  856. mutex_unlock(&mt9m111->power_lock);
  857. return ret;
  858. }
  859. static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
  860. .g_ctrl = mt9m111_g_ctrl,
  861. .s_ctrl = mt9m111_s_ctrl,
  862. .g_chip_ident = mt9m111_g_chip_ident,
  863. .s_power = mt9m111_s_power,
  864. #ifdef CONFIG_VIDEO_ADV_DEBUG
  865. .g_register = mt9m111_g_register,
  866. .s_register = mt9m111_s_register,
  867. #endif
  868. };
  869. static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
  870. enum v4l2_mbus_pixelcode *code)
  871. {
  872. if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
  873. return -EINVAL;
  874. *code = mt9m111_colour_fmts[index].code;
  875. return 0;
  876. }
  877. static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
  878. struct v4l2_mbus_config *cfg)
  879. {
  880. struct i2c_client *client = v4l2_get_subdevdata(sd);
  881. struct soc_camera_device *icd = client->dev.platform_data;
  882. struct soc_camera_link *icl = to_soc_camera_link(icd);
  883. cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
  884. V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
  885. V4L2_MBUS_DATA_ACTIVE_HIGH;
  886. cfg->type = V4L2_MBUS_PARALLEL;
  887. cfg->flags = soc_camera_apply_board_flags(icl, cfg);
  888. return 0;
  889. }
  890. static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
  891. .s_mbus_fmt = mt9m111_s_fmt,
  892. .g_mbus_fmt = mt9m111_g_fmt,
  893. .try_mbus_fmt = mt9m111_try_fmt,
  894. .s_crop = mt9m111_s_crop,
  895. .g_crop = mt9m111_g_crop,
  896. .cropcap = mt9m111_cropcap,
  897. .enum_mbus_fmt = mt9m111_enum_fmt,
  898. .g_mbus_config = mt9m111_g_mbus_config,
  899. };
  900. static struct v4l2_subdev_ops mt9m111_subdev_ops = {
  901. .core = &mt9m111_subdev_core_ops,
  902. .video = &mt9m111_subdev_video_ops,
  903. };
  904. static int mt9m111_probe(struct i2c_client *client,
  905. const struct i2c_device_id *did)
  906. {
  907. struct mt9m111 *mt9m111;
  908. struct soc_camera_device *icd = client->dev.platform_data;
  909. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  910. struct soc_camera_link *icl;
  911. int ret;
  912. if (!icd) {
  913. dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
  914. return -EINVAL;
  915. }
  916. icl = to_soc_camera_link(icd);
  917. if (!icl) {
  918. dev_err(&client->dev, "mt9m111: driver needs platform data\n");
  919. return -EINVAL;
  920. }
  921. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  922. dev_warn(&adapter->dev,
  923. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  924. return -EIO;
  925. }
  926. mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
  927. if (!mt9m111)
  928. return -ENOMEM;
  929. v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
  930. /* Second stage probe - when a capture adapter is there */
  931. icd->ops = &mt9m111_ops;
  932. mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
  933. mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
  934. mt9m111->rect.width = MT9M111_MAX_WIDTH;
  935. mt9m111->rect.height = MT9M111_MAX_HEIGHT;
  936. mt9m111->fmt = &mt9m111_colour_fmts[0];
  937. ret = mt9m111_video_probe(icd, client);
  938. if (ret) {
  939. icd->ops = NULL;
  940. kfree(mt9m111);
  941. }
  942. return ret;
  943. }
  944. static int mt9m111_remove(struct i2c_client *client)
  945. {
  946. struct mt9m111 *mt9m111 = to_mt9m111(client);
  947. struct soc_camera_device *icd = client->dev.platform_data;
  948. icd->ops = NULL;
  949. kfree(mt9m111);
  950. return 0;
  951. }
  952. static const struct i2c_device_id mt9m111_id[] = {
  953. { "mt9m111", 0 },
  954. { }
  955. };
  956. MODULE_DEVICE_TABLE(i2c, mt9m111_id);
  957. static struct i2c_driver mt9m111_i2c_driver = {
  958. .driver = {
  959. .name = "mt9m111",
  960. },
  961. .probe = mt9m111_probe,
  962. .remove = mt9m111_remove,
  963. .id_table = mt9m111_id,
  964. };
  965. static int __init mt9m111_mod_init(void)
  966. {
  967. return i2c_add_driver(&mt9m111_i2c_driver);
  968. }
  969. static void __exit mt9m111_mod_exit(void)
  970. {
  971. i2c_del_driver(&mt9m111_i2c_driver);
  972. }
  973. module_init(mt9m111_mod_init);
  974. module_exit(mt9m111_mod_exit);
  975. MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
  976. MODULE_AUTHOR("Robert Jarzmik");
  977. MODULE_LICENSE("GPL");