aesni-intel_glue.c 38 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <asm/i387.h>
  30. #include <asm/aes.h>
  31. #include <crypto/scatterwalk.h>
  32. #include <crypto/internal/aead.h>
  33. #include <linux/workqueue.h>
  34. #include <linux/spinlock.h>
  35. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  36. #define HAS_CTR
  37. #endif
  38. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  39. #define HAS_LRW
  40. #endif
  41. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  42. #define HAS_PCBC
  43. #endif
  44. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  45. #define HAS_XTS
  46. #endif
  47. struct async_aes_ctx {
  48. struct cryptd_ablkcipher *cryptd_tfm;
  49. };
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16];
  56. struct crypto_aes_ctx aes_key_expanded;
  57. u8 nonce[4];
  58. struct cryptd_aead *cryptd_tfm;
  59. };
  60. struct aesni_gcm_set_hash_subkey_result {
  61. int err;
  62. struct completion completion;
  63. };
  64. struct aesni_hash_subkey_req_data {
  65. u8 iv[16];
  66. struct aesni_gcm_set_hash_subkey_result result;
  67. struct scatterlist sg;
  68. };
  69. #define AESNI_ALIGN (16)
  70. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  71. #define RFC4106_HASH_SUBKEY_SIZE 16
  72. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  73. unsigned int key_len);
  74. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in);
  76. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. /* asmlinkage void aesni_gcm_enc()
  89. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  90. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  91. * const u8 *in, Plaintext input
  92. * unsigned long plaintext_len, Length of data in bytes for encryption.
  93. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  94. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  95. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  96. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  97. * const u8 *aad, Additional Authentication Data (AAD)
  98. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  99. * is going to be 8 or 12 bytes
  100. * u8 *auth_tag, Authenticated Tag output.
  101. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  102. * Valid values are 16 (most likely), 12 or 8.
  103. */
  104. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  105. const u8 *in, unsigned long plaintext_len, u8 *iv,
  106. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  107. u8 *auth_tag, unsigned long auth_tag_len);
  108. /* asmlinkage void aesni_gcm_dec()
  109. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  110. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  111. * const u8 *in, Ciphertext input
  112. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  113. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  114. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  115. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  116. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  117. * const u8 *aad, Additional Authentication Data (AAD)
  118. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  119. * to be 8 or 12 bytes
  120. * u8 *auth_tag, Authenticated Tag output.
  121. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  122. * Valid values are 16 (most likely), 12 or 8.
  123. */
  124. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  125. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  126. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  127. u8 *auth_tag, unsigned long auth_tag_len);
  128. static inline struct
  129. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  130. {
  131. return
  132. (struct aesni_rfc4106_gcm_ctx *)
  133. PTR_ALIGN((u8 *)
  134. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  135. }
  136. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  137. {
  138. unsigned long addr = (unsigned long)raw_ctx;
  139. unsigned long align = AESNI_ALIGN;
  140. if (align <= crypto_tfm_ctx_alignment())
  141. align = 1;
  142. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  143. }
  144. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  145. const u8 *in_key, unsigned int key_len)
  146. {
  147. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  148. u32 *flags = &tfm->crt_flags;
  149. int err;
  150. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  151. key_len != AES_KEYSIZE_256) {
  152. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  153. return -EINVAL;
  154. }
  155. if (!irq_fpu_usable())
  156. err = crypto_aes_expand_key(ctx, in_key, key_len);
  157. else {
  158. kernel_fpu_begin();
  159. err = aesni_set_key(ctx, in_key, key_len);
  160. kernel_fpu_end();
  161. }
  162. return err;
  163. }
  164. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  165. unsigned int key_len)
  166. {
  167. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  168. }
  169. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  170. {
  171. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  172. if (!irq_fpu_usable())
  173. crypto_aes_encrypt_x86(ctx, dst, src);
  174. else {
  175. kernel_fpu_begin();
  176. aesni_enc(ctx, dst, src);
  177. kernel_fpu_end();
  178. }
  179. }
  180. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  181. {
  182. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  183. if (!irq_fpu_usable())
  184. crypto_aes_decrypt_x86(ctx, dst, src);
  185. else {
  186. kernel_fpu_begin();
  187. aesni_dec(ctx, dst, src);
  188. kernel_fpu_end();
  189. }
  190. }
  191. static struct crypto_alg aesni_alg = {
  192. .cra_name = "aes",
  193. .cra_driver_name = "aes-aesni",
  194. .cra_priority = 300,
  195. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  196. .cra_blocksize = AES_BLOCK_SIZE,
  197. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  198. .cra_alignmask = 0,
  199. .cra_module = THIS_MODULE,
  200. .cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
  201. .cra_u = {
  202. .cipher = {
  203. .cia_min_keysize = AES_MIN_KEY_SIZE,
  204. .cia_max_keysize = AES_MAX_KEY_SIZE,
  205. .cia_setkey = aes_set_key,
  206. .cia_encrypt = aes_encrypt,
  207. .cia_decrypt = aes_decrypt
  208. }
  209. }
  210. };
  211. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  212. {
  213. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  214. aesni_enc(ctx, dst, src);
  215. }
  216. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  217. {
  218. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  219. aesni_dec(ctx, dst, src);
  220. }
  221. static struct crypto_alg __aesni_alg = {
  222. .cra_name = "__aes-aesni",
  223. .cra_driver_name = "__driver-aes-aesni",
  224. .cra_priority = 0,
  225. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  226. .cra_blocksize = AES_BLOCK_SIZE,
  227. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  228. .cra_alignmask = 0,
  229. .cra_module = THIS_MODULE,
  230. .cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
  231. .cra_u = {
  232. .cipher = {
  233. .cia_min_keysize = AES_MIN_KEY_SIZE,
  234. .cia_max_keysize = AES_MAX_KEY_SIZE,
  235. .cia_setkey = aes_set_key,
  236. .cia_encrypt = __aes_encrypt,
  237. .cia_decrypt = __aes_decrypt
  238. }
  239. }
  240. };
  241. static int ecb_encrypt(struct blkcipher_desc *desc,
  242. struct scatterlist *dst, struct scatterlist *src,
  243. unsigned int nbytes)
  244. {
  245. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  246. struct blkcipher_walk walk;
  247. int err;
  248. blkcipher_walk_init(&walk, dst, src, nbytes);
  249. err = blkcipher_walk_virt(desc, &walk);
  250. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  251. kernel_fpu_begin();
  252. while ((nbytes = walk.nbytes)) {
  253. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  254. nbytes & AES_BLOCK_MASK);
  255. nbytes &= AES_BLOCK_SIZE - 1;
  256. err = blkcipher_walk_done(desc, &walk, nbytes);
  257. }
  258. kernel_fpu_end();
  259. return err;
  260. }
  261. static int ecb_decrypt(struct blkcipher_desc *desc,
  262. struct scatterlist *dst, struct scatterlist *src,
  263. unsigned int nbytes)
  264. {
  265. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  266. struct blkcipher_walk walk;
  267. int err;
  268. blkcipher_walk_init(&walk, dst, src, nbytes);
  269. err = blkcipher_walk_virt(desc, &walk);
  270. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  271. kernel_fpu_begin();
  272. while ((nbytes = walk.nbytes)) {
  273. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  274. nbytes & AES_BLOCK_MASK);
  275. nbytes &= AES_BLOCK_SIZE - 1;
  276. err = blkcipher_walk_done(desc, &walk, nbytes);
  277. }
  278. kernel_fpu_end();
  279. return err;
  280. }
  281. static struct crypto_alg blk_ecb_alg = {
  282. .cra_name = "__ecb-aes-aesni",
  283. .cra_driver_name = "__driver-ecb-aes-aesni",
  284. .cra_priority = 0,
  285. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  286. .cra_blocksize = AES_BLOCK_SIZE,
  287. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  288. .cra_alignmask = 0,
  289. .cra_type = &crypto_blkcipher_type,
  290. .cra_module = THIS_MODULE,
  291. .cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
  292. .cra_u = {
  293. .blkcipher = {
  294. .min_keysize = AES_MIN_KEY_SIZE,
  295. .max_keysize = AES_MAX_KEY_SIZE,
  296. .setkey = aes_set_key,
  297. .encrypt = ecb_encrypt,
  298. .decrypt = ecb_decrypt,
  299. },
  300. },
  301. };
  302. static int cbc_encrypt(struct blkcipher_desc *desc,
  303. struct scatterlist *dst, struct scatterlist *src,
  304. unsigned int nbytes)
  305. {
  306. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  307. struct blkcipher_walk walk;
  308. int err;
  309. blkcipher_walk_init(&walk, dst, src, nbytes);
  310. err = blkcipher_walk_virt(desc, &walk);
  311. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  312. kernel_fpu_begin();
  313. while ((nbytes = walk.nbytes)) {
  314. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  315. nbytes & AES_BLOCK_MASK, walk.iv);
  316. nbytes &= AES_BLOCK_SIZE - 1;
  317. err = blkcipher_walk_done(desc, &walk, nbytes);
  318. }
  319. kernel_fpu_end();
  320. return err;
  321. }
  322. static int cbc_decrypt(struct blkcipher_desc *desc,
  323. struct scatterlist *dst, struct scatterlist *src,
  324. unsigned int nbytes)
  325. {
  326. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  327. struct blkcipher_walk walk;
  328. int err;
  329. blkcipher_walk_init(&walk, dst, src, nbytes);
  330. err = blkcipher_walk_virt(desc, &walk);
  331. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  332. kernel_fpu_begin();
  333. while ((nbytes = walk.nbytes)) {
  334. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  335. nbytes & AES_BLOCK_MASK, walk.iv);
  336. nbytes &= AES_BLOCK_SIZE - 1;
  337. err = blkcipher_walk_done(desc, &walk, nbytes);
  338. }
  339. kernel_fpu_end();
  340. return err;
  341. }
  342. static struct crypto_alg blk_cbc_alg = {
  343. .cra_name = "__cbc-aes-aesni",
  344. .cra_driver_name = "__driver-cbc-aes-aesni",
  345. .cra_priority = 0,
  346. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  347. .cra_blocksize = AES_BLOCK_SIZE,
  348. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  349. .cra_alignmask = 0,
  350. .cra_type = &crypto_blkcipher_type,
  351. .cra_module = THIS_MODULE,
  352. .cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
  353. .cra_u = {
  354. .blkcipher = {
  355. .min_keysize = AES_MIN_KEY_SIZE,
  356. .max_keysize = AES_MAX_KEY_SIZE,
  357. .setkey = aes_set_key,
  358. .encrypt = cbc_encrypt,
  359. .decrypt = cbc_decrypt,
  360. },
  361. },
  362. };
  363. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  364. struct blkcipher_walk *walk)
  365. {
  366. u8 *ctrblk = walk->iv;
  367. u8 keystream[AES_BLOCK_SIZE];
  368. u8 *src = walk->src.virt.addr;
  369. u8 *dst = walk->dst.virt.addr;
  370. unsigned int nbytes = walk->nbytes;
  371. aesni_enc(ctx, keystream, ctrblk);
  372. crypto_xor(keystream, src, nbytes);
  373. memcpy(dst, keystream, nbytes);
  374. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  375. }
  376. static int ctr_crypt(struct blkcipher_desc *desc,
  377. struct scatterlist *dst, struct scatterlist *src,
  378. unsigned int nbytes)
  379. {
  380. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  381. struct blkcipher_walk walk;
  382. int err;
  383. blkcipher_walk_init(&walk, dst, src, nbytes);
  384. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  385. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  386. kernel_fpu_begin();
  387. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  388. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  389. nbytes & AES_BLOCK_MASK, walk.iv);
  390. nbytes &= AES_BLOCK_SIZE - 1;
  391. err = blkcipher_walk_done(desc, &walk, nbytes);
  392. }
  393. if (walk.nbytes) {
  394. ctr_crypt_final(ctx, &walk);
  395. err = blkcipher_walk_done(desc, &walk, 0);
  396. }
  397. kernel_fpu_end();
  398. return err;
  399. }
  400. static struct crypto_alg blk_ctr_alg = {
  401. .cra_name = "__ctr-aes-aesni",
  402. .cra_driver_name = "__driver-ctr-aes-aesni",
  403. .cra_priority = 0,
  404. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  405. .cra_blocksize = 1,
  406. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  407. .cra_alignmask = 0,
  408. .cra_type = &crypto_blkcipher_type,
  409. .cra_module = THIS_MODULE,
  410. .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
  411. .cra_u = {
  412. .blkcipher = {
  413. .min_keysize = AES_MIN_KEY_SIZE,
  414. .max_keysize = AES_MAX_KEY_SIZE,
  415. .ivsize = AES_BLOCK_SIZE,
  416. .setkey = aes_set_key,
  417. .encrypt = ctr_crypt,
  418. .decrypt = ctr_crypt,
  419. },
  420. },
  421. };
  422. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  423. unsigned int key_len)
  424. {
  425. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  426. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  427. int err;
  428. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  429. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  430. & CRYPTO_TFM_REQ_MASK);
  431. err = crypto_ablkcipher_setkey(child, key, key_len);
  432. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  433. & CRYPTO_TFM_RES_MASK);
  434. return err;
  435. }
  436. static int ablk_encrypt(struct ablkcipher_request *req)
  437. {
  438. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  439. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  440. if (!irq_fpu_usable()) {
  441. struct ablkcipher_request *cryptd_req =
  442. ablkcipher_request_ctx(req);
  443. memcpy(cryptd_req, req, sizeof(*req));
  444. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  445. return crypto_ablkcipher_encrypt(cryptd_req);
  446. } else {
  447. struct blkcipher_desc desc;
  448. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  449. desc.info = req->info;
  450. desc.flags = 0;
  451. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  452. &desc, req->dst, req->src, req->nbytes);
  453. }
  454. }
  455. static int ablk_decrypt(struct ablkcipher_request *req)
  456. {
  457. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  458. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  459. if (!irq_fpu_usable()) {
  460. struct ablkcipher_request *cryptd_req =
  461. ablkcipher_request_ctx(req);
  462. memcpy(cryptd_req, req, sizeof(*req));
  463. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  464. return crypto_ablkcipher_decrypt(cryptd_req);
  465. } else {
  466. struct blkcipher_desc desc;
  467. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  468. desc.info = req->info;
  469. desc.flags = 0;
  470. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  471. &desc, req->dst, req->src, req->nbytes);
  472. }
  473. }
  474. static void ablk_exit(struct crypto_tfm *tfm)
  475. {
  476. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  477. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  478. }
  479. static void ablk_init_common(struct crypto_tfm *tfm,
  480. struct cryptd_ablkcipher *cryptd_tfm)
  481. {
  482. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  483. ctx->cryptd_tfm = cryptd_tfm;
  484. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  485. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  486. }
  487. static int ablk_ecb_init(struct crypto_tfm *tfm)
  488. {
  489. struct cryptd_ablkcipher *cryptd_tfm;
  490. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
  491. if (IS_ERR(cryptd_tfm))
  492. return PTR_ERR(cryptd_tfm);
  493. ablk_init_common(tfm, cryptd_tfm);
  494. return 0;
  495. }
  496. static struct crypto_alg ablk_ecb_alg = {
  497. .cra_name = "ecb(aes)",
  498. .cra_driver_name = "ecb-aes-aesni",
  499. .cra_priority = 400,
  500. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  501. .cra_blocksize = AES_BLOCK_SIZE,
  502. .cra_ctxsize = sizeof(struct async_aes_ctx),
  503. .cra_alignmask = 0,
  504. .cra_type = &crypto_ablkcipher_type,
  505. .cra_module = THIS_MODULE,
  506. .cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
  507. .cra_init = ablk_ecb_init,
  508. .cra_exit = ablk_exit,
  509. .cra_u = {
  510. .ablkcipher = {
  511. .min_keysize = AES_MIN_KEY_SIZE,
  512. .max_keysize = AES_MAX_KEY_SIZE,
  513. .setkey = ablk_set_key,
  514. .encrypt = ablk_encrypt,
  515. .decrypt = ablk_decrypt,
  516. },
  517. },
  518. };
  519. static int ablk_cbc_init(struct crypto_tfm *tfm)
  520. {
  521. struct cryptd_ablkcipher *cryptd_tfm;
  522. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
  523. if (IS_ERR(cryptd_tfm))
  524. return PTR_ERR(cryptd_tfm);
  525. ablk_init_common(tfm, cryptd_tfm);
  526. return 0;
  527. }
  528. static struct crypto_alg ablk_cbc_alg = {
  529. .cra_name = "cbc(aes)",
  530. .cra_driver_name = "cbc-aes-aesni",
  531. .cra_priority = 400,
  532. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  533. .cra_blocksize = AES_BLOCK_SIZE,
  534. .cra_ctxsize = sizeof(struct async_aes_ctx),
  535. .cra_alignmask = 0,
  536. .cra_type = &crypto_ablkcipher_type,
  537. .cra_module = THIS_MODULE,
  538. .cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
  539. .cra_init = ablk_cbc_init,
  540. .cra_exit = ablk_exit,
  541. .cra_u = {
  542. .ablkcipher = {
  543. .min_keysize = AES_MIN_KEY_SIZE,
  544. .max_keysize = AES_MAX_KEY_SIZE,
  545. .ivsize = AES_BLOCK_SIZE,
  546. .setkey = ablk_set_key,
  547. .encrypt = ablk_encrypt,
  548. .decrypt = ablk_decrypt,
  549. },
  550. },
  551. };
  552. static int ablk_ctr_init(struct crypto_tfm *tfm)
  553. {
  554. struct cryptd_ablkcipher *cryptd_tfm;
  555. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
  556. if (IS_ERR(cryptd_tfm))
  557. return PTR_ERR(cryptd_tfm);
  558. ablk_init_common(tfm, cryptd_tfm);
  559. return 0;
  560. }
  561. static struct crypto_alg ablk_ctr_alg = {
  562. .cra_name = "ctr(aes)",
  563. .cra_driver_name = "ctr-aes-aesni",
  564. .cra_priority = 400,
  565. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  566. .cra_blocksize = 1,
  567. .cra_ctxsize = sizeof(struct async_aes_ctx),
  568. .cra_alignmask = 0,
  569. .cra_type = &crypto_ablkcipher_type,
  570. .cra_module = THIS_MODULE,
  571. .cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
  572. .cra_init = ablk_ctr_init,
  573. .cra_exit = ablk_exit,
  574. .cra_u = {
  575. .ablkcipher = {
  576. .min_keysize = AES_MIN_KEY_SIZE,
  577. .max_keysize = AES_MAX_KEY_SIZE,
  578. .ivsize = AES_BLOCK_SIZE,
  579. .setkey = ablk_set_key,
  580. .encrypt = ablk_encrypt,
  581. .decrypt = ablk_encrypt,
  582. .geniv = "chainiv",
  583. },
  584. },
  585. };
  586. #ifdef HAS_CTR
  587. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  588. {
  589. struct cryptd_ablkcipher *cryptd_tfm;
  590. cryptd_tfm = cryptd_alloc_ablkcipher(
  591. "rfc3686(__driver-ctr-aes-aesni)", 0, 0);
  592. if (IS_ERR(cryptd_tfm))
  593. return PTR_ERR(cryptd_tfm);
  594. ablk_init_common(tfm, cryptd_tfm);
  595. return 0;
  596. }
  597. static struct crypto_alg ablk_rfc3686_ctr_alg = {
  598. .cra_name = "rfc3686(ctr(aes))",
  599. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  600. .cra_priority = 400,
  601. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  602. .cra_blocksize = 1,
  603. .cra_ctxsize = sizeof(struct async_aes_ctx),
  604. .cra_alignmask = 0,
  605. .cra_type = &crypto_ablkcipher_type,
  606. .cra_module = THIS_MODULE,
  607. .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
  608. .cra_init = ablk_rfc3686_ctr_init,
  609. .cra_exit = ablk_exit,
  610. .cra_u = {
  611. .ablkcipher = {
  612. .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  613. .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  614. .ivsize = CTR_RFC3686_IV_SIZE,
  615. .setkey = ablk_set_key,
  616. .encrypt = ablk_encrypt,
  617. .decrypt = ablk_decrypt,
  618. .geniv = "seqiv",
  619. },
  620. },
  621. };
  622. #endif
  623. #ifdef HAS_LRW
  624. static int ablk_lrw_init(struct crypto_tfm *tfm)
  625. {
  626. struct cryptd_ablkcipher *cryptd_tfm;
  627. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
  628. 0, 0);
  629. if (IS_ERR(cryptd_tfm))
  630. return PTR_ERR(cryptd_tfm);
  631. ablk_init_common(tfm, cryptd_tfm);
  632. return 0;
  633. }
  634. static struct crypto_alg ablk_lrw_alg = {
  635. .cra_name = "lrw(aes)",
  636. .cra_driver_name = "lrw-aes-aesni",
  637. .cra_priority = 400,
  638. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  639. .cra_blocksize = AES_BLOCK_SIZE,
  640. .cra_ctxsize = sizeof(struct async_aes_ctx),
  641. .cra_alignmask = 0,
  642. .cra_type = &crypto_ablkcipher_type,
  643. .cra_module = THIS_MODULE,
  644. .cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
  645. .cra_init = ablk_lrw_init,
  646. .cra_exit = ablk_exit,
  647. .cra_u = {
  648. .ablkcipher = {
  649. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  650. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  651. .ivsize = AES_BLOCK_SIZE,
  652. .setkey = ablk_set_key,
  653. .encrypt = ablk_encrypt,
  654. .decrypt = ablk_decrypt,
  655. },
  656. },
  657. };
  658. #endif
  659. #ifdef HAS_PCBC
  660. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  661. {
  662. struct cryptd_ablkcipher *cryptd_tfm;
  663. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
  664. 0, 0);
  665. if (IS_ERR(cryptd_tfm))
  666. return PTR_ERR(cryptd_tfm);
  667. ablk_init_common(tfm, cryptd_tfm);
  668. return 0;
  669. }
  670. static struct crypto_alg ablk_pcbc_alg = {
  671. .cra_name = "pcbc(aes)",
  672. .cra_driver_name = "pcbc-aes-aesni",
  673. .cra_priority = 400,
  674. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  675. .cra_blocksize = AES_BLOCK_SIZE,
  676. .cra_ctxsize = sizeof(struct async_aes_ctx),
  677. .cra_alignmask = 0,
  678. .cra_type = &crypto_ablkcipher_type,
  679. .cra_module = THIS_MODULE,
  680. .cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
  681. .cra_init = ablk_pcbc_init,
  682. .cra_exit = ablk_exit,
  683. .cra_u = {
  684. .ablkcipher = {
  685. .min_keysize = AES_MIN_KEY_SIZE,
  686. .max_keysize = AES_MAX_KEY_SIZE,
  687. .ivsize = AES_BLOCK_SIZE,
  688. .setkey = ablk_set_key,
  689. .encrypt = ablk_encrypt,
  690. .decrypt = ablk_decrypt,
  691. },
  692. },
  693. };
  694. #endif
  695. #ifdef HAS_XTS
  696. static int ablk_xts_init(struct crypto_tfm *tfm)
  697. {
  698. struct cryptd_ablkcipher *cryptd_tfm;
  699. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
  700. 0, 0);
  701. if (IS_ERR(cryptd_tfm))
  702. return PTR_ERR(cryptd_tfm);
  703. ablk_init_common(tfm, cryptd_tfm);
  704. return 0;
  705. }
  706. static struct crypto_alg ablk_xts_alg = {
  707. .cra_name = "xts(aes)",
  708. .cra_driver_name = "xts-aes-aesni",
  709. .cra_priority = 400,
  710. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  711. .cra_blocksize = AES_BLOCK_SIZE,
  712. .cra_ctxsize = sizeof(struct async_aes_ctx),
  713. .cra_alignmask = 0,
  714. .cra_type = &crypto_ablkcipher_type,
  715. .cra_module = THIS_MODULE,
  716. .cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
  717. .cra_init = ablk_xts_init,
  718. .cra_exit = ablk_exit,
  719. .cra_u = {
  720. .ablkcipher = {
  721. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  722. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  723. .ivsize = AES_BLOCK_SIZE,
  724. .setkey = ablk_set_key,
  725. .encrypt = ablk_encrypt,
  726. .decrypt = ablk_decrypt,
  727. },
  728. },
  729. };
  730. #endif
  731. static int rfc4106_init(struct crypto_tfm *tfm)
  732. {
  733. struct cryptd_aead *cryptd_tfm;
  734. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  735. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  736. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  737. if (IS_ERR(cryptd_tfm))
  738. return PTR_ERR(cryptd_tfm);
  739. ctx->cryptd_tfm = cryptd_tfm;
  740. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  741. + crypto_aead_reqsize(&cryptd_tfm->base);
  742. return 0;
  743. }
  744. static void rfc4106_exit(struct crypto_tfm *tfm)
  745. {
  746. struct aesni_rfc4106_gcm_ctx *ctx =
  747. (struct aesni_rfc4106_gcm_ctx *)
  748. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  749. if (!IS_ERR(ctx->cryptd_tfm))
  750. cryptd_free_aead(ctx->cryptd_tfm);
  751. return;
  752. }
  753. static void
  754. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  755. {
  756. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  757. if (err == -EINPROGRESS)
  758. return;
  759. result->err = err;
  760. complete(&result->completion);
  761. }
  762. static int
  763. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  764. {
  765. struct crypto_ablkcipher *ctr_tfm;
  766. struct ablkcipher_request *req;
  767. int ret = -EINVAL;
  768. struct aesni_hash_subkey_req_data *req_data;
  769. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  770. if (IS_ERR(ctr_tfm))
  771. return PTR_ERR(ctr_tfm);
  772. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  773. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  774. if (ret) {
  775. crypto_free_ablkcipher(ctr_tfm);
  776. return ret;
  777. }
  778. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  779. if (!req) {
  780. crypto_free_ablkcipher(ctr_tfm);
  781. return -EINVAL;
  782. }
  783. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  784. if (!req_data) {
  785. crypto_free_ablkcipher(ctr_tfm);
  786. return -ENOMEM;
  787. }
  788. memset(req_data->iv, 0, sizeof(req_data->iv));
  789. /* Clear the data in the hash sub key container to zero.*/
  790. /* We want to cipher all zeros to create the hash sub key. */
  791. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  792. init_completion(&req_data->result.completion);
  793. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  794. ablkcipher_request_set_tfm(req, ctr_tfm);
  795. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  796. CRYPTO_TFM_REQ_MAY_BACKLOG,
  797. rfc4106_set_hash_subkey_done,
  798. &req_data->result);
  799. ablkcipher_request_set_crypt(req, &req_data->sg,
  800. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  801. ret = crypto_ablkcipher_encrypt(req);
  802. if (ret == -EINPROGRESS || ret == -EBUSY) {
  803. ret = wait_for_completion_interruptible
  804. (&req_data->result.completion);
  805. if (!ret)
  806. ret = req_data->result.err;
  807. }
  808. ablkcipher_request_free(req);
  809. kfree(req_data);
  810. crypto_free_ablkcipher(ctr_tfm);
  811. return ret;
  812. }
  813. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  814. unsigned int key_len)
  815. {
  816. int ret = 0;
  817. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  818. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  819. u8 *new_key_mem = NULL;
  820. if (key_len < 4) {
  821. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  822. return -EINVAL;
  823. }
  824. /*Account for 4 byte nonce at the end.*/
  825. key_len -= 4;
  826. if (key_len != AES_KEYSIZE_128) {
  827. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  828. return -EINVAL;
  829. }
  830. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  831. /*This must be on a 16 byte boundary!*/
  832. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  833. return -EINVAL;
  834. if ((unsigned long)key % AESNI_ALIGN) {
  835. /*key is not aligned: use an auxuliar aligned pointer*/
  836. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  837. if (!new_key_mem)
  838. return -ENOMEM;
  839. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  840. memcpy(new_key_mem, key, key_len);
  841. key = new_key_mem;
  842. }
  843. if (!irq_fpu_usable())
  844. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  845. key, key_len);
  846. else {
  847. kernel_fpu_begin();
  848. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  849. kernel_fpu_end();
  850. }
  851. /*This must be on a 16 byte boundary!*/
  852. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  853. ret = -EINVAL;
  854. goto exit;
  855. }
  856. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  857. exit:
  858. kfree(new_key_mem);
  859. return ret;
  860. }
  861. /* This is the Integrity Check Value (aka the authentication tag length and can
  862. * be 8, 12 or 16 bytes long. */
  863. static int rfc4106_set_authsize(struct crypto_aead *parent,
  864. unsigned int authsize)
  865. {
  866. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  867. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  868. switch (authsize) {
  869. case 8:
  870. case 12:
  871. case 16:
  872. break;
  873. default:
  874. return -EINVAL;
  875. }
  876. crypto_aead_crt(parent)->authsize = authsize;
  877. crypto_aead_crt(cryptd_child)->authsize = authsize;
  878. return 0;
  879. }
  880. static int rfc4106_encrypt(struct aead_request *req)
  881. {
  882. int ret;
  883. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  884. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  885. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  886. if (!irq_fpu_usable()) {
  887. struct aead_request *cryptd_req =
  888. (struct aead_request *) aead_request_ctx(req);
  889. memcpy(cryptd_req, req, sizeof(*req));
  890. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  891. return crypto_aead_encrypt(cryptd_req);
  892. } else {
  893. kernel_fpu_begin();
  894. ret = cryptd_child->base.crt_aead.encrypt(req);
  895. kernel_fpu_end();
  896. return ret;
  897. }
  898. }
  899. static int rfc4106_decrypt(struct aead_request *req)
  900. {
  901. int ret;
  902. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  903. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  904. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  905. if (!irq_fpu_usable()) {
  906. struct aead_request *cryptd_req =
  907. (struct aead_request *) aead_request_ctx(req);
  908. memcpy(cryptd_req, req, sizeof(*req));
  909. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  910. return crypto_aead_decrypt(cryptd_req);
  911. } else {
  912. kernel_fpu_begin();
  913. ret = cryptd_child->base.crt_aead.decrypt(req);
  914. kernel_fpu_end();
  915. return ret;
  916. }
  917. }
  918. static struct crypto_alg rfc4106_alg = {
  919. .cra_name = "rfc4106(gcm(aes))",
  920. .cra_driver_name = "rfc4106-gcm-aesni",
  921. .cra_priority = 400,
  922. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  923. .cra_blocksize = 1,
  924. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  925. .cra_alignmask = 0,
  926. .cra_type = &crypto_nivaead_type,
  927. .cra_module = THIS_MODULE,
  928. .cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),
  929. .cra_init = rfc4106_init,
  930. .cra_exit = rfc4106_exit,
  931. .cra_u = {
  932. .aead = {
  933. .setkey = rfc4106_set_key,
  934. .setauthsize = rfc4106_set_authsize,
  935. .encrypt = rfc4106_encrypt,
  936. .decrypt = rfc4106_decrypt,
  937. .geniv = "seqiv",
  938. .ivsize = 8,
  939. .maxauthsize = 16,
  940. },
  941. },
  942. };
  943. static int __driver_rfc4106_encrypt(struct aead_request *req)
  944. {
  945. u8 one_entry_in_sg = 0;
  946. u8 *src, *dst, *assoc;
  947. __be32 counter = cpu_to_be32(1);
  948. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  949. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  950. void *aes_ctx = &(ctx->aes_key_expanded);
  951. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  952. u8 iv_tab[16+AESNI_ALIGN];
  953. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  954. struct scatter_walk src_sg_walk;
  955. struct scatter_walk assoc_sg_walk;
  956. struct scatter_walk dst_sg_walk;
  957. unsigned int i;
  958. /* Assuming we are supporting rfc4106 64-bit extended */
  959. /* sequence numbers We need to have the AAD length equal */
  960. /* to 8 or 12 bytes */
  961. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  962. return -EINVAL;
  963. /* IV below built */
  964. for (i = 0; i < 4; i++)
  965. *(iv+i) = ctx->nonce[i];
  966. for (i = 0; i < 8; i++)
  967. *(iv+4+i) = req->iv[i];
  968. *((__be32 *)(iv+12)) = counter;
  969. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  970. one_entry_in_sg = 1;
  971. scatterwalk_start(&src_sg_walk, req->src);
  972. scatterwalk_start(&assoc_sg_walk, req->assoc);
  973. src = scatterwalk_map(&src_sg_walk, 0);
  974. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  975. dst = src;
  976. if (unlikely(req->src != req->dst)) {
  977. scatterwalk_start(&dst_sg_walk, req->dst);
  978. dst = scatterwalk_map(&dst_sg_walk, 0);
  979. }
  980. } else {
  981. /* Allocate memory for src, dst, assoc */
  982. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  983. GFP_ATOMIC);
  984. if (unlikely(!src))
  985. return -ENOMEM;
  986. assoc = (src + req->cryptlen + auth_tag_len);
  987. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  988. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  989. req->assoclen, 0);
  990. dst = src;
  991. }
  992. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  993. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  994. + ((unsigned long)req->cryptlen), auth_tag_len);
  995. /* The authTag (aka the Integrity Check Value) needs to be written
  996. * back to the packet. */
  997. if (one_entry_in_sg) {
  998. if (unlikely(req->src != req->dst)) {
  999. scatterwalk_unmap(dst, 0);
  1000. scatterwalk_done(&dst_sg_walk, 0, 0);
  1001. }
  1002. scatterwalk_unmap(src, 0);
  1003. scatterwalk_unmap(assoc, 0);
  1004. scatterwalk_done(&src_sg_walk, 0, 0);
  1005. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1006. } else {
  1007. scatterwalk_map_and_copy(dst, req->dst, 0,
  1008. req->cryptlen + auth_tag_len, 1);
  1009. kfree(src);
  1010. }
  1011. return 0;
  1012. }
  1013. static int __driver_rfc4106_decrypt(struct aead_request *req)
  1014. {
  1015. u8 one_entry_in_sg = 0;
  1016. u8 *src, *dst, *assoc;
  1017. unsigned long tempCipherLen = 0;
  1018. __be32 counter = cpu_to_be32(1);
  1019. int retval = 0;
  1020. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1021. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  1022. void *aes_ctx = &(ctx->aes_key_expanded);
  1023. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  1024. u8 iv_and_authTag[32+AESNI_ALIGN];
  1025. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  1026. u8 *authTag = iv + 16;
  1027. struct scatter_walk src_sg_walk;
  1028. struct scatter_walk assoc_sg_walk;
  1029. struct scatter_walk dst_sg_walk;
  1030. unsigned int i;
  1031. if (unlikely((req->cryptlen < auth_tag_len) ||
  1032. (req->assoclen != 8 && req->assoclen != 12)))
  1033. return -EINVAL;
  1034. /* Assuming we are supporting rfc4106 64-bit extended */
  1035. /* sequence numbers We need to have the AAD length */
  1036. /* equal to 8 or 12 bytes */
  1037. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  1038. /* IV below built */
  1039. for (i = 0; i < 4; i++)
  1040. *(iv+i) = ctx->nonce[i];
  1041. for (i = 0; i < 8; i++)
  1042. *(iv+4+i) = req->iv[i];
  1043. *((__be32 *)(iv+12)) = counter;
  1044. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  1045. one_entry_in_sg = 1;
  1046. scatterwalk_start(&src_sg_walk, req->src);
  1047. scatterwalk_start(&assoc_sg_walk, req->assoc);
  1048. src = scatterwalk_map(&src_sg_walk, 0);
  1049. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  1050. dst = src;
  1051. if (unlikely(req->src != req->dst)) {
  1052. scatterwalk_start(&dst_sg_walk, req->dst);
  1053. dst = scatterwalk_map(&dst_sg_walk, 0);
  1054. }
  1055. } else {
  1056. /* Allocate memory for src, dst, assoc */
  1057. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  1058. if (!src)
  1059. return -ENOMEM;
  1060. assoc = (src + req->cryptlen + auth_tag_len);
  1061. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1062. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1063. req->assoclen, 0);
  1064. dst = src;
  1065. }
  1066. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  1067. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  1068. authTag, auth_tag_len);
  1069. /* Compare generated tag with passed in tag. */
  1070. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  1071. -EBADMSG : 0;
  1072. if (one_entry_in_sg) {
  1073. if (unlikely(req->src != req->dst)) {
  1074. scatterwalk_unmap(dst, 0);
  1075. scatterwalk_done(&dst_sg_walk, 0, 0);
  1076. }
  1077. scatterwalk_unmap(src, 0);
  1078. scatterwalk_unmap(assoc, 0);
  1079. scatterwalk_done(&src_sg_walk, 0, 0);
  1080. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1081. } else {
  1082. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1083. kfree(src);
  1084. }
  1085. return retval;
  1086. }
  1087. static struct crypto_alg __rfc4106_alg = {
  1088. .cra_name = "__gcm-aes-aesni",
  1089. .cra_driver_name = "__driver-gcm-aes-aesni",
  1090. .cra_priority = 0,
  1091. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1092. .cra_blocksize = 1,
  1093. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  1094. .cra_alignmask = 0,
  1095. .cra_type = &crypto_aead_type,
  1096. .cra_module = THIS_MODULE,
  1097. .cra_list = LIST_HEAD_INIT(__rfc4106_alg.cra_list),
  1098. .cra_u = {
  1099. .aead = {
  1100. .encrypt = __driver_rfc4106_encrypt,
  1101. .decrypt = __driver_rfc4106_decrypt,
  1102. },
  1103. },
  1104. };
  1105. static int __init aesni_init(void)
  1106. {
  1107. int err;
  1108. if (!cpu_has_aes) {
  1109. printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
  1110. return -ENODEV;
  1111. }
  1112. if ((err = crypto_register_alg(&aesni_alg)))
  1113. goto aes_err;
  1114. if ((err = crypto_register_alg(&__aesni_alg)))
  1115. goto __aes_err;
  1116. if ((err = crypto_register_alg(&blk_ecb_alg)))
  1117. goto blk_ecb_err;
  1118. if ((err = crypto_register_alg(&blk_cbc_alg)))
  1119. goto blk_cbc_err;
  1120. if ((err = crypto_register_alg(&blk_ctr_alg)))
  1121. goto blk_ctr_err;
  1122. if ((err = crypto_register_alg(&ablk_ecb_alg)))
  1123. goto ablk_ecb_err;
  1124. if ((err = crypto_register_alg(&ablk_cbc_alg)))
  1125. goto ablk_cbc_err;
  1126. if ((err = crypto_register_alg(&ablk_ctr_alg)))
  1127. goto ablk_ctr_err;
  1128. #ifdef HAS_CTR
  1129. if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
  1130. goto ablk_rfc3686_ctr_err;
  1131. #endif
  1132. #ifdef HAS_LRW
  1133. if ((err = crypto_register_alg(&ablk_lrw_alg)))
  1134. goto ablk_lrw_err;
  1135. #endif
  1136. #ifdef HAS_PCBC
  1137. if ((err = crypto_register_alg(&ablk_pcbc_alg)))
  1138. goto ablk_pcbc_err;
  1139. #endif
  1140. #ifdef HAS_XTS
  1141. if ((err = crypto_register_alg(&ablk_xts_alg)))
  1142. goto ablk_xts_err;
  1143. #endif
  1144. err = crypto_register_alg(&__rfc4106_alg);
  1145. if (err)
  1146. goto __aead_gcm_err;
  1147. err = crypto_register_alg(&rfc4106_alg);
  1148. if (err)
  1149. goto aead_gcm_err;
  1150. return err;
  1151. aead_gcm_err:
  1152. crypto_unregister_alg(&__rfc4106_alg);
  1153. __aead_gcm_err:
  1154. #ifdef HAS_XTS
  1155. crypto_unregister_alg(&ablk_xts_alg);
  1156. ablk_xts_err:
  1157. #endif
  1158. #ifdef HAS_PCBC
  1159. crypto_unregister_alg(&ablk_pcbc_alg);
  1160. ablk_pcbc_err:
  1161. #endif
  1162. #ifdef HAS_LRW
  1163. crypto_unregister_alg(&ablk_lrw_alg);
  1164. ablk_lrw_err:
  1165. #endif
  1166. #ifdef HAS_CTR
  1167. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1168. ablk_rfc3686_ctr_err:
  1169. #endif
  1170. crypto_unregister_alg(&ablk_ctr_alg);
  1171. ablk_ctr_err:
  1172. crypto_unregister_alg(&ablk_cbc_alg);
  1173. ablk_cbc_err:
  1174. crypto_unregister_alg(&ablk_ecb_alg);
  1175. ablk_ecb_err:
  1176. crypto_unregister_alg(&blk_ctr_alg);
  1177. blk_ctr_err:
  1178. crypto_unregister_alg(&blk_cbc_alg);
  1179. blk_cbc_err:
  1180. crypto_unregister_alg(&blk_ecb_alg);
  1181. blk_ecb_err:
  1182. crypto_unregister_alg(&__aesni_alg);
  1183. __aes_err:
  1184. crypto_unregister_alg(&aesni_alg);
  1185. aes_err:
  1186. return err;
  1187. }
  1188. static void __exit aesni_exit(void)
  1189. {
  1190. crypto_unregister_alg(&__rfc4106_alg);
  1191. crypto_unregister_alg(&rfc4106_alg);
  1192. #ifdef HAS_XTS
  1193. crypto_unregister_alg(&ablk_xts_alg);
  1194. #endif
  1195. #ifdef HAS_PCBC
  1196. crypto_unregister_alg(&ablk_pcbc_alg);
  1197. #endif
  1198. #ifdef HAS_LRW
  1199. crypto_unregister_alg(&ablk_lrw_alg);
  1200. #endif
  1201. #ifdef HAS_CTR
  1202. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1203. #endif
  1204. crypto_unregister_alg(&ablk_ctr_alg);
  1205. crypto_unregister_alg(&ablk_cbc_alg);
  1206. crypto_unregister_alg(&ablk_ecb_alg);
  1207. crypto_unregister_alg(&blk_ctr_alg);
  1208. crypto_unregister_alg(&blk_cbc_alg);
  1209. crypto_unregister_alg(&blk_ecb_alg);
  1210. crypto_unregister_alg(&__aesni_alg);
  1211. crypto_unregister_alg(&aesni_alg);
  1212. }
  1213. module_init(aesni_init);
  1214. module_exit(aesni_exit);
  1215. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1216. MODULE_LICENSE("GPL");
  1217. MODULE_ALIAS("aes");