bfin_5xx.c 31 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #ifdef CONFIG_KGDB_UART
  42. #include <linux/kgdb.h>
  43. #include <asm/irq_regs.h>
  44. #endif
  45. #include <asm/gpio.h>
  46. #include <asm/mach/bfin_serial_5xx.h>
  47. #ifdef CONFIG_SERIAL_BFIN_DMA
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/cacheflush.h>
  52. #endif
  53. /* UART name and device definitions */
  54. #define BFIN_SERIAL_NAME "ttyBF"
  55. #define BFIN_SERIAL_MAJOR 204
  56. #define BFIN_SERIAL_MINOR 64
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES 5
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_do_work(struct work_struct *work);
  67. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  68. #endif
  69. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  70. /*
  71. * interrupts are disabled on entry
  72. */
  73. static void bfin_serial_stop_tx(struct uart_port *port)
  74. {
  75. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  76. #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
  77. unsigned short ier;
  78. #endif
  79. while (!(UART_GET_LSR(uart) & TEMT))
  80. continue;
  81. #ifdef CONFIG_SERIAL_BFIN_DMA
  82. disable_dma(uart->tx_dma_channel);
  83. #else
  84. #ifdef CONFIG_BF54x
  85. /* Clear TFI bit */
  86. UART_PUT_LSR(uart, TFI);
  87. UART_CLEAR_IER(uart, ETBEI);
  88. #else
  89. ier = UART_GET_IER(uart);
  90. ier &= ~ETBEI;
  91. UART_PUT_IER(uart, ier);
  92. #endif
  93. #endif
  94. }
  95. /*
  96. * port is locked and interrupts are disabled
  97. */
  98. static void bfin_serial_start_tx(struct uart_port *port)
  99. {
  100. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  101. #ifdef CONFIG_SERIAL_BFIN_DMA
  102. bfin_serial_dma_tx_chars(uart);
  103. #else
  104. #ifdef CONFIG_BF54x
  105. UART_SET_IER(uart, ETBEI);
  106. #else
  107. unsigned short ier;
  108. ier = UART_GET_IER(uart);
  109. ier |= ETBEI;
  110. UART_PUT_IER(uart, ier);
  111. #endif
  112. bfin_serial_tx_chars(uart);
  113. #endif
  114. }
  115. /*
  116. * Interrupts are enabled
  117. */
  118. static void bfin_serial_stop_rx(struct uart_port *port)
  119. {
  120. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  121. #ifdef CONFIG_KGDB_UART
  122. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  123. #endif
  124. #ifdef CONFIG_BF54x
  125. UART_CLEAR_IER(uart, ERBFI);
  126. #else
  127. unsigned short ier;
  128. ier = UART_GET_IER(uart);
  129. ier &= ~ERBFI;
  130. UART_PUT_IER(uart, ier);
  131. #endif
  132. #ifdef CONFIG_KGDB_UART
  133. }
  134. #endif
  135. }
  136. /*
  137. * Set the modem control timer to fire immediately.
  138. */
  139. static void bfin_serial_enable_ms(struct uart_port *port)
  140. {
  141. }
  142. #ifdef CONFIG_KGDB_UART
  143. static int kgdb_entry_state;
  144. void kgdb_put_debug_char(int chr)
  145. {
  146. struct bfin_serial_port *uart;
  147. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  148. uart = &bfin_serial_ports[0];
  149. else
  150. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  151. while (!(UART_GET_LSR(uart) & THRE)) {
  152. SSYNC();
  153. }
  154. #ifndef CONFIG_BF54x
  155. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  156. SSYNC();
  157. #endif
  158. UART_PUT_CHAR(uart, (unsigned char)chr);
  159. SSYNC();
  160. }
  161. int kgdb_get_debug_char(void)
  162. {
  163. struct bfin_serial_port *uart;
  164. unsigned char chr;
  165. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  166. uart = &bfin_serial_ports[0];
  167. else
  168. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  169. while(!(UART_GET_LSR(uart) & DR)) {
  170. SSYNC();
  171. }
  172. #ifndef CONFIG_BF54x
  173. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  174. SSYNC();
  175. #endif
  176. chr = UART_GET_CHAR(uart);
  177. SSYNC();
  178. return chr;
  179. }
  180. #endif
  181. #ifdef CONFIG_SERIAL_BFIN_PIO
  182. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  183. {
  184. struct tty_struct *tty = uart->port.info->tty;
  185. unsigned int status, ch, flg;
  186. static int in_break = 0;
  187. #ifdef CONFIG_KGDB_UART
  188. struct pt_regs *regs = get_irq_regs();
  189. #endif
  190. status = UART_GET_LSR(uart);
  191. UART_CLEAR_LSR(uart);
  192. ch = UART_GET_CHAR(uart);
  193. uart->port.icount.rx++;
  194. #ifdef CONFIG_KGDB_UART
  195. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  196. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  197. kgdb_breakkey_pressed(regs);
  198. return;
  199. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  200. kgdb_entry_state = 1;
  201. } else if (kgdb_entry_state == 1 && ch == 'q') {
  202. kgdb_entry_state = 0;
  203. kgdb_breakkey_pressed(regs);
  204. return;
  205. } else if (ch == 0x3) {/* Ctrl + C */
  206. kgdb_entry_state = 0;
  207. kgdb_breakkey_pressed(regs);
  208. return;
  209. } else {
  210. kgdb_entry_state = 0;
  211. }
  212. }
  213. #endif
  214. if (ANOMALY_05000230) {
  215. /* The BF533 family of processors have a nice misbehavior where
  216. * they continuously generate characters for a "single" break.
  217. * We have to basically ignore this flood until the "next" valid
  218. * character comes across. All other Blackfin families operate
  219. * properly though.
  220. * Note: While Anomaly 05000230 does not directly address this,
  221. * the changes that went in for it also fixed this issue.
  222. */
  223. if (in_break) {
  224. if (ch != 0) {
  225. in_break = 0;
  226. ch = UART_GET_CHAR(uart);
  227. if (bfin_revid() < 5)
  228. return;
  229. } else
  230. return;
  231. }
  232. }
  233. if (status & BI) {
  234. if (ANOMALY_05000230)
  235. in_break = 1;
  236. uart->port.icount.brk++;
  237. if (uart_handle_break(&uart->port))
  238. goto ignore_char;
  239. status &= ~(PE | FE);
  240. }
  241. if (status & PE)
  242. uart->port.icount.parity++;
  243. if (status & OE)
  244. uart->port.icount.overrun++;
  245. if (status & FE)
  246. uart->port.icount.frame++;
  247. status &= uart->port.read_status_mask;
  248. if (status & BI)
  249. flg = TTY_BREAK;
  250. else if (status & PE)
  251. flg = TTY_PARITY;
  252. else if (status & FE)
  253. flg = TTY_FRAME;
  254. else
  255. flg = TTY_NORMAL;
  256. if (uart_handle_sysrq_char(&uart->port, ch))
  257. goto ignore_char;
  258. uart_insert_char(&uart->port, status, OE, ch, flg);
  259. ignore_char:
  260. tty_flip_buffer_push(tty);
  261. }
  262. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  263. {
  264. struct circ_buf *xmit = &uart->port.info->xmit;
  265. if (uart->port.x_char) {
  266. UART_PUT_CHAR(uart, uart->port.x_char);
  267. uart->port.icount.tx++;
  268. uart->port.x_char = 0;
  269. }
  270. /*
  271. * Check the modem control lines before
  272. * transmitting anything.
  273. */
  274. bfin_serial_mctrl_check(uart);
  275. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  276. bfin_serial_stop_tx(&uart->port);
  277. return;
  278. }
  279. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  280. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  281. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  282. uart->port.icount.tx++;
  283. SSYNC();
  284. }
  285. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  286. uart_write_wakeup(&uart->port);
  287. if (uart_circ_empty(xmit))
  288. bfin_serial_stop_tx(&uart->port);
  289. }
  290. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  291. {
  292. struct bfin_serial_port *uart = dev_id;
  293. spin_lock(&uart->port.lock);
  294. while (UART_GET_LSR(uart) & DR)
  295. bfin_serial_rx_chars(uart);
  296. spin_unlock(&uart->port.lock);
  297. return IRQ_HANDLED;
  298. }
  299. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  300. {
  301. struct bfin_serial_port *uart = dev_id;
  302. spin_lock(&uart->port.lock);
  303. if (UART_GET_LSR(uart) & THRE)
  304. bfin_serial_tx_chars(uart);
  305. spin_unlock(&uart->port.lock);
  306. return IRQ_HANDLED;
  307. }
  308. static void bfin_serial_do_work(struct work_struct *work)
  309. {
  310. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  311. bfin_serial_mctrl_check(uart);
  312. }
  313. #endif
  314. #ifdef CONFIG_SERIAL_BFIN_DMA
  315. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  316. {
  317. struct circ_buf *xmit = &uart->port.info->xmit;
  318. unsigned short ier;
  319. int flags = 0;
  320. if (!uart->tx_done)
  321. return;
  322. uart->tx_done = 0;
  323. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  324. bfin_serial_stop_tx(&uart->port);
  325. uart->tx_done = 1;
  326. return;
  327. }
  328. if (uart->port.x_char) {
  329. UART_PUT_CHAR(uart, uart->port.x_char);
  330. uart->port.icount.tx++;
  331. uart->port.x_char = 0;
  332. }
  333. /*
  334. * Check the modem control lines before
  335. * transmitting anything.
  336. */
  337. bfin_serial_mctrl_check(uart);
  338. spin_lock_irqsave(&uart->port.lock, flags);
  339. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  340. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  341. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  342. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  343. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  344. set_dma_config(uart->tx_dma_channel,
  345. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  346. INTR_ON_BUF,
  347. DIMENSION_LINEAR,
  348. DATA_SIZE_8,
  349. DMA_SYNC_RESTART));
  350. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  351. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  352. set_dma_x_modify(uart->tx_dma_channel, 1);
  353. enable_dma(uart->tx_dma_channel);
  354. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  355. uart->port.icount.tx += uart->tx_count;
  356. #ifdef CONFIG_BF54x
  357. UART_SET_IER(uart, ETBEI);
  358. #else
  359. ier = UART_GET_IER(uart);
  360. ier |= ETBEI;
  361. UART_PUT_IER(uart, ier);
  362. #endif
  363. spin_unlock_irqrestore(&uart->port.lock, flags);
  364. }
  365. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  366. {
  367. struct tty_struct *tty = uart->port.info->tty;
  368. int i, flg, status;
  369. status = UART_GET_LSR(uart);
  370. UART_CLEAR_LSR(uart);
  371. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  372. if (status & BI) {
  373. uart->port.icount.brk++;
  374. if (uart_handle_break(&uart->port))
  375. goto dma_ignore_char;
  376. status &= ~(PE | FE);
  377. }
  378. if (status & PE)
  379. uart->port.icount.parity++;
  380. if (status & OE)
  381. uart->port.icount.overrun++;
  382. if (status & FE)
  383. uart->port.icount.frame++;
  384. status &= uart->port.read_status_mask;
  385. if (status & BI)
  386. flg = TTY_BREAK;
  387. else if (status & PE)
  388. flg = TTY_PARITY;
  389. else if (status & FE)
  390. flg = TTY_FRAME;
  391. else
  392. flg = TTY_NORMAL;
  393. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  394. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  395. goto dma_ignore_char;
  396. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  397. }
  398. dma_ignore_char:
  399. tty_flip_buffer_push(tty);
  400. }
  401. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  402. {
  403. int x_pos, pos;
  404. int flags = 0;
  405. spin_lock_irqsave(&uart->port.lock, flags);
  406. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  407. if (x_pos == DMA_RX_XCOUNT)
  408. x_pos = 0;
  409. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  410. if (pos>uart->rx_dma_buf.tail) {
  411. uart->rx_dma_buf.tail = pos;
  412. bfin_serial_dma_rx_chars(uart);
  413. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  414. }
  415. spin_unlock_irqrestore(&uart->port.lock, flags);
  416. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  417. add_timer(&(uart->rx_dma_timer));
  418. }
  419. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  420. {
  421. struct bfin_serial_port *uart = dev_id;
  422. struct circ_buf *xmit = &uart->port.info->xmit;
  423. unsigned short ier;
  424. spin_lock(&uart->port.lock);
  425. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  426. clear_dma_irqstat(uart->tx_dma_channel);
  427. disable_dma(uart->tx_dma_channel);
  428. #ifdef CONFIG_BF54x
  429. UART_CLEAR_IER(uart, ETBEI);
  430. #else
  431. ier = UART_GET_IER(uart);
  432. ier &= ~ETBEI;
  433. UART_PUT_IER(uart, ier);
  434. #endif
  435. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  436. uart_write_wakeup(&uart->port);
  437. uart->tx_done = 1;
  438. bfin_serial_dma_tx_chars(uart);
  439. }
  440. spin_unlock(&uart->port.lock);
  441. return IRQ_HANDLED;
  442. }
  443. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  444. {
  445. struct bfin_serial_port *uart = dev_id;
  446. unsigned short irqstat;
  447. uart->rx_dma_nrows++;
  448. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  449. uart->rx_dma_nrows = 0;
  450. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  451. bfin_serial_dma_rx_chars(uart);
  452. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  453. }
  454. spin_lock(&uart->port.lock);
  455. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  456. clear_dma_irqstat(uart->rx_dma_channel);
  457. spin_unlock(&uart->port.lock);
  458. return IRQ_HANDLED;
  459. }
  460. #endif
  461. /*
  462. * Return TIOCSER_TEMT when transmitter is not busy.
  463. */
  464. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  465. {
  466. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  467. unsigned short lsr;
  468. lsr = UART_GET_LSR(uart);
  469. if (lsr & TEMT)
  470. return TIOCSER_TEMT;
  471. else
  472. return 0;
  473. }
  474. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  475. {
  476. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  477. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  478. if (uart->cts_pin < 0)
  479. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  480. if (gpio_get_value(uart->cts_pin))
  481. return TIOCM_DSR | TIOCM_CAR;
  482. else
  483. #endif
  484. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  485. }
  486. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  487. {
  488. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  489. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  490. if (uart->rts_pin < 0)
  491. return;
  492. if (mctrl & TIOCM_RTS)
  493. gpio_set_value(uart->rts_pin, 0);
  494. else
  495. gpio_set_value(uart->rts_pin, 1);
  496. #endif
  497. }
  498. /*
  499. * Handle any change of modem status signal since we were last called.
  500. */
  501. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  502. {
  503. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  504. unsigned int status;
  505. # ifdef CONFIG_SERIAL_BFIN_DMA
  506. struct uart_info *info = uart->port.info;
  507. struct tty_struct *tty = info->tty;
  508. status = bfin_serial_get_mctrl(&uart->port);
  509. if (!(status & TIOCM_CTS)) {
  510. tty->hw_stopped = 1;
  511. } else {
  512. tty->hw_stopped = 0;
  513. }
  514. # else
  515. status = bfin_serial_get_mctrl(&uart->port);
  516. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  517. if (!(status & TIOCM_CTS))
  518. schedule_work(&uart->cts_workqueue);
  519. # endif
  520. #endif
  521. }
  522. /*
  523. * Interrupts are always disabled.
  524. */
  525. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  526. {
  527. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  528. u16 lcr = UART_GET_LCR(uart);
  529. if (break_state)
  530. lcr |= SB;
  531. else
  532. lcr &= ~SB;
  533. UART_PUT_LCR(uart, lcr);
  534. SSYNC();
  535. }
  536. static int bfin_serial_startup(struct uart_port *port)
  537. {
  538. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  539. #ifdef CONFIG_SERIAL_BFIN_DMA
  540. dma_addr_t dma_handle;
  541. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  542. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  543. return -EBUSY;
  544. }
  545. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  546. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  547. free_dma(uart->rx_dma_channel);
  548. return -EBUSY;
  549. }
  550. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  551. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  552. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  553. uart->rx_dma_buf.head = 0;
  554. uart->rx_dma_buf.tail = 0;
  555. uart->rx_dma_nrows = 0;
  556. set_dma_config(uart->rx_dma_channel,
  557. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  558. INTR_ON_ROW, DIMENSION_2D,
  559. DATA_SIZE_8,
  560. DMA_SYNC_RESTART));
  561. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  562. set_dma_x_modify(uart->rx_dma_channel, 1);
  563. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  564. set_dma_y_modify(uart->rx_dma_channel, 1);
  565. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  566. enable_dma(uart->rx_dma_channel);
  567. uart->rx_dma_timer.data = (unsigned long)(uart);
  568. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  569. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  570. add_timer(&(uart->rx_dma_timer));
  571. #else
  572. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  573. "BFIN_UART_RX", uart)) {
  574. # ifdef CONFIG_KGDB_UART
  575. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  576. # endif
  577. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  578. return -EBUSY;
  579. # ifdef CONFIG_KGDB_UART
  580. }
  581. # endif
  582. }
  583. if (request_irq
  584. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  585. "BFIN_UART_TX", uart)) {
  586. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  587. free_irq(uart->port.irq, uart);
  588. return -EBUSY;
  589. }
  590. #endif
  591. #ifdef CONFIG_BF54x
  592. UART_SET_IER(uart, ERBFI);
  593. #else
  594. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  595. #endif
  596. return 0;
  597. }
  598. static void bfin_serial_shutdown(struct uart_port *port)
  599. {
  600. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  601. #ifdef CONFIG_SERIAL_BFIN_DMA
  602. disable_dma(uart->tx_dma_channel);
  603. free_dma(uart->tx_dma_channel);
  604. disable_dma(uart->rx_dma_channel);
  605. free_dma(uart->rx_dma_channel);
  606. del_timer(&(uart->rx_dma_timer));
  607. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  608. #else
  609. #ifdef CONFIG_KGDB_UART
  610. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  611. #endif
  612. free_irq(uart->port.irq, uart);
  613. free_irq(uart->port.irq+1, uart);
  614. #endif
  615. }
  616. static void
  617. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  618. struct ktermios *old)
  619. {
  620. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  621. unsigned long flags;
  622. unsigned int baud, quot;
  623. unsigned short val, ier, lsr, lcr = 0;
  624. switch (termios->c_cflag & CSIZE) {
  625. case CS8:
  626. lcr = WLS(8);
  627. break;
  628. case CS7:
  629. lcr = WLS(7);
  630. break;
  631. case CS6:
  632. lcr = WLS(6);
  633. break;
  634. case CS5:
  635. lcr = WLS(5);
  636. break;
  637. default:
  638. printk(KERN_ERR "%s: word lengh not supported\n",
  639. __FUNCTION__);
  640. }
  641. if (termios->c_cflag & CSTOPB)
  642. lcr |= STB;
  643. if (termios->c_cflag & PARENB)
  644. lcr |= PEN;
  645. if (!(termios->c_cflag & PARODD))
  646. lcr |= EPS;
  647. if (termios->c_cflag & CMSPAR)
  648. lcr |= STP;
  649. port->read_status_mask = OE;
  650. if (termios->c_iflag & INPCK)
  651. port->read_status_mask |= (FE | PE);
  652. if (termios->c_iflag & (BRKINT | PARMRK))
  653. port->read_status_mask |= BI;
  654. /*
  655. * Characters to ignore
  656. */
  657. port->ignore_status_mask = 0;
  658. if (termios->c_iflag & IGNPAR)
  659. port->ignore_status_mask |= FE | PE;
  660. if (termios->c_iflag & IGNBRK) {
  661. port->ignore_status_mask |= BI;
  662. /*
  663. * If we're ignoring parity and break indicators,
  664. * ignore overruns too (for real raw support).
  665. */
  666. if (termios->c_iflag & IGNPAR)
  667. port->ignore_status_mask |= OE;
  668. }
  669. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  670. quot = uart_get_divisor(port, baud);
  671. spin_lock_irqsave(&uart->port.lock, flags);
  672. do {
  673. lsr = UART_GET_LSR(uart);
  674. } while (!(lsr & TEMT));
  675. /* Disable UART */
  676. ier = UART_GET_IER(uart);
  677. #ifdef CONFIG_BF54x
  678. UART_CLEAR_IER(uart, 0xF);
  679. #else
  680. UART_PUT_IER(uart, 0);
  681. #endif
  682. #ifndef CONFIG_BF54x
  683. /* Set DLAB in LCR to Access DLL and DLH */
  684. val = UART_GET_LCR(uart);
  685. val |= DLAB;
  686. UART_PUT_LCR(uart, val);
  687. SSYNC();
  688. #endif
  689. UART_PUT_DLL(uart, quot & 0xFF);
  690. SSYNC();
  691. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  692. SSYNC();
  693. #ifndef CONFIG_BF54x
  694. /* Clear DLAB in LCR to Access THR RBR IER */
  695. val = UART_GET_LCR(uart);
  696. val &= ~DLAB;
  697. UART_PUT_LCR(uart, val);
  698. SSYNC();
  699. #endif
  700. UART_PUT_LCR(uart, lcr);
  701. /* Enable UART */
  702. #ifdef CONFIG_BF54x
  703. UART_SET_IER(uart, ier);
  704. #else
  705. UART_PUT_IER(uart, ier);
  706. #endif
  707. val = UART_GET_GCTL(uart);
  708. val |= UCEN;
  709. UART_PUT_GCTL(uart, val);
  710. spin_unlock_irqrestore(&uart->port.lock, flags);
  711. }
  712. static const char *bfin_serial_type(struct uart_port *port)
  713. {
  714. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  715. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  716. }
  717. /*
  718. * Release the memory region(s) being used by 'port'.
  719. */
  720. static void bfin_serial_release_port(struct uart_port *port)
  721. {
  722. }
  723. /*
  724. * Request the memory region(s) being used by 'port'.
  725. */
  726. static int bfin_serial_request_port(struct uart_port *port)
  727. {
  728. return 0;
  729. }
  730. /*
  731. * Configure/autoconfigure the port.
  732. */
  733. static void bfin_serial_config_port(struct uart_port *port, int flags)
  734. {
  735. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  736. if (flags & UART_CONFIG_TYPE &&
  737. bfin_serial_request_port(&uart->port) == 0)
  738. uart->port.type = PORT_BFIN;
  739. }
  740. /*
  741. * Verify the new serial_struct (for TIOCSSERIAL).
  742. * The only change we allow are to the flags and type, and
  743. * even then only between PORT_BFIN and PORT_UNKNOWN
  744. */
  745. static int
  746. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  747. {
  748. return 0;
  749. }
  750. static struct uart_ops bfin_serial_pops = {
  751. .tx_empty = bfin_serial_tx_empty,
  752. .set_mctrl = bfin_serial_set_mctrl,
  753. .get_mctrl = bfin_serial_get_mctrl,
  754. .stop_tx = bfin_serial_stop_tx,
  755. .start_tx = bfin_serial_start_tx,
  756. .stop_rx = bfin_serial_stop_rx,
  757. .enable_ms = bfin_serial_enable_ms,
  758. .break_ctl = bfin_serial_break_ctl,
  759. .startup = bfin_serial_startup,
  760. .shutdown = bfin_serial_shutdown,
  761. .set_termios = bfin_serial_set_termios,
  762. .type = bfin_serial_type,
  763. .release_port = bfin_serial_release_port,
  764. .request_port = bfin_serial_request_port,
  765. .config_port = bfin_serial_config_port,
  766. .verify_port = bfin_serial_verify_port,
  767. };
  768. static void __init bfin_serial_init_ports(void)
  769. {
  770. static int first = 1;
  771. int i;
  772. if (!first)
  773. return;
  774. first = 0;
  775. for (i = 0; i < nr_ports; i++) {
  776. bfin_serial_ports[i].port.uartclk = get_sclk();
  777. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  778. bfin_serial_ports[i].port.line = i;
  779. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  780. bfin_serial_ports[i].port.membase =
  781. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  782. bfin_serial_ports[i].port.mapbase =
  783. bfin_serial_resource[i].uart_base_addr;
  784. bfin_serial_ports[i].port.irq =
  785. bfin_serial_resource[i].uart_irq;
  786. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  787. #ifdef CONFIG_SERIAL_BFIN_DMA
  788. bfin_serial_ports[i].tx_done = 1;
  789. bfin_serial_ports[i].tx_count = 0;
  790. bfin_serial_ports[i].tx_dma_channel =
  791. bfin_serial_resource[i].uart_tx_dma_channel;
  792. bfin_serial_ports[i].rx_dma_channel =
  793. bfin_serial_resource[i].uart_rx_dma_channel;
  794. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  795. #else
  796. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  797. #endif
  798. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  799. bfin_serial_ports[i].cts_pin =
  800. bfin_serial_resource[i].uart_cts_pin;
  801. bfin_serial_ports[i].rts_pin =
  802. bfin_serial_resource[i].uart_rts_pin;
  803. #endif
  804. bfin_serial_hw_init(&bfin_serial_ports[i]);
  805. }
  806. }
  807. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  808. /*
  809. * If the port was already initialised (eg, by a boot loader),
  810. * try to determine the current setup.
  811. */
  812. static void __init
  813. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  814. int *parity, int *bits)
  815. {
  816. unsigned short status;
  817. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  818. if (status == (ERBFI | ETBEI)) {
  819. /* ok, the port was enabled */
  820. unsigned short lcr, val;
  821. unsigned short dlh, dll;
  822. lcr = UART_GET_LCR(uart);
  823. *parity = 'n';
  824. if (lcr & PEN) {
  825. if (lcr & EPS)
  826. *parity = 'e';
  827. else
  828. *parity = 'o';
  829. }
  830. switch (lcr & 0x03) {
  831. case 0: *bits = 5; break;
  832. case 1: *bits = 6; break;
  833. case 2: *bits = 7; break;
  834. case 3: *bits = 8; break;
  835. }
  836. #ifndef CONFIG_BF54x
  837. /* Set DLAB in LCR to Access DLL and DLH */
  838. val = UART_GET_LCR(uart);
  839. val |= DLAB;
  840. UART_PUT_LCR(uart, val);
  841. #endif
  842. dll = UART_GET_DLL(uart);
  843. dlh = UART_GET_DLH(uart);
  844. #ifndef CONFIG_BF54x
  845. /* Clear DLAB in LCR to Access THR RBR IER */
  846. val = UART_GET_LCR(uart);
  847. val &= ~DLAB;
  848. UART_PUT_LCR(uart, val);
  849. #endif
  850. *baud = get_sclk() / (16*(dll | dlh << 8));
  851. }
  852. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  853. }
  854. #endif
  855. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  856. static struct uart_driver bfin_serial_reg;
  857. static int __init
  858. bfin_serial_console_setup(struct console *co, char *options)
  859. {
  860. struct bfin_serial_port *uart;
  861. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  862. int baud = 57600;
  863. int bits = 8;
  864. int parity = 'n';
  865. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  866. int flow = 'r';
  867. # else
  868. int flow = 'n';
  869. # endif
  870. # endif
  871. /*
  872. * Check whether an invalid uart number has been specified, and
  873. * if so, search for the first available port that does have
  874. * console support.
  875. */
  876. if (co->index == -1 || co->index >= nr_ports)
  877. co->index = 0;
  878. uart = &bfin_serial_ports[co->index];
  879. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  880. if (options)
  881. uart_parse_options(options, &baud, &parity, &bits, &flow);
  882. else
  883. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  884. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  885. # else
  886. return 0;
  887. # endif
  888. }
  889. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  890. defined (CONFIG_EARLY_PRINTK) */
  891. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  892. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  893. {
  894. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  895. while (!(UART_GET_LSR(uart) & THRE))
  896. barrier();
  897. UART_PUT_CHAR(uart, ch);
  898. SSYNC();
  899. }
  900. /*
  901. * Interrupts are disabled on entering
  902. */
  903. static void
  904. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  905. {
  906. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  907. int flags = 0;
  908. spin_lock_irqsave(&uart->port.lock, flags);
  909. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  910. spin_unlock_irqrestore(&uart->port.lock, flags);
  911. }
  912. static struct console bfin_serial_console = {
  913. .name = BFIN_SERIAL_NAME,
  914. .write = bfin_serial_console_write,
  915. .device = uart_console_device,
  916. .setup = bfin_serial_console_setup,
  917. .flags = CON_PRINTBUFFER,
  918. .index = -1,
  919. .data = &bfin_serial_reg,
  920. };
  921. static int __init bfin_serial_rs_console_init(void)
  922. {
  923. bfin_serial_init_ports();
  924. register_console(&bfin_serial_console);
  925. #ifdef CONFIG_KGDB_UART
  926. kgdb_entry_state = 0;
  927. init_kgdb_uart();
  928. #endif
  929. return 0;
  930. }
  931. console_initcall(bfin_serial_rs_console_init);
  932. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  933. #else
  934. #define BFIN_SERIAL_CONSOLE NULL
  935. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  936. #ifdef CONFIG_EARLY_PRINTK
  937. static __init void early_serial_putc(struct uart_port *port, int ch)
  938. {
  939. unsigned timeout = 0xffff;
  940. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  941. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  942. cpu_relax();
  943. UART_PUT_CHAR(uart, ch);
  944. }
  945. static __init void early_serial_write(struct console *con, const char *s,
  946. unsigned int n)
  947. {
  948. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  949. unsigned int i;
  950. for (i = 0; i < n; i++, s++) {
  951. if (*s == '\n')
  952. early_serial_putc(&uart->port, '\r');
  953. early_serial_putc(&uart->port, *s);
  954. }
  955. }
  956. static struct __init console bfin_early_serial_console = {
  957. .name = "early_BFuart",
  958. .write = early_serial_write,
  959. .device = uart_console_device,
  960. .flags = CON_PRINTBUFFER,
  961. .setup = bfin_serial_console_setup,
  962. .index = -1,
  963. .data = &bfin_serial_reg,
  964. };
  965. struct console __init *bfin_earlyserial_init(unsigned int port,
  966. unsigned int cflag)
  967. {
  968. struct bfin_serial_port *uart;
  969. struct ktermios t;
  970. if (port == -1 || port >= nr_ports)
  971. port = 0;
  972. bfin_serial_init_ports();
  973. bfin_early_serial_console.index = port;
  974. uart = &bfin_serial_ports[port];
  975. t.c_cflag = cflag;
  976. t.c_iflag = 0;
  977. t.c_oflag = 0;
  978. t.c_lflag = ICANON;
  979. t.c_line = port;
  980. bfin_serial_set_termios(&uart->port, &t, &t);
  981. return &bfin_early_serial_console;
  982. }
  983. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  984. static struct uart_driver bfin_serial_reg = {
  985. .owner = THIS_MODULE,
  986. .driver_name = "bfin-uart",
  987. .dev_name = BFIN_SERIAL_NAME,
  988. .major = BFIN_SERIAL_MAJOR,
  989. .minor = BFIN_SERIAL_MINOR,
  990. .nr = NR_PORTS,
  991. .cons = BFIN_SERIAL_CONSOLE,
  992. };
  993. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  994. {
  995. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  996. if (uart)
  997. uart_suspend_port(&bfin_serial_reg, &uart->port);
  998. return 0;
  999. }
  1000. static int bfin_serial_resume(struct platform_device *dev)
  1001. {
  1002. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1003. if (uart)
  1004. uart_resume_port(&bfin_serial_reg, &uart->port);
  1005. return 0;
  1006. }
  1007. static int bfin_serial_probe(struct platform_device *dev)
  1008. {
  1009. struct resource *res = dev->resource;
  1010. int i;
  1011. for (i = 0; i < dev->num_resources; i++, res++)
  1012. if (res->flags & IORESOURCE_MEM)
  1013. break;
  1014. if (i < dev->num_resources) {
  1015. for (i = 0; i < nr_ports; i++, res++) {
  1016. if (bfin_serial_ports[i].port.mapbase != res->start)
  1017. continue;
  1018. bfin_serial_ports[i].port.dev = &dev->dev;
  1019. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1020. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1021. }
  1022. }
  1023. return 0;
  1024. }
  1025. static int bfin_serial_remove(struct platform_device *pdev)
  1026. {
  1027. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1028. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1029. gpio_free(uart->cts_pin);
  1030. gpio_free(uart->rts_pin);
  1031. #endif
  1032. platform_set_drvdata(pdev, NULL);
  1033. if (uart)
  1034. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1035. return 0;
  1036. }
  1037. static struct platform_driver bfin_serial_driver = {
  1038. .probe = bfin_serial_probe,
  1039. .remove = bfin_serial_remove,
  1040. .suspend = bfin_serial_suspend,
  1041. .resume = bfin_serial_resume,
  1042. .driver = {
  1043. .name = "bfin-uart",
  1044. },
  1045. };
  1046. static int __init bfin_serial_init(void)
  1047. {
  1048. int ret;
  1049. #ifdef CONFIG_KGDB_UART
  1050. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1051. struct ktermios t;
  1052. #endif
  1053. pr_info("Serial: Blackfin serial driver\n");
  1054. bfin_serial_init_ports();
  1055. ret = uart_register_driver(&bfin_serial_reg);
  1056. if (ret == 0) {
  1057. ret = platform_driver_register(&bfin_serial_driver);
  1058. if (ret) {
  1059. pr_debug("uart register failed\n");
  1060. uart_unregister_driver(&bfin_serial_reg);
  1061. }
  1062. }
  1063. #ifdef CONFIG_KGDB_UART
  1064. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1065. request_irq(uart->port.irq, bfin_serial_rx_int,
  1066. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1067. pr_info("Request irq for kgdb uart port\n");
  1068. #ifdef CONFIG_BF54x
  1069. UART_SET_IER(uart, ERBFI);
  1070. #else
  1071. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1072. #endif
  1073. SSYNC();
  1074. t.c_cflag = CS8|B57600;
  1075. t.c_iflag = 0;
  1076. t.c_oflag = 0;
  1077. t.c_lflag = ICANON;
  1078. t.c_line = CONFIG_KGDB_UART_PORT;
  1079. bfin_serial_set_termios(&uart->port, &t, &t);
  1080. }
  1081. #endif
  1082. return ret;
  1083. }
  1084. static void __exit bfin_serial_exit(void)
  1085. {
  1086. platform_driver_unregister(&bfin_serial_driver);
  1087. uart_unregister_driver(&bfin_serial_reg);
  1088. }
  1089. module_init(bfin_serial_init);
  1090. module_exit(bfin_serial_exit);
  1091. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1092. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1093. MODULE_LICENSE("GPL");
  1094. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);