qlcnic_init.c 40 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include "qlcnic.h"
  27. struct crb_addr_pair {
  28. u32 addr;
  29. u32 data;
  30. };
  31. #define QLCNIC_MAX_CRB_XFORM 60
  32. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  33. #define crb_addr_transform(name) \
  34. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  35. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  36. #define QLCNIC_ADDR_ERROR (0xffffffff)
  37. static void
  38. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  39. struct qlcnic_host_rds_ring *rds_ring);
  40. static void crb_addr_transform_setup(void)
  41. {
  42. crb_addr_transform(XDMA);
  43. crb_addr_transform(TIMR);
  44. crb_addr_transform(SRE);
  45. crb_addr_transform(SQN3);
  46. crb_addr_transform(SQN2);
  47. crb_addr_transform(SQN1);
  48. crb_addr_transform(SQN0);
  49. crb_addr_transform(SQS3);
  50. crb_addr_transform(SQS2);
  51. crb_addr_transform(SQS1);
  52. crb_addr_transform(SQS0);
  53. crb_addr_transform(RPMX7);
  54. crb_addr_transform(RPMX6);
  55. crb_addr_transform(RPMX5);
  56. crb_addr_transform(RPMX4);
  57. crb_addr_transform(RPMX3);
  58. crb_addr_transform(RPMX2);
  59. crb_addr_transform(RPMX1);
  60. crb_addr_transform(RPMX0);
  61. crb_addr_transform(ROMUSB);
  62. crb_addr_transform(SN);
  63. crb_addr_transform(QMN);
  64. crb_addr_transform(QMS);
  65. crb_addr_transform(PGNI);
  66. crb_addr_transform(PGND);
  67. crb_addr_transform(PGN3);
  68. crb_addr_transform(PGN2);
  69. crb_addr_transform(PGN1);
  70. crb_addr_transform(PGN0);
  71. crb_addr_transform(PGSI);
  72. crb_addr_transform(PGSD);
  73. crb_addr_transform(PGS3);
  74. crb_addr_transform(PGS2);
  75. crb_addr_transform(PGS1);
  76. crb_addr_transform(PGS0);
  77. crb_addr_transform(PS);
  78. crb_addr_transform(PH);
  79. crb_addr_transform(NIU);
  80. crb_addr_transform(I2Q);
  81. crb_addr_transform(EG);
  82. crb_addr_transform(MN);
  83. crb_addr_transform(MS);
  84. crb_addr_transform(CAS2);
  85. crb_addr_transform(CAS1);
  86. crb_addr_transform(CAS0);
  87. crb_addr_transform(CAM);
  88. crb_addr_transform(C2C1);
  89. crb_addr_transform(C2C0);
  90. crb_addr_transform(SMB);
  91. crb_addr_transform(OCM0);
  92. crb_addr_transform(I2C0);
  93. }
  94. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  95. {
  96. struct qlcnic_recv_context *recv_ctx;
  97. struct qlcnic_host_rds_ring *rds_ring;
  98. struct qlcnic_rx_buffer *rx_buf;
  99. int i, ring;
  100. recv_ctx = &adapter->recv_ctx;
  101. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  102. rds_ring = &recv_ctx->rds_rings[ring];
  103. for (i = 0; i < rds_ring->num_desc; ++i) {
  104. rx_buf = &(rds_ring->rx_buf_arr[i]);
  105. if (rx_buf->state == QLCNIC_BUFFER_FREE)
  106. continue;
  107. pci_unmap_single(adapter->pdev,
  108. rx_buf->dma,
  109. rds_ring->dma_size,
  110. PCI_DMA_FROMDEVICE);
  111. if (rx_buf->skb != NULL)
  112. dev_kfree_skb_any(rx_buf->skb);
  113. }
  114. }
  115. }
  116. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  117. {
  118. struct qlcnic_cmd_buffer *cmd_buf;
  119. struct qlcnic_skb_frag *buffrag;
  120. int i, j;
  121. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  122. cmd_buf = tx_ring->cmd_buf_arr;
  123. for (i = 0; i < tx_ring->num_desc; i++) {
  124. buffrag = cmd_buf->frag_array;
  125. if (buffrag->dma) {
  126. pci_unmap_single(adapter->pdev, buffrag->dma,
  127. buffrag->length, PCI_DMA_TODEVICE);
  128. buffrag->dma = 0ULL;
  129. }
  130. for (j = 0; j < cmd_buf->frag_count; j++) {
  131. buffrag++;
  132. if (buffrag->dma) {
  133. pci_unmap_page(adapter->pdev, buffrag->dma,
  134. buffrag->length,
  135. PCI_DMA_TODEVICE);
  136. buffrag->dma = 0ULL;
  137. }
  138. }
  139. if (cmd_buf->skb) {
  140. dev_kfree_skb_any(cmd_buf->skb);
  141. cmd_buf->skb = NULL;
  142. }
  143. cmd_buf++;
  144. }
  145. }
  146. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  147. {
  148. struct qlcnic_recv_context *recv_ctx;
  149. struct qlcnic_host_rds_ring *rds_ring;
  150. struct qlcnic_host_tx_ring *tx_ring;
  151. int ring;
  152. recv_ctx = &adapter->recv_ctx;
  153. if (recv_ctx->rds_rings == NULL)
  154. goto skip_rds;
  155. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  156. rds_ring = &recv_ctx->rds_rings[ring];
  157. vfree(rds_ring->rx_buf_arr);
  158. rds_ring->rx_buf_arr = NULL;
  159. }
  160. kfree(recv_ctx->rds_rings);
  161. skip_rds:
  162. if (adapter->tx_ring == NULL)
  163. return;
  164. tx_ring = adapter->tx_ring;
  165. vfree(tx_ring->cmd_buf_arr);
  166. kfree(adapter->tx_ring);
  167. }
  168. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  169. {
  170. struct qlcnic_recv_context *recv_ctx;
  171. struct qlcnic_host_rds_ring *rds_ring;
  172. struct qlcnic_host_sds_ring *sds_ring;
  173. struct qlcnic_host_tx_ring *tx_ring;
  174. struct qlcnic_rx_buffer *rx_buf;
  175. int ring, i, size;
  176. struct qlcnic_cmd_buffer *cmd_buf_arr;
  177. struct net_device *netdev = adapter->netdev;
  178. size = sizeof(struct qlcnic_host_tx_ring);
  179. tx_ring = kzalloc(size, GFP_KERNEL);
  180. if (tx_ring == NULL) {
  181. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  182. return -ENOMEM;
  183. }
  184. adapter->tx_ring = tx_ring;
  185. tx_ring->num_desc = adapter->num_txd;
  186. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  187. cmd_buf_arr = vmalloc(TX_BUFF_RINGSIZE(tx_ring));
  188. if (cmd_buf_arr == NULL) {
  189. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  190. return -ENOMEM;
  191. }
  192. memset(cmd_buf_arr, 0, TX_BUFF_RINGSIZE(tx_ring));
  193. tx_ring->cmd_buf_arr = cmd_buf_arr;
  194. recv_ctx = &adapter->recv_ctx;
  195. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  196. rds_ring = kzalloc(size, GFP_KERNEL);
  197. if (rds_ring == NULL) {
  198. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  199. return -ENOMEM;
  200. }
  201. recv_ctx->rds_rings = rds_ring;
  202. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  203. rds_ring = &recv_ctx->rds_rings[ring];
  204. switch (ring) {
  205. case RCV_RING_NORMAL:
  206. rds_ring->num_desc = adapter->num_rxd;
  207. if (adapter->ahw.cut_through) {
  208. rds_ring->dma_size =
  209. QLCNIC_CT_DEFAULT_RX_BUF_LEN;
  210. rds_ring->skb_size =
  211. QLCNIC_CT_DEFAULT_RX_BUF_LEN;
  212. } else {
  213. rds_ring->dma_size =
  214. QLCNIC_P3_RX_BUF_MAX_LEN;
  215. rds_ring->skb_size =
  216. rds_ring->dma_size + NET_IP_ALIGN;
  217. }
  218. break;
  219. case RCV_RING_JUMBO:
  220. rds_ring->num_desc = adapter->num_jumbo_rxd;
  221. rds_ring->dma_size =
  222. QLCNIC_P3_RX_JUMBO_BUF_MAX_LEN;
  223. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  224. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  225. rds_ring->skb_size =
  226. rds_ring->dma_size + NET_IP_ALIGN;
  227. break;
  228. case RCV_RING_LRO:
  229. rds_ring->num_desc = adapter->num_lro_rxd;
  230. rds_ring->dma_size = QLCNIC_RX_LRO_BUFFER_LENGTH;
  231. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  232. break;
  233. }
  234. rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
  235. vmalloc(RCV_BUFF_RINGSIZE(rds_ring));
  236. if (rds_ring->rx_buf_arr == NULL) {
  237. dev_err(&netdev->dev, "Failed to allocate "
  238. "rx buffer ring %d\n", ring);
  239. goto err_out;
  240. }
  241. memset(rds_ring->rx_buf_arr, 0, RCV_BUFF_RINGSIZE(rds_ring));
  242. INIT_LIST_HEAD(&rds_ring->free_list);
  243. /*
  244. * Now go through all of them, set reference handles
  245. * and put them in the queues.
  246. */
  247. rx_buf = rds_ring->rx_buf_arr;
  248. for (i = 0; i < rds_ring->num_desc; i++) {
  249. list_add_tail(&rx_buf->list,
  250. &rds_ring->free_list);
  251. rx_buf->ref_handle = i;
  252. rx_buf->state = QLCNIC_BUFFER_FREE;
  253. rx_buf++;
  254. }
  255. spin_lock_init(&rds_ring->lock);
  256. }
  257. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  258. sds_ring = &recv_ctx->sds_rings[ring];
  259. sds_ring->irq = adapter->msix_entries[ring].vector;
  260. sds_ring->adapter = adapter;
  261. sds_ring->num_desc = adapter->num_rxd;
  262. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  263. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  264. }
  265. return 0;
  266. err_out:
  267. qlcnic_free_sw_resources(adapter);
  268. return -ENOMEM;
  269. }
  270. /*
  271. * Utility to translate from internal Phantom CRB address
  272. * to external PCI CRB address.
  273. */
  274. static u32 qlcnic_decode_crb_addr(u32 addr)
  275. {
  276. int i;
  277. u32 base_addr, offset, pci_base;
  278. crb_addr_transform_setup();
  279. pci_base = QLCNIC_ADDR_ERROR;
  280. base_addr = addr & 0xfff00000;
  281. offset = addr & 0x000fffff;
  282. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  283. if (crb_addr_xform[i] == base_addr) {
  284. pci_base = i << 20;
  285. break;
  286. }
  287. }
  288. if (pci_base == QLCNIC_ADDR_ERROR)
  289. return pci_base;
  290. else
  291. return pci_base + offset;
  292. }
  293. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  294. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  295. {
  296. long timeout = 0;
  297. long done = 0;
  298. cond_resched();
  299. while (done == 0) {
  300. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  301. done &= 2;
  302. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  303. dev_err(&adapter->pdev->dev,
  304. "Timeout reached waiting for rom done");
  305. return -EIO;
  306. }
  307. udelay(1);
  308. }
  309. return 0;
  310. }
  311. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  312. int addr, int *valp)
  313. {
  314. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  315. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  316. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  317. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  318. if (qlcnic_wait_rom_done(adapter)) {
  319. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  320. return -EIO;
  321. }
  322. /* reset abyte_cnt and dummy_byte_cnt */
  323. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  324. udelay(10);
  325. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  326. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  327. return 0;
  328. }
  329. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  330. u8 *bytes, size_t size)
  331. {
  332. int addridx;
  333. int ret = 0;
  334. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  335. int v;
  336. ret = do_rom_fast_read(adapter, addridx, &v);
  337. if (ret != 0)
  338. break;
  339. *(__le32 *)bytes = cpu_to_le32(v);
  340. bytes += 4;
  341. }
  342. return ret;
  343. }
  344. int
  345. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  346. u8 *bytes, size_t size)
  347. {
  348. int ret;
  349. ret = qlcnic_rom_lock(adapter);
  350. if (ret < 0)
  351. return ret;
  352. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  353. qlcnic_rom_unlock(adapter);
  354. return ret;
  355. }
  356. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  357. {
  358. int ret;
  359. if (qlcnic_rom_lock(adapter) != 0)
  360. return -EIO;
  361. ret = do_rom_fast_read(adapter, addr, valp);
  362. qlcnic_rom_unlock(adapter);
  363. return ret;
  364. }
  365. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  366. {
  367. int addr, val;
  368. int i, n, init_delay;
  369. struct crb_addr_pair *buf;
  370. unsigned offset;
  371. u32 off;
  372. struct pci_dev *pdev = adapter->pdev;
  373. /* resetall */
  374. qlcnic_rom_lock(adapter);
  375. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xffffffff);
  376. qlcnic_rom_unlock(adapter);
  377. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  378. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  379. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  380. return -EIO;
  381. }
  382. offset = n & 0xffffU;
  383. n = (n >> 16) & 0xffffU;
  384. if (n >= 1024) {
  385. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  386. return -EIO;
  387. }
  388. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  389. if (buf == NULL) {
  390. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  391. return -ENOMEM;
  392. }
  393. for (i = 0; i < n; i++) {
  394. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  395. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  396. kfree(buf);
  397. return -EIO;
  398. }
  399. buf[i].addr = addr;
  400. buf[i].data = val;
  401. }
  402. for (i = 0; i < n; i++) {
  403. off = qlcnic_decode_crb_addr(buf[i].addr);
  404. if (off == QLCNIC_ADDR_ERROR) {
  405. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  406. buf[i].addr);
  407. continue;
  408. }
  409. off += QLCNIC_PCI_CRBSPACE;
  410. if (off & 1)
  411. continue;
  412. /* skipping cold reboot MAGIC */
  413. if (off == QLCNIC_CAM_RAM(0x1fc))
  414. continue;
  415. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  416. continue;
  417. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  418. continue;
  419. if (off == (ROMUSB_GLB + 0xa8))
  420. continue;
  421. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  422. continue;
  423. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  424. continue;
  425. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  426. continue;
  427. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  428. continue;
  429. /* skip the function enable register */
  430. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  431. continue;
  432. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  433. continue;
  434. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  435. continue;
  436. init_delay = 1;
  437. /* After writing this register, HW needs time for CRB */
  438. /* to quiet down (else crb_window returns 0xffffffff) */
  439. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  440. init_delay = 1000;
  441. QLCWR32(adapter, off, buf[i].data);
  442. msleep(init_delay);
  443. }
  444. kfree(buf);
  445. /* p2dn replyCount */
  446. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  447. /* disable_peg_cache 0 & 1*/
  448. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  449. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  450. /* peg_clr_all */
  451. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  452. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  453. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  454. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  455. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  456. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  457. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  458. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  459. return 0;
  460. }
  461. static int
  462. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  463. {
  464. u32 capability, flashed_ver;
  465. capability = 0;
  466. qlcnic_rom_fast_read(adapter,
  467. QLCNIC_FW_VERSION_OFFSET, (int *)&flashed_ver);
  468. flashed_ver = QLCNIC_DECODE_VERSION(flashed_ver);
  469. if (flashed_ver >= QLCNIC_VERSION_CODE(4, 0, 220)) {
  470. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  471. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  472. return 1;
  473. }
  474. return 0;
  475. }
  476. static
  477. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  478. {
  479. u32 i;
  480. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  481. __le32 entries = cpu_to_le32(directory->num_entries);
  482. for (i = 0; i < entries; i++) {
  483. __le32 offs = cpu_to_le32(directory->findex) +
  484. (i * cpu_to_le32(directory->entry_size));
  485. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  486. if (tab_type == section)
  487. return (struct uni_table_desc *) &unirom[offs];
  488. }
  489. return NULL;
  490. }
  491. #define FILEHEADER_SIZE (14 * 4)
  492. static int
  493. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  494. {
  495. const u8 *unirom = adapter->fw->data;
  496. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  497. __le32 fw_file_size = adapter->fw->size;
  498. __le32 entries;
  499. __le32 entry_size;
  500. __le32 tab_size;
  501. if (fw_file_size < FILEHEADER_SIZE)
  502. return -EINVAL;
  503. entries = cpu_to_le32(directory->num_entries);
  504. entry_size = cpu_to_le32(directory->entry_size);
  505. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  506. if (fw_file_size < tab_size)
  507. return -EINVAL;
  508. return 0;
  509. }
  510. static int
  511. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  512. {
  513. struct uni_table_desc *tab_desc;
  514. struct uni_data_desc *descr;
  515. const u8 *unirom = adapter->fw->data;
  516. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  517. QLCNIC_UNI_BOOTLD_IDX_OFF));
  518. __le32 offs;
  519. __le32 tab_size;
  520. __le32 data_size;
  521. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  522. if (!tab_desc)
  523. return -EINVAL;
  524. tab_size = cpu_to_le32(tab_desc->findex) +
  525. (cpu_to_le32(tab_desc->entry_size * (idx + 1)));
  526. if (adapter->fw->size < tab_size)
  527. return -EINVAL;
  528. offs = cpu_to_le32(tab_desc->findex) +
  529. (cpu_to_le32(tab_desc->entry_size) * (idx));
  530. descr = (struct uni_data_desc *)&unirom[offs];
  531. data_size = descr->findex + cpu_to_le32(descr->size);
  532. if (adapter->fw->size < data_size)
  533. return -EINVAL;
  534. return 0;
  535. }
  536. static int
  537. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  538. {
  539. struct uni_table_desc *tab_desc;
  540. struct uni_data_desc *descr;
  541. const u8 *unirom = adapter->fw->data;
  542. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  543. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  544. __le32 offs;
  545. __le32 tab_size;
  546. __le32 data_size;
  547. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  548. if (!tab_desc)
  549. return -EINVAL;
  550. tab_size = cpu_to_le32(tab_desc->findex) +
  551. (cpu_to_le32(tab_desc->entry_size * (idx + 1)));
  552. if (adapter->fw->size < tab_size)
  553. return -EINVAL;
  554. offs = cpu_to_le32(tab_desc->findex) +
  555. (cpu_to_le32(tab_desc->entry_size) * (idx));
  556. descr = (struct uni_data_desc *)&unirom[offs];
  557. data_size = descr->findex + cpu_to_le32(descr->size);
  558. if (adapter->fw->size < data_size)
  559. return -EINVAL;
  560. return 0;
  561. }
  562. static int
  563. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  564. {
  565. struct uni_table_desc *ptab_descr;
  566. const u8 *unirom = adapter->fw->data;
  567. int mn_present = qlcnic_has_mn(adapter);
  568. __le32 entries;
  569. __le32 entry_size;
  570. __le32 tab_size;
  571. u32 i;
  572. ptab_descr = qlcnic_get_table_desc(unirom,
  573. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  574. if (!ptab_descr)
  575. return -EINVAL;
  576. entries = cpu_to_le32(ptab_descr->num_entries);
  577. entry_size = cpu_to_le32(ptab_descr->entry_size);
  578. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  579. if (adapter->fw->size < tab_size)
  580. return -EINVAL;
  581. nomn:
  582. for (i = 0; i < entries; i++) {
  583. __le32 flags, file_chiprev, offs;
  584. u8 chiprev = adapter->ahw.revision_id;
  585. u32 flagbit;
  586. offs = cpu_to_le32(ptab_descr->findex) +
  587. (i * cpu_to_le32(ptab_descr->entry_size));
  588. flags = cpu_to_le32(*((int *)&unirom[offs] +
  589. QLCNIC_UNI_FLAGS_OFF));
  590. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  591. QLCNIC_UNI_CHIP_REV_OFF));
  592. flagbit = mn_present ? 1 : 2;
  593. if ((chiprev == file_chiprev) &&
  594. ((1ULL << flagbit) & flags)) {
  595. adapter->file_prd_off = offs;
  596. return 0;
  597. }
  598. }
  599. if (mn_present) {
  600. mn_present = 0;
  601. goto nomn;
  602. }
  603. return -EINVAL;
  604. }
  605. static int
  606. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  607. {
  608. if (qlcnic_validate_header(adapter)) {
  609. dev_err(&adapter->pdev->dev,
  610. "unified image: header validation failed\n");
  611. return -EINVAL;
  612. }
  613. if (qlcnic_validate_product_offs(adapter)) {
  614. dev_err(&adapter->pdev->dev,
  615. "unified image: product validation failed\n");
  616. return -EINVAL;
  617. }
  618. if (qlcnic_validate_bootld(adapter)) {
  619. dev_err(&adapter->pdev->dev,
  620. "unified image: bootld validation failed\n");
  621. return -EINVAL;
  622. }
  623. if (qlcnic_validate_fw(adapter)) {
  624. dev_err(&adapter->pdev->dev,
  625. "unified image: firmware validation failed\n");
  626. return -EINVAL;
  627. }
  628. return 0;
  629. }
  630. static
  631. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  632. u32 section, u32 idx_offset)
  633. {
  634. const u8 *unirom = adapter->fw->data;
  635. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  636. idx_offset));
  637. struct uni_table_desc *tab_desc;
  638. __le32 offs;
  639. tab_desc = qlcnic_get_table_desc(unirom, section);
  640. if (tab_desc == NULL)
  641. return NULL;
  642. offs = cpu_to_le32(tab_desc->findex) +
  643. (cpu_to_le32(tab_desc->entry_size) * idx);
  644. return (struct uni_data_desc *)&unirom[offs];
  645. }
  646. static u8 *
  647. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  648. {
  649. u32 offs = QLCNIC_BOOTLD_START;
  650. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  651. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  652. QLCNIC_UNI_DIR_SECT_BOOTLD,
  653. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  654. return (u8 *)&adapter->fw->data[offs];
  655. }
  656. static u8 *
  657. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  658. {
  659. u32 offs = QLCNIC_IMAGE_START;
  660. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  661. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  662. QLCNIC_UNI_DIR_SECT_FW,
  663. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  664. return (u8 *)&adapter->fw->data[offs];
  665. }
  666. static __le32
  667. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  668. {
  669. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  670. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  671. QLCNIC_UNI_DIR_SECT_FW,
  672. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  673. else
  674. return cpu_to_le32(
  675. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  676. }
  677. static __le32
  678. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  679. {
  680. struct uni_data_desc *fw_data_desc;
  681. const struct firmware *fw = adapter->fw;
  682. __le32 major, minor, sub;
  683. const u8 *ver_str;
  684. int i, ret;
  685. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  686. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  687. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  688. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  689. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  690. cpu_to_le32(fw_data_desc->size) - 17;
  691. for (i = 0; i < 12; i++) {
  692. if (!strncmp(&ver_str[i], "REV=", 4)) {
  693. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  694. &major, &minor, &sub);
  695. if (ret != 3)
  696. return 0;
  697. else
  698. return major + (minor << 8) + (sub << 16);
  699. }
  700. }
  701. return 0;
  702. }
  703. static __le32
  704. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  705. {
  706. const struct firmware *fw = adapter->fw;
  707. __le32 bios_ver, prd_off = adapter->file_prd_off;
  708. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  709. return cpu_to_le32(
  710. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  711. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  712. + QLCNIC_UNI_BIOS_VERSION_OFF));
  713. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  714. }
  715. int
  716. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  717. {
  718. u32 count, old_count;
  719. u32 val, version, major, minor, build;
  720. int i, timeout;
  721. if (adapter->need_fw_reset)
  722. return 1;
  723. /* last attempt had failed */
  724. if (QLCRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
  725. return 1;
  726. old_count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  727. for (i = 0; i < 10; i++) {
  728. timeout = msleep_interruptible(200);
  729. if (timeout) {
  730. QLCWR32(adapter, CRB_CMDPEG_STATE,
  731. PHAN_INITIALIZE_FAILED);
  732. return -EINTR;
  733. }
  734. count = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  735. if (count != old_count)
  736. break;
  737. }
  738. /* firmware is dead */
  739. if (count == old_count)
  740. return 1;
  741. /* check if we have got newer or different file firmware */
  742. if (adapter->fw) {
  743. val = qlcnic_get_fw_version(adapter);
  744. version = QLCNIC_DECODE_VERSION(val);
  745. major = QLCRD32(adapter, QLCNIC_FW_VERSION_MAJOR);
  746. minor = QLCRD32(adapter, QLCNIC_FW_VERSION_MINOR);
  747. build = QLCRD32(adapter, QLCNIC_FW_VERSION_SUB);
  748. if (version > QLCNIC_VERSION_CODE(major, minor, build))
  749. return 1;
  750. }
  751. return 0;
  752. }
  753. static const char *fw_name[] = {
  754. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  755. QLCNIC_FLASH_ROMIMAGE_NAME,
  756. };
  757. int
  758. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  759. {
  760. u64 *ptr64;
  761. u32 i, flashaddr, size;
  762. const struct firmware *fw = adapter->fw;
  763. struct pci_dev *pdev = adapter->pdev;
  764. dev_info(&pdev->dev, "loading firmware from %s\n",
  765. fw_name[adapter->fw_type]);
  766. if (fw) {
  767. __le64 data;
  768. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  769. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  770. flashaddr = QLCNIC_BOOTLD_START;
  771. for (i = 0; i < size; i++) {
  772. data = cpu_to_le64(ptr64[i]);
  773. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  774. return -EIO;
  775. flashaddr += 8;
  776. }
  777. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  778. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  779. flashaddr = QLCNIC_IMAGE_START;
  780. for (i = 0; i < size; i++) {
  781. data = cpu_to_le64(ptr64[i]);
  782. if (qlcnic_pci_mem_write_2M(adapter,
  783. flashaddr, data))
  784. return -EIO;
  785. flashaddr += 8;
  786. }
  787. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  788. if (size) {
  789. data = cpu_to_le64(ptr64[i]);
  790. if (qlcnic_pci_mem_write_2M(adapter,
  791. flashaddr, data))
  792. return -EIO;
  793. }
  794. } else {
  795. u64 data;
  796. u32 hi, lo;
  797. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  798. flashaddr = QLCNIC_BOOTLD_START;
  799. for (i = 0; i < size; i++) {
  800. if (qlcnic_rom_fast_read(adapter,
  801. flashaddr, (int *)&lo) != 0)
  802. return -EIO;
  803. if (qlcnic_rom_fast_read(adapter,
  804. flashaddr + 4, (int *)&hi) != 0)
  805. return -EIO;
  806. data = (((u64)hi << 32) | lo);
  807. if (qlcnic_pci_mem_write_2M(adapter,
  808. flashaddr, data))
  809. return -EIO;
  810. flashaddr += 8;
  811. }
  812. }
  813. msleep(1);
  814. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  815. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  816. return 0;
  817. }
  818. static int
  819. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  820. {
  821. __le32 val;
  822. u32 ver, min_ver, bios, min_size;
  823. struct pci_dev *pdev = adapter->pdev;
  824. const struct firmware *fw = adapter->fw;
  825. u8 fw_type = adapter->fw_type;
  826. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  827. if (qlcnic_validate_unified_romimage(adapter))
  828. return -EINVAL;
  829. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  830. } else {
  831. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  832. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  833. return -EINVAL;
  834. min_size = QLCNIC_FW_MIN_SIZE;
  835. }
  836. if (fw->size < min_size)
  837. return -EINVAL;
  838. val = qlcnic_get_fw_version(adapter);
  839. min_ver = QLCNIC_VERSION_CODE(4, 0, 216);
  840. ver = QLCNIC_DECODE_VERSION(val);
  841. if ((_major(ver) > _QLCNIC_LINUX_MAJOR) || (ver < min_ver)) {
  842. dev_err(&pdev->dev,
  843. "%s: firmware version %d.%d.%d unsupported\n",
  844. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  845. return -EINVAL;
  846. }
  847. val = qlcnic_get_bios_version(adapter);
  848. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  849. if ((__force u32)val != bios) {
  850. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  851. fw_name[fw_type]);
  852. return -EINVAL;
  853. }
  854. /* check if flashed firmware is newer */
  855. if (qlcnic_rom_fast_read(adapter,
  856. QLCNIC_FW_VERSION_OFFSET, (int *)&val))
  857. return -EIO;
  858. val = QLCNIC_DECODE_VERSION(val);
  859. if (val > ver) {
  860. dev_info(&pdev->dev, "%s: firmware is older than flash\n",
  861. fw_name[fw_type]);
  862. return -EINVAL;
  863. }
  864. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  865. return 0;
  866. }
  867. static void
  868. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  869. {
  870. u8 fw_type;
  871. switch (adapter->fw_type) {
  872. case QLCNIC_UNKNOWN_ROMIMAGE:
  873. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  874. break;
  875. case QLCNIC_UNIFIED_ROMIMAGE:
  876. default:
  877. fw_type = QLCNIC_FLASH_ROMIMAGE;
  878. break;
  879. }
  880. adapter->fw_type = fw_type;
  881. }
  882. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  883. {
  884. struct pci_dev *pdev = adapter->pdev;
  885. int rc;
  886. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  887. next:
  888. qlcnic_get_next_fwtype(adapter);
  889. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  890. adapter->fw = NULL;
  891. } else {
  892. rc = request_firmware(&adapter->fw,
  893. fw_name[adapter->fw_type], &pdev->dev);
  894. if (rc != 0)
  895. goto next;
  896. rc = qlcnic_validate_firmware(adapter);
  897. if (rc != 0) {
  898. release_firmware(adapter->fw);
  899. msleep(1);
  900. goto next;
  901. }
  902. }
  903. }
  904. void
  905. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  906. {
  907. if (adapter->fw)
  908. release_firmware(adapter->fw);
  909. adapter->fw = NULL;
  910. }
  911. int qlcnic_phantom_init(struct qlcnic_adapter *adapter)
  912. {
  913. u32 val;
  914. int retries = 60;
  915. do {
  916. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  917. switch (val) {
  918. case PHAN_INITIALIZE_COMPLETE:
  919. case PHAN_INITIALIZE_ACK:
  920. return 0;
  921. case PHAN_INITIALIZE_FAILED:
  922. goto out_err;
  923. default:
  924. break;
  925. }
  926. msleep(500);
  927. } while (--retries);
  928. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  929. out_err:
  930. dev_err(&adapter->pdev->dev, "firmware init failed\n");
  931. return -EIO;
  932. }
  933. static int
  934. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  935. {
  936. u32 val;
  937. int retries = 2000;
  938. do {
  939. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  940. if (val == PHAN_PEG_RCV_INITIALIZED)
  941. return 0;
  942. msleep(10);
  943. } while (--retries);
  944. if (!retries) {
  945. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  946. "complete, state: 0x%x.\n", val);
  947. return -EIO;
  948. }
  949. return 0;
  950. }
  951. int qlcnic_init_firmware(struct qlcnic_adapter *adapter)
  952. {
  953. int err;
  954. err = qlcnic_receive_peg_ready(adapter);
  955. if (err)
  956. return err;
  957. QLCWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
  958. QLCWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
  959. QLCWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
  960. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  961. return err;
  962. }
  963. static void
  964. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  965. struct qlcnic_fw_msg *msg)
  966. {
  967. u32 cable_OUI;
  968. u16 cable_len;
  969. u16 link_speed;
  970. u8 link_status, module, duplex, autoneg;
  971. struct net_device *netdev = adapter->netdev;
  972. adapter->has_link_events = 1;
  973. cable_OUI = msg->body[1] & 0xffffffff;
  974. cable_len = (msg->body[1] >> 32) & 0xffff;
  975. link_speed = (msg->body[1] >> 48) & 0xffff;
  976. link_status = msg->body[2] & 0xff;
  977. duplex = (msg->body[2] >> 16) & 0xff;
  978. autoneg = (msg->body[2] >> 24) & 0xff;
  979. module = (msg->body[2] >> 8) & 0xff;
  980. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  981. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  982. "length %d\n", cable_OUI, cable_len);
  983. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  984. dev_info(&netdev->dev, "unsupported cable length %d\n",
  985. cable_len);
  986. qlcnic_advert_link_change(adapter, link_status);
  987. if (duplex == LINKEVENT_FULL_DUPLEX)
  988. adapter->link_duplex = DUPLEX_FULL;
  989. else
  990. adapter->link_duplex = DUPLEX_HALF;
  991. adapter->module_type = module;
  992. adapter->link_autoneg = autoneg;
  993. adapter->link_speed = link_speed;
  994. }
  995. static void
  996. qlcnic_handle_fw_message(int desc_cnt, int index,
  997. struct qlcnic_host_sds_ring *sds_ring)
  998. {
  999. struct qlcnic_fw_msg msg;
  1000. struct status_desc *desc;
  1001. int i = 0, opcode;
  1002. while (desc_cnt > 0 && i < 8) {
  1003. desc = &sds_ring->desc_head[index];
  1004. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1005. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1006. index = get_next_index(index, sds_ring->num_desc);
  1007. desc_cnt--;
  1008. }
  1009. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1010. switch (opcode) {
  1011. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1012. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1013. break;
  1014. default:
  1015. break;
  1016. }
  1017. }
  1018. static int
  1019. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1020. struct qlcnic_host_rds_ring *rds_ring,
  1021. struct qlcnic_rx_buffer *buffer)
  1022. {
  1023. struct sk_buff *skb;
  1024. dma_addr_t dma;
  1025. struct pci_dev *pdev = adapter->pdev;
  1026. buffer->skb = dev_alloc_skb(rds_ring->skb_size);
  1027. if (!buffer->skb) {
  1028. adapter->stats.skb_alloc_failure++;
  1029. return -ENOMEM;
  1030. }
  1031. skb = buffer->skb;
  1032. if (!adapter->ahw.cut_through)
  1033. skb_reserve(skb, 2);
  1034. dma = pci_map_single(pdev, skb->data,
  1035. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1036. if (pci_dma_mapping_error(pdev, dma)) {
  1037. dev_kfree_skb_any(skb);
  1038. buffer->skb = NULL;
  1039. return -ENOMEM;
  1040. }
  1041. buffer->skb = skb;
  1042. buffer->dma = dma;
  1043. buffer->state = QLCNIC_BUFFER_BUSY;
  1044. return 0;
  1045. }
  1046. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1047. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1048. {
  1049. struct qlcnic_rx_buffer *buffer;
  1050. struct sk_buff *skb;
  1051. buffer = &rds_ring->rx_buf_arr[index];
  1052. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1053. PCI_DMA_FROMDEVICE);
  1054. skb = buffer->skb;
  1055. if (!skb)
  1056. goto no_skb;
  1057. if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
  1058. adapter->stats.csummed++;
  1059. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1060. } else {
  1061. skb->ip_summed = CHECKSUM_NONE;
  1062. }
  1063. skb->dev = adapter->netdev;
  1064. buffer->skb = NULL;
  1065. no_skb:
  1066. buffer->state = QLCNIC_BUFFER_FREE;
  1067. return skb;
  1068. }
  1069. static struct qlcnic_rx_buffer *
  1070. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1071. struct qlcnic_host_sds_ring *sds_ring,
  1072. int ring, u64 sts_data0)
  1073. {
  1074. struct net_device *netdev = adapter->netdev;
  1075. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1076. struct qlcnic_rx_buffer *buffer;
  1077. struct sk_buff *skb;
  1078. struct qlcnic_host_rds_ring *rds_ring;
  1079. int index, length, cksum, pkt_offset;
  1080. if (unlikely(ring >= adapter->max_rds_rings))
  1081. return NULL;
  1082. rds_ring = &recv_ctx->rds_rings[ring];
  1083. index = qlcnic_get_sts_refhandle(sts_data0);
  1084. if (unlikely(index >= rds_ring->num_desc))
  1085. return NULL;
  1086. buffer = &rds_ring->rx_buf_arr[index];
  1087. length = qlcnic_get_sts_totallength(sts_data0);
  1088. cksum = qlcnic_get_sts_status(sts_data0);
  1089. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1090. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1091. if (!skb)
  1092. return buffer;
  1093. if (length > rds_ring->skb_size)
  1094. skb_put(skb, rds_ring->skb_size);
  1095. else
  1096. skb_put(skb, length);
  1097. if (pkt_offset)
  1098. skb_pull(skb, pkt_offset);
  1099. skb->truesize = skb->len + sizeof(struct sk_buff);
  1100. skb->protocol = eth_type_trans(skb, netdev);
  1101. napi_gro_receive(&sds_ring->napi, skb);
  1102. adapter->stats.rx_pkts++;
  1103. adapter->stats.rxbytes += length;
  1104. return buffer;
  1105. }
  1106. #define QLC_TCP_HDR_SIZE 20
  1107. #define QLC_TCP_TS_OPTION_SIZE 12
  1108. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1109. static struct qlcnic_rx_buffer *
  1110. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1111. struct qlcnic_host_sds_ring *sds_ring,
  1112. int ring, u64 sts_data0, u64 sts_data1)
  1113. {
  1114. struct net_device *netdev = adapter->netdev;
  1115. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1116. struct qlcnic_rx_buffer *buffer;
  1117. struct sk_buff *skb;
  1118. struct qlcnic_host_rds_ring *rds_ring;
  1119. struct iphdr *iph;
  1120. struct tcphdr *th;
  1121. bool push, timestamp;
  1122. int l2_hdr_offset, l4_hdr_offset;
  1123. int index;
  1124. u16 lro_length, length, data_offset;
  1125. u32 seq_number;
  1126. if (unlikely(ring > adapter->max_rds_rings))
  1127. return NULL;
  1128. rds_ring = &recv_ctx->rds_rings[ring];
  1129. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1130. if (unlikely(index > rds_ring->num_desc))
  1131. return NULL;
  1132. buffer = &rds_ring->rx_buf_arr[index];
  1133. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1134. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1135. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1136. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1137. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1138. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1139. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1140. if (!skb)
  1141. return buffer;
  1142. if (timestamp)
  1143. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1144. else
  1145. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1146. skb_put(skb, lro_length + data_offset);
  1147. skb->truesize = skb->len + sizeof(struct sk_buff) + skb_headroom(skb);
  1148. skb_pull(skb, l2_hdr_offset);
  1149. skb->protocol = eth_type_trans(skb, netdev);
  1150. iph = (struct iphdr *)skb->data;
  1151. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1152. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1153. iph->tot_len = htons(length);
  1154. iph->check = 0;
  1155. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1156. th->psh = push;
  1157. th->seq = htonl(seq_number);
  1158. length = skb->len;
  1159. netif_receive_skb(skb);
  1160. adapter->stats.lro_pkts++;
  1161. adapter->stats.lrobytes += length;
  1162. return buffer;
  1163. }
  1164. int
  1165. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1166. {
  1167. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1168. struct list_head *cur;
  1169. struct status_desc *desc;
  1170. struct qlcnic_rx_buffer *rxbuf;
  1171. u64 sts_data0, sts_data1;
  1172. int count = 0;
  1173. int opcode, ring, desc_cnt;
  1174. u32 consumer = sds_ring->consumer;
  1175. while (count < max) {
  1176. desc = &sds_ring->desc_head[consumer];
  1177. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1178. if (!(sts_data0 & STATUS_OWNER_HOST))
  1179. break;
  1180. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1181. opcode = qlcnic_get_sts_opcode(sts_data0);
  1182. switch (opcode) {
  1183. case QLCNIC_RXPKT_DESC:
  1184. case QLCNIC_OLD_RXPKT_DESC:
  1185. case QLCNIC_SYN_OFFLOAD:
  1186. ring = qlcnic_get_sts_type(sts_data0);
  1187. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1188. ring, sts_data0);
  1189. break;
  1190. case QLCNIC_LRO_DESC:
  1191. ring = qlcnic_get_lro_sts_type(sts_data0);
  1192. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1193. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1194. ring, sts_data0, sts_data1);
  1195. break;
  1196. case QLCNIC_RESPONSE_DESC:
  1197. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1198. default:
  1199. goto skip;
  1200. }
  1201. WARN_ON(desc_cnt > 1);
  1202. if (rxbuf)
  1203. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1204. skip:
  1205. for (; desc_cnt > 0; desc_cnt--) {
  1206. desc = &sds_ring->desc_head[consumer];
  1207. desc->status_desc_data[0] =
  1208. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1209. consumer = get_next_index(consumer, sds_ring->num_desc);
  1210. }
  1211. count++;
  1212. }
  1213. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1214. struct qlcnic_host_rds_ring *rds_ring =
  1215. &adapter->recv_ctx.rds_rings[ring];
  1216. if (!list_empty(&sds_ring->free_list[ring])) {
  1217. list_for_each(cur, &sds_ring->free_list[ring]) {
  1218. rxbuf = list_entry(cur,
  1219. struct qlcnic_rx_buffer, list);
  1220. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1221. }
  1222. spin_lock(&rds_ring->lock);
  1223. list_splice_tail_init(&sds_ring->free_list[ring],
  1224. &rds_ring->free_list);
  1225. spin_unlock(&rds_ring->lock);
  1226. }
  1227. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1228. }
  1229. if (count) {
  1230. sds_ring->consumer = consumer;
  1231. writel(consumer, sds_ring->crb_sts_consumer);
  1232. }
  1233. return count;
  1234. }
  1235. void
  1236. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1237. struct qlcnic_host_rds_ring *rds_ring)
  1238. {
  1239. struct rcv_desc *pdesc;
  1240. struct qlcnic_rx_buffer *buffer;
  1241. int producer, count = 0;
  1242. struct list_head *head;
  1243. producer = rds_ring->producer;
  1244. spin_lock(&rds_ring->lock);
  1245. head = &rds_ring->free_list;
  1246. while (!list_empty(head)) {
  1247. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1248. if (!buffer->skb) {
  1249. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1250. break;
  1251. }
  1252. count++;
  1253. list_del(&buffer->list);
  1254. /* make a rcv descriptor */
  1255. pdesc = &rds_ring->desc_head[producer];
  1256. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1257. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1258. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1259. producer = get_next_index(producer, rds_ring->num_desc);
  1260. }
  1261. spin_unlock(&rds_ring->lock);
  1262. if (count) {
  1263. rds_ring->producer = producer;
  1264. writel((producer-1) & (rds_ring->num_desc-1),
  1265. rds_ring->crb_rcv_producer);
  1266. }
  1267. }
  1268. static void
  1269. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1270. struct qlcnic_host_rds_ring *rds_ring)
  1271. {
  1272. struct rcv_desc *pdesc;
  1273. struct qlcnic_rx_buffer *buffer;
  1274. int producer, count = 0;
  1275. struct list_head *head;
  1276. producer = rds_ring->producer;
  1277. if (!spin_trylock(&rds_ring->lock))
  1278. return;
  1279. head = &rds_ring->free_list;
  1280. while (!list_empty(head)) {
  1281. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1282. if (!buffer->skb) {
  1283. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1284. break;
  1285. }
  1286. count++;
  1287. list_del(&buffer->list);
  1288. /* make a rcv descriptor */
  1289. pdesc = &rds_ring->desc_head[producer];
  1290. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1291. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1292. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1293. producer = get_next_index(producer, rds_ring->num_desc);
  1294. }
  1295. if (count) {
  1296. rds_ring->producer = producer;
  1297. writel((producer - 1) & (rds_ring->num_desc - 1),
  1298. rds_ring->crb_rcv_producer);
  1299. }
  1300. spin_unlock(&rds_ring->lock);
  1301. }
  1302. static struct qlcnic_rx_buffer *
  1303. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1304. struct qlcnic_host_sds_ring *sds_ring,
  1305. int ring, u64 sts_data0)
  1306. {
  1307. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1308. struct qlcnic_rx_buffer *buffer;
  1309. struct sk_buff *skb;
  1310. struct qlcnic_host_rds_ring *rds_ring;
  1311. int index, length, cksum, pkt_offset;
  1312. if (unlikely(ring >= adapter->max_rds_rings))
  1313. return NULL;
  1314. rds_ring = &recv_ctx->rds_rings[ring];
  1315. index = qlcnic_get_sts_refhandle(sts_data0);
  1316. if (unlikely(index >= rds_ring->num_desc))
  1317. return NULL;
  1318. buffer = &rds_ring->rx_buf_arr[index];
  1319. length = qlcnic_get_sts_totallength(sts_data0);
  1320. cksum = qlcnic_get_sts_status(sts_data0);
  1321. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1322. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1323. if (!skb)
  1324. return buffer;
  1325. skb_put(skb, rds_ring->skb_size);
  1326. if (pkt_offset)
  1327. skb_pull(skb, pkt_offset);
  1328. skb->truesize = skb->len + sizeof(struct sk_buff);
  1329. if (!qlcnic_check_loopback_buff(skb->data))
  1330. adapter->diag_cnt++;
  1331. dev_kfree_skb_any(skb);
  1332. adapter->stats.rx_pkts++;
  1333. adapter->stats.rxbytes += length;
  1334. return buffer;
  1335. }
  1336. void
  1337. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1338. {
  1339. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1340. struct status_desc *desc;
  1341. struct qlcnic_rx_buffer *rxbuf;
  1342. u64 sts_data0;
  1343. int opcode, ring, desc_cnt;
  1344. u32 consumer = sds_ring->consumer;
  1345. desc = &sds_ring->desc_head[consumer];
  1346. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1347. if (!(sts_data0 & STATUS_OWNER_HOST))
  1348. return;
  1349. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1350. opcode = qlcnic_get_sts_opcode(sts_data0);
  1351. ring = qlcnic_get_sts_type(sts_data0);
  1352. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1353. ring, sts_data0);
  1354. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1355. consumer = get_next_index(consumer, sds_ring->num_desc);
  1356. sds_ring->consumer = consumer;
  1357. writel(consumer, sds_ring->crb_sts_consumer);
  1358. }