board-da850-evm.c 17 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/mfd/tps6507x.h>
  21. #include <linux/gpio.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/nand.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/mtd/physmap.h>
  27. #include <linux/regulator/machine.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <mach/cp_intc.h>
  31. #include <mach/da8xx.h>
  32. #include <mach/nand.h>
  33. #include <mach/mux.h>
  34. #define DA850_EVM_PHY_MASK 0x1
  35. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  36. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  37. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  38. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  39. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  40. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  41. static struct mtd_partition da850_evm_norflash_partition[] = {
  42. {
  43. .name = "bootloaders + env",
  44. .offset = 0,
  45. .size = SZ_512K,
  46. .mask_flags = MTD_WRITEABLE,
  47. },
  48. {
  49. .name = "kernel",
  50. .offset = MTDPART_OFS_APPEND,
  51. .size = SZ_2M,
  52. .mask_flags = 0,
  53. },
  54. {
  55. .name = "filesystem",
  56. .offset = MTDPART_OFS_APPEND,
  57. .size = MTDPART_SIZ_FULL,
  58. .mask_flags = 0,
  59. },
  60. };
  61. static struct physmap_flash_data da850_evm_norflash_data = {
  62. .width = 2,
  63. .parts = da850_evm_norflash_partition,
  64. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  65. };
  66. static struct resource da850_evm_norflash_resource[] = {
  67. {
  68. .start = DA8XX_AEMIF_CS2_BASE,
  69. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  70. .flags = IORESOURCE_MEM,
  71. },
  72. };
  73. static struct platform_device da850_evm_norflash_device = {
  74. .name = "physmap-flash",
  75. .id = 0,
  76. .dev = {
  77. .platform_data = &da850_evm_norflash_data,
  78. },
  79. .num_resources = 1,
  80. .resource = da850_evm_norflash_resource,
  81. };
  82. static struct davinci_pm_config da850_pm_pdata = {
  83. .sleepcount = 128,
  84. };
  85. static struct platform_device da850_pm_device = {
  86. .name = "pm-davinci",
  87. .dev = {
  88. .platform_data = &da850_pm_pdata,
  89. },
  90. .id = -1,
  91. };
  92. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  93. * (128K blocks). It may be used instead of the (default) SPI flash
  94. * to boot, using TI's tools to install the secondary boot loader
  95. * (UBL) and U-Boot.
  96. */
  97. struct mtd_partition da850_evm_nandflash_partition[] = {
  98. {
  99. .name = "u-boot env",
  100. .offset = 0,
  101. .size = SZ_128K,
  102. .mask_flags = MTD_WRITEABLE,
  103. },
  104. {
  105. .name = "UBL",
  106. .offset = MTDPART_OFS_APPEND,
  107. .size = SZ_128K,
  108. .mask_flags = MTD_WRITEABLE,
  109. },
  110. {
  111. .name = "u-boot",
  112. .offset = MTDPART_OFS_APPEND,
  113. .size = 4 * SZ_128K,
  114. .mask_flags = MTD_WRITEABLE,
  115. },
  116. {
  117. .name = "kernel",
  118. .offset = 0x200000,
  119. .size = SZ_2M,
  120. .mask_flags = 0,
  121. },
  122. {
  123. .name = "filesystem",
  124. .offset = MTDPART_OFS_APPEND,
  125. .size = MTDPART_SIZ_FULL,
  126. .mask_flags = 0,
  127. },
  128. };
  129. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  130. .parts = da850_evm_nandflash_partition,
  131. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  132. .ecc_mode = NAND_ECC_HW,
  133. .ecc_bits = 4,
  134. .options = NAND_USE_FLASH_BBT,
  135. };
  136. static struct resource da850_evm_nandflash_resource[] = {
  137. {
  138. .start = DA8XX_AEMIF_CS3_BASE,
  139. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  140. .flags = IORESOURCE_MEM,
  141. },
  142. {
  143. .start = DA8XX_AEMIF_CTL_BASE,
  144. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. };
  148. static struct platform_device da850_evm_nandflash_device = {
  149. .name = "davinci_nand",
  150. .id = 1,
  151. .dev = {
  152. .platform_data = &da850_evm_nandflash_data,
  153. },
  154. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  155. .resource = da850_evm_nandflash_resource,
  156. };
  157. static struct platform_device *da850_evm_devices[] __initdata = {
  158. &da850_evm_nandflash_device,
  159. &da850_evm_norflash_device,
  160. };
  161. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  162. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  163. static void __init da850_evm_init_nor(void)
  164. {
  165. void __iomem *aemif_addr;
  166. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  167. /* Configure data bus width of CS2 to 16 bit */
  168. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  169. DA8XX_AEMIF_ASIZE_16BIT,
  170. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  171. iounmap(aemif_addr);
  172. }
  173. static u32 ui_card_detected;
  174. #if defined(CONFIG_MMC_DAVINCI) || \
  175. defined(CONFIG_MMC_DAVINCI_MODULE)
  176. #define HAS_MMC 1
  177. #else
  178. #define HAS_MMC 0
  179. #endif
  180. static __init void da850_evm_setup_nor_nand(void)
  181. {
  182. int ret = 0;
  183. if (ui_card_detected & !HAS_MMC) {
  184. ret = davinci_cfg_reg_list(da850_nand_pins);
  185. if (ret)
  186. pr_warning("da850_evm_init: nand mux setup failed: "
  187. "%d\n", ret);
  188. ret = davinci_cfg_reg_list(da850_nor_pins);
  189. if (ret)
  190. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  191. ret);
  192. da850_evm_init_nor();
  193. platform_add_devices(da850_evm_devices,
  194. ARRAY_SIZE(da850_evm_devices));
  195. }
  196. }
  197. #ifdef CONFIG_DA850_UI_RMII
  198. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  199. {
  200. struct davinci_soc_info *soc_info = &davinci_soc_info;
  201. soc_info->emac_pdata->rmii_en = 1;
  202. gpio_set_value(rmii_sel, 0);
  203. }
  204. #else
  205. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  206. #endif
  207. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  208. unsigned ngpio, void *c)
  209. {
  210. int sel_a, sel_b, sel_c, ret;
  211. sel_a = gpio + 7;
  212. sel_b = gpio + 6;
  213. sel_c = gpio + 5;
  214. ret = gpio_request(sel_a, "sel_a");
  215. if (ret) {
  216. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  217. goto exp_setup_sela_fail;
  218. }
  219. ret = gpio_request(sel_b, "sel_b");
  220. if (ret) {
  221. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  222. goto exp_setup_selb_fail;
  223. }
  224. ret = gpio_request(sel_c, "sel_c");
  225. if (ret) {
  226. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  227. goto exp_setup_selc_fail;
  228. }
  229. /* deselect all functionalities */
  230. gpio_direction_output(sel_a, 1);
  231. gpio_direction_output(sel_b, 1);
  232. gpio_direction_output(sel_c, 1);
  233. ui_card_detected = 1;
  234. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  235. da850_evm_setup_nor_nand();
  236. da850_evm_setup_emac_rmii(sel_a);
  237. return 0;
  238. exp_setup_selc_fail:
  239. gpio_free(sel_b);
  240. exp_setup_selb_fail:
  241. gpio_free(sel_a);
  242. exp_setup_sela_fail:
  243. return ret;
  244. }
  245. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  246. unsigned gpio, unsigned ngpio, void *c)
  247. {
  248. /* deselect all functionalities */
  249. gpio_set_value(gpio + 5, 1);
  250. gpio_set_value(gpio + 6, 1);
  251. gpio_set_value(gpio + 7, 1);
  252. gpio_free(gpio + 5);
  253. gpio_free(gpio + 6);
  254. gpio_free(gpio + 7);
  255. return 0;
  256. }
  257. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  258. .gpio_base = DAVINCI_N_GPIO,
  259. .setup = da850_evm_ui_expander_setup,
  260. .teardown = da850_evm_ui_expander_teardown,
  261. };
  262. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  263. {
  264. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  265. },
  266. {
  267. I2C_BOARD_INFO("tca6416", 0x20),
  268. .platform_data = &da850_evm_ui_expander_info,
  269. },
  270. };
  271. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  272. .bus_freq = 100, /* kHz */
  273. .bus_delay = 0, /* usec */
  274. };
  275. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  276. .enabled_uarts = 0x7,
  277. };
  278. /* davinci da850 evm audio machine driver */
  279. static u8 da850_iis_serializer_direction[] = {
  280. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  281. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  282. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  283. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  284. };
  285. static struct snd_platform_data da850_evm_snd_data = {
  286. .tx_dma_offset = 0x2000,
  287. .rx_dma_offset = 0x2000,
  288. .op_mode = DAVINCI_MCASP_IIS_MODE,
  289. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  290. .tdm_slots = 2,
  291. .serial_dir = da850_iis_serializer_direction,
  292. .eventq_no = EVENTQ_1,
  293. .version = MCASP_VERSION_2,
  294. .txnumevt = 1,
  295. .rxnumevt = 1,
  296. };
  297. static int da850_evm_mmc_get_ro(int index)
  298. {
  299. return gpio_get_value(DA850_MMCSD_WP_PIN);
  300. }
  301. static int da850_evm_mmc_get_cd(int index)
  302. {
  303. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  304. }
  305. static struct davinci_mmc_config da850_mmc_config = {
  306. .get_ro = da850_evm_mmc_get_ro,
  307. .get_cd = da850_evm_mmc_get_cd,
  308. .wires = 4,
  309. .max_freq = 50000000,
  310. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  311. .version = MMC_CTLR_VERSION_2,
  312. };
  313. static void da850_panel_power_ctrl(int val)
  314. {
  315. /* lcd backlight */
  316. gpio_set_value(DA850_LCD_BL_PIN, val);
  317. /* lcd power */
  318. gpio_set_value(DA850_LCD_PWR_PIN, val);
  319. }
  320. static int da850_lcd_hw_init(void)
  321. {
  322. int status;
  323. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  324. if (status < 0)
  325. return status;
  326. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  327. if (status < 0) {
  328. gpio_free(DA850_LCD_BL_PIN);
  329. return status;
  330. }
  331. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  332. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  333. /* Switch off panel power and backlight */
  334. da850_panel_power_ctrl(0);
  335. /* Switch on panel power and backlight */
  336. da850_panel_power_ctrl(1);
  337. return 0;
  338. }
  339. /* TPS65070 voltage regulator support */
  340. /* 3.3V */
  341. struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  342. {
  343. .supply = "usb0_vdda33",
  344. },
  345. {
  346. .supply = "usb1_vdda33",
  347. },
  348. };
  349. /* 3.3V or 1.8V */
  350. struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  351. {
  352. .supply = "dvdd3318_a",
  353. },
  354. {
  355. .supply = "dvdd3318_b",
  356. },
  357. {
  358. .supply = "dvdd3318_c",
  359. },
  360. };
  361. /* 1.2V */
  362. struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  363. {
  364. .supply = "cvdd",
  365. },
  366. };
  367. /* 1.8V LDO */
  368. struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  369. {
  370. .supply = "sata_vddr",
  371. },
  372. {
  373. .supply = "usb0_vdda18",
  374. },
  375. {
  376. .supply = "usb1_vdda18",
  377. },
  378. {
  379. .supply = "ddr_dvdd18",
  380. },
  381. };
  382. /* 1.2V LDO */
  383. struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  384. {
  385. .supply = "sata_vdd",
  386. },
  387. {
  388. .supply = "pll0_vdda",
  389. },
  390. {
  391. .supply = "pll1_vdda",
  392. },
  393. {
  394. .supply = "usbs_cvdd",
  395. },
  396. {
  397. .supply = "vddarnwa1",
  398. },
  399. };
  400. struct regulator_init_data tps65070_regulator_data[] = {
  401. /* dcdc1 */
  402. {
  403. .constraints = {
  404. .min_uV = 3150000,
  405. .max_uV = 3450000,
  406. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  407. REGULATOR_CHANGE_STATUS),
  408. .boot_on = 1,
  409. },
  410. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  411. .consumer_supplies = tps65070_dcdc1_consumers,
  412. },
  413. /* dcdc2 */
  414. {
  415. .constraints = {
  416. .min_uV = 1710000,
  417. .max_uV = 3450000,
  418. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  419. REGULATOR_CHANGE_STATUS),
  420. .boot_on = 1,
  421. },
  422. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  423. .consumer_supplies = tps65070_dcdc2_consumers,
  424. },
  425. /* dcdc3 */
  426. {
  427. .constraints = {
  428. .min_uV = 950000,
  429. .max_uV = 1320000,
  430. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  431. REGULATOR_CHANGE_STATUS),
  432. .boot_on = 1,
  433. },
  434. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  435. .consumer_supplies = tps65070_dcdc3_consumers,
  436. },
  437. /* ldo1 */
  438. {
  439. .constraints = {
  440. .min_uV = 1710000,
  441. .max_uV = 1890000,
  442. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  443. REGULATOR_CHANGE_STATUS),
  444. .boot_on = 1,
  445. },
  446. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  447. .consumer_supplies = tps65070_ldo1_consumers,
  448. },
  449. /* ldo2 */
  450. {
  451. .constraints = {
  452. .min_uV = 1140000,
  453. .max_uV = 1320000,
  454. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  455. REGULATOR_CHANGE_STATUS),
  456. .boot_on = 1,
  457. },
  458. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  459. .consumer_supplies = tps65070_ldo2_consumers,
  460. },
  461. };
  462. static struct tps6507x_board tps_board = {
  463. .tps6507x_pmic_init_data = &tps65070_regulator_data[0],
  464. };
  465. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  466. {
  467. I2C_BOARD_INFO("tps6507x", 0x48),
  468. .platform_data = &tps_board,
  469. },
  470. };
  471. static int __init pmic_tps65070_init(void)
  472. {
  473. return i2c_register_board_info(1, da850evm_tps65070_info,
  474. ARRAY_SIZE(da850evm_tps65070_info));
  475. }
  476. static const short da850_evm_lcdc_pins[] = {
  477. DA850_GPIO2_8, DA850_GPIO2_15,
  478. -1
  479. };
  480. static int __init da850_evm_config_emac(void)
  481. {
  482. void __iomem *cfg_chip3_base;
  483. int ret;
  484. u32 val;
  485. struct davinci_soc_info *soc_info = &davinci_soc_info;
  486. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  487. if (!machine_is_davinci_da850_evm())
  488. return 0;
  489. cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
  490. val = __raw_readl(cfg_chip3_base);
  491. if (rmii_en) {
  492. val |= BIT(8);
  493. ret = davinci_cfg_reg_list(da850_rmii_pins);
  494. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  495. " functional\n");
  496. } else {
  497. val &= ~BIT(8);
  498. ret = davinci_cfg_reg_list(da850_cpgmac_pins);
  499. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  500. " functional\n");
  501. }
  502. if (ret)
  503. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  504. ret);
  505. /* configure the CFGCHIP3 register for RMII or MII */
  506. __raw_writel(val, cfg_chip3_base);
  507. ret = davinci_cfg_reg(DA850_GPIO2_6);
  508. if (ret)
  509. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  510. "failed\n");
  511. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  512. if (ret) {
  513. pr_warning("Cannot open GPIO %d\n",
  514. DA850_MII_MDIO_CLKEN_PIN);
  515. return ret;
  516. }
  517. /* Enable/Disable MII MDIO clock */
  518. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
  519. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  520. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  521. ret = da8xx_register_emac();
  522. if (ret)
  523. pr_warning("da850_evm_init: emac registration failed: %d\n",
  524. ret);
  525. return 0;
  526. }
  527. device_initcall(da850_evm_config_emac);
  528. static __init void da850_evm_init(void)
  529. {
  530. int ret;
  531. ret = pmic_tps65070_init();
  532. if (ret)
  533. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  534. ret);
  535. ret = da8xx_register_edma();
  536. if (ret)
  537. pr_warning("da850_evm_init: edma registration failed: %d\n",
  538. ret);
  539. ret = davinci_cfg_reg_list(da850_i2c0_pins);
  540. if (ret)
  541. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  542. ret);
  543. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  544. if (ret)
  545. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  546. ret);
  547. ret = da8xx_register_watchdog();
  548. if (ret)
  549. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  550. ret);
  551. if (HAS_MMC) {
  552. ret = davinci_cfg_reg_list(da850_mmcsd0_pins);
  553. if (ret)
  554. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  555. " %d\n", ret);
  556. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  557. if (ret)
  558. pr_warning("da850_evm_init: can not open GPIO %d\n",
  559. DA850_MMCSD_CD_PIN);
  560. gpio_direction_input(DA850_MMCSD_CD_PIN);
  561. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  562. if (ret)
  563. pr_warning("da850_evm_init: can not open GPIO %d\n",
  564. DA850_MMCSD_WP_PIN);
  565. gpio_direction_input(DA850_MMCSD_WP_PIN);
  566. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  567. if (ret)
  568. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  569. " %d\n", ret);
  570. }
  571. davinci_serial_init(&da850_evm_uart_config);
  572. i2c_register_board_info(1, da850_evm_i2c_devices,
  573. ARRAY_SIZE(da850_evm_i2c_devices));
  574. /*
  575. * shut down uart 0 and 1; they are not used on the board and
  576. * accessing them causes endless "too much work in irq53" messages
  577. * with arago fs
  578. */
  579. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  580. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  581. ret = davinci_cfg_reg_list(da850_mcasp_pins);
  582. if (ret)
  583. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  584. ret);
  585. da8xx_register_mcasp(0, &da850_evm_snd_data);
  586. ret = davinci_cfg_reg_list(da850_lcdcntl_pins);
  587. if (ret)
  588. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  589. ret);
  590. /* Handle board specific muxing for LCD here */
  591. ret = davinci_cfg_reg_list(da850_evm_lcdc_pins);
  592. if (ret)
  593. pr_warning("da850_evm_init: evm specific lcd mux setup "
  594. "failed: %d\n", ret);
  595. ret = da850_lcd_hw_init();
  596. if (ret)
  597. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  598. ret);
  599. sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
  600. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  601. if (ret)
  602. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  603. ret);
  604. ret = da8xx_register_rtc();
  605. if (ret)
  606. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  607. ret = da850_register_cpufreq();
  608. if (ret)
  609. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  610. ret);
  611. ret = da8xx_register_cpuidle();
  612. if (ret)
  613. pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
  614. ret);
  615. ret = da850_register_pm(&da850_pm_device);
  616. if (ret)
  617. pr_warning("da850_evm_init: suspend registration failed: %d\n",
  618. ret);
  619. }
  620. #ifdef CONFIG_SERIAL_8250_CONSOLE
  621. static int __init da850_evm_console_init(void)
  622. {
  623. return add_preferred_console("ttyS", 2, "115200");
  624. }
  625. console_initcall(da850_evm_console_init);
  626. #endif
  627. static void __init da850_evm_map_io(void)
  628. {
  629. da850_init();
  630. }
  631. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
  632. .phys_io = IO_PHYS,
  633. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  634. .boot_params = (DA8XX_DDR_BASE + 0x100),
  635. .map_io = da850_evm_map_io,
  636. .init_irq = cp_intc_init,
  637. .timer = &davinci_timer,
  638. .init_machine = da850_evm_init,
  639. MACHINE_END