intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. /**
  61. * Sets the power state for the panel.
  62. */
  63. static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  64. {
  65. struct drm_device *dev = intel_lvds->base.base.dev;
  66. struct intel_crtc *intel_crtc = to_intel_crtc(intel_lvds->base.base.crtc);
  67. struct drm_i915_private *dev_priv = dev->dev_private;
  68. u32 ctl_reg, lvds_reg, stat_reg;
  69. if (HAS_PCH_SPLIT(dev)) {
  70. ctl_reg = PCH_PP_CONTROL;
  71. lvds_reg = PCH_LVDS;
  72. stat_reg = PCH_PP_STATUS;
  73. } else {
  74. ctl_reg = PP_CONTROL;
  75. lvds_reg = LVDS;
  76. stat_reg = PP_STATUS;
  77. }
  78. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  79. if (intel_lvds->pfit_dirty) {
  80. /*
  81. * Enable automatic panel scaling so that non-native modes
  82. * fill the screen. The panel fitter should only be
  83. * adjusted whilst the pipe is disabled, according to
  84. * register description and PRM.
  85. */
  86. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  87. intel_lvds->pfit_control,
  88. intel_lvds->pfit_pgm_ratios);
  89. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  90. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  91. intel_lvds->pfit_dirty = false;
  92. }
  93. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  94. POSTING_READ(lvds_reg);
  95. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  96. DRM_ERROR("timed out waiting for panel to power on\n");
  97. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  98. }
  99. static void intel_lvds_disable(struct intel_lvds *intel_lvds)
  100. {
  101. struct drm_device *dev = intel_lvds->base.base.dev;
  102. struct drm_i915_private *dev_priv = dev->dev_private;
  103. u32 ctl_reg, lvds_reg, stat_reg;
  104. if (HAS_PCH_SPLIT(dev)) {
  105. ctl_reg = PCH_PP_CONTROL;
  106. lvds_reg = PCH_LVDS;
  107. stat_reg = PCH_PP_STATUS;
  108. } else {
  109. ctl_reg = PP_CONTROL;
  110. lvds_reg = LVDS;
  111. stat_reg = PP_STATUS;
  112. }
  113. intel_panel_disable_backlight(dev);
  114. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  115. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  116. DRM_ERROR("timed out waiting for panel to power off\n");
  117. if (intel_lvds->pfit_control) {
  118. I915_WRITE(PFIT_CONTROL, 0);
  119. intel_lvds->pfit_dirty = true;
  120. }
  121. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  122. POSTING_READ(lvds_reg);
  123. }
  124. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  125. {
  126. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  127. if (mode == DRM_MODE_DPMS_ON)
  128. intel_lvds_enable(intel_lvds);
  129. else
  130. intel_lvds_disable(intel_lvds);
  131. /* XXX: We never power down the LVDS pairs. */
  132. }
  133. static int intel_lvds_mode_valid(struct drm_connector *connector,
  134. struct drm_display_mode *mode)
  135. {
  136. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  137. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  138. if (mode->hdisplay > fixed_mode->hdisplay)
  139. return MODE_PANEL;
  140. if (mode->vdisplay > fixed_mode->vdisplay)
  141. return MODE_PANEL;
  142. return MODE_OK;
  143. }
  144. static void
  145. centre_horizontally(struct drm_display_mode *mode,
  146. int width)
  147. {
  148. u32 border, sync_pos, blank_width, sync_width;
  149. /* keep the hsync and hblank widths constant */
  150. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  151. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  152. sync_pos = (blank_width - sync_width + 1) / 2;
  153. border = (mode->hdisplay - width + 1) / 2;
  154. border += border & 1; /* make the border even */
  155. mode->crtc_hdisplay = width;
  156. mode->crtc_hblank_start = width + border;
  157. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  158. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  159. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  160. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  161. }
  162. static void
  163. centre_vertically(struct drm_display_mode *mode,
  164. int height)
  165. {
  166. u32 border, sync_pos, blank_width, sync_width;
  167. /* keep the vsync and vblank widths constant */
  168. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  169. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  170. sync_pos = (blank_width - sync_width + 1) / 2;
  171. border = (mode->vdisplay - height + 1) / 2;
  172. mode->crtc_vdisplay = height;
  173. mode->crtc_vblank_start = height + border;
  174. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  175. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  176. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  177. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  178. }
  179. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  180. {
  181. /*
  182. * Floating point operation is not supported. So the FACTOR
  183. * is defined, which can avoid the floating point computation
  184. * when calculating the panel ratio.
  185. */
  186. #define ACCURACY 12
  187. #define FACTOR (1 << ACCURACY)
  188. u32 ratio = source * FACTOR / target;
  189. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  190. }
  191. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  192. struct drm_display_mode *mode,
  193. struct drm_display_mode *adjusted_mode)
  194. {
  195. struct drm_device *dev = encoder->dev;
  196. struct drm_i915_private *dev_priv = dev->dev_private;
  197. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  198. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  199. struct drm_encoder *tmp_encoder;
  200. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  201. int pipe;
  202. /* Should never happen!! */
  203. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  204. DRM_ERROR("Can't support LVDS on pipe A\n");
  205. return false;
  206. }
  207. /* Should never happen!! */
  208. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  209. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  210. DRM_ERROR("Can't enable LVDS and another "
  211. "encoder on the same pipe\n");
  212. return false;
  213. }
  214. }
  215. /*
  216. * We have timings from the BIOS for the panel, put them in
  217. * to the adjusted mode. The CRTC will be set up for this mode,
  218. * with the panel scaling set up to source from the H/VDisplay
  219. * of the original mode.
  220. */
  221. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  222. if (HAS_PCH_SPLIT(dev)) {
  223. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  224. mode, adjusted_mode);
  225. return true;
  226. }
  227. /* Native modes don't need fitting */
  228. if (adjusted_mode->hdisplay == mode->hdisplay &&
  229. adjusted_mode->vdisplay == mode->vdisplay)
  230. goto out;
  231. /* 965+ wants fuzzy fitting */
  232. if (INTEL_INFO(dev)->gen >= 4)
  233. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  234. PFIT_FILTER_FUZZY);
  235. /*
  236. * Enable automatic panel scaling for non-native modes so that they fill
  237. * the screen. Should be enabled before the pipe is enabled, according
  238. * to register description and PRM.
  239. * Change the value here to see the borders for debugging
  240. */
  241. for_each_pipe(pipe)
  242. I915_WRITE(BCLRPAT(pipe), 0);
  243. drm_mode_set_crtcinfo(adjusted_mode, 0);
  244. switch (intel_lvds->fitting_mode) {
  245. case DRM_MODE_SCALE_CENTER:
  246. /*
  247. * For centered modes, we have to calculate border widths &
  248. * heights and modify the values programmed into the CRTC.
  249. */
  250. centre_horizontally(adjusted_mode, mode->hdisplay);
  251. centre_vertically(adjusted_mode, mode->vdisplay);
  252. border = LVDS_BORDER_ENABLE;
  253. break;
  254. case DRM_MODE_SCALE_ASPECT:
  255. /* Scale but preserve the aspect ratio */
  256. if (INTEL_INFO(dev)->gen >= 4) {
  257. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  258. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  259. /* 965+ is easy, it does everything in hw */
  260. if (scaled_width > scaled_height)
  261. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  262. else if (scaled_width < scaled_height)
  263. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  264. else if (adjusted_mode->hdisplay != mode->hdisplay)
  265. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  266. } else {
  267. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  268. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  269. /*
  270. * For earlier chips we have to calculate the scaling
  271. * ratio by hand and program it into the
  272. * PFIT_PGM_RATIO register
  273. */
  274. if (scaled_width > scaled_height) { /* pillar */
  275. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  276. border = LVDS_BORDER_ENABLE;
  277. if (mode->vdisplay != adjusted_mode->vdisplay) {
  278. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  279. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  280. bits << PFIT_VERT_SCALE_SHIFT);
  281. pfit_control |= (PFIT_ENABLE |
  282. VERT_INTERP_BILINEAR |
  283. HORIZ_INTERP_BILINEAR);
  284. }
  285. } else if (scaled_width < scaled_height) { /* letter */
  286. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  287. border = LVDS_BORDER_ENABLE;
  288. if (mode->hdisplay != adjusted_mode->hdisplay) {
  289. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  290. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  291. bits << PFIT_VERT_SCALE_SHIFT);
  292. pfit_control |= (PFIT_ENABLE |
  293. VERT_INTERP_BILINEAR |
  294. HORIZ_INTERP_BILINEAR);
  295. }
  296. } else
  297. /* Aspects match, Let hw scale both directions */
  298. pfit_control |= (PFIT_ENABLE |
  299. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  300. VERT_INTERP_BILINEAR |
  301. HORIZ_INTERP_BILINEAR);
  302. }
  303. break;
  304. case DRM_MODE_SCALE_FULLSCREEN:
  305. /*
  306. * Full scaling, even if it changes the aspect ratio.
  307. * Fortunately this is all done for us in hw.
  308. */
  309. if (mode->vdisplay != adjusted_mode->vdisplay ||
  310. mode->hdisplay != adjusted_mode->hdisplay) {
  311. pfit_control |= PFIT_ENABLE;
  312. if (INTEL_INFO(dev)->gen >= 4)
  313. pfit_control |= PFIT_SCALING_AUTO;
  314. else
  315. pfit_control |= (VERT_AUTO_SCALE |
  316. VERT_INTERP_BILINEAR |
  317. HORIZ_AUTO_SCALE |
  318. HORIZ_INTERP_BILINEAR);
  319. }
  320. break;
  321. default:
  322. break;
  323. }
  324. out:
  325. /* If not enabling scaling, be consistent and always use 0. */
  326. if ((pfit_control & PFIT_ENABLE) == 0) {
  327. pfit_control = 0;
  328. pfit_pgm_ratios = 0;
  329. }
  330. /* Make sure pre-965 set dither correctly */
  331. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  332. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  333. if (pfit_control != intel_lvds->pfit_control ||
  334. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  335. intel_lvds->pfit_control = pfit_control;
  336. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  337. intel_lvds->pfit_dirty = true;
  338. }
  339. dev_priv->lvds_border_bits = border;
  340. /*
  341. * XXX: It would be nice to support lower refresh rates on the
  342. * panels to reduce power consumption, and perhaps match the
  343. * user's requested refresh rate.
  344. */
  345. return true;
  346. }
  347. static void intel_lvds_prepare(struct drm_encoder *encoder)
  348. {
  349. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  350. /*
  351. * Prior to Ironlake, we must disable the pipe if we want to adjust
  352. * the panel fitter. However at all other times we can just reset
  353. * the registers regardless.
  354. */
  355. if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
  356. intel_lvds_disable(intel_lvds);
  357. }
  358. static void intel_lvds_commit(struct drm_encoder *encoder)
  359. {
  360. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  361. /* Always do a full power on as we do not know what state
  362. * we were left in.
  363. */
  364. intel_lvds_enable(intel_lvds);
  365. }
  366. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  367. struct drm_display_mode *mode,
  368. struct drm_display_mode *adjusted_mode)
  369. {
  370. /*
  371. * The LVDS pin pair will already have been turned on in the
  372. * intel_crtc_mode_set since it has a large impact on the DPLL
  373. * settings.
  374. */
  375. }
  376. /**
  377. * Detect the LVDS connection.
  378. *
  379. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  380. * connected and closed means disconnected. We also send hotplug events as
  381. * needed, using lid status notification from the input layer.
  382. */
  383. static enum drm_connector_status
  384. intel_lvds_detect(struct drm_connector *connector, bool force)
  385. {
  386. struct drm_device *dev = connector->dev;
  387. enum drm_connector_status status;
  388. status = intel_panel_detect(dev);
  389. if (status != connector_status_unknown)
  390. return status;
  391. return connector_status_connected;
  392. }
  393. /**
  394. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  395. */
  396. static int intel_lvds_get_modes(struct drm_connector *connector)
  397. {
  398. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  399. struct drm_device *dev = connector->dev;
  400. struct drm_display_mode *mode;
  401. if (intel_lvds->edid)
  402. return drm_add_edid_modes(connector, intel_lvds->edid);
  403. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  404. if (mode == NULL)
  405. return 0;
  406. drm_mode_probed_add(connector, mode);
  407. return 1;
  408. }
  409. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  410. {
  411. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  412. return 1;
  413. }
  414. /* The GPU hangs up on these systems if modeset is performed on LID open */
  415. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  416. {
  417. .callback = intel_no_modeset_on_lid_dmi_callback,
  418. .ident = "Toshiba Tecra A11",
  419. .matches = {
  420. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  421. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  422. },
  423. },
  424. { } /* terminating entry */
  425. };
  426. /*
  427. * Lid events. Note the use of 'modeset_on_lid':
  428. * - we set it on lid close, and reset it on open
  429. * - we use it as a "only once" bit (ie we ignore
  430. * duplicate events where it was already properly
  431. * set/reset)
  432. * - the suspend/resume paths will also set it to
  433. * zero, since they restore the mode ("lid open").
  434. */
  435. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  436. void *unused)
  437. {
  438. struct drm_i915_private *dev_priv =
  439. container_of(nb, struct drm_i915_private, lid_notifier);
  440. struct drm_device *dev = dev_priv->dev;
  441. struct drm_connector *connector = dev_priv->int_lvds_connector;
  442. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  443. return NOTIFY_OK;
  444. /*
  445. * check and update the status of LVDS connector after receiving
  446. * the LID nofication event.
  447. */
  448. if (connector)
  449. connector->status = connector->funcs->detect(connector,
  450. false);
  451. /* Don't force modeset on machines where it causes a GPU lockup */
  452. if (dmi_check_system(intel_no_modeset_on_lid))
  453. return NOTIFY_OK;
  454. if (!acpi_lid_open()) {
  455. dev_priv->modeset_on_lid = 1;
  456. return NOTIFY_OK;
  457. }
  458. if (!dev_priv->modeset_on_lid)
  459. return NOTIFY_OK;
  460. dev_priv->modeset_on_lid = 0;
  461. mutex_lock(&dev->mode_config.mutex);
  462. drm_helper_resume_force_mode(dev);
  463. mutex_unlock(&dev->mode_config.mutex);
  464. return NOTIFY_OK;
  465. }
  466. /**
  467. * intel_lvds_destroy - unregister and free LVDS structures
  468. * @connector: connector to free
  469. *
  470. * Unregister the DDC bus for this connector then free the driver private
  471. * structure.
  472. */
  473. static void intel_lvds_destroy(struct drm_connector *connector)
  474. {
  475. struct drm_device *dev = connector->dev;
  476. struct drm_i915_private *dev_priv = dev->dev_private;
  477. intel_panel_destroy_backlight(dev);
  478. if (dev_priv->lid_notifier.notifier_call)
  479. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  480. drm_sysfs_connector_remove(connector);
  481. drm_connector_cleanup(connector);
  482. kfree(connector);
  483. }
  484. static int intel_lvds_set_property(struct drm_connector *connector,
  485. struct drm_property *property,
  486. uint64_t value)
  487. {
  488. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  489. struct drm_device *dev = connector->dev;
  490. if (property == dev->mode_config.scaling_mode_property) {
  491. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  492. if (value == DRM_MODE_SCALE_NONE) {
  493. DRM_DEBUG_KMS("no scaling not supported\n");
  494. return -EINVAL;
  495. }
  496. if (intel_lvds->fitting_mode == value) {
  497. /* the LVDS scaling property is not changed */
  498. return 0;
  499. }
  500. intel_lvds->fitting_mode = value;
  501. if (crtc && crtc->enabled) {
  502. /*
  503. * If the CRTC is enabled, the display will be changed
  504. * according to the new panel fitting mode.
  505. */
  506. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  507. crtc->x, crtc->y, crtc->fb);
  508. }
  509. }
  510. return 0;
  511. }
  512. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  513. .dpms = intel_lvds_dpms,
  514. .mode_fixup = intel_lvds_mode_fixup,
  515. .prepare = intel_lvds_prepare,
  516. .mode_set = intel_lvds_mode_set,
  517. .commit = intel_lvds_commit,
  518. };
  519. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  520. .get_modes = intel_lvds_get_modes,
  521. .mode_valid = intel_lvds_mode_valid,
  522. .best_encoder = intel_best_encoder,
  523. };
  524. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  525. .dpms = drm_helper_connector_dpms,
  526. .detect = intel_lvds_detect,
  527. .fill_modes = drm_helper_probe_single_connector_modes,
  528. .set_property = intel_lvds_set_property,
  529. .destroy = intel_lvds_destroy,
  530. };
  531. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  532. .destroy = intel_encoder_destroy,
  533. };
  534. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  535. {
  536. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  537. return 1;
  538. }
  539. /* These systems claim to have LVDS, but really don't */
  540. static const struct dmi_system_id intel_no_lvds[] = {
  541. {
  542. .callback = intel_no_lvds_dmi_callback,
  543. .ident = "Apple Mac Mini (Core series)",
  544. .matches = {
  545. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  546. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  547. },
  548. },
  549. {
  550. .callback = intel_no_lvds_dmi_callback,
  551. .ident = "Apple Mac Mini (Core 2 series)",
  552. .matches = {
  553. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  554. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  555. },
  556. },
  557. {
  558. .callback = intel_no_lvds_dmi_callback,
  559. .ident = "MSI IM-945GSE-A",
  560. .matches = {
  561. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  562. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  563. },
  564. },
  565. {
  566. .callback = intel_no_lvds_dmi_callback,
  567. .ident = "Dell Studio Hybrid",
  568. .matches = {
  569. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  570. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  571. },
  572. },
  573. {
  574. .callback = intel_no_lvds_dmi_callback,
  575. .ident = "Dell OptiPlex FX170",
  576. .matches = {
  577. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  578. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  579. },
  580. },
  581. {
  582. .callback = intel_no_lvds_dmi_callback,
  583. .ident = "AOpen Mini PC",
  584. .matches = {
  585. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  586. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  587. },
  588. },
  589. {
  590. .callback = intel_no_lvds_dmi_callback,
  591. .ident = "AOpen Mini PC MP915",
  592. .matches = {
  593. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  594. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  595. },
  596. },
  597. {
  598. .callback = intel_no_lvds_dmi_callback,
  599. .ident = "AOpen i915GMm-HFS",
  600. .matches = {
  601. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  602. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  603. },
  604. },
  605. {
  606. .callback = intel_no_lvds_dmi_callback,
  607. .ident = "AOpen i45GMx-I",
  608. .matches = {
  609. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  610. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  611. },
  612. },
  613. {
  614. .callback = intel_no_lvds_dmi_callback,
  615. .ident = "Aopen i945GTt-VFA",
  616. .matches = {
  617. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  618. },
  619. },
  620. {
  621. .callback = intel_no_lvds_dmi_callback,
  622. .ident = "Clientron U800",
  623. .matches = {
  624. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  625. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  626. },
  627. },
  628. {
  629. .callback = intel_no_lvds_dmi_callback,
  630. .ident = "Clientron E830",
  631. .matches = {
  632. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  633. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  634. },
  635. },
  636. {
  637. .callback = intel_no_lvds_dmi_callback,
  638. .ident = "Asus EeeBox PC EB1007",
  639. .matches = {
  640. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  641. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  642. },
  643. },
  644. {
  645. .callback = intel_no_lvds_dmi_callback,
  646. .ident = "Asus AT5NM10T-I",
  647. .matches = {
  648. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  649. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  650. },
  651. },
  652. {
  653. .callback = intel_no_lvds_dmi_callback,
  654. .ident = "Hewlett-Packard HP t5740e Thin Client",
  655. .matches = {
  656. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  657. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  658. },
  659. },
  660. {
  661. .callback = intel_no_lvds_dmi_callback,
  662. .ident = "Hewlett-Packard t5745",
  663. .matches = {
  664. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  665. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  666. },
  667. },
  668. {
  669. .callback = intel_no_lvds_dmi_callback,
  670. .ident = "Hewlett-Packard st5747",
  671. .matches = {
  672. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  673. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  674. },
  675. },
  676. {
  677. .callback = intel_no_lvds_dmi_callback,
  678. .ident = "MSI Wind Box DC500",
  679. .matches = {
  680. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  681. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  682. },
  683. },
  684. { } /* terminating entry */
  685. };
  686. /**
  687. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  688. * @dev: drm device
  689. * @connector: LVDS connector
  690. *
  691. * Find the reduced downclock for LVDS in EDID.
  692. */
  693. static void intel_find_lvds_downclock(struct drm_device *dev,
  694. struct drm_display_mode *fixed_mode,
  695. struct drm_connector *connector)
  696. {
  697. struct drm_i915_private *dev_priv = dev->dev_private;
  698. struct drm_display_mode *scan;
  699. int temp_downclock;
  700. temp_downclock = fixed_mode->clock;
  701. list_for_each_entry(scan, &connector->probed_modes, head) {
  702. /*
  703. * If one mode has the same resolution with the fixed_panel
  704. * mode while they have the different refresh rate, it means
  705. * that the reduced downclock is found for the LVDS. In such
  706. * case we can set the different FPx0/1 to dynamically select
  707. * between low and high frequency.
  708. */
  709. if (scan->hdisplay == fixed_mode->hdisplay &&
  710. scan->hsync_start == fixed_mode->hsync_start &&
  711. scan->hsync_end == fixed_mode->hsync_end &&
  712. scan->htotal == fixed_mode->htotal &&
  713. scan->vdisplay == fixed_mode->vdisplay &&
  714. scan->vsync_start == fixed_mode->vsync_start &&
  715. scan->vsync_end == fixed_mode->vsync_end &&
  716. scan->vtotal == fixed_mode->vtotal) {
  717. if (scan->clock < temp_downclock) {
  718. /*
  719. * The downclock is already found. But we
  720. * expect to find the lower downclock.
  721. */
  722. temp_downclock = scan->clock;
  723. }
  724. }
  725. }
  726. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  727. /* We found the downclock for LVDS. */
  728. dev_priv->lvds_downclock_avail = 1;
  729. dev_priv->lvds_downclock = temp_downclock;
  730. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  731. "Normal clock %dKhz, downclock %dKhz\n",
  732. fixed_mode->clock, temp_downclock);
  733. }
  734. }
  735. /*
  736. * Enumerate the child dev array parsed from VBT to check whether
  737. * the LVDS is present.
  738. * If it is present, return 1.
  739. * If it is not present, return false.
  740. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  741. */
  742. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  743. u8 *i2c_pin)
  744. {
  745. struct drm_i915_private *dev_priv = dev->dev_private;
  746. int i;
  747. if (!dev_priv->child_dev_num)
  748. return true;
  749. for (i = 0; i < dev_priv->child_dev_num; i++) {
  750. struct child_device_config *child = dev_priv->child_dev + i;
  751. /* If the device type is not LFP, continue.
  752. * We have to check both the new identifiers as well as the
  753. * old for compatibility with some BIOSes.
  754. */
  755. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  756. child->device_type != DEVICE_TYPE_LFP)
  757. continue;
  758. if (intel_gmbus_is_port_valid(child->i2c_pin))
  759. *i2c_pin = child->i2c_pin;
  760. /* However, we cannot trust the BIOS writers to populate
  761. * the VBT correctly. Since LVDS requires additional
  762. * information from AIM blocks, a non-zero addin offset is
  763. * a good indicator that the LVDS is actually present.
  764. */
  765. if (child->addin_offset)
  766. return true;
  767. /* But even then some BIOS writers perform some black magic
  768. * and instantiate the device without reference to any
  769. * additional data. Trust that if the VBT was written into
  770. * the OpRegion then they have validated the LVDS's existence.
  771. */
  772. if (dev_priv->opregion.vbt)
  773. return true;
  774. }
  775. return false;
  776. }
  777. static bool intel_lvds_supported(struct drm_device *dev)
  778. {
  779. /* With the introduction of the PCH we gained a dedicated
  780. * LVDS presence pin, use it. */
  781. if (HAS_PCH_SPLIT(dev))
  782. return true;
  783. /* Otherwise LVDS was only attached to mobile products,
  784. * except for the inglorious 830gm */
  785. return IS_MOBILE(dev) && !IS_I830(dev);
  786. }
  787. /**
  788. * intel_lvds_init - setup LVDS connectors on this device
  789. * @dev: drm device
  790. *
  791. * Create the connector, register the LVDS DDC bus, and try to figure out what
  792. * modes we can display on the LVDS panel (if present).
  793. */
  794. bool intel_lvds_init(struct drm_device *dev)
  795. {
  796. struct drm_i915_private *dev_priv = dev->dev_private;
  797. struct intel_lvds *intel_lvds;
  798. struct intel_encoder *intel_encoder;
  799. struct intel_connector *intel_connector;
  800. struct drm_connector *connector;
  801. struct drm_encoder *encoder;
  802. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  803. struct drm_crtc *crtc;
  804. u32 lvds;
  805. int pipe;
  806. u8 pin;
  807. if (!intel_lvds_supported(dev))
  808. return false;
  809. /* Skip init on machines we know falsely report LVDS */
  810. if (dmi_check_system(intel_no_lvds))
  811. return false;
  812. pin = GMBUS_PORT_PANEL;
  813. if (!lvds_is_present_in_vbt(dev, &pin)) {
  814. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  815. return false;
  816. }
  817. if (HAS_PCH_SPLIT(dev)) {
  818. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  819. return false;
  820. if (dev_priv->edp.support) {
  821. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  822. return false;
  823. }
  824. }
  825. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  826. if (!intel_lvds) {
  827. return false;
  828. }
  829. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  830. if (!intel_connector) {
  831. kfree(intel_lvds);
  832. return false;
  833. }
  834. if (!HAS_PCH_SPLIT(dev)) {
  835. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  836. }
  837. intel_encoder = &intel_lvds->base;
  838. encoder = &intel_encoder->base;
  839. connector = &intel_connector->base;
  840. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  841. DRM_MODE_CONNECTOR_LVDS);
  842. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  843. DRM_MODE_ENCODER_LVDS);
  844. intel_connector_attach_encoder(intel_connector, intel_encoder);
  845. intel_encoder->type = INTEL_OUTPUT_LVDS;
  846. intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
  847. if (HAS_PCH_SPLIT(dev))
  848. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  849. else if (IS_GEN4(dev))
  850. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  851. else
  852. intel_encoder->crtc_mask = (1 << 1);
  853. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  854. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  855. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  856. connector->interlace_allowed = false;
  857. connector->doublescan_allowed = false;
  858. /* create the scaling mode property */
  859. drm_mode_create_scaling_mode_property(dev);
  860. /*
  861. * the initial panel fitting mode will be FULL_SCREEN.
  862. */
  863. drm_connector_attach_property(&intel_connector->base,
  864. dev->mode_config.scaling_mode_property,
  865. DRM_MODE_SCALE_ASPECT);
  866. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  867. /*
  868. * LVDS discovery:
  869. * 1) check for EDID on DDC
  870. * 2) check for VBT data
  871. * 3) check to see if LVDS is already on
  872. * if none of the above, no panel
  873. * 4) make sure lid is open
  874. * if closed, act like it's not there for now
  875. */
  876. /*
  877. * Attempt to get the fixed panel mode from DDC. Assume that the
  878. * preferred mode is the right one.
  879. */
  880. intel_lvds->edid = drm_get_edid(connector,
  881. intel_gmbus_get_adapter(dev_priv,
  882. pin));
  883. if (intel_lvds->edid) {
  884. if (drm_add_edid_modes(connector,
  885. intel_lvds->edid)) {
  886. drm_mode_connector_update_edid_property(connector,
  887. intel_lvds->edid);
  888. } else {
  889. kfree(intel_lvds->edid);
  890. intel_lvds->edid = NULL;
  891. }
  892. }
  893. if (!intel_lvds->edid) {
  894. /* Didn't get an EDID, so
  895. * Set wide sync ranges so we get all modes
  896. * handed to valid_mode for checking
  897. */
  898. connector->display_info.min_vfreq = 0;
  899. connector->display_info.max_vfreq = 200;
  900. connector->display_info.min_hfreq = 0;
  901. connector->display_info.max_hfreq = 200;
  902. }
  903. list_for_each_entry(scan, &connector->probed_modes, head) {
  904. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  905. intel_lvds->fixed_mode =
  906. drm_mode_duplicate(dev, scan);
  907. intel_find_lvds_downclock(dev,
  908. intel_lvds->fixed_mode,
  909. connector);
  910. goto out;
  911. }
  912. }
  913. /* Failed to get EDID, what about VBT? */
  914. if (dev_priv->lfp_lvds_vbt_mode) {
  915. intel_lvds->fixed_mode =
  916. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  917. if (intel_lvds->fixed_mode) {
  918. intel_lvds->fixed_mode->type |=
  919. DRM_MODE_TYPE_PREFERRED;
  920. goto out;
  921. }
  922. }
  923. /*
  924. * If we didn't get EDID, try checking if the panel is already turned
  925. * on. If so, assume that whatever is currently programmed is the
  926. * correct mode.
  927. */
  928. /* Ironlake: FIXME if still fail, not try pipe mode now */
  929. if (HAS_PCH_SPLIT(dev))
  930. goto failed;
  931. lvds = I915_READ(LVDS);
  932. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  933. crtc = intel_get_crtc_for_pipe(dev, pipe);
  934. if (crtc && (lvds & LVDS_PORT_EN)) {
  935. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  936. if (intel_lvds->fixed_mode) {
  937. intel_lvds->fixed_mode->type |=
  938. DRM_MODE_TYPE_PREFERRED;
  939. goto out;
  940. }
  941. }
  942. /* If we still don't have a mode after all that, give up. */
  943. if (!intel_lvds->fixed_mode)
  944. goto failed;
  945. out:
  946. /*
  947. * Unlock registers and just
  948. * leave them unlocked
  949. */
  950. if (HAS_PCH_SPLIT(dev)) {
  951. I915_WRITE(PCH_PP_CONTROL,
  952. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  953. } else {
  954. I915_WRITE(PP_CONTROL,
  955. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  956. }
  957. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  958. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  959. DRM_DEBUG_KMS("lid notifier registration failed\n");
  960. dev_priv->lid_notifier.notifier_call = NULL;
  961. }
  962. /* keep the LVDS connector */
  963. dev_priv->int_lvds_connector = connector;
  964. drm_sysfs_connector_add(connector);
  965. intel_panel_setup_backlight(dev);
  966. return true;
  967. failed:
  968. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  969. drm_connector_cleanup(connector);
  970. drm_encoder_cleanup(encoder);
  971. kfree(intel_lvds);
  972. kfree(intel_connector);
  973. return false;
  974. }