cx88-dvb.c 28 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-xc2028-types.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  49. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  50. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  51. MODULE_LICENSE("GPL");
  52. static unsigned int debug;
  53. module_param(debug, int, 0644);
  54. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  55. #define dprintk(level,fmt, arg...) if (debug >= level) \
  56. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  57. /* ------------------------------------------------------------------ */
  58. static int dvb_buf_setup(struct videobuf_queue *q,
  59. unsigned int *count, unsigned int *size)
  60. {
  61. struct cx8802_dev *dev = q->priv_data;
  62. dev->ts_packet_size = 188 * 4;
  63. dev->ts_packet_count = 32;
  64. *size = dev->ts_packet_size * dev->ts_packet_count;
  65. *count = 32;
  66. return 0;
  67. }
  68. static int dvb_buf_prepare(struct videobuf_queue *q,
  69. struct videobuf_buffer *vb, enum v4l2_field field)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  73. }
  74. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  75. {
  76. struct cx8802_dev *dev = q->priv_data;
  77. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  78. }
  79. static void dvb_buf_release(struct videobuf_queue *q,
  80. struct videobuf_buffer *vb)
  81. {
  82. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  83. }
  84. static struct videobuf_queue_ops dvb_qops = {
  85. .buf_setup = dvb_buf_setup,
  86. .buf_prepare = dvb_buf_prepare,
  87. .buf_queue = dvb_buf_queue,
  88. .buf_release = dvb_buf_release,
  89. };
  90. /* ------------------------------------------------------------------ */
  91. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  92. {
  93. struct cx8802_dev *dev= fe->dvb->priv;
  94. struct cx8802_driver *drv = NULL;
  95. int ret = 0;
  96. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  97. if (drv) {
  98. if (acquire)
  99. ret = drv->request_acquire(drv);
  100. else
  101. ret = drv->request_release(drv);
  102. }
  103. return ret;
  104. }
  105. /* ------------------------------------------------------------------ */
  106. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  107. {
  108. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  109. static u8 reset [] = { RESET, 0x80 };
  110. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  111. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  112. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  113. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  114. mt352_write(fe, clock_config, sizeof(clock_config));
  115. udelay(200);
  116. mt352_write(fe, reset, sizeof(reset));
  117. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  118. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  119. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  120. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  121. return 0;
  122. }
  123. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  124. {
  125. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  126. static u8 reset [] = { RESET, 0x80 };
  127. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  128. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  129. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  130. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(200);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  137. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  138. return 0;
  139. }
  140. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  141. {
  142. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  143. static u8 reset [] = { 0x50, 0x80 };
  144. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  145. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  146. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  147. static u8 dntv_extra[] = { 0xB5, 0x7A };
  148. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  149. mt352_write(fe, clock_config, sizeof(clock_config));
  150. udelay(2000);
  151. mt352_write(fe, reset, sizeof(reset));
  152. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  153. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  154. udelay(2000);
  155. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  156. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  157. return 0;
  158. }
  159. static struct mt352_config dvico_fusionhdtv = {
  160. .demod_address = 0x0f,
  161. .demod_init = dvico_fusionhdtv_demod_init,
  162. };
  163. static struct mt352_config dntv_live_dvbt_config = {
  164. .demod_address = 0x0f,
  165. .demod_init = dntv_live_dvbt_demod_init,
  166. };
  167. static struct mt352_config dvico_fusionhdtv_dual = {
  168. .demod_address = 0x0f,
  169. .demod_init = dvico_dual_demod_init,
  170. };
  171. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  172. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  173. {
  174. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  175. static u8 reset [] = { 0x50, 0x80 };
  176. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  177. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  178. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  179. static u8 dntv_extra[] = { 0xB5, 0x7A };
  180. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  181. mt352_write(fe, clock_config, sizeof(clock_config));
  182. udelay(2000);
  183. mt352_write(fe, reset, sizeof(reset));
  184. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  185. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  186. udelay(2000);
  187. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  188. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  189. return 0;
  190. }
  191. static struct mt352_config dntv_live_dvbt_pro_config = {
  192. .demod_address = 0x0f,
  193. .no_tuner = 1,
  194. .demod_init = dntv_live_dvbt_pro_demod_init,
  195. };
  196. #endif
  197. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  198. .demod_address = 0x0f,
  199. .no_tuner = 1,
  200. };
  201. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  202. .demod_address = 0x0f,
  203. .if2 = 45600,
  204. .no_tuner = 1,
  205. };
  206. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  207. .demod_address = 0x0f,
  208. .if2 = 4560,
  209. .no_tuner = 1,
  210. .demod_init = dvico_fusionhdtv_demod_init,
  211. };
  212. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  213. .demod_address = 0x0f,
  214. };
  215. static struct cx22702_config connexant_refboard_config = {
  216. .demod_address = 0x43,
  217. .output_mode = CX22702_SERIAL_OUTPUT,
  218. };
  219. static struct cx22702_config hauppauge_hvr_config = {
  220. .demod_address = 0x63,
  221. .output_mode = CX22702_SERIAL_OUTPUT,
  222. };
  223. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  224. {
  225. struct cx8802_dev *dev= fe->dvb->priv;
  226. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  227. return 0;
  228. }
  229. static struct or51132_config pchdtv_hd3000 = {
  230. .demod_address = 0x15,
  231. .set_ts_params = or51132_set_ts_param,
  232. };
  233. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  234. {
  235. struct cx8802_dev *dev= fe->dvb->priv;
  236. struct cx88_core *core = dev->core;
  237. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  238. if (index == 0)
  239. cx_clear(MO_GP0_IO, 8);
  240. else
  241. cx_set(MO_GP0_IO, 8);
  242. return 0;
  243. }
  244. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  245. {
  246. struct cx8802_dev *dev= fe->dvb->priv;
  247. if (is_punctured)
  248. dev->ts_gen_cntrl |= 0x04;
  249. else
  250. dev->ts_gen_cntrl &= ~0x04;
  251. return 0;
  252. }
  253. static struct lgdt330x_config fusionhdtv_3_gold = {
  254. .demod_address = 0x0e,
  255. .demod_chip = LGDT3302,
  256. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  257. .set_ts_params = lgdt330x_set_ts_param,
  258. };
  259. static struct lgdt330x_config fusionhdtv_5_gold = {
  260. .demod_address = 0x0e,
  261. .demod_chip = LGDT3303,
  262. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  263. .set_ts_params = lgdt330x_set_ts_param,
  264. };
  265. static struct lgdt330x_config pchdtv_hd5500 = {
  266. .demod_address = 0x59,
  267. .demod_chip = LGDT3303,
  268. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  269. .set_ts_params = lgdt330x_set_ts_param,
  270. };
  271. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  272. {
  273. struct cx8802_dev *dev= fe->dvb->priv;
  274. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  275. return 0;
  276. }
  277. static struct nxt200x_config ati_hdtvwonder = {
  278. .demod_address = 0x0a,
  279. .set_ts_params = nxt200x_set_ts_param,
  280. };
  281. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  282. int is_punctured)
  283. {
  284. struct cx8802_dev *dev= fe->dvb->priv;
  285. dev->ts_gen_cntrl = 0x02;
  286. return 0;
  287. }
  288. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  289. fe_sec_voltage_t voltage)
  290. {
  291. struct cx8802_dev *dev= fe->dvb->priv;
  292. struct cx88_core *core = dev->core;
  293. if (voltage == SEC_VOLTAGE_OFF)
  294. cx_write(MO_GP0_IO, 0x000006fb);
  295. else
  296. cx_write(MO_GP0_IO, 0x000006f9);
  297. if (core->prev_set_voltage)
  298. return core->prev_set_voltage(fe, voltage);
  299. return 0;
  300. }
  301. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  302. fe_sec_voltage_t voltage)
  303. {
  304. struct cx8802_dev *dev= fe->dvb->priv;
  305. struct cx88_core *core = dev->core;
  306. if (voltage == SEC_VOLTAGE_OFF) {
  307. dprintk(1,"LNB Voltage OFF\n");
  308. cx_write(MO_GP0_IO, 0x0000efff);
  309. }
  310. if (core->prev_set_voltage)
  311. return core->prev_set_voltage(fe, voltage);
  312. return 0;
  313. }
  314. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  315. {
  316. struct cx88_core *core = ptr;
  317. switch (command) {
  318. case XC2028_TUNER_RESET:
  319. /* Send the tuner in then out of reset */
  320. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
  321. switch (core->boardnr) {
  322. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  323. /* GPIO-4 xc3028 tuner */
  324. cx_set(MO_GP0_IO, 0x00001000);
  325. cx_clear(MO_GP0_IO, 0x00000010);
  326. msleep(100);
  327. cx_set(MO_GP0_IO, 0x00000010);
  328. msleep(100);
  329. break;
  330. }
  331. break;
  332. case XC2028_RESET_CLK:
  333. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
  334. break;
  335. default:
  336. dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
  337. command, arg);
  338. return -EINVAL;
  339. }
  340. return 0;
  341. }
  342. static struct cx24123_config geniatech_dvbs_config = {
  343. .demod_address = 0x55,
  344. .set_ts_params = cx24123_set_ts_param,
  345. };
  346. static struct cx24123_config hauppauge_novas_config = {
  347. .demod_address = 0x55,
  348. .set_ts_params = cx24123_set_ts_param,
  349. };
  350. static struct cx24123_config kworld_dvbs_100_config = {
  351. .demod_address = 0x15,
  352. .set_ts_params = cx24123_set_ts_param,
  353. .lnb_polarity = 1,
  354. };
  355. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  356. .demod_address = 0x32 >> 1,
  357. .output_mode = S5H1409_PARALLEL_OUTPUT,
  358. .gpio = S5H1409_GPIO_ON,
  359. .qam_if = 44000,
  360. .inversion = S5H1409_INVERSION_OFF,
  361. .status_mode = S5H1409_DEMODLOCKING,
  362. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  363. };
  364. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  365. .demod_address = 0x32 >> 1,
  366. .output_mode = S5H1409_SERIAL_OUTPUT,
  367. .gpio = S5H1409_GPIO_OFF,
  368. .inversion = S5H1409_INVERSION_OFF,
  369. .status_mode = S5H1409_DEMODLOCKING,
  370. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  371. };
  372. static struct s5h1409_config kworld_atsc_120_config = {
  373. .demod_address = 0x32 >> 1,
  374. .output_mode = S5H1409_SERIAL_OUTPUT,
  375. .gpio = S5H1409_GPIO_OFF,
  376. .inversion = S5H1409_INVERSION_OFF,
  377. .status_mode = S5H1409_DEMODLOCKING,
  378. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  379. };
  380. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  381. .i2c_address = 0x64,
  382. .if_khz = 5380,
  383. .tuner_callback = cx88_tuner_callback,
  384. };
  385. static struct zl10353_config cx88_geniatech_x8000_mt = {
  386. .demod_address = (0x1e >> 1),
  387. .no_tuner = 1,
  388. };
  389. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  390. {
  391. struct dvb_frontend *fe;
  392. struct xc2028_ctrl ctl;
  393. struct xc2028_config cfg = {
  394. .i2c_adap = &dev->core->i2c_adap,
  395. .i2c_addr = addr,
  396. .ctrl = &ctl,
  397. .callback = cx88_tuner_callback,
  398. };
  399. if (!dev->dvb.frontend) {
  400. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  401. "Can't attach xc3028\n",
  402. dev->core->name);
  403. return -EINVAL;
  404. }
  405. /*
  406. * Some xc3028 devices may be hidden by an I2C gate. This is known
  407. * to happen with some s5h1409-based devices.
  408. * Now that I2C gate is open, sets up xc3028 configuration
  409. */
  410. cx88_setup_xc3028(dev->core, &ctl);
  411. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  412. if (!fe) {
  413. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  414. dev->core->name);
  415. dvb_frontend_detach(dev->dvb.frontend);
  416. dvb_unregister_frontend(dev->dvb.frontend);
  417. dev->dvb.frontend = NULL;
  418. return -EINVAL;
  419. }
  420. printk(KERN_INFO "%s/2: xc3028 attached\n",
  421. dev->core->name);
  422. return 0;
  423. }
  424. static int dvb_register(struct cx8802_dev *dev)
  425. {
  426. /* init struct videobuf_dvb */
  427. dev->dvb.name = dev->core->name;
  428. dev->ts_gen_cntrl = 0x0c;
  429. /* init frontend */
  430. switch (dev->core->boardnr) {
  431. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  432. dev->dvb.frontend = dvb_attach(cx22702_attach,
  433. &connexant_refboard_config,
  434. &dev->core->i2c_adap);
  435. if (dev->dvb.frontend != NULL) {
  436. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  437. &dev->core->i2c_adap,
  438. DVB_PLL_THOMSON_DTT759X);
  439. }
  440. break;
  441. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  442. case CX88_BOARD_CONEXANT_DVB_T1:
  443. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  444. case CX88_BOARD_WINFAST_DTV1000:
  445. dev->dvb.frontend = dvb_attach(cx22702_attach,
  446. &connexant_refboard_config,
  447. &dev->core->i2c_adap);
  448. if (dev->dvb.frontend != NULL) {
  449. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  450. &dev->core->i2c_adap,
  451. DVB_PLL_THOMSON_DTT7579);
  452. }
  453. break;
  454. case CX88_BOARD_WINFAST_DTV2000H:
  455. case CX88_BOARD_HAUPPAUGE_HVR1100:
  456. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  457. case CX88_BOARD_HAUPPAUGE_HVR1300:
  458. case CX88_BOARD_HAUPPAUGE_HVR3000:
  459. dev->dvb.frontend = dvb_attach(cx22702_attach,
  460. &hauppauge_hvr_config,
  461. &dev->core->i2c_adap);
  462. if (dev->dvb.frontend != NULL) {
  463. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  464. &dev->core->i2c_adap, 0x61,
  465. TUNER_PHILIPS_FMD1216ME_MK3);
  466. }
  467. break;
  468. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  469. dev->dvb.frontend = dvb_attach(mt352_attach,
  470. &dvico_fusionhdtv,
  471. &dev->core->i2c_adap);
  472. if (dev->dvb.frontend != NULL) {
  473. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  474. NULL, DVB_PLL_THOMSON_DTT7579);
  475. break;
  476. }
  477. /* ZL10353 replaces MT352 on later cards */
  478. dev->dvb.frontend = dvb_attach(zl10353_attach,
  479. &dvico_fusionhdtv_plus_v1_1,
  480. &dev->core->i2c_adap);
  481. if (dev->dvb.frontend != NULL) {
  482. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  483. NULL, DVB_PLL_THOMSON_DTT7579);
  484. }
  485. break;
  486. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  487. /* The tin box says DEE1601, but it seems to be DTT7579
  488. * compatible, with a slightly different MT352 AGC gain. */
  489. dev->dvb.frontend = dvb_attach(mt352_attach,
  490. &dvico_fusionhdtv_dual,
  491. &dev->core->i2c_adap);
  492. if (dev->dvb.frontend != NULL) {
  493. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  494. NULL, DVB_PLL_THOMSON_DTT7579);
  495. break;
  496. }
  497. /* ZL10353 replaces MT352 on later cards */
  498. dev->dvb.frontend = dvb_attach(zl10353_attach,
  499. &dvico_fusionhdtv_plus_v1_1,
  500. &dev->core->i2c_adap);
  501. if (dev->dvb.frontend != NULL) {
  502. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  503. NULL, DVB_PLL_THOMSON_DTT7579);
  504. }
  505. break;
  506. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  507. dev->dvb.frontend = dvb_attach(mt352_attach,
  508. &dvico_fusionhdtv,
  509. &dev->core->i2c_adap);
  510. if (dev->dvb.frontend != NULL) {
  511. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  512. NULL, DVB_PLL_LG_Z201);
  513. }
  514. break;
  515. case CX88_BOARD_KWORLD_DVB_T:
  516. case CX88_BOARD_DNTV_LIVE_DVB_T:
  517. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  518. dev->dvb.frontend = dvb_attach(mt352_attach,
  519. &dntv_live_dvbt_config,
  520. &dev->core->i2c_adap);
  521. if (dev->dvb.frontend != NULL) {
  522. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  523. NULL, DVB_PLL_UNKNOWN_1);
  524. }
  525. break;
  526. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  527. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  528. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  529. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  530. &dev->vp3054->adap);
  531. if (dev->dvb.frontend != NULL) {
  532. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  533. &dev->core->i2c_adap, 0x61,
  534. TUNER_PHILIPS_FMD1216ME_MK3);
  535. }
  536. #else
  537. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  538. #endif
  539. break;
  540. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  541. dev->dvb.frontend = dvb_attach(zl10353_attach,
  542. &dvico_fusionhdtv_hybrid,
  543. &dev->core->i2c_adap);
  544. if (dev->dvb.frontend != NULL) {
  545. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  546. &dev->core->i2c_adap, 0x61,
  547. TUNER_THOMSON_FE6600);
  548. }
  549. break;
  550. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  551. dev->dvb.frontend = dvb_attach(zl10353_attach,
  552. &dvico_fusionhdtv_xc3028,
  553. &dev->core->i2c_adap);
  554. if (dev->dvb.frontend == NULL)
  555. dev->dvb.frontend = dvb_attach(mt352_attach,
  556. &dvico_fusionhdtv_mt352_xc3028,
  557. &dev->core->i2c_adap);
  558. /*
  559. * On this board, the demod provides the I2C bus pullup.
  560. * We must not permit gate_ctrl to be performed, or
  561. * the xc3028 cannot communicate on the bus.
  562. */
  563. if (dev->dvb.frontend)
  564. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  565. if (attach_xc3028(0x61, dev) < 0)
  566. return -EINVAL;
  567. break;
  568. case CX88_BOARD_PCHDTV_HD3000:
  569. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  570. &dev->core->i2c_adap);
  571. if (dev->dvb.frontend != NULL) {
  572. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  573. &dev->core->i2c_adap, 0x61,
  574. TUNER_THOMSON_DTT761X);
  575. }
  576. break;
  577. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  578. dev->ts_gen_cntrl = 0x08;
  579. {
  580. /* Do a hardware reset of chip before using it. */
  581. struct cx88_core *core = dev->core;
  582. cx_clear(MO_GP0_IO, 1);
  583. mdelay(100);
  584. cx_set(MO_GP0_IO, 1);
  585. mdelay(200);
  586. /* Select RF connector callback */
  587. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  588. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  589. &fusionhdtv_3_gold,
  590. &dev->core->i2c_adap);
  591. if (dev->dvb.frontend != NULL) {
  592. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  593. &dev->core->i2c_adap, 0x61,
  594. TUNER_MICROTUNE_4042FI5);
  595. }
  596. }
  597. break;
  598. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  599. dev->ts_gen_cntrl = 0x08;
  600. {
  601. /* Do a hardware reset of chip before using it. */
  602. struct cx88_core *core = dev->core;
  603. cx_clear(MO_GP0_IO, 1);
  604. mdelay(100);
  605. cx_set(MO_GP0_IO, 9);
  606. mdelay(200);
  607. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  608. &fusionhdtv_3_gold,
  609. &dev->core->i2c_adap);
  610. if (dev->dvb.frontend != NULL) {
  611. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  612. &dev->core->i2c_adap, 0x61,
  613. TUNER_THOMSON_DTT761X);
  614. }
  615. }
  616. break;
  617. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  618. dev->ts_gen_cntrl = 0x08;
  619. {
  620. /* Do a hardware reset of chip before using it. */
  621. struct cx88_core *core = dev->core;
  622. cx_clear(MO_GP0_IO, 1);
  623. mdelay(100);
  624. cx_set(MO_GP0_IO, 1);
  625. mdelay(200);
  626. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  627. &fusionhdtv_5_gold,
  628. &dev->core->i2c_adap);
  629. if (dev->dvb.frontend != NULL) {
  630. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  631. &dev->core->i2c_adap, 0x61,
  632. TUNER_LG_TDVS_H06XF);
  633. dvb_attach(tda9887_attach, dev->dvb.frontend,
  634. &dev->core->i2c_adap, 0x43);
  635. }
  636. }
  637. break;
  638. case CX88_BOARD_PCHDTV_HD5500:
  639. dev->ts_gen_cntrl = 0x08;
  640. {
  641. /* Do a hardware reset of chip before using it. */
  642. struct cx88_core *core = dev->core;
  643. cx_clear(MO_GP0_IO, 1);
  644. mdelay(100);
  645. cx_set(MO_GP0_IO, 1);
  646. mdelay(200);
  647. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  648. &pchdtv_hd5500,
  649. &dev->core->i2c_adap);
  650. if (dev->dvb.frontend != NULL) {
  651. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  652. &dev->core->i2c_adap, 0x61,
  653. TUNER_LG_TDVS_H06XF);
  654. dvb_attach(tda9887_attach, dev->dvb.frontend,
  655. &dev->core->i2c_adap, 0x43);
  656. }
  657. }
  658. break;
  659. case CX88_BOARD_ATI_HDTVWONDER:
  660. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  661. &ati_hdtvwonder,
  662. &dev->core->i2c_adap);
  663. if (dev->dvb.frontend != NULL) {
  664. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  665. &dev->core->i2c_adap, 0x61,
  666. TUNER_PHILIPS_TUV1236D);
  667. }
  668. break;
  669. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  670. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  671. dev->dvb.frontend = dvb_attach(cx24123_attach,
  672. &hauppauge_novas_config,
  673. &dev->core->i2c_adap);
  674. if (dev->dvb.frontend) {
  675. dvb_attach(isl6421_attach, dev->dvb.frontend,
  676. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  677. }
  678. break;
  679. case CX88_BOARD_KWORLD_DVBS_100:
  680. dev->dvb.frontend = dvb_attach(cx24123_attach,
  681. &kworld_dvbs_100_config,
  682. &dev->core->i2c_adap);
  683. if (dev->dvb.frontend) {
  684. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  685. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  686. }
  687. break;
  688. case CX88_BOARD_GENIATECH_DVBS:
  689. dev->dvb.frontend = dvb_attach(cx24123_attach,
  690. &geniatech_dvbs_config,
  691. &dev->core->i2c_adap);
  692. if (dev->dvb.frontend) {
  693. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  694. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  695. }
  696. break;
  697. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  698. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  699. &pinnacle_pctv_hd_800i_config,
  700. &dev->core->i2c_adap);
  701. if (dev->dvb.frontend != NULL) {
  702. /* tuner_config.video_dev must point to
  703. * i2c_adap.algo_data
  704. */
  705. pinnacle_pctv_hd_800i_tuner_config.priv =
  706. dev->core->i2c_adap.algo_data;
  707. dvb_attach(xc5000_attach, dev->dvb.frontend,
  708. &dev->core->i2c_adap,
  709. &pinnacle_pctv_hd_800i_tuner_config);
  710. }
  711. break;
  712. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  713. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  714. &dvico_hdtv5_pci_nano_config,
  715. &dev->core->i2c_adap);
  716. if (dev->dvb.frontend != NULL) {
  717. struct dvb_frontend *fe;
  718. struct xc2028_config cfg = {
  719. .i2c_adap = &dev->core->i2c_adap,
  720. .i2c_addr = 0x61,
  721. .callback = cx88_pci_nano_callback,
  722. };
  723. static struct xc2028_ctrl ctl = {
  724. .fname = "xc3028-v27.fw",
  725. .max_len = 64,
  726. .scode_table = OREN538,
  727. };
  728. fe = dvb_attach(xc2028_attach,
  729. dev->dvb.frontend, &cfg);
  730. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  731. fe->ops.tuner_ops.set_config(fe, &ctl);
  732. }
  733. break;
  734. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  735. dev->dvb.frontend = dvb_attach(zl10353_attach,
  736. &cx88_geniatech_x8000_mt,
  737. &dev->core->i2c_adap);
  738. if (attach_xc3028(0x61, dev) < 0)
  739. return -EINVAL;
  740. break;
  741. case CX88_BOARD_GENIATECH_X8000_MT:
  742. dev->ts_gen_cntrl = 0x00;
  743. dev->dvb.frontend = dvb_attach(zl10353_attach,
  744. &cx88_geniatech_x8000_mt,
  745. &dev->core->i2c_adap);
  746. if (attach_xc3028(0x61, dev) < 0)
  747. return -EINVAL;
  748. break;
  749. case CX88_BOARD_KWORLD_ATSC_120:
  750. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  751. &kworld_atsc_120_config,
  752. &dev->core->i2c_adap);
  753. if (attach_xc3028(0x61, dev) < 0)
  754. return -EINVAL;
  755. break;
  756. default:
  757. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  758. dev->core->name);
  759. break;
  760. }
  761. if (NULL == dev->dvb.frontend) {
  762. printk(KERN_ERR
  763. "%s/2: frontend initialization failed\n",
  764. dev->core->name);
  765. return -EINVAL;
  766. }
  767. /* Ensure all frontends negotiate bus access */
  768. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  769. /* Put the analog decoder in standby to keep it quiet */
  770. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  771. /* register everything */
  772. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  773. }
  774. /* ----------------------------------------------------------- */
  775. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  776. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  777. {
  778. struct cx88_core *core = drv->core;
  779. int err = 0;
  780. dprintk( 1, "%s\n", __FUNCTION__);
  781. switch (core->boardnr) {
  782. case CX88_BOARD_HAUPPAUGE_HVR1300:
  783. /* We arrive here with either the cx23416 or the cx22702
  784. * on the bus. Take the bus from the cx23416 and enable the
  785. * cx22702 demod
  786. */
  787. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  788. cx_clear(MO_GP0_IO, 0x00000004);
  789. udelay(1000);
  790. break;
  791. default:
  792. err = -ENODEV;
  793. }
  794. return err;
  795. }
  796. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  797. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  798. {
  799. struct cx88_core *core = drv->core;
  800. int err = 0;
  801. dprintk( 1, "%s\n", __FUNCTION__);
  802. switch (core->boardnr) {
  803. case CX88_BOARD_HAUPPAUGE_HVR1300:
  804. /* Do Nothing, leave the cx22702 on the bus. */
  805. break;
  806. default:
  807. err = -ENODEV;
  808. }
  809. return err;
  810. }
  811. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  812. {
  813. struct cx88_core *core = drv->core;
  814. struct cx8802_dev *dev = drv->core->dvbdev;
  815. int err;
  816. dprintk( 1, "%s\n", __FUNCTION__);
  817. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  818. core->boardnr,
  819. core->name,
  820. core->pci_bus,
  821. core->pci_slot);
  822. err = -ENODEV;
  823. if (!(core->board.mpeg & CX88_MPEG_DVB))
  824. goto fail_core;
  825. /* If vp3054 isn't enabled, a stub will just return 0 */
  826. err = vp3054_i2c_probe(dev);
  827. if (0 != err)
  828. goto fail_core;
  829. /* dvb stuff */
  830. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  831. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  832. &dev->pci->dev, &dev->slock,
  833. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  834. V4L2_FIELD_TOP,
  835. sizeof(struct cx88_buffer),
  836. dev);
  837. err = dvb_register(dev);
  838. if (err != 0)
  839. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  840. core->name, err);
  841. fail_core:
  842. return err;
  843. }
  844. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  845. {
  846. struct cx8802_dev *dev = drv->core->dvbdev;
  847. /* dvb */
  848. videobuf_dvb_unregister(&dev->dvb);
  849. vp3054_i2c_remove(dev);
  850. return 0;
  851. }
  852. static struct cx8802_driver cx8802_dvb_driver = {
  853. .type_id = CX88_MPEG_DVB,
  854. .hw_access = CX8802_DRVCTL_SHARED,
  855. .probe = cx8802_dvb_probe,
  856. .remove = cx8802_dvb_remove,
  857. .advise_acquire = cx8802_dvb_advise_acquire,
  858. .advise_release = cx8802_dvb_advise_release,
  859. };
  860. static int dvb_init(void)
  861. {
  862. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  863. (CX88_VERSION_CODE >> 16) & 0xff,
  864. (CX88_VERSION_CODE >> 8) & 0xff,
  865. CX88_VERSION_CODE & 0xff);
  866. #ifdef SNAPSHOT
  867. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  868. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  869. #endif
  870. return cx8802_register_driver(&cx8802_dvb_driver);
  871. }
  872. static void dvb_fini(void)
  873. {
  874. cx8802_unregister_driver(&cx8802_dvb_driver);
  875. }
  876. module_init(dvb_init);
  877. module_exit(dvb_fini);
  878. /*
  879. * Local variables:
  880. * c-basic-offset: 8
  881. * compile-command: "make DVB=1"
  882. * End:
  883. */